A flash memory updating method, electronic device and computer readable storage medium
Patent Information
- Application Number
- CN202510577253.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-30
- Publication Date
- 2026-10-30
AI Technical Summary
在固定使用REFRESH对闪存的数据块进行更新时,在遇到连续掉电时,一个数据块可能来不及完成更新就再次掉电,再次上电因为不能确保数据块不受掉电影响又要从头更新,以此循环导致数据块迟迟完不成更新,最终可能导致数据丢失
[0013]为解决上述技术问题,本申请采用的另一个技术方案是:提供一种计算机可读存储介质,该计算机可读存储介质用于存储程序指令,程序指令能够被执行以实现上述的闪存更新方法。
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Figure CN123011128A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of flash memory data update technology, and in particular to a flash memory update method, electronic device, and computer-readable storage medium. Background Technology
[0002] Currently, there are two methods for updating data blocks in flash memory: REFRESH and GC. When consistently using REFRESH to update data blocks, during consecutive power outages, a data block might not have enough time to complete its update before another power outage. Upon power-up, because it cannot be guaranteed that the data block is unaffected by the power outage, it must be updated from the beginning, creating a cycle that leads to delayed updates and potentially data loss. When consistently using GC to update data blocks, it is necessary to check the mapping table or record other mapping-related information, which is relatively inefficient. Summary of the Invention
[0003] The main technical problem addressed by this application is to provide a flash memory update method, electronic device, and computer-readable storage medium that can update flash memory data blocks in a timely and efficient manner.
[0004] To address the aforementioned technical problems, this application provides a flash memory update method, comprising: acquiring target statistics of the flash memory of a target device; wherein the target statistics are statistics on the interruption of data block updates during flash memory updates due to abnormal power loss of the target device; selecting a first update strategy or a second update strategy as the target update strategy based on the target statistics; wherein, in the event of abnormal power loss of the target device, the impact on updating data blocks using the second update strategy is greater than the impact on updating data blocks using the first update strategy; and updating a first target data block to be updated in the flash memory using the target update strategy.
[0005] The target statistics include the target interruption frequency; based on the target statistics, a first update strategy or a second update strategy is selected as the target update strategy, including: in response to the target interruption frequency being greater than or equal to a first preset frequency and the current update strategy being the second update strategy, the target update strategy is switched to the first update strategy.
[0006] The flash memory update method further includes, before obtaining the target statistics of the flash memory of the target device: detecting that the target device is powered on and determining whether the last power failure of the target device was an abnormal power failure; in response to the last power failure of the target device being an abnormal power failure, detecting whether there were data blocks being updated during the last power failure; and obtaining the target statistics of the flash memory of the target device, including: in response to the existence of data blocks being updated during the last power failure, obtaining the target statistics of the flash memory of the target device.
[0007] The target statistics include the target interruption frequency; obtaining the target statistics for the flash memory of the target device, including: obtaining the historical interruption frequency of the flash memory; wherein, the historical interruption frequency is the frequency at which the update of the data block of the flash memory was interrupted by the abnormal power failure of the target device before the last power failure; in response to the historical interruption frequency being greater than or equal to a second preset frequency, the second preset frequency is used as the target interruption frequency; wherein, the second preset frequency is greater than a first preset frequency; in response to the historical interruption frequency being less than the second preset frequency, the historical interruption frequency is increased according to a preset first adjustment step size, and the increased historical interruption frequency is used as the target interruption frequency.
[0008] The target statistics include the target interruption frequency, the first target data block to be updated is at least two, and the current update strategy is the first update strategy. After updating the first target data block to be updated in the flash memory using the target update strategy, the flash memory update method further includes: in response to completing the update of a first target data block to be updated using the first update strategy, reducing the target interruption frequency; based on the reduced target interruption frequency, switching the target update strategy to the second update strategy; and using the second update strategy to update the remaining data blocks to be updated.
[0009] Among them, based on the reduced target interruption frequency, the target update strategy is switched to the second update strategy, including: in response to the reduced target interruption frequency being less than the third preset frequency, the target update strategy is switched to the second update strategy.
[0010] The process of reducing the target interruption frequency includes: determining whether there are any remaining data blocks to be updated; in response to the existence of remaining data blocks to be updated, reducing the target interruption frequency according to a preset second adjustment step size; in response to the absence of any remaining data blocks to be updated, adjusting the target interruption frequency to a fourth preset frequency; wherein the fourth preset frequency is less than the target interruption frequency.
[0011] The flash memory update method further includes: receiving an update request for a second target data block to be updated, and determining whether the data update conditions for updating using a first update strategy are met; wherein the data update conditions include at least one of the following: the target update strategy is the first update strategy, and the effective data amount of the second target data block to be updated is less than or equal to a preset data amount; in response to meeting the data update conditions, updating the second target data block to be updated using the first update strategy.
[0012] To solve the above-mentioned technical problems, another technical solution adopted in this application is to provide an electronic device, which includes a memory and a processor. The memory stores program instructions, and the processor executes the program instructions to implement the above-mentioned flash memory update method.
[0013] To solve the above-mentioned technical problems, another technical solution adopted in this application is to provide a computer-readable storage medium for storing program instructions that can be executed to implement the above-mentioned flash memory update method.
[0014] The above technical solution addresses the issue of target statistics being interrupted by abnormal power outages during flash memory data block updates. By acquiring these statistics, it's possible to determine if the target device is experiencing continuous abnormal power outages. Therefore, based on whether the target device is experiencing continuous abnormal power outages, a target update strategy is determined for updating the flash memory data blocks. This strategy is then used to update the first target data block in the flash memory, ensuring efficient and timely updates and preventing data loss. Attached Figure Description
[0015] Figure 1 This is a flowchart illustrating an embodiment of the flash memory update method provided in this application;
[0016] Figure 2 yes Figure 1 The flowchart of step S11 shown is a schematic diagram of one embodiment.
[0017] Figure 3 This is a flowchart illustrating another embodiment of the flash memory update method provided in this application;
[0018] Figure 4 This is a flowchart illustrating another embodiment of the flash memory update method provided in this application;
[0019] Figure 5 This is a schematic diagram of the structure of an embodiment of the flash memory update device provided in this application;
[0020] Figure 6 This is a schematic diagram of the structure of an embodiment of the electronic device provided in this application;
[0021] Figure 7 This is a schematic diagram of an embodiment of the computer-readable storage medium provided in this application. Detailed Implementation
[0022] The embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0023] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.
[0024] In this document, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, "many" in this document means two or more. Moreover, the term "at least one" in this document means any combination of at least two of any one or more of a plurality of objects. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.
[0025] Please see Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of the flash memory update method provided in this application. It should be noted that if substantially the same result is achieved, this embodiment does not necessarily replace it. Figure 1 The illustrated process sequence is limited. For example... Figure 1 As shown, this embodiment includes:
[0026] Step S11: Obtain target statistics for the flash memory of the target device.
[0027] In this embodiment, target statistics for the flash memory of the target device are obtained; wherein, the target statistics are the statistics of data block updates to the flash memory being interrupted by abnormal power outages of the target device. Since the target statistics are the statistics of data block updates to the flash memory being interrupted by abnormal power outages of the target device, by obtaining the target statistics for the flash memory of the target device, it can be determined whether the target device is currently experiencing continuous abnormal power outages.
[0028] In one embodiment, the target statistics include the target interruption frequency, that is, the target interruption frequency when updating data blocks in the flash memory is interrupted by an abnormal power failure of the target device.
[0029] Of course, in other implementations, the target statistics may also include the target interruption frequency, etc., which are not limited here and can be set according to actual needs.
[0030] In one implementation, when an abnormal power outage is detected on the target device, and data blocks being updated existed at the time of the previous abnormal power outage, the process of obtaining target statistics for the flash memory of the target device and subsequent steps is triggered. This is to facilitate subsequent determination of whether the target update strategy for updating data blocks in the flash memory needs to be adjusted. The current target update strategy for updating data blocks in the flash memory is applicable to the present situation. However, when the previous power outage on the target device was abnormal and no data blocks were being updated at the time of the previous abnormal power outage, or when the previous power outage on the target device was not abnormal and the statistics regarding the interruption of data block updates due to the abnormal power outage on the target device remained unchanged, it indicates that the current target update strategy for updating data blocks in the flash memory is still applicable to the present situation. Therefore, it is not necessary to trigger the process of obtaining target statistics for the flash memory of the target device and subsequent steps, i.e., it is not necessary to adjust the target update strategy for updating data blocks in the flash memory. The current target update strategy for updating data blocks in flash memory is applicable. However, when the target device experienced an abnormal power outage and the data blocks being updated existed at the time of the previous power outage, the statistics on the interruption of flash memory data block updates due to the abnormal power outage change. This indicates that the current target update strategy for updating flash memory data blocks may no longer be applicable. Therefore, it is necessary to trigger the execution of obtaining the target statistics for the flash memory of the target device and subsequent steps, i.e., to determine whether the target update strategy for updating flash memory data blocks needs to be adjusted.
[0031] Step S12: Based on the target statistics, select either the first update strategy or the second update strategy as the target update strategy.
[0032] In this embodiment, based on the target statistics, either a first update strategy or a second update strategy is selected as the target update strategy. Specifically, in the event of an abnormal power outage of the target device, the impact of updating data blocks using the second update strategy is greater than the impact of updating data blocks using the first update strategy. Since the target statistics represent the statistics of data block updates to the flash memory interrupted by abnormal power outages of the target device, obtaining the target statistics for the flash memory of the target device allows determination of whether the current target device is experiencing continuous abnormal power outages. Therefore, based on whether the current target device is experiencing continuous abnormal power outages, an update strategy is determined for updating the data blocks in the flash memory to ensure efficient and timely updates and prevent data loss.
[0033] In the event of an abnormal power outage of the target device, the impact on updating data blocks using the second update strategy is greater than the impact on updating data blocks using the first update strategy. Therefore, in the event of consecutive abnormal power outages of the target device, updating data blocks using the second update strategy will result in delayed updates and may even lead to data loss.
[0034] For example, taking GC as the first update strategy and REFRESH as the second update strategy: When using REFRESH to update data blocks in flash memory, if there is an abnormal power outage, for data blocks whose update process was interrupted by the power outage, the data in the data block cannot be guaranteed to be "clean" when the device powers back on. Therefore, the data block needs to be updated from scratch to ensure data integrity and consistency. When using REFRESH to update data blocks in flash memory, if there are consecutive abnormal power outages, for data blocks whose update process was interrupted by the power outage, the update may not be completed in time before the device loses power again. When the device powers back on, the update still needs to start from scratch, and this cycle causes the data blocks to be updated indefinitely, which may eventually lead to data loss.
[0035] When updating data blocks in flash memory using GC, if the device experiences an abnormal power outage, the data blocks whose update process was interrupted by the abnormal power outage can inherit the previously updated parts of the data blocks when the device powers on. Therefore, when the device powers on, it is only necessary to continue updating the unupdated parts of the data blocks until the update of the data blocks is completed.
[0036] Therefore, in the event of an abnormal or continuous power outage of the target device, the impact on updating data blocks using REFRESH is greater than the impact on updating data blocks using GC. However, it should be noted that updating data blocks in flash memory using REFRESH is more efficient than updating data blocks in flash memory using GC. Therefore, under normal circumstances, updating data blocks in flash memory using REFRESH should be given priority.
[0037] Therefore, based on whether the target device is experiencing continuous abnormal power outages, it is determined whether to use REFRESH or GC to update the data blocks of the flash memory, in order to ensure that the data blocks of the flash memory are updated efficiently and in a timely manner, and to prevent data loss.
[0038] It's important to note that the primary update strategy—GC (Garbage Collection)—is the core mechanism used to manage storage space in flash memory storage systems. Because flash memory has the "erase before write" characteristic, when updating data, the old data must first be moved to a new location before erasing the original block. GC improves write efficiency by reclaiming blocks containing invalid data, thus freeing up storage space.
[0039] The second update strategy—REFRESH—is a key mechanism in flash memory storage systems used to maintain data integrity. Because flash memory cells rely on charge to store data, blocks that haven't been read for a long time may degrade due to charge leakage. REFRESH prevents data loss by periodically reading block contents, using ECC (Error Correction Code) to correct potential errors, and rewriting data to replenish the charge.
[0040] In one embodiment, the target statistics include the target interruption frequency. Based on these statistics, a first update strategy or a second update strategy is selected as the target update strategy. Specifically, in response to a target interruption frequency greater than or equal to a first preset frequency, and the current update strategy being the second update strategy, the target update strategy is switched to the first update strategy. Compared to the first update strategy, the second update strategy is more efficient at updating flash memory data blocks; therefore, it is usually preferred to use the second update strategy to update flash memory data blocks. When the target interruption frequency is greater than or equal to the first preset frequency, it indicates that the target device is experiencing continuous abnormal power outages. Continuous abnormal power outages have a greater impact on updating flash memory data blocks using the second update strategy. If the second update strategy is still used to update flash memory data blocks subsequently, it may lead to a prolonged delay in updating the flash memory data blocks, or even data loss. Therefore, in this case, the target update strategy is switched to the first update strategy so that subsequent updates to flash memory data are less affected by continuous abnormal power outages, ensuring timely and efficient updates to flash memory data blocks and preventing data loss.
[0041] The first preset frequency is not limited and can be set according to actual usage needs.
[0042] For example, taking REFRESH as the second update strategy and GC as the first update strategy: Compared to GC, REFRESH is more efficient at updating flash memory data blocks, so it is usually preferred to use REFRESH to update flash memory data blocks. When the target interruption frequency is greater than or equal to the first preset frequency, it indicates that the target device is experiencing continuous abnormal power outages. Continuous abnormal power outages have a greater impact on updating flash memory data blocks using REFRESH. If REFRESH is still used to update flash memory data blocks subsequently, it may lead to a prolonged delay in updating the flash memory data blocks, or even data loss. Therefore, at this time, the target update strategy is switched to GC, so that subsequent updates to flash memory data are less affected by continuous abnormal power outages, ensuring timely and efficient updates to flash memory data blocks and preventing data loss.
[0043] Step S13: Update the first target data block to be updated in the flash memory using the target update strategy.
[0044] In this embodiment, a target update strategy is used to update the first target data block to be updated in the flash memory. Since the target statistics represent the statistics of data block updates to the flash memory interrupted by abnormal power outages in the target device, obtaining the target statistics for the flash memory of the target device can determine whether the target device is currently experiencing continuous abnormal power outages. Therefore, based on whether the target device is experiencing continuous abnormal power outages, a target update strategy is determined for updating the data blocks in the flash memory, and this strategy is used to update the first target data block to be updated in the flash memory, ensuring that the data blocks in the flash memory are updated efficiently and promptly, and preventing data loss.
[0045] In one embodiment, upon receiving an update request for a second target data block to be updated, it is determined whether the data update conditions for updating using a second update strategy are met. These data update conditions include at least one of the following: the target update strategy is the second update strategy, or the effective data volume of the second target data block to be updated is less than or equal to a preset data volume. In response to meeting the data update conditions, the second target data block to be updated is updated using the second update strategy. That is, when the current target update strategy is the first update strategy, or when the effective data volume of the second target data block to be updated is small, the second target data block to be updated is updated using the first update strategy.
[0046] There is no limit to the size of the preset data volume; it can be set according to actual usage needs.
[0047] Please see Figure 2 , Figure 2 yes Figure 1The flowchart shown is a schematic diagram of one embodiment of step S11. It should be noted that if substantially the same result is achieved, this embodiment does not necessarily follow the same pattern. Figure 2 The illustrated process sequence is limited. For example... Figure 2 As shown, the target statistics include the frequency of target interruption. In this embodiment, this includes:
[0048] Step S21: Obtain the historical interruption frequency of the flash memory.
[0049] In this embodiment, the historical interruption frequency of the flash memory is obtained, wherein the historical interruption frequency is the frequency at which the update of the data block of the flash memory is interrupted by the abnormal power failure of the target device during the last power failure.
[0050] Step S22: In response to the historical interruption frequency being greater than or equal to the second preset frequency, the second preset frequency is used as the target interruption frequency.
[0051] In this embodiment, in response to the historical interruption frequency being greater than or equal to a second preset frequency, the second preset frequency is used as the target interruption frequency. That is, if the frequency of interruptions caused by abnormal power loss of the target device during the last power outage when updating data blocks in the flash memory is greater than or equal to the second preset frequency, then the statistical frequency of interruptions caused by abnormal power loss of the target device during the last power outage will no longer be increased. Instead, the frequency of interruptions caused by abnormal power loss of the target device during the last power outage when updating data blocks in the flash memory will be directly used as the target interruption frequency to improve detection sensitivity.
[0052] The second preset frequency is not limited and can be set according to actual usage needs.
[0053] Step S23: In response to the historical interruption frequency being less than the second preset frequency, increase the historical interruption frequency according to the preset first adjustment step size, and use the increased historical interruption frequency as the target interruption frequency.
[0054] In this embodiment, in response to the historical interruption frequency being less than a second preset frequency, the historical interruption frequency is increased by a preset first adjustment step size, and the increased historical interruption frequency is used as the target interruption frequency. That is, if the frequency of interruptions caused by abnormal power loss of the target device during the last power outage when updating data blocks in the flash memory is less than the second preset frequency, the statistical frequency of interruptions caused by abnormal power loss of the target device during updating data blocks in the flash memory continues to increase, and the increased statistical frequency is used as the target interruption frequency.
[0055] The size of the first adjustment step is not limited and can be set according to actual usage needs. For example, the first adjustment step can be 1, 2, or 3, etc.
[0056] Please see Figure 3 , Figure 3This is a flowchart illustrating another embodiment of the flash memory update method provided in this application. It should be noted that if substantially the same result is achieved, this embodiment does not necessarily follow that approach. Figure 3 The illustrated process sequence is limited. For example... Figure 3 As shown, based on the target statistics, the first update strategy is selected as the target update strategy. This embodiment includes:
[0057] Step S31: Obtain target statistics for the flash memory of the target device.
[0058] Step S31 is similar to step S11, and will not be described again here.
[0059] Step S32: Based on the target statistics, select either the first update strategy or the second update strategy as the target update strategy.
[0060] Step S32 is similar to step S12, and will not be described again here.
[0061] Step S33: Update the first target data block to be updated in the flash memory using the target update strategy.
[0062] Step S33 is similar to step S13, and will not be described again here.
[0063] Step S34: In response to completing the update of a first target data block to be updated using the first update strategy, reduce the target interruption frequency.
[0064] In this embodiment, in response to completing the update of a first target data block to be updated using the first update strategy, the frequency of target interruption is reduced. That is, when completing the update of a first target data block to be updated in the update request queue using the first update strategy, the statistical frequency of interruption caused by abnormal power failure of the target device during the update of the flash memory data block is reduced.
[0065] In one embodiment, reducing the target interruption frequency specifically involves: determining whether there are any remaining data blocks to be updated; in response to the existence of remaining data blocks to be updated, reducing the target interruption frequency by a preset second adjustment step size; and in response to the absence of any remaining data blocks to be updated, adjusting the target interruption frequency to a fourth preset frequency; wherein the fourth preset frequency is less than the target interruption frequency. That is, when there are still first target data blocks to be updated in the update request queue, the statistical frequency of interruptions caused by abnormal power loss of the target device during the update of flash memory data blocks is reduced by a preset second adjustment step size, and the reduced statistical frequency is used as the reduced target interruption frequency; while when the update request queue is cleared, i.e., when there are no first target data blocks to be updated in the update request queue, the target interruption frequency is adjusted to the fourth preset frequency.
[0066] The second adjustment step size is not limited and can be set according to actual usage needs. For example, the second adjustment step size can be 1, 2, or 3. Similarly, the fourth preset frequency is not limited and can be set according to actual usage needs; for example, the fourth preset frequency can be 0.
[0067] Step S35: Based on the reduced target interruption frequency, switch the target update strategy to the second update strategy.
[0068] In this embodiment, the target update strategy is switched to the second update strategy based on the reduced target interruption frequency.
[0069] In one embodiment, in response to the reduced target interruption frequency being less than a third preset frequency, the target update strategy is switched to a second update strategy. Compared to the first update strategy, the second update strategy has higher efficiency in updating flash memory data blocks. When the reduced target interruption frequency is less than the third preset frequency, it indicates that the current target device is no longer experiencing continuous abnormal power outages. Therefore, at this time, the target update strategy is switched to the second update strategy so that subsequent updates to flash memory data blocks can be performed using the second update strategy, which has higher efficiency in updating flash memory data blocks, thus ensuring timely and efficient updates to flash memory data blocks.
[0070] The third preset frequency is not limited and can be set according to actual usage needs.
[0071] For example, taking REFRESH as the second update strategy and GC as the first update strategy: Compared to GC, REFRESH is more efficient at updating data blocks in flash memory. When the reduced target interruption frequency is less than the third preset frequency, it indicates that the target device is no longer experiencing continuous abnormal power outages. Therefore, at this point, the target update strategy is switched to REFRESH, so that subsequent updates to flash memory data blocks can be performed using REFRESH, which is more efficient at updating flash memory data blocks, ensuring timely and efficient updates to flash memory data blocks.
[0072] Step S36: Update the remaining data blocks to be updated using the second update strategy.
[0073] In this embodiment, the remaining data blocks to be updated are updated using a second update strategy. Compared to the first update strategy, the second update strategy is more efficient at updating data blocks in the flash memory. When the reduced target interruption frequency is less than the third preset frequency, it indicates that the current target device is no longer experiencing continuous abnormal power outages. Therefore, at this time, the target update strategy is switched to the second update strategy, and the remaining data blocks to be updated are updated using the second update strategy, which is more efficient at updating data blocks in the flash memory, to ensure timely and efficient updates of the flash memory data blocks.
[0074] Please see Figure 4 , Figure 4 This is a flowchart illustrating another embodiment of the flash memory update method provided in this application. It should be noted that if substantially the same result is achieved, this embodiment does not necessarily follow that approach. Figure 4 The illustrated process sequence is limited. For example... Figure 4 As shown, this embodiment includes:
[0075] Step S41: Detect the target device power-on and determine whether the previous power outage on the target device was an abnormal power outage.
[0076] In this embodiment, the power-on of the target device is detected, and it is determined whether the previous power outage of the target device was an abnormal power outage.
[0077] Step S42: In response to the previous power failure on the target device being an abnormal power failure, check whether there were any data blocks being updated during the previous power failure.
[0078] In this embodiment, in response to the previous power failure of the target device being an abnormal power failure, it is detected whether there were any data blocks being updated during the previous power failure.
[0079] Step S43: In response to the data blocks that were updated during the last power failure, obtain the target statistics for the flash memory of the target device.
[0080] In this embodiment, in response to the data blocks that were being updated during the last power outage, target statistics of the flash memory of the target device are obtained.
[0081] In other words, when an abnormal power outage is detected on the target device, and data blocks being updated existed at the time of the previous abnormal power outage, the system triggers the acquisition of target statistics for the target device's flash memory and subsequent steps. This is to determine whether the target update strategy used to update data blocks in the flash memory needs to be adjusted. The current target update strategy for updating data blocks in the flash memory is applicable now. However, when the target device experienced an abnormal power outage and data blocks being updated existed at the time of the previous abnormal power outage, the statistics regarding the interruption of data block updates due to the abnormal power outage change. This indicates that the current target update strategy for updating data blocks in the flash memory may no longer be applicable. Therefore, it is necessary to trigger the acquisition of target statistics for the target device's flash memory and subsequent steps, i.e., to determine whether the target update strategy used to update data blocks in the flash memory needs to be adjusted.
[0082] Step S44: Based on the target statistics, select either the first update strategy or the second update strategy as the target update strategy.
[0083] Step S44 is similar to step S12, and will not be described again here.
[0084] Step S45: Update the first target data block to be updated in the flash memory using the target update strategy.
[0085] Step S45 is similar to step S13, and will not be described again here.
[0086] Please see Figure 5 , Figure 5 This is a schematic diagram of an embodiment of the flash memory update device provided in this application. The flash memory update device 50 includes an acquisition module 51, a selection module 52, and an update module 53. The acquisition module 51 is used to acquire target statistics of the flash memory of the target device; wherein, the target statistics are the statistics of data block updates of the flash memory being interrupted by abnormal power loss of the target device; the selection module 52 is used to select a first update strategy or a second update strategy as the target update strategy based on the target statistics; wherein, in the case of abnormal power loss of the target device, the impact of updating data blocks using the second update strategy is greater than the impact of updating data blocks using the first update strategy; the update module 53 is used to update the first target data block to be updated in the flash memory using the target update strategy.
[0087] The aforementioned target statistics include the target interruption frequency; the selection module 52 is used to select a first update strategy or a second update strategy as the target update strategy based on the target statistics, including: in response to the target interruption frequency being greater than or equal to a first preset frequency and the current update strategy being the second update strategy, switching the target update strategy to the first update strategy.
[0088] The flash memory update device 50 further includes a detection module 54, which is used to detect when the target device is powered on and determine whether the last power failure of the target device was an abnormal power failure before acquiring the target statistics of the flash memory of the target device; in response to the last power failure of the target device being an abnormal power failure, it detects whether there are data blocks being updated during the last power failure; the acquisition module 51 is used to acquire the target statistics of the flash memory of the target device, including: in response to the existence of data blocks being updated during the last power failure, acquiring the target statistics of the flash memory of the target device.
[0089] The aforementioned target statistics include the target interruption frequency; the acquisition module 51 is used to acquire the target statistics of the flash memory of the target device, including: acquiring the historical interruption frequency of the flash memory; wherein, the historical interruption frequency is the frequency at which the update of the data block of the flash memory was interrupted by the abnormal power failure of the target device before the last power failure; in response to the historical interruption frequency being greater than or equal to a second preset frequency, the second preset frequency is used as the target interruption frequency; wherein, the second preset frequency is greater than a first preset frequency; in response to the historical interruption frequency being less than the second preset frequency, the historical interruption frequency is increased according to a preset first adjustment step size, and the increased historical interruption frequency is used as the target interruption frequency.
[0090] The aforementioned target statistics include the target interruption frequency, the first target data block to be updated is at least two, and the current update strategy is the first update strategy; the selection module 52 is used to reduce the target interruption frequency after updating the first target data block to be updated in the flash memory using the target update strategy, in response to completing the update of the first target data block to be updated using the first update strategy; based on the reduced target interruption frequency, the target update strategy is switched to the second update strategy; the update module 53 is used to update the remaining data blocks to be updated using the second update strategy.
[0091] The selection module 52 is used to switch the target update strategy to the second update strategy based on the reduced target interruption frequency, including: in response to the reduced target interruption frequency being less than the third preset frequency, the target update strategy is switched to the second update strategy.
[0092] The selection module 52 is used to reduce the target interruption frequency, including: determining whether there are any remaining data blocks to be updated; in response to the existence of remaining data blocks to be updated, reducing the target interruption frequency according to a preset second adjustment step size; in response to the absence of any remaining data blocks to be updated, adjusting the target interruption frequency to a fourth preset frequency; wherein the fourth preset frequency is less than the target interruption frequency.
[0093] The update module 53 is used to receive an update request for the second target data block to be updated, and determine whether the data update conditions for updating using the first update strategy are met; wherein the data update conditions include at least one of the following: the target update strategy is the first update strategy, and the effective data volume of the second target data block to be updated is less than or equal to a preset data volume; in response to meeting the data update conditions, the second target data block to be updated is updated using the first update strategy.
[0094] Please see Figure 6 , Figure 6 This is a schematic diagram of an embodiment of the electronic device provided in this application. The electronic device 60 includes a memory 61 and a processor 62 coupled to each other. The processor 62 is used to execute program instructions stored in the memory 61 to implement the steps of any of the above-described flash memory update method embodiments. In a specific implementation scenario, the electronic device 60 may include, but is not limited to, a microcomputer or a server. In addition, the electronic device 60 may also include mobile devices such as laptops and tablets, which are not limited here.
[0095] Specifically, processor 62 controls itself and memory 61 to implement the steps of any of the above-described flash memory update method embodiments. Processor 62 may also be referred to as a CPU (Central Processing Unit). Processor 62 may be an integrated circuit chip with signal processing capabilities. Processor 62 may also be a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component. A general-purpose processor may be a microprocessor or any conventional processor. Furthermore, processor 62 may be implemented using integrated circuit chips.
[0096] Please see Figure 7 , Figure 7This is a schematic diagram of the structure of an embodiment of the computer-readable storage medium provided in this application. The computer-readable storage medium 70 of this application embodiment stores program instructions 71. When executed, these program instructions 71 implement the methods provided in any embodiment of the flash memory update method and any non-conflicting combination thereof. The program instructions 71 can form a program file and be stored in the aforementioned computer-readable storage medium 70 in the form of a software product, so that a computer device (which may be a personal computer, server, or network device, etc.) can execute all or part of the steps of the methods of various embodiments of this application. The aforementioned computer-readable storage medium 70 includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks, or terminal devices such as computers, servers, mobile phones, and tablets.
[0097] If the technical solution of this application involves personal information, the product using this technical solution has clearly informed the user of the personal information processing rules and obtained the user's voluntary consent before processing the personal information. If the technical solution of this application involves sensitive personal information, the product using this technical solution has obtained the user's separate consent before processing the sensitive personal information, and also meets the requirement of "express consent". For example, at personal information collection devices such as cameras, clear and prominent signs are set up to inform users that they have entered the scope of personal information collection and that personal information will be collected. If an individual voluntarily enters the collection scope, it is deemed that they have agreed to the collection of their personal information; or on the personal information processing device, with clear signs / information informing users of the personal information processing rules, authorization is obtained from the individual through pop-up information or by asking the individual to upload their personal information; wherein, the personal information processing rules may include information such as the personal information processor, the purpose of personal information processing, the processing method, and the types of personal information processed.
[0098] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A flash memory update method, characterized in that, The method includes: Obtain target statistics for the flash memory of the target device; wherein, the target statistics are the statistics of when the update of the data block of the flash memory is interrupted by the abnormal power failure of the target device; Based on the target statistics, either the first update strategy or the second update strategy is selected as the target update strategy; wherein, in the event of an abnormal power failure of the target device, the impact of updating the data block using the second update strategy is greater than the impact of updating the data block using the first update strategy. The first target data block to be updated in the flash memory is updated using the target update strategy.
2. The method according to claim 1, characterized in that, The target statistics include the frequency of target interruption; the step of selecting a first update strategy or a second update strategy as the target update strategy based on the target statistics includes: In response to the target interruption frequency being greater than or equal to a first preset frequency and the current update strategy being the second update strategy, the target update strategy is switched to the first update strategy.
3. The method according to claim 1, characterized in that, Before obtaining the target statistics for the flash memory of the target device, the method further includes: Upon detecting that the target device has been powered on, determine whether the previous power outage on the target device was an abnormal power outage; In response to the previous power failure on the target device being considered an abnormal power failure, the system detects whether there were any data blocks being updated during the previous power failure. The acquisition of target statistics for the flash memory of the target device includes: In response to data blocks that were updated during the last power outage, target statistics for the flash memory of the target device are obtained.
4. The method according to claim 3, characterized in that, The target statistics include the frequency of target interruptions; obtaining the target statistics for the flash memory of the target device includes: Obtain the historical interruption frequency of the flash memory; wherein, the historical interruption frequency is the frequency at which the update of the data block of the flash memory was interrupted by the abnormal power failure of the target device before the last power failure; In response to the historical interruption frequency being greater than or equal to a second preset frequency, the second preset frequency is taken as the target interruption frequency; wherein, the second preset frequency is greater than the first preset frequency; In response to the historical interruption frequency being less than the second preset frequency, the historical interruption frequency is increased according to a preset first adjustment step size, and the increased historical interruption frequency is used as the target interruption frequency.
5. The method according to claim 1, characterized in that, The target statistics include the target interruption frequency, the first target has at least two data blocks to be updated, and the current update strategy is the first update strategy; After updating the first target data block to be updated in the flash memory using the target update strategy, the method further includes: In response to updating a first target data block to be updated using the first update strategy, the frequency of target interruption is reduced. Based on the reduced target interruption frequency, the target update strategy is switched to the second update strategy; The remaining data blocks to be updated are updated using the second update strategy.
6. The method according to claim 5, characterized in that, The step of switching the target update strategy to the second update strategy based on the reduced target interruption frequency includes: In response to the reduced target interruption frequency being less than the third preset frequency, the target update strategy is switched to the second update strategy.
7. The method according to claim 5, characterized in that, Reducing the frequency of target interruption includes: Determine whether the remaining data blocks to be updated exist; In response to the existence of the remaining data block to be updated, the target interruption frequency is reduced according to a preset second adjustment step size; In response to the absence of the remaining data block to be updated, the target interruption frequency is adjusted to a fourth preset frequency; wherein the fourth preset frequency is less than the target interruption frequency.
8. The method according to claim 1, characterized in that, The method further includes: Upon receiving an update request for the second target data block to be updated, determine whether the data update conditions for updating using the first update strategy are met; wherein, the data update conditions include at least one of the following: the target update strategy is the first update strategy, and the effective data volume of the second target data block to be updated is less than or equal to a preset data volume; In response to the fulfillment of the data update conditions, the second target data block to be updated is updated using the first update strategy.
9. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing program instructions, and the processor executing the program instructions to implement the flash memory update method as described in any one of claims 1-8.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store program instructions that can be executed to implement the flash memory update method as described in any one of claims 1-8.
