A Parallel Region Partitioning and Scheduling Method for Reclaimed Units in FDP SSD

Abstract

The application claims a recycling unit parallel region division and scheduling method for FDP SSD, which comprises sequentially executed RU level parallel region division mechanism, RU level parallel region allocation mechanism and RU level parallel writing mechanism; the RU level parallel region division mechanism is used for completing hardware resource hierarchical grouping based on FDP SSD recycling group RG, and constructing parallel RU group RUG with complete parallelism; the RU level parallel region allocation mechanism is used for establishing RUH and RUG binding relationship, and completing parallel resource allocation of I / O request according to data heat; the RU level parallel writing mechanism realizes inter-RU parallel writing and multi-wafer bottom layer parallel reading and writing in single RU relying on RUG; the method as a whole constrains parallel RU group RUG to be constructed only within a single RG, and prohibits RUG construction across RGs.

Description

Technical Field

[0001] This invention relates to the field of computer storage technology, and further focuses on the performance optimization of solid-state drives (SSDs). In particular, it proposes a parallel region partitioning and scheduling method for recycling units of FDP SSDs to address the resource scheduling and space management issues of flexible data placement solid-state drives (FDP SSDs). Background Technology

[0002] With the rapid iteration of emerging technologies such as high-performance computing, image recognition, and AI training and inference, the AI-Infra field has developed rapidly. Among them, the performance and concurrency capabilities of storage systems have become the core bottleneck restricting the efficient release of AI computing power. Compared with traditional Internet applications, AI business brings an explosive growth of hot data, which puts stringent requirements on the IOPS, throughput, and latency of storage media. SSDs, with their combined advantages in performance and cost, have become a core component of enterprise-level AI storage systems. Exploiting the parallel performance of SSDs to improve throughput has become a solution to the storage dilemma in AI scenarios. However, while the parallel performance of traditional SSDs can be optimized through various mechanisms, WAFs also experience a sharp increase in performance due to frequent GC triggers and large-scale data migration, resulting in performance degradation and ultimately affecting lifespan. Although the partitioned namespace (ZNS) data placement strategy SSDs optimize parallel scheduling logic through partition isolation mechanisms, they impose a mandatory data sequential write constraint, requiring deep reconstruction of the data model and software stack on the host side. This results in low compatibility and high transformation costs, making it difficult to adapt to the flexible needs of rapid iteration in AI business.

[0003] The emergence of the flexible data placement (FDP) technology offers a breakthrough solution to the aforementioned problems. FDP technology enables deep collaboration between hosts and storage devices without disrupting the existing NVMe ecosystem, simplifying ecosystem integration and providing excellent backward compatibility. However, FDP SSDs use Reclaimed Units (RUs) as the basic management unit, and the granularity of these units directly affects space management precision and parallel efficiency. Larger RU capacities result in higher parallel throughput but can lead to data mixing and increased WAF (Web Application Firewall); conversely, smaller RU capacities offer finer data isolation but limit parallel performance. Therefore, the core of parallelism optimization based on the FDP architecture lies in balancing the advantages of fine-grained RU data isolation with the limitations of parallelism. However, the hard-coded internal structure and strategies and opaque hardware behavior of existing commercial products have directly hindered the progress of FDP SSD parallelism research.

[0004] The aforementioned problems lack effective solutions in existing research, and the significant performance differences between FDP SSD products from different storage vendors result in inconsistent parallel performance of existing hardware. Therefore, through preliminary research and literature review, it is easy to identify three limitations in current research on FDP SSD parallelism optimization, which are elaborated below:

[0005] 1. The granularity of the Run-Unit (RU) directly affects the efficiency of parallel resource utilization; fine-grained RUs have limited parallel performance. While fine-grained RUs can achieve precise space management, they are prone to insufficient utilization of parallel channels. Conversely, coarse-grained RUs can map more flash memory blocks to larger regions, achieving higher intra-region parallelism and improved throughput. However, coarse-grained RU space can lead to data with different lifecycles and data popularity being mixed in a single RU, losing the optimization effects of the FDP architecture, or even degenerating to the level of no FDP.

[0006] 2. Lack of a collaborative parallel scheduling mechanism between RUs and within flash blocks. Although the FDP architecture allows multiple RUHs to write concurrently, the lack of a collaborative parallel scheduling mechanism between RUs and within flash blocks easily leads to resource contention and I / O interference. Ignoring inter-RU collaboration and intra-RU parallel scheduling mechanisms also prevents the full exploitation of the parallel performance of FDP SSDs.

[0007] 3. Lack of research on parallelism optimization adapted to FDP architecture. Device-level parallelism optimization is a key direction for improving SSD performance. Currently, there are many gaps in research on parallelism optimization for FDP SSDs, and existing parallelism optimization strategies cannot be directly adapted to the FDP SSD architecture. Therefore, solutions adapted to the FDP architecture are urgently needed.

[0008] To address this issue, this invention proposes a parallel region partitioning and scheduling method for FDP SSDs. Existing parallelism optimization strategies fail to fully exploit the multi-level parallel potential within FDP SSDs, leading to uneven resource utilization and limited throughput. This invention studies a parallel scheduling mechanism that combines the device's parallel architecture with load characteristics to achieve efficient utilization of parallel resources and synergistic improvement in performance indicators. This invention primarily focuses on parallel scheduling strategies under fine-grained RU (Run-Up-Run) architecture. It designs an RU-level parallel region allocation module to reconstruct the native RU allocation method and further designs an RU-level parallel region writing module to fully exploit the parallel potential between RUs and enhance overall parallel processing capabilities.

[0009] A search revealed application publication number CN121070287A, which discloses a scheduling method, apparatus, data processor, and device for NVMe solid-state drives (SSDs), relating to the field of data processor technology. The method includes: receiving a request to create a virtual block device (VPD); allocating a target NVMe SSD that meets the requirements; if the target NVMe SSD supports FreeDepth Deployment (FDP) functionality, selecting multiple placement identifiers to be allocated from the target NVMe SSD's placement identifier list; and creating a VPD that supports FDP functionality based on the multiple placement identifiers and logical block address ranges; if the target NVMe SSD does not support FDP functionality, creating a VPD that does not support FDP functionality. Through this method, the data processor transparently maps and exposes the FDP capabilities of the physical NVMe SSD on the DPU side to the front-end VPD, enabling the host side to correctly use FDP technology on the VPD, achieving data placement control consistent with the physical disk's capabilities.

[0010] Previous patents focused on how to transparently transfer the FDP capabilities of physical NVMe SSDs to virtual machines in virtualization scenarios, addressing the interface and adaptation issues of how the host side perceives and uses FDP. They did not cover: 1) internal resource scheduling and parallelism mining under the FDP architecture, 2) performance differences of RU granularity strategies under different loads, and 3) the multi-dimensional impact of RU granularity on performance. This invention addresses how to rationally divide RU parallel groups and dynamically schedule them based on load within an FDP SSD. 1) It proposes an RU-level parallel region partitioning mechanism, which uses hardware hierarchical grouping based on recycling groups (RGs) to construct parallel RU groups (RUGs) with full parallelism. Furthermore, it mandates that RUGs are constructed only within a single RG, avoiding hardware conflicts across RGs and ensuring the physical feasibility of parallel writing from the underlying layer. 2) It proposes an RU-level parallel region allocation mechanism, establishing a binding relationship between RU handles (RUHs) and RUGs based on data heat, enabling differentiated parallel resource allocation for hot and cold I / O requests. This allows the RU granularity strategy to dynamically adapt to load characteristics, reducing write amplification and GC interference. 3) It designs an RU-level parallel writing mechanism to achieve horizontal bandwidth expansion for parallel writing between RUs and vertical improvement in single-RU throughput through multi-wafer-level parallel read / write within a single RU. Summary of the Invention

[0011] To address the shortcomings of existing technologies, such as their inability to adapt to FDP architecture, failure to consider the significant differences in fixed RU granularity strategies under varying loads, and the limitation of evaluating the performance impact of RU granularity to a single-dimensional metric, this invention proposes a parallel region partitioning and scheduling method for recycling units in FDPSSD. The technical solution of this invention is as follows:

[0012] A method for parallel region partitioning and scheduling of recycling units for FDP SSDs includes a sequentially executed RU-level parallel region partitioning mechanism, an RU-level parallel region allocation mechanism, and an RU-level parallel write mechanism. The RU-level parallel region partitioning mechanism is used to perform hierarchical grouping of hardware resources based on FDP SSD recycling groups (RGs) to construct parallel RU groups (RUGs) with full parallelism. The RU-level parallel region allocation mechanism is used to establish a binding relationship between RUHs and RUGs, and to complete the parallel resource allocation of I / O requests according to data heat. The RU-level parallel write mechanism relies on RUGs to achieve parallel writing between RUs and multi-wafer-level parallel read / write within a single RU. The method as a whole constrains that parallel RU groups (RUGs) are constructed only within a single RG, prohibiting the construction of RUGs across RGs.

[0013] Furthermore, the RU-level parallel region partitioning mechanism specifically includes the following steps:

[0014] Step S501: Obtain basic configuration information of the FDP SSD device, including wear group information, number of RGs, size of RUs, and hardware information;

[0015] Step S502: Select the target RG to be divided, define the isolation boundary, and prohibit parallel region division operations across RGs;

[0016] Step S503: Based on the physical flash memory topology within the target RG, the physical storage resources within the RG are divided into multiple hardware parallel groups (HPGs). Each HPG contains a set of independent, non-interfering, and concurrent flash memory wafers.

[0017] Step S504: For each HPG, based on the physical address offset of the flash memory block, the flash memory blocks with the same offset address are divided into a flash memory block group FBG, so that a single FBG has parallel read and write capabilities.

[0018] Step S505: Establish the mapping between FBG and RU, so that the flash memory blocks inside a single RU span multiple flash memory wafers;

[0019] Step S506: Verify the mapping relationship between FBG and RU within HPG to ensure that the number of RUs, capacity specifications, and physical address offsets are consistent within each HPG. If the verification passes, proceed to step S508; otherwise, proceed to step S507.

[0020] Step S507: Clear the abnormal mapping relationship, reset the HPG partitioning parameters, and then return to execute step S503;

[0021] Step S508: Select RUs with identical flash block physical address offsets and capacity specifications from different HPGs to construct a parallel RU group RUG;

[0022] Step S509: Verify whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, proceed to step S511; otherwise, proceed to step S510.

[0023] Step S510: Adjust the RU selection rules, remove overlapping RUs, and then return to step S508.

[0024] Step S511: Assign a unique identifier to each verified RUG, update the RU metadata and address mapping table of the FDP device and persist it;

[0025] Step S512: Perform compliance verification of the parallel region partitioning results, including whether the RUG crosses the RG boundary and whether the RUs within the RUG belong to multiple compliance categories of the HPG. If the verification passes, proceed to step S514; otherwise, proceed to step S513.

[0026] Step S513: Clear invalid RUG metadata, reset RUG build parameters, and then return to execute step S508;

[0027] Step S514: Output the RUG list, RUH-RUG mapping table, RU-hardware resource mapping table, parallel region partitioning metadata and other information for use in subsequent processes.

[0028] Furthermore, the RU-level parallel region allocation mechanism specifically includes the following steps:

[0029] Step S601: Based on the data classification strategy built into the host file system, data is split according to data popularity; then data with different popularity is sent to different RUHs.

[0030] Step S602: Receive core input parameters, including information such as a series of I / O requests, RUH hotness markers, and RUG resource pools;

[0031] Step S603: Verify whether the current target RUH has established a binding connection with the RUG by reading the RUH-RUG mapping table to complete the verification; if the verification passes, proceed to step S604; otherwise, proceed to step S608.

[0032] In step S604, based on the heat characteristics of the current data stream, a RUG with the corresponding specification and heat matching is matched from the idle RUG resource pool;

[0033] Step S605: Establish the binding relationship between the RUH and the matching RUG, write it into the RUH-RUG mapping table, and clarify that I / O requests of the same RUH are only executed within the bound RUG;

[0034] Step S606: Verify whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, proceed to step S608; otherwise, proceed to step S607.

[0035] Step S607: Adjust the RU selection rules, remove overlapping RUs, and then return to step S604.

[0036] Step S608: Lock the RUG bound to the current RUH, prevent other RUHs from calling the RUG resources, and perform space allocation operations for the current continuous I / O requests;

[0037] Step S609: Verify the remaining space of the RUG bound to the current RUH to determine whether it can meet the total write capacity requirement of this continuous I / O request; if the verification passes, proceed to step S612, otherwise proceed to step S610.

[0038] Step S610: Perform RUG expansion by adding an idle RUG of the same specification to the current RUH to expand the parallel resource quota.

[0039] Step S611: After the expansion is completed, the RUH-RUG mapping table is updated synchronously to include the newly added RUG in the schedulable resource range of the current RUH and the metadata is updated synchronously.

[0040] Step S612: Continuous I / O requests are polled and allocated to the physical address space of each RU within the RUG according to a fixed granularity, so that data streams of the same heat are evenly distributed to multiple RUs within the RUG.

[0041] Step S613: Update the internal RU write pointer, metadata, and physical address mapping table of the RUG;

[0042] Step S614: Output the physical address mapping table allocated this time, as input for the subsequent RU parallel write mechanism based on FDP SSD architecture.

[0043] Furthermore, the RU-level parallel write mechanism reconstructs the traditional single RUH-to-single RU serial write mode into a single RUH-to-single RUG-multiple RU parallel write mode. Specific steps include:

[0044] S701 accepts core input parameters, including the RUG bound to the RUH corresponding to the current write data stream, the continuous data stream to be written, the preset RU write switching threshold, and the status information of all RUs in the RUG.

[0045] S702 maintains an independent write pointer for each RU within the RUG, replacing the traditional single write pointer architecture;

[0046] S703: Issue write commands starting from the first RU write pointer position in RUG;

[0047] S704: Real-time detection of whether the current RU has reached the preset switching threshold. If the threshold is reached, the system switches to the next RU in the RUG to accept the write request.

[0048] S706: Split write requests at the page level and distribute them in parallel to different flash memory wafer physical pages within the FBG corresponding to the current RU to perform underlying parallel read and write operations;

[0049] S707: Cyclicly switch the RUs within the RUG to poll and write data until all data streams have been processed.

[0050] S708 performs data persistence and synchronization operations to ensure the consistency of written data;

[0051] S709 reports the write completion status to the host and outputs throughput and hardware resource utilization metrics.

[0052] Furthermore, each RU corresponds to a set of FBGs, which are composed of flash memory blocks with the same address offset within the same HPG. After the write request is split, it can be simultaneously sent to multiple wafers within the FBG for parallel execution, activating the internal hardware parallel capability of a single RU.

[0053] Furthermore, the overall data processing flow of the method is as follows: the host file system outputs a write data stream with a heat tag, which is then pre-generated into a RUG resource pool through an RU-level parallel region partitioning mechanism; then, different heat data streams are bound to independent RUHs and dedicated RUGs through an RU-level parallel region allocation mechanism; finally, multiple RUs within a RUG are simultaneously scheduled for parallel writing through an RU-level parallel writing mechanism, making coordinated use of inter-RU parallelism and multi-wafer underlying parallelism within a RU.

[0054] Furthermore, when anomalies occur in the RU-FBG mapping verification or RUG assembly verification, the abnormal metadata is cleared and the grouping parameters are reset through CAS atomic operations, and the hardware grouping and RUG construction process is re-executed to avoid hardware resource conflicts.

[0055] The advantages and beneficial effects of this invention are as follows:

[0056] This invention addresses the shortcomings of existing FDP SSD solutions that fail to address internal resource scheduling optimization, proposing a comprehensive solution encompassing partitioning, allocation, and execution. The innovation is manifested in three mechanisms: First, the RU-level parallel region partitioning mechanism delves into the physical topology of the FDP SSD, forcibly limiting parallel RU groups (RUGs) to construction only within a single recycling group (RG), fundamentally eliminating the "pseudo-parallelism" problem caused by channel and chip enable (CE) competition. Second, the RU-level parallel region allocation mechanism innovatively uses I / O heat as a resource allocation dimension, establishing dynamic binding between RU handles and RUGs, enabling hot data to obtain high-parallelism wide groups and cold data to be adapted to narrow groups, effectively reducing write amplification and garbage collection overhead. Finally, the RU-level parallel write mechanism organically combines inter-RU parallelism with multi-wafer-level parallel read / write within a single RU, forming a two-dimensional parallel pipeline that simultaneously improves total bandwidth and single-RU throughput. Attached Figure Description

[0057] Figure 1 This invention provides a preferred embodiment of the parallel region partitioning and scheduling method for recycling units based on the FDP SSD architecture, which is a technical roadmap.

[0058] Figure 2 A schematic diagram of a RU-level parallel region partitioning case based on FDP SSD architecture;

[0059] Figure 3 A schematic diagram of a RU-level parallel region allocation case based on FDP SSD architecture;

[0060] Figure 4 A schematic diagram of a RU-level parallel write case based on FDP SSD architecture;

[0061] Figure 5 Flowchart of RU-level parallel region partitioning based on FDP SSD architecture;

[0062] Figure 6 Flowchart of RU-level parallel region allocation based on FDP SSD architecture;

[0063] Figure 7 Flowchart of RU-level parallel write based on FDP SSD architecture. Detailed Implementation

[0064] The technical solutions of the present invention will be clearly and thoroughly described below with reference to the accompanying drawings of the embodiments of the present invention; the described embodiments are only a part of the embodiments of the present invention.

[0065] The technical solution of the present invention to solve the above-mentioned technical problems is:

[0066] The parallel region partitioning and scheduling method for recycling units in this invention for FDP SSDs deeply considers the architectural characteristics of FDP SSDs. Addressing the issues of limited parallelism within a single RU and underlying resource contention and interference between RUs due to the fine-grained RUs in FDP SSDs, a multi-dimensional parallel collaborative optimization scheme adapted to FDP SSDs is designed. Specifically, this invention designs three mechanisms to fully exploit the internal parallel potential of the device and improve overall throughput performance.

[0067] 1. RU-level parallel region partitioning mechanism. This mechanism reconstructs the native RU allocation method, aiming to break through the fixed mapping relationship between the native RU and hardware resources of FDP SSD, and solve the problem of insufficient utilization of parallel resources caused by the mismatch between fine-grained RU and parallel channels.

[0068] First, this mechanism divides the FDP SSD into parallel regions within a single recycling group (RG), and divides the RG into multiple hardware parallel groups (HPG). Each HPG contains a set of independent flash memory wafers, and the hardware resources between different HPGs are completely isolated.

[0069] Secondly, for each HPG, based on the physical address offset of the flash memory block, flash memory blocks with the same offset address are divided into a flash memory block group (FBG). The flash memory blocks in each flash memory block group belong to different flash memory wafers within the HPG, enabling a single FBG to have parallel read and write capabilities.

[0070] Next, each FBG is mapped to a RU, so that the physical space of a single RU spans multiple flash memory wafers within the corresponding FBG.

[0071] Finally, RUs with consistent physical offsets and granularities are selected from different HPGs to construct parallel RU groups (RUGs). All RUs within a single parallel RU group belong to different HPGs, and the RUs within the group have complete parallelism. At the same time, each RUG is bound to its respective RG, and the construction of RUGs across RGs is prohibited to ensure reduced interference, improved stability, consistency of other strategies, and clear data management boundaries.

[0072] 2. RU-level parallel region allocation mechanism. This mechanism provides functions for concurrent resource and request allocation, aiming to establish the relationship between RUH and RUG to achieve concurrent resource allocation for data streams with the same heat.

[0073] First, based on the data flow popularity classification and internal mechanism of the host-side file system output, at least one RUG is allocated to each RUH. All write requests corresponding to the same RUH can only be scheduled for the RUG bound to it. The hardware resources of RUGs corresponding to different RUHs are completely isolated. When the data flow concurrency exceeds a preset threshold, the RUH can be expanded and additional RUGs of the same specification can be bound to it to match the resource requirements of parallel writing.

[0074] Subsequently, for RUGs bound to the same RUH, consecutive write I / O requests of the same frequency corresponding to that RUH are round-robin distributed to the various RUs within the RUG. The purpose is to ensure that data streams of the same frequency are evenly distributed among multiple RUs within the RUG, thereby achieving the function of parallel writing.

[0075] 3. RU-level parallel write mechanism. This mechanism is the final execution module and is key to improving parallel performance by enabling parallel writes. This mechanism performs writes according to the requests allocated in the parallel region.

[0076] First, this mechanism reconstructs the traditional RUH and RU mapping execution logic, optimizing the single-RU serial write mode corresponding to a single RUH in the traditional FDP SSD into a multi-RU parallel write mode corresponding to a single RUH and a single RUG. This mechanism maintains independent write pointers for all RUs within its bound RUG for each RUH, replacing the traditional single-write-pointer architecture.

[0077] Secondly, a write threshold is set for each individual RU within a RUG. When the written capacity of a single RU reaches the preset threshold, the system automatically switches to the next RU within the RUG to take over the subsequent write requests, and polls all RUs within the RUG to fully unleash the parallel potential between RUs.

[0078] Finally, a parallel write scheduling logic within the RU is designed. For the FBG corresponding to a single RU, write requests are split into page-level granularity and distributed in parallel to physical pages of different wafers within the FBG, thereby activating the underlying hardware parallel capabilities within a single RU.

[0079] Figure 1 This invention presents a technical roadmap for parallel region partitioning and scheduling methods for recycling units based on the FDP SSD architecture. Addressing the limitations of parallelism within a single RU and the underlying resource contention and interference between RUs caused by the fine-grained RU architecture of FDP SSDs, this invention designs a multi-dimensional parallel collaborative optimization scheme adapted to FDP SSDs. First, application data is input into the file system, allocated according to the designed data, and then input into the RUH for subsequent processes. Second, parallel RU groups are created using an RU-level parallel region partitioning mechanism. Third, an RU-level parallel region allocation mechanism is designed to allocate the incoming series of I / O requests to the designed parallel RU groups. Finally, an RU-level parallel write mechanism is designed to simultaneously write data to different RUs within the partitioned parallel RU groups, thereby fully utilizing the parallelism between RUs.

[0080] Figure 2This diagram illustrates a case study of RU-level parallel region partitioning based on an FDP SSD architecture. The diagram shows an example where, firstly, an RG (Regulator) within an FDP SSD is divided into multiple HPGs (Host Groups), each containing several independent, parallel-operable sets of flash memory wafers. Secondly, within each HPG, flash memory blocks with the same offset are divided into multiple FBGs (Flash Block Groups), with the six FBGs of an HPG mapped to six regions. Next, each FBG is mapped to an RU (Real Root). Thirdly, one RU with the same offset and size is extracted from each different HPG, ultimately constructing a RUG (Rectangular Group) from peer RUs across HPGs. Within each HPG, blocks with the same offset are further grouped into FBGs, and each FBG is mapped to an RU. Finally, RUs with the same offset but belonging to different HPGs are combined to form a RUG.

[0081] Figure 3 This diagram illustrates a case study of RU-level parallel region allocation based on an FDP SSD architecture. It shows an example where, by dividing regions into parallel areas, RUs within a RUG span all flash memory wafers within an RG. This method effectively utilizes the parallelism between RUs for parallel writing. When multiple regions need to be written to in parallel, all regions within a RUG are allocated. When a series of write I / O requests arrive, data popularity is first determined by the file system's data classification strategy, then allocated to the RUG via RUH, and all RUs within the RUG are written to in a round-robin fashion.

[0082] Leveraging the RUH feature of the FDP architecture, data with varying levels of activity can be effectively written to RUGs. A series of write I / O requests are divided into data streams with different activity levels using the file system's built-in data classification strategy and assigned to different RUHs. As shown in the diagram, write I / O requests of equal activity (A1, A2, A3) are assigned to RUH0, and a corresponding RUG0 is assigned to RUH0. Writes are then performed in a round-robin fashion to all RUs within RUG0.

[0083] Figure 4This diagram illustrates a case study of RU-level parallel write operations based on an FDP SSD architecture. The diagram shows a scenario where, to improve cross-RU parallelism, the traditional write mechanism continuously writes to a RU through RUH. When the remaining capacity of the current RU pointed to by RUH is insufficient, the controller allocates a new RU to RUH to continue writing data. If the current RU is just full, the controller allocates a new RU to RUH, preparing for the next data write. The traditional write mechanism allocates the physical address of one or more flash block pages within a RU to the data block to be written, achieving only intra-RU parallelism. This invention designs an RU-level parallel write mechanism to improve parallel performance both within and between RUs. To improve inter-RU parallelism, one RUH corresponds to one RUG. As shown in the diagram, data 1 and 2 are first written to RU0. When the data allocation in RU0 reaches a set threshold, space is then allocated from RU6. All RUs within the RUG are used in a round-robin fashion.

[0084] Figure 5 This is a flowchart of the RU-level parallel region partitioning process based on the FDP SSD architecture. The process includes the entire region partitioning workflow, as detailed below:

[0085] In step S501, the basic configuration information of the FDP SSD device is obtained, including wear group information, number of RGs, size of RU, hardware information, etc.

[0086] In step S502, the target RG to be divided is selected, the isolation boundary is defined, and parallel region division operations across RGs are prohibited.

[0087] In step S503, based on the physical flash memory topology within the target RG, the physical storage resources within the RG are divided into multiple hardware parallel groups (HPGs), each HPG containing a set of independent, non-interfering, and concurrent flash memory wafers.

[0088] In step S504, for each HPG, based on the physical address offset of the flash memory block, flash memory blocks with the same offset address are divided into a flash memory block group (FBG), so that a single FBG has parallel read and write capabilities.

[0089] In step S505, a mapping between FBG and RU is established, so that the flash memory blocks inside a single RU span multiple flash memory wafers.

[0090] In step S506, the mapping relationship between FBG and RU within the HPG is verified to ensure that the number of RUs, capacity specifications, and physical address offsets within each HPG are consistent. If the verification passes, step S508 is executed; otherwise, step S507 is executed.

[0091] In step S507, the abnormal mapping relationship is cleared, the HPG partitioning parameters are reset, and then the process returns to step S503.

[0092] In step S508, RUs with identical physical address offsets and capacity specifications for flash memory blocks are selected from different HPGs to construct a parallel RU group (RUG).

[0093] In step S509, it is verified whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, step S511 is executed; otherwise, step S510 is executed.

[0094] In step S510, the RU selection rules are adjusted to remove overlapping RUs, and then the process returns to step S508.

[0095] In step S511, a unique identifier is assigned to each RUG that passes the verification, and the RU metadata and address mapping table of the FDP device are updated and persisted.

[0096] In step S512, the compliance verification of the parallel region partitioning results is performed, including whether the RUG crosses the RG boundary, whether the RUs within the RUG belong to the HPG respectively, and other compliance checks. If the verification passes, step S514 is executed; otherwise, step S513 is executed.

[0097] In step S513, invalid RUG metadata is cleared, RUG build parameters are reset, and then the process returns to step S508.

[0098] In step S514, the following information is output: the RUG list, RUH-RUG mapping table, RU-hardware resource mapping table, and parallel region partitioning metadata, for use in subsequent processes.

[0099] Figure 6 This is a flowchart of RU-level parallel region allocation based on an FDP SSD architecture. The process includes the entire region allocation I / O request flow, as detailed below:

[0100] In step S601, data is sorted according to its popularity based on the data classification strategy built into the host file system. Data with different popularity levels is then passed to different RUHs.

[0101] In step S602, core input parameters are received, including information such as a series of I / O requests, RUH hotness markers, and RUG resource pools.

[0102] In step S603, it is verified whether the current target RUH has established a binding connection with the RUG, and the RUH-RUG mapping table is read to complete the verification. If the verification passes, step S604 is executed; otherwise, step S608 is executed.

[0103] In step S604, based on the popularity characteristics of the current data stream, a RUG with the corresponding specification and popularity is matched from the idle RUG resource pool.

[0104] In step S605, the binding relationship between the RUH and the matching RUG is established, and the RUH-RUG mapping table is written to clarify that I / O requests of the same RUH are only executed within the bound RUG.

[0105] In step S606, it is verified whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, step S608 is executed; otherwise, step S607 is executed.

[0106] In step S607, the RU selection rules are adjusted to remove overlapping RUs, and then the process returns to step S604.

[0107] In step S608, the RUG bound to the current RUH is locked, other RUHs are prohibited from calling the RUG resources, and space allocation operations are performed for the current continuous I / O requests.

[0108] In step S609, the remaining space of the currently bound RUG to RUH is checked to determine whether it can meet the total write capacity requirement of this continuous I / O request. If the check passes, step S612 is executed; otherwise, step S610 is executed.

[0109] In step S610, RUG expansion is performed, adding an idle RUG of the same specification to the current RUH to expand the parallel resource quota.

[0110] In step S611, after the expansion is completed, the RUH-RUG mapping table is updated synchronously, the newly added RUG is included in the schedulable resource range of the current RUH, and the metadata is updated synchronously.

[0111] In step S612, continuous I / O requests are polled and allocated to the physical address space of each RU within the RUG according to a fixed granularity, so that data streams of the same heat are evenly distributed to multiple RUs within the RUG.

[0112] In step S613, the internal RU write pointer, metadata, and physical address mapping table of the RUG are updated.

[0113] In step S614, the physical address mapping table allocated this time is output as input for the subsequent RU parallel write mechanism based on the FDP SSD architecture.

[0114] Figure 7 This is a flowchart of RU-level parallel write operations based on the FDP SSD architecture.

[0115] In step S701, core input parameters are accepted, including the RUG bound to the RUH corresponding to the current write data stream, the continuous data stream to be written, the preset RU write switching threshold, and the status information of all RUs in the RUG.

[0116] In step S702, the independent write pointers of all RUs in RUG are initialized. This step reconstructs the serial write mode of the traditional FDP SSD into a parallel write mode.

[0117] In step S703, a write command is sent to start writing data from the internal write pointer of the first RU in the target RUG.

[0118] In step S704, it is verified whether the current RU has reached the switching threshold. If the switching threshold is reached, step S705 is executed; otherwise, step S706 is executed.

[0119] In step S705, a write command is sent to the next RU in the RUG, and the system switches to the write pointer inside the next RU in the RUG to prepare for writing.

[0120] In step S706, a write operation is performed to update the write pointer and complete global state synchronization to ensure data consistency.

[0121] In step S707, it is checked whether there is subsequent data to be written in the current data stream. If there is, the process returns to step S703; otherwise, step S708 is executed.

[0122] In step S708, the write result is locked, and synchronization and data persistence operations are performed to ensure data consistency.

[0123] In step S709, the write completion status is reported to the host, and the execution results such as the throughput and resource utilization of this parallel write are output, and the process ends.

[0124] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions.

[0125] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus; and without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0126] The above embodiments should be understood as illustrative only and not as limiting the scope of protection of the present invention; after reading the description of the present invention, those skilled in the art can make various alterations or modifications to the present invention, and these equivalent changes and modifications also fall within the scope defined by the claims of the present invention.

Claims

1. A method for parallel region partitioning and scheduling of recycling units for FDP SSD, characterized in that, The method includes a sequentially executed RU-level parallel region partitioning mechanism, an RU-level parallel region allocation mechanism, and an RU-level parallel write mechanism. The RU-level parallel region partitioning mechanism is used to complete the hierarchical grouping of hardware resources based on the FDP SSD recycling group RG, and construct a parallel RU group RUG with full parallelism. The RU-level parallel region allocation mechanism is used to establish the binding relationship between RUH and RUG, and complete the parallel resource allocation of I / O requests according to data heat. The RU-level parallel write mechanism relies on RUG to realize parallel writing between RUs and parallel reading and writing of multiple wafers at the underlying level within a single RU. The method as a whole constrains the parallel RU group RUG to be built only within a single RG, and prohibits the construction of RUGs across RGs.

2. The parallel region partitioning and scheduling method for recycling units in FDP SSD according to claim 1, characterized in that, The RU-level parallel region partitioning mechanism specifically includes the following steps: Step S501: Obtain basic configuration information of the FDP SSD device, including wear group information, number of RGs, size of RUs, and hardware information; Step S502: Select the target RG to be divided, define the isolation boundary, and prohibit parallel region division operations across RGs; Step S503: Based on the physical flash memory topology within the target RG, the physical storage resources within the RG are divided into multiple hardware parallel groups (HPGs). Each HPG contains a set of independent, non-interfering, and concurrent flash memory wafers. Step S504: For each HPG, based on the physical address offset of the flash memory block, the flash memory blocks with the same offset address are divided into a flash memory block group FBG, so that a single FBG has parallel read and write capabilities. Step S505: Establish the mapping between FBG and RU, so that the flash memory blocks inside a single RU span multiple flash memory wafers; Step S506: Verify the mapping relationship between FBG and RU within HPG to ensure that the number of RUs, capacity specifications, and physical address offsets are consistent within each HPG. If the verification passes, proceed to step S508; otherwise, proceed to step S507. Step S507: Clear the abnormal mapping relationship, reset the HPG partitioning parameters, and then return to execute step S503; Step S508: Select RUs with identical flash block physical address offsets and capacity specifications from different HPGs to construct a parallel RU group RUG; Step S509: Verify whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, proceed to step S511; otherwise, proceed to step S510. Step S510: Adjust the RU selection rules, remove overlapping RUs, and then return to step S508. Step S511: Assign a unique identifier to each verified RUG, update the RU metadata and address mapping table of the FDP device and persist it; Step S512: Perform compliance verification of the parallel region partitioning results, including whether the RUG crosses the RG boundary and whether the RUs within the RUG belong to multiple compliance categories of the HPG. If the verification passes, proceed to step S514; otherwise, proceed to step S513. Step S513: Clear invalid RUG metadata, reset RUG build parameters, and then return to execute step S508; Step S514: Output the RUG list, RUH-RUG mapping table, RU-hardware resource mapping table, parallel region partitioning metadata and other information for use in subsequent processes.

3. The parallel region partitioning and scheduling method for recycling units in FDP SSD according to claim 1, characterized in that, The RU-level parallel region allocation mechanism specifically includes the following steps: Step S601: Based on the data classification strategy built into the host file system, data is split according to data popularity; then data with different popularity is sent to different RUHs. Step S602: Receive core input parameters, including information such as a series of I / O requests, RUH hotness markers, and RUG resource pools; Step S603: Verify whether the current target RUH has established a binding connection with the RUG by reading the RUH-RUG mapping table to complete the verification; if the verification passes, proceed to step S604; otherwise, proceed to step S608. In step S604, based on the heat characteristics of the current data stream, a RUG with the corresponding specification and heat matching is matched from the idle RUG resource pool; Step S605: Establish the binding relationship between the RUH and the matching RUG, write it into the RUH-RUG mapping table, and clarify that I / O requests of the same RUH are only executed within the bound RUG; Step S606: Verify whether all RUs in the constructed RUG belong to different HPGs to ensure that there is no resource overlap and channel competition risk. If the verification passes, proceed to step S608; otherwise, proceed to step S607. Step S607: Adjust the RU selection rules, remove overlapping RUs, and then return to step S604. Step S608: Lock the RUG bound to the current RUH, prevent other RUHs from calling the RUG resources, and perform space allocation operations for the current continuous I / O requests; Step S609: Verify the remaining space of the RUG bound to the current RUH to determine whether it can meet the total write capacity requirement of this continuous I / O request; if the verification passes, proceed to step S612, otherwise proceed to step S610. Step S610: Perform RUG expansion by adding an idle RUG of the same specification to the current RUH to expand the parallel resource quota. Step S611: After the expansion is completed, the RUH-RUG mapping table is updated synchronously to include the newly added RUG in the schedulable resource range of the current RUH and the metadata is updated synchronously. Step S612: Continuous I / O requests are polled and allocated to the physical address space of each RU within the RUG according to a fixed granularity, so that data streams of the same heat are evenly distributed to multiple RUs within the RUG. Step S613: Update the internal RU write pointer, metadata, and physical address mapping table of the RUG; Step S614: Output the physical address mapping table allocated this time, as input for the subsequent RU parallel write mechanism based on FDP SSD architecture.

4. The parallel region partitioning and scheduling method for recycling units in FDP SSD according to claim 1, characterized in that, The RU-level parallel write mechanism reconstructs the traditional single RUH-to-single RU serial write mode into a single RUH-to-single RUG-multiple RU parallel write mode. Specific steps include: S701 accepts core input parameters, including the RUG bound to the RUH corresponding to the current write data stream, the continuous data stream to be written, the preset RU write switching threshold, and the status information of all RUs in the RUG. S702 maintains an independent write pointer for each RU within the RUG, replacing the traditional single write pointer architecture; S703: Issue write commands starting from the first RU write pointer position in RUG; S704: Real-time detection of whether the current RU has reached the preset switching threshold. If the threshold is reached, the system switches to the next RU in the RUG to accept the write request. S706: Split write requests at the page level and distribute them in parallel to different flash memory wafer physical pages within the FBG corresponding to the current RU to perform underlying parallel read and write operations; S707: Cyclicly switch the RUs within the RUG to poll and write data until all data streams have been processed. S708 performs data persistence and synchronization operations to ensure the consistency of written data; S709 reports the write completion status to the host and outputs throughput and hardware resource utilization metrics.

5. The parallel region partitioning and scheduling method for recycling units of FDP SSD according to claim 4, characterized in that, Each RU corresponds to a set of FBGs. Each FBG consists of flash memory blocks with the same address offset within the same HPG. After write requests are split, they can be simultaneously sent to multiple wafers within the FBG for parallel execution, activating the internal hardware parallel capability of a single RU.

6. The parallel region partitioning and scheduling method for recycling units in FDP SSD according to claim 1, characterized in that, The overall data processing flow of the method is as follows: the host file system outputs a write data stream with a heat tag, and a RUG resource pool is pre-generated through the RU-level parallel region partitioning mechanism; then, the data streams with different heat tags are bound to independent RUHs and dedicated RUGs through the RU-level parallel region allocation mechanism; finally, multiple RUs within the RUG are simultaneously scheduled for parallel writing through the RU-level parallel writing mechanism, and the parallel performance between RUs and the multi-wafer underlying parallel performance within RUs are utilized in a coordinated manner.

7. The parallel region partitioning and scheduling method for recycling units in FDP SSD according to claim 2, characterized in that, When anomalies occur during RU to FBG mapping verification or RUG assembly verification, the abnormal metadata is cleared and the grouping parameters are reset through CAS atomic operations. The hardware grouping and RUG construction process is then re-executed to avoid hardware resource conflicts.

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