Parameter adaptive matching method and device for pslc

Abstract

The application discloses a pSLC parameter adaptive matching method and device. The method comprises the following steps: when power is initialized, the manufacturer identification, the device identification and the version identification of each die are read through an open NAND flash interface command to construct a die unique identification; the die unique identification is taken as a search key to search whether a corresponding parameter record exists in a parameter database; if the search hits, the verified parameter set in the parameter record is directly loaded to the corresponding die; if the search misses, an automatic parameter learning process is started for the die, a new parameter set is obtained and written into the parameter database for subsequent search hits to be directly loaded. Through the method of the application, known revisions can be accurately matched, unknown revisions can be matched through similarity, parameters can be dynamically adjusted without restarting, the flexibility and efficiency of NAND Flash die adaptation are greatly improved, and the demand and risk of human intervention are reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor memory device technology, and more specifically to a pSLC parameter adaptive matching method and apparatus. Background Technology

[0002] Currently, NAND Flash dies undergo multiple revisions throughout their lifecycle, with significant changes in timing and voltage parameters across these revisions, directly impacting their performance and reliability. To accommodate these diverse revisions, three main solutions exist in the market: a single firmware parameter table solution, a manual batch configuration solution, and a pure ONFI Parameter Page solution. However, all three solutions face challenges in terms of flexibility, performance optimization, and production efficiency. The single firmware parameter table solution lacks automatic adaptation capabilities, making it difficult to handle multiple revisions; while the manual batch configuration solution offers a degree of customization, its high labor costs and error rates limit its practicality; and the pure ONFI Parameter Page solution only provides conservative operating parameters, failing to achieve optimal performance.

[0003] In exploring more efficient adaptation solutions, several publicly available technical documents and standards have provided valuable references. For example, one open standard defines a Parameter Page data structure for reporting timing and voltage parameters of NAND Flash devices, but the provided values ​​are conservative and do not include optimized parameters for specific modes. Another standard defines a mechanism for a controller to identify NAND Flash devices and load corresponding parameters via commands, but it does not address automatic parameter optimization. Furthermore, some patents propose methods for matching models based on pre-stored parameter tables and methods for supporting new models through firmware upgrades; however, both methods require manual maintenance or development and cannot adapt to unknown revisions in real time. Another method describes the factory parameter calibration of NAND Flash, but it is not suitable for runtime adaptation to different revisions circulating in the market.

[0004] It is necessary to design a new method that can accurately match known revisions and match unknown revisions through similarity, and dynamically adjust parameters without restarting, which greatly improves the flexibility and efficiency of NAND Flash die adaptation, while reducing the need and risk of human intervention. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method and apparatus for adaptive matching of pSLC parameters.

[0006] To achieve the above objectives, the present invention employs the following technical solution: a pSLC parameter adaptive matching method, comprising: During power-on initialization, the manufacturer identifier, device identifier, and version identifier of each die are read by opening the NAND flash memory interface command to construct a unique identifier for each die; Using the unique identifier of the bare die as the search key, search the parameter database to see if a corresponding parameter record exists; If the search is successful, the verified parameter set in the parameter record is directly loaded into the corresponding die. If the search fails to find a match, an automatic parameter learning process is initiated for that bare die to obtain a new parameter set and write it into the parameter database for direct loading when a subsequent search finds a match.

[0007] The further technical solution is as follows: the automatic parameter learning process is initiated for the bare die to obtain a new parameter set and write it into the parameter database for direct loading during subsequent retrieval and matching, including: Using the conservative values ​​in the open NAND flash memory interface parameter page as an initial baseline, the programming time is gradually reduced and verified using the original bit error rate as a criterion to determine the optimal programming time; Perform multi-point voltage scanning within the preset scanning range of the reference voltage, and select the voltage with the lowest original bit error rate as the optimal programming voltage. Parameters are calibrated at at least two temperature points, and the temperature compensation coefficient is obtained by fitting. The low-density parity check code rate is determined based on the original bit error rate distribution after the programming erase cycle.

[0008] The further technical solution is as follows: the parameter database is stored in the non-volatile reserved area of ​​the controller. Each record in the parameter database includes a unique identifier of the bare die, a parameter set, a field of verified counts, and a historical version sequence. The parameter database stores multiple versions of verified parameter sets for the same type of bare die. The number of verified counts is set to an initial value when the new parameter set is written and is incremented each time a retrieval hit is loaded.

[0009] Its further technical solutions include: If a version record for this type of die already exists in the parameter database, and if the version identifier of the current die is detected to be lower than the highest version identifier of this type of die in the parameter database, the verified parameter set of the corresponding old version is loaded, and a downgrade flag is marked.

[0010] Its further technical solutions include: When there is no exact matching record for the target version identifier in the parameter database, but there is a verified parameter set for adjacent version identifiers of the same model, the parameter inheritance confidence is calculated based on the verified parameter set and the conservative value of the open NAND flash memory interface parameter page. The verified parameter set and the conservative value of the interface are weighted and fused with the inheritance confidence as the learning starting point, and the search range of automatic parameter learning is narrowed to a preset ratio range.

[0011] Its further technical solutions include: During the operation after parameter loading, at least one of the following performance metrics is monitored in real time: raw bit error rate, frequency of uncorrectable errors, and programming failure rate. When the performance index exceeds the corresponding warning threshold, the system will attempt to roll back to the historical version parameter set with a higher number of verifications for the same die in the parameter database, the same version verified parameter set for other dies in the same storage device, or the conservative value of the open NAND flash memory interface parameter page, in order of priority. The reason for the rollback and the number of rollbacks will be marked.

[0012] Its further technical solutions include: Before mass production, a prototype covering all incoming material versions is selected to perform complete parameter learning, a gold sample parameter snapshot is generated and written into the parameter database as a read-only baseline. During the mass production stage, if the bare die version identifier exists in the gold sample parameter snapshot, the snapshot parameters are loaded directly and automatic parameter learning is skipped; if it does not exist, automatic parameter learning is started, and the new parameter set obtained by learning is constrained within the preset fluctuation range of the parameters corresponding to the gold sample parameter snapshot and then written into the parameter database.

[0013] Its further technical solutions include: When a search fails to find a matching manufacturer record for the target die in the parameter database, other manufacturer parameter records for the same or similar process nodes are searched. Temperature compensation coefficients and voltage reference parameters are shared as the starting point for automatic parameter learning, while timing parameters are learned independently.

[0014] The further technical solution is as follows: the version identifier adopts a unified hierarchical coding system, including process step, major version number, sub-version number and variant identifier; when there is no exact version match in the parameter database, fuzzy matching is started: the search is performed in descending order of priority according to exact matching, adjacent version matching, cross-model matching of the same process node, and cross-manufacturer matching of the same process node, and parameter inheritance is started when the matching distance is within a preset threshold.

[0015] The present invention also provides a pSLC parameter adaptive matching device, comprising: The die identification unit is used to read the manufacturer identifier, device identifier, and version identifier of each die through the open NAND flash memory interface command during power-on initialization, and construct a unique identifier for the die; The parameter retrieval unit is used to search the parameter database for the existence of a corresponding parameter record using the unique identifier of the bare die as the retrieval key. The parameter loading unit is used to directly load the verified parameter set in the parameter record to the corresponding bare die when a search hit occurs; An automatic parameter learning unit is used to initiate an automatic parameter learning process for the bare die when the search fails, obtain a new parameter set and write it into the parameter database for direct loading when the search succeeds in the future.

[0016] The advantages of this invention compared to existing technologies are as follows: This invention constructs a unique identifier by reading the manufacturer's identifier, device identifier, and version identifier of the NAND flash die during the power-on initialization phase. This identifier is used as a search key to find the corresponding optimal or verified parameter set in the parameter database. Once a match is found, these parameter sets are directly loaded to ensure accurate matching for known revisions; if no match is found, an automatic parameter learning process is initiated to obtain a new parameter set and update it to the database, thereby supporting matching of unknown revisions through similarity. The entire process allows for dynamic parameter adjustment without restarting the device, significantly improving the flexibility and efficiency of NAND flash die adaptation, reducing the need and risk of human intervention, and thus enhancing the stability and reliability of the device. Furthermore, by monitoring performance indicators in real time and performing parameter rollback when necessary, the robustness of the device is further ensured.

[0017] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A flowchart illustrating the pSLC parameter adaptive matching method provided in an embodiment of the present invention; Figure 2 A schematic block diagram of the pSLC parameter adaptive matching device provided in an embodiment of the present invention; Figure 3 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0022] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0023] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0024] Please see Figure 1 , Figure 1 This is a flowchart illustrating the pSLC parameter adaptive matching method provided in this embodiment of the invention. Applied to servers, this method constructs a unique identifier by reading the identification information of the NAND flash die during power-on initialization, and then retrieves the optimal or verified parameter set from the parameter database for loading. For unknown revisions, an automatic parameter learning process is initiated, using conservative values ​​as a starting point to progressively optimize parameters such as programming time and voltage, while considering temperature compensation and error rate distribution to determine the optimal parameter set and update it to the database. Furthermore, this method supports dynamic parameter adjustment and rollback mechanisms based on real-time performance indicator monitoring, generating read-only baseline parameter snapshots before mass production to skip repetitive learning processes, and sharing some parameters across vendors and process nodes to accelerate adaptation to new revisions. This series of strategies ensures not only accurate matching of known revisions but also matching of unknown revisions through similarity, enabling dynamic parameter adjustment without restarting, improving the flexibility and efficiency of NAND Flash die adaptation, and reducing the need and risk of human intervention.

[0025] It is important to note that pseudo-single-cell mode (pSLC mode) refers to using only two threshold voltage states for each storage cell of a multi-cell NAND flash memory (such as three-cell TLC) to simulate the operation of a single-cell memory, thereby achieving higher read / write speeds and endurance. Open NAND Flash Interface (ONFI) is the industry-standard interface protocol for NAND flash memory, defining the command set, timing, and parameter page data structure between the controller and the die.

[0026] The parameter adaptive matching layer deployed in the eMMC controller firmware includes a die identification module, a parameter database (ParamDB), a parameter retrieval engine, an automatic parameter learning module, and a rollback monitor. The method includes: during power-on initialization, reading the manufacturer identifier, device identifier, and version identifier of each die via ONFI commands to construct a unique die identifier (Die_ID); using this unique die identifier as the retrieval key, searching the parameter database for a corresponding verified parameter set; if the search finds a match, directly loading the verified parameter set into the corresponding die; if the search fails, initiating an automatic parameter learning process for that die to obtain a new parameter set and write it into the parameter database for direct loading in subsequent searches.

[0027] Figure 1 This is a flowchart illustrating the pSLC parameter adaptive matching method provided in an embodiment of the present invention. Figure 1 As shown, the method includes the following steps S110 to S140.

[0028] S110 During power-on initialization, the manufacturer identifier, device identifier, and version identifier of each die are read through the open NAND flash memory interface command to construct a unique identifier for each die.

[0029] In this embodiment, during power-on initialization, the controller selects each die one by one using the Chip Enable signal and sends ONFI standard commands to complete die identification. Specifically, it first sends a Read ID command (command code 0x90, address 0x00) to sequentially read the Manufacturer ID (MFR_ID, used to identify the die manufacturer) and Device ID (DEV_ID, used to identify the die model) from each die. Then, it sends a Read Parameter Page command (READ PARAMETER PAGE, command code 0xEC, address 0x00) to read 256 bytes of parameter page data, from which it parses key fields such as Revision ID (REV_ID, used to identify the die process version), programming time, read time, erase time, and power supply voltage range. The aforementioned MFR_ID, DEV_ID, and REV_ID are combined to construct a unique die identifier (Die_ID), which serves as the unique key for subsequent parameter retrieval.

[0030] This embodiment defines a unified die version identifier hierarchical coding system to accommodate naming differences among manufacturers. This coding system maps each manufacturer's native version format to a 20-bit unified version code, which, from highest to lowest, includes: process step (4 bits, used to identify different process stages such as engineering samples, customer samples, or mass production stages), major version number (8 bits, corresponding to the manufacturer's major version number), minor version number (4 bits, corresponding to the manufacturer's minor version number), and variant identifier (4 bits, used to distinguish different variant types such as standard, low-power, high-speed, or wide-temperature). Based on this unified coding system, a version number comparison function can be executed, comparing versions sequentially according to the priority of process step, major version number, minor version number, and variant identifier to determine the relationship between versions.

[0031] The version number comparison function returns -1, zero, or -1, indicating that the first version is less than, equal to, or greater than the second version, respectively. When no exact version match is found in the parameter database, a fuzzy matching process is initiated, searching in descending order of priority: exact match, adjacent version match, cross-model match within the same process node, and cross-manufacturer match within the same process node. In the fuzzy matching distance metric, if the manufacturers are different, it returns infinity; if the equipment is different, it returns four times the absolute value of the process node difference; if both the manufacturer and equipment are the same, it returns the absolute value of the version number difference. Parameter inheritance is initiated when the matching distance is within a preset threshold; when the matching distance exceeds the threshold or the manufacturers are different, inheritance is not performed, and full parameter learning is initiated.

[0032] S130. Using the unique identifier of the bare die as the search key, search the parameter database to see if there is a corresponding parameter record.

[0033] In this embodiment, this step is mainly to confirm whether the optimal parameter set can be retrieved in the parameter database; the optimal parameter set refers to the parameter database stored in the controller's non-volatile reserved area. Each record in the parameter database contains a unique identifier for the die, a parameter set, a verification count field, and a historical version sequence. The parameter database stores multiple versions of verified parameter sets for the same die model. The verification count is set to an initial value when the new parameter set is written and increments each time a retrieval hits and loads.

[0034] The parameter database is stored in the controller's non-volatile reserved area. Each record in the parameter database contains a unique identifier for the die, a parameter set, a verification count field, and a historical version sequence. The parameter database stores multiple versions of verified parameter sets for the same die model. The verification count is set to an initial value when a new parameter set is written and increments each time a search hits and loads the data.

[0035] Using the constructed Die_ID as the search key, the system first searches the local parameter database to see if a corresponding verified parameter set exists (i.e., the optimal parameter set verified and recorded in the parameter database after an automatic parameter learning process). The parameter database (ParamDB) is stored in the controller's non-volatile reserved area (such as the Flash reserved area). Each record contains a unique identifier for the die, the parameter set, and a verified count field (verified_count, used to record the number of times the parameter set has been successfully loaded and verified). The database also stores multiple versions of verified parameter sets for the same die model. Taking a typical parameter database record as an example, its data structure can be set to 64 bytes, specifically including: manufacturer identifier (8 bits), device identifier (8 bits), version identifier (16 bits), starting programming voltage (16 bits, in millivolts), programming step voltage (16 bits, in millivolts), maximum number of programming pulses (8 bits), read reference voltage (16 bits, in millivolts), optimal programming time (32 bits, in nanoseconds), optimal read time (32 bits, in nanoseconds), low-density parity check rate (8 bits, stored at 100 times the value), temperature compensation coefficient (16 bits, stored at 10000 times the value), number of verifications (32 bits), and cyclic redundancy check (CR) code (32 bits). The number of verifications is set to an initial value when a new parameter set is written and increments with each successful retrieval and loading to reflect the reliability of the parameter set after actual verification. In addition, each record also contains a CR code for data integrity verification.

[0036] During retrieval, if no exact version match is found in the parameter database, a fuzzy matching process is initiated, searching in descending order of priority: exact match, adjacent version match, cross-model match within the same process node, and cross-manufacturer match within the same process node. The matching distance is calculated using a version distance metric function, which comprehensively considers differences in process step, major version number, sub-version number, and variant identifier. Its weight vector is set to prioritize process step, followed by major version number, then sub-version number, and finally variant identifier, reflecting the severity of the impact of changes at different levels on parameters. Parameter inheritance is initiated when the matching distance is within a preset threshold; otherwise, inheritance is not performed, and full parameter learning is initiated when the matching distance exceeds the threshold or the manufacturers are different.

[0037] In this embodiment, it is confirmed whether a verified parameter set record exists in the parameter database that precisely matches the unique identifier of the current die. If the local parameter database search finds a match, the verified parameter set is directly loaded into the corresponding die, and the verified count field is incremented to complete the parameter configuration. If the local parameter database search does not find a match, the cloud parameter database is further queried. The cloud database serves as an extended backup of the local database and is stored on a remote server. If the cloud database search finds a match, the corresponding verified parameter set is synchronized to the local parameter database and then directly loaded into the corresponding die; if the cloud database also does not find a match, an automatic parameter learning process is triggered.

[0038] S130. If the search is successful, the verified parameter set in the parameter record is directly loaded into the corresponding die.

[0039] In this embodiment, if the search is successful, that is, if there is a record in the database that is completely consistent with the unique identifier of the bare die, the verified parameter set in the record is directly loaded into the corresponding bare die, and the verified count field of the record is incremented. Then the parameter configuration of the bare die is completed without the need to perform subsequent learning processes.

[0040] When the version identifier of the current bare die is detected to be lower than the highest version identifier of the bare die of this model in the parameter database, it indicates that the bare die may be a downgraded version. At this time, the verified parameter set of the corresponding old version is loaded and the downgrade flag is marked to indicate that the bare die has a version abnormality, while avoiding the use of aggressive parameters of too high a version, which may cause reliability issues.

[0041] The database dynamic management also includes a degradation detection function. During detection, the latest version identifier of the bare die for that model is obtained from the database. If the current bare die version identifier is lower than the latest version identifier, it is determined to be a degradation situation. The verified parameter set corresponding to the old version is loaded, the degradation flag is set to true, and a warning log is recorded.

[0042] S140. If the search fails, an automatic parameter learning process is initiated for the bare die to obtain a new parameter set and write it into the parameter database for direct loading when a subsequent search succeeds.

[0043] In this embodiment, if the search fails to find a match, meaning there is no record in the parameter database corresponding to the unique identifier of the die, an automatic parameter learning process is initiated for the die to obtain a new parameter set (i.e., the parameter set obtained through the automatic parameter learning process newly for the die that failed to find a match) and write it into the parameter database for direct loading when a subsequent search finds a match.

[0044] In one embodiment, step S140 described above may include steps S141 to S144.

[0045] S141. Using the conservative value in the open NAND flash memory interface parameter page as the initial benchmark, gradually shorten the programming time and verify it with the original bit error rate as the criterion to determine the optimal programming time.

[0046] In this embodiment, the automatic parameter learning process is based on the raw bit error rate (hereinafter referred to as RBER, which refers to the bit error rate that occurs when reading data directly from flash memory without correction by error correction algorithm) feedback, and is executed when a new version first appears. The learning time for a single die is about 3 to 5 seconds.

[0047] Timing optimization uses a conservative value from the ONFI parameter page as an initial baseline, gradually reducing the programming time and verifying it using RBER as the criterion to determine the optimal programming time. Specifically, the optimal programming time is initialized with a conservative value, the step size is set at 10 microseconds, and the RBER exceedance threshold is 5 × 10⁻⁶. -3 Each time, the programming time is subtracted from the step size to obtain the test value. If the test value is lower than the minimum programming time, the process is interrupted. Then, 100 programming and read-back verifications are performed, randomly selecting a page for programming and measuring the Restricted Bit Rate (RBER). If the RBER exceeds a threshold, a failure is recorded. If the number of failures does not exceed two, the optimal programming time is updated to the test value, and attempts to shorten it continue. If the number of failures exceeds two, the loop is interrupted, and the previous success value is used as the optimal programming time.

[0048] S142. Perform multi-point voltage scanning within the preset scanning range of the reference voltage, and select the voltage with the lowest original bit error rate as the optimal programming voltage.

[0049] In this embodiment, voltage calibration involves multi-point voltage scanning within a preset scan range of the reference voltage, selecting the voltage with the lowest RBER as the optimal programming voltage. Specifically, the initial optimal voltage is the ONFI reference voltage, the worst RBER is 1.0, the scan range is ±0.3 volts, and the scan step size is 50 millivolts. Within the 13-point scan range, each voltage point performs 20 programming and readback operations, and the RBER is accumulated to calculate the average value. If the average RBER is lower than the current optimal RBER, the optimal RBER and optimal voltage are updated. After the coarse scan is completed, a fine scan verification is performed within ±0.1 volts of the optimal voltage with a step size of 10 millivolts. Finally, the optimal programming voltage and programming step voltage (e.g., 50 millivolts) are determined. This step voltage is used for voltage incrementing during incremental pulse programming (ISPP, i.e., achieving precise threshold voltage control by gradually increasing the programming voltage pulses).

[0050] S143. Perform parameter calibration at at least two temperature points and fit the temperature compensation coefficient.

[0051] In this embodiment, the temperature coefficient is calibrated at at least two temperature points (e.g., 25 degrees Celsius and 85 degrees Celsius), the optimal voltage offset at different temperatures is measured, and the temperature compensation coefficient (e.g., first-order coefficient and second-order coefficient) is obtained through linear fitting, which is used to dynamically adjust the voltage parameters according to the ambient temperature during subsequent operation.

[0052] S144. Determine the low-density parity check code rate based on the original bit error rate distribution after the programming erase cycle.

[0053] In this embodiment, after executing a preset number of programming / erase cycles (hereinafter referred to as P / E, the basic operation unit for measuring the durability of flash memory) based on the statistical distribution characteristics of RBER, a low-density parity-check (LDPC, an error correction code technology that achieves efficient error detection and correction through a sparse parity-check matrix) code rate is selected to maximize storage efficiency while ensuring error correction capability.

[0054] After learning is complete, the new parameter set is written to the parameter database, and the number of times the new parameter set has been verified is set to the initial value. At the same time, a cyclic redundancy check code is calculated and written to ensure data integrity.

[0055] In one embodiment, the above method further includes: If a version record for this type of die already exists in the parameter database, and if the version identifier of the current die is detected to be lower than the highest version identifier of this type of die in the parameter database, the verified parameter set of the corresponding old version is loaded, and a downgrade flag is marked.

[0056] Specifically, the version identifier adopts a unified hierarchical coding system, including process step, major version number, sub-version number and variant identifier; when there is no exact version match in the parameter database, fuzzy matching is started: the search is performed in descending order of priority according to exact matching, adjacent version matching, cross-model matching of the same process node, and cross-manufacturer matching of the same process node, and parameter inheritance is started when the matching distance is within a preset threshold.

[0057] In this embodiment, a unified die version identifier hierarchical coding system is defined to accommodate naming differences among manufacturers. This coding system maps each manufacturer's native version format to a 20-bit unified version code, which, from highest to lowest, includes: process step (4 bits, used to identify different process stages such as engineering samples, customer samples, or mass production stages), major version number (8 bits, corresponding to the manufacturer's major version number), minor version number (4 bits, corresponding to the manufacturer's minor version number), and variant identifier (4 bits, used to distinguish different variant types such as standard, low-power, high-speed, or wide-temperature). Based on this unified coding system, a version number comparison function can be executed, comparing versions sequentially according to the priority of process step, major version number, minor version number, and variant identifier to determine the relationship between versions.

[0058] The version number comparison function returns -1, zero, or -1, indicating that the first version is less than, equal to, or greater than the second version, respectively. When no exact version match is found in the parameter database, a fuzzy matching process is initiated, searching in descending order of priority: exact match, adjacent version match, cross-model match within the same process node, and cross-manufacturer match within the same process node. In the fuzzy matching distance metric, if the manufacturers are different, it returns infinity; if the equipment is different, it returns four times the absolute value of the process node difference; if both the manufacturer and equipment are the same, it returns the absolute value of the version number difference. Parameter inheritance is initiated when the matching distance is within a preset threshold; when the matching distance exceeds the threshold or the manufacturers are different, inheritance is not performed, and full parameter learning is initiated.

[0059] The database dynamic management also includes a degradation detection function. During detection, the latest version identifier of the corresponding die model is retrieved from the database. If the current die version identifier is lower than the latest version identifier, it is determined to be a degradation situation. The verified parameter set corresponding to the old version is loaded, the degradation flag is set to true, and a warning log is recorded. In one embodiment, the above method further includes: When there is no exact matching record for the target version identifier in the parameter database, but there is a verified parameter set for adjacent version identifiers of the same model, the parameter inheritance confidence is calculated based on the verified parameter set and the conservative value of the open NAND flash memory interface parameter page. The verified parameter set and the conservative value of the interface are weighted and fused with the inheritance confidence as the learning starting point, and the search range of automatic parameter learning is narrowed to a preset ratio range.

[0060] In this embodiment, the parameter inheritance confidence (a quantitative indicator used to measure the degree to which parameters between adjacent versions can be inherited) is jointly determined by the version number difference, manufacturer consistency rating, and number of verifications. Specifically, the greater the version number difference, the lower the inheritance confidence; the higher the manufacturer consistency rating, the higher the confidence; and the more verifications, the higher the confidence. By using the inheritance confidence weighted fusion of the verified parameter set and the interface conservative value as the learning starting point, the search range for automatic parameter learning is narrowed to a preset proportion range (±10%), thereby significantly shortening the learning time.

[0061] This embodiment establishes a device-level version compatibility matrix for multiple bare die models from mainstream NAND manufacturers and various eMMC controller chips. This matrix guides the pre-filling strategy of the parameter database and the cross-version parameter inheritance rules. The matrix covers cross-compatibility verification results for four mainstream 3D TLC NAND bare die models and three typical eMMC controller chips, including Yangtze Memory's 128-layer, Micron's 96-layer, Kioxia's 112-layer, and Samsung's 128-layer models, as well as controllers based on ARM Cortex-R5, ARM Cortex-M4, and RISC-V architectures. Compatibility status includes full compatibility (optimal parameters can be obtained automatically without manual intervention) and conditional compatibility (requires a specific controller firmware version or additional voltage / timing fine-tuning, but can still be completed through automatic learning). For example, the latest version of Yangtze Memory's 128-layer model requires voltage adjustment on an ARM Cortex-M4 controller, and a certain version of Kioxia's 112-layer model requires timing correction on an ARM Cortex-M4 controller.

[0062] When adjacent versions of the same model exist in the database, the automatic parameter learning process for the new version can accelerate convergence by utilizing existing parameters. Specific inheritance strategies include linear extrapolation with verification, direct inheritance with fine-tuning, interpolation with full verification, and downgraded direct inheritance. The inheritance algorithm is based on the optimal parameter vector of the existing version and the conservative ONFI value, determining the learning starting point through a weighted fusion of inheritance confidence. The inheritance confidence is jointly determined by version number differences, manufacturer consistency rating, and the number of verifications. The manufacturer consistency rating varies by manufacturer (Yangtze Memory 0.9, Micron 0.85, Kioxia 0.80, Samsung 0.88). When the inheritance confidence exceeds a preset threshold (0.8), the learning process is shortened from a full scan to fine-grained verification within a preset range (±10%), reducing the learning time from approximately 5 seconds to approximately 1.5 to 2.5 seconds.

[0063] When the optimal parameters of two versions are known, and the target version lies between these two versions, linear interpolation can be used to estimate the initial parameter values ​​of the target version. The interpolation result is limited to a certain percentage of the known parameter range to prevent it from exceeding a reasonable range. Taking Yangtze Memory's 128-layer model as an example, the optimal programming time for the early version is known to be 420 microseconds, and for the newer version, it is 340 microseconds. The linear interpolation estimate for the intermediate version is 380 microseconds, consistent with the measured learning value, while ONFI's conservative value is 460 microseconds, a deviation of 21%. The interpolation accuracy performs excellently across consecutive versions and can be used as a learning starting point to shorten the learning time by more than 60%.

[0064] When multiple versions (more than three) of the same model have accumulated parameters in the database, the parameter gradient tracking method is used to calculate the parameter gradient vectors between adjacent versions (i.e., the direction and magnitude of the rate of change of parameters between adjacent versions). The parameter change trend of the target version is estimated by using the parameter gradient of the known version closest to the target version, thereby further reducing the learning time. When more than three versions of parameters have accumulated in the database, the estimation accuracy of gradient tracking can reach within ±5% of the measured value.

[0065] In one embodiment, the above method further includes: During the operation after parameter loading, at least one of the following performance metrics is monitored in real time: raw bit error rate, frequency of uncorrectable errors, and programming failure rate. When the performance index exceeds the corresponding warning threshold, the system will attempt to roll back to the historical version parameter set with a higher number of verifications for the same die in the parameter database, the same version verified parameter set for other dies in the same storage device, or the conservative value of the open NAND flash memory interface parameter page, in order of priority. The reason for the rollback and the number of rollbacks will be marked.

[0066] In this embodiment, the frequency of uncorrectable errors is measured by the uncorrectable bit error rate (UBER, which refers to the ratio of bit errors that cannot be corrected even after low-density parity checking and other error correction algorithms). During operation after parameter loading, the automatic rollback mechanism continuously monitors at least one performance metric among RBER, UBER, and programming failure rate in real time. When a performance metric exceeds the corresponding warning threshold, the automatic rollback mechanism is triggered. Specific triggering conditions include: RBER exceeding the warning threshold (1×10⁻⁶) for three consecutive sampling windows. -3 ); UBER occurs more than twice within 24 hours; the number of programming failures exceeds 10 within 1 hour; or the temperature exceeds the calibration range during parameter learning (above 30 degrees Celsius) and RBER deteriorates more than the preset multiple (2 times).

[0067] The rollback process follows these steps: First, record the exception context, including the exception type, current parameter set, and timestamp. Then, search the candidate list of safety parameters. Candidates include historical version parameter sets with higher verification counts in the database, conservative ONFI parameter page values, and verified parameter sets of the same version from adjacent dies within the same storage device. Next, attempt to load the parameters in priority order, selecting the first candidate parameter set that passes rapid verification (20 sample verifications) for rollback. Mark the rollback reason and rollback count, and increment the rollback count. If the rollback returns to the ONFI value, mark that the version needs to be relearned. If all candidates fail verification, the final fallback uses the conservative ONFI value with an additional maximum safety margin (30% increase in programming time, 150 mV increase in programming voltage), while simultaneously logging a critical warning.

[0068] After a rollback, a tiered relearning strategy is implemented based on the number of rollbacks: for a light rollback (rollback count of 1), the device will automatically start relearning after 24 hours of continued operation; for a moderate rollback (rollback count of 2 to 3 times), the device will relearn after 7 days and the learning step size will be halved (from 10 microseconds to 5 microseconds) to enhance security; for a heavy rollback (rollback count of 4 times or more), the ONFI conservative parameters will be permanently locked with an additional safety margin, and the device will no longer learn, and the host will be notified that the die is not suitable for performance-sensitive scenarios.

[0069] In the aging test of 1000 devices (85 degrees Celsius, 1000 programming / erasing cycles), the automatic rollback mechanism was triggered 12 times (approximately 1.2%). Among these, 8 were triggered by temperature exceeding the limit (66.7%), which successfully recovered after rolling back to the conservative ONFI value; 3 were triggered by RBER exceeding the limit (25%), which recovered after rolling back to the parameters of the adjacent die; and 1 was triggered by programming failure (8.3%), which rolled back to the ONFI value and marked for relearning, and recovered after learning. There were no rollback failures or data loss.

[0070] In one embodiment, the above method further includes: Before mass production, a prototype covering all incoming material versions is selected to perform complete parameter learning, a gold sample parameter snapshot is generated and written into the parameter database as a read-only baseline. During the mass production stage, if the bare die version identifier exists in the gold sample parameter snapshot, the snapshot parameters are loaded directly and automatic parameter learning is skipped; if it does not exist, automatic parameter learning is started, and the new parameter set obtained by learning is constrained within the preset fluctuation range of the parameters corresponding to the gold sample parameter snapshot and then written into the parameter database.

[0071] In this embodiment, the generation of the gold sample parameter snapshot (hereinafter referred to as GPS, which refers to the snapshot of the set of baseline parameters generated by prototype calibration before mass production) includes three stages: the gold sample calibration stage, in which 10 prototypes covering all incoming material version combinations are selected, and each version performs complete parameter learning. The learning results are reviewed by the quality certification engineer to confirm that all parameters are within the specification range, and the gold sample parameter snapshot is generated; the mass production locking stage, in which the gold sample parameter snapshot data is written into the mass production tool. The mass production tool uses the snapshot as a read-only baseline of the parameter database. After each device on the production line is powered on, if the bare chip version exists in the snapshot, the snapshot parameters are directly loaded and learning is skipped. If it does not exist, learning is started, but the parameter range is constrained by the snapshot (the programming time cannot be faster than 90% of the fastest value in the snapshot and cannot be slower than 110% of the slowest value); the post-production monitoring stage, the shipped equipment still retains the automatic learning capability, but the learning results are marked as field optimization, which is different from the snapshot baseline. The field optimization parameters can be retained or rolled back to the snapshot baseline when the equipment is repaired or the firmware is upgraded.

[0072] The data structure of the gold sample parameter snapshot includes a snapshot version number (monotonically increasing), a generation timestamp, a checksum (SHA-256), the number of parameter entries, and the number of parameter entries per version. Each parameter entry includes a manufacturer identifier, device identifier, version identifier, standard parameter set, lock level, and the number of times it has been verified during gold sample verification. Lock levels include three states: unlocked (normal mode, allowing free learning, parameter modification permissions are automatically granted by firmware), mass production lock (mass production baseline, parameters are constrained by the snapshot, learning is limited to ±10%, parameter modification permissions are automatically restricted by firmware), and permanently locked (quality certification freeze, no modifications are allowed, modifications are only permitted through quality certification tools).

[0073] In 10,000 mass-produced devices (locked at the production lock level), the standard deviation of 4K random write input / output operations per second (IOPS, a metric for measuring the random read / write performance of storage devices) between devices decreased from ±8.5% in the unlocked mode to ±2.1%, ensuring a consistent end-user experience.

[0074] In one embodiment, the above method further includes: When a search fails to find a matching manufacturer record for the target die in the parameter database, other manufacturer parameter records for the same or similar process nodes are searched. Temperature compensation coefficients and voltage reference parameters are shared as the starting point for automatic parameter learning, while timing parameters are learned independently.

[0075] In this embodiment, cross-vendor parameter sharing is performed when a matching record for the target die is not found in the parameter database. The system searches for parameter records from other manufacturers with the same or similar process nodes (both 128-layer or 96-layer 3D TLC, with process nodes close to approximately 40 nanometers). Temperature compensation coefficients and voltage reference parameters are shared as the starting point for automatic parameter learning, while timing parameters are learned independently. This is because timing parameters of dies from different manufacturers can vary by 20% to 30%, while temperature compensation coefficients and voltage reference parameters have higher portability.

[0076] When sharing parameters across vendors, the confidence level is highest for parameters from the same vendor and the same process node (0.90), followed by parameters from the same vendor but different process nodes (0.60), then parameters from different vendors but the same process node (0.40), and lowest for parameters from different vendors but different process nodes (0.10). When the confidence level reaches a preset threshold (0.40), only the temperature compensation coefficient and voltage reference parameters are inherited, timing parameters are cleared, and the shared parameters are used as the learning starting point, thereby shortening the learning time by about 45% without affecting the timing optimization results. If all parameters are shared, the performance actually decreases (programming time is 6.5% slower), proving that timing parameters cannot be shared across vendors.

[0077] In one embodiment with a hybrid vendor, four-die configuration, three Yangtze Memory 128-layer optimized versions and one Micron 96-layer second version were mixed in due to supply chain constraints. The independent full-scale learning time was 4820 milliseconds, the optimal programming time was 385 microseconds, and the RBER was 1.8 × 10⁻⁶. -3 After sharing temperature / voltage parameters across vendors, the learning time is 2650 milliseconds (reduced by 45%), and the optimal programming time and RBER are consistent with independent learning. If all parameters are shared across vendors, the learning time is shorter, but the optimal programming time is slower and the RBER increases, proving that timing parameters cannot be shared across vendors.

[0078] In one specific embodiment, a batch of three-layer NAND bare dies includes three versions: an early version (60%), an optimized version (30%), and a new version (10%). During initial mass production, the early version matches the parameter database (having undergone over 500 verifications), directly loading the verified parameter set with an optimal programming time of 420 microseconds. The optimized version misses the parameter database, initiating automatic parameter learning. After timing optimization, the optimal programming time is reduced to 380 microseconds, approximately 10% shorter than the early version, and the new parameter set is then written back to the database. The new version also misses the parameter database, undergoing a complete learning process before being written back to the database. In subsequent mass production, all versions match the parameter database, skipping the learning phase.

[0079] The following are the measured programming time (in microseconds) and RBER (in × 10⁻¹⁰) at 25 degrees Celsius in pSLC mode. -3Example data. Under controller A (ARM Cortex-R5, 400 MHz, 8 channels), Yangtze Memory's early 128-layer version programming time was 420 microseconds, RBER 2.1; the optimized version was 380 microseconds, RBER 1.8; and the new version was 340 microseconds, RBER 1.5. Micron's early 96-layer version was 450 microseconds, RBER 2.5; the optimized version was 410 microseconds, RBER 2.0; the second version was 390 microseconds, RBER 1.7; and the third version was 370 microseconds, RBER 1.6. Kioxia's early 112-layer version was 430 microseconds, RBER 2.3; and the optimized version was 395 microseconds, RBER 1.9. Samsung's early 128-layer version was 400 microseconds, RBER 1.6; the optimized version was 375 microseconds, RBER 1.4; and the new version was 355 microseconds, RBER 1.2. Under the main controller B (ARM Cortex-M4, 200 MHz, 4 channels), Yangtze Memory's early 128-layer version achieved 430 microseconds and RBER 2.4, the optimized version 395 microseconds and RBER 2.1, and the new version 360 microseconds and RBER 1.8; Micron's early 96-layer version achieved 470 microseconds and RBER 2.9, the optimized version 430 microseconds and RBER 2.4, and the second version 405 microseconds and RBER 2.0; Kioxia's early 112-layer version achieved 450 microseconds and RBER 2.7, the optimized version 420 microseconds and RBER 2.3, and a certain version 390 microseconds and RBER 2.1 (requires an additional 50 mV programming voltage bias, which is automatically learned and processed); Samsung's early 128-layer version achieved 415 microseconds and RBER 1.9, the optimized version 390 microseconds and RBER 1.7, and the new version 370 microseconds and RBER 1.5. Under the controller C (RISC-V, 320 MHz, 4 channels), Yangtze Memory's 128-layer early version has 425 microseconds and RBER 2.3, the optimized version has 385 microseconds and RBER 2.0, and the new version has 365 microseconds and RBER 1.9 (timing needs fine-tuning, now covered by automatic learning); Micron's 96-layer early version has 460 microseconds and RBER 2.7, the optimized version has 420 microseconds and RBER 2.2, and the second version has 400 microseconds and RBER 1.9; Kioxia's 112-layer early version has 440 microseconds and RBER 2.5, the optimized version has 410 microseconds and RBER 2.2, and the new version has 385 microseconds and RBER 2.0; Samsung's 128-layer early version has 410 microseconds and RBER 1.8, the optimized version has 385 microseconds and RBER 1.6, and the new version has 365 microseconds and RBER 1.4.

[0080] Actual test data under different main control architectures show that the automatic parameter learning in this embodiment can cover all main control platforms. For individual combinations that require fine-tuning, the automatic learning process handles them automatically.

[0081] In 12 consecutive months of actual mass production (involving 500 batches and approximately 500,000 eMMC units), this implementation method reduced the average changeover configuration time from 12 minutes per batch in the traditional manual configuration scheme to 0 minutes, saving 100% of manpower; the parameter configuration error rate decreased from 0.7% for manual input to 0%; the adaptation delay for new versions decreased from 14 working days to 0 working days; and the mass production line downtime waiting time decreased from 3.2 hours / month to 0 hours / month. Database coverage increased linearly with the number of mass production batches, reaching 68% in the first month, 97% in the sixth month, and 99.8% in the twelfth month.

[0082] Performance comparison data shows that in a scenario with mixed versions of components (i.e., the same batch of incoming materials contains multiple versions of bare dies), the test configuration is 32GB pSLC eMMC, 4 bare dies (2 early versions, 1 optimized version, and 1 new version), and a main controller ARM Cortex-R5. Compared to the single parameter table scheme (with unified configuration based on early version parameters) and the pure ONFI parameter page scheme, this implementation achieves a sequential write speed of 242 Mbps (single parameter table 185, ONFI scheme 210), a sequential read speed of 320 Mbps (single parameter table 295, ONFI scheme 290), a 4K random write IOPS of 17800 (single parameter table 12500, ONFI scheme 14200), a 4K random read IOPS of 32500 (single parameter table 28000, ONFI scheme 27500), an average programming time of 365 microseconds (single parameter table 420, ONFI scheme 460), and an RBER of 1.4 × 10⁻⁶. -3 (Single Parameter Table 3.8, ONFI Scheme 2.1), UBER 1.1×10 -11 Significant improvements have been made in aspects such as (single parameter table 8.2, ONFI solution 3.5) and write power consumption of 445 milliwatts (single parameter table 520, ONFI solution 480).

[0083] Long-term reliability data further demonstrates that, in accelerated aging tests at 85 degrees Celsius (equivalent to 5 years of room temperature use), the RBER after 1000 program / erase cycles is 4.2 × 10⁻⁶. -3 (Single Parameter Table 15.3, ONFI Scheme 6.8), after 3000 programming / erasing cycles, the RBER is 11.8 × 10⁻⁶. -3(Single Parameter Table 42.7, ONFI Solution 18.5) The first uncorrectable error occurred 5200 times (Single Parameter Table 2100, ONFI Solution 3850), and the data retention time was 680 hours (Single Parameter Table 380, ONFI Solution 520). Due to the use of the optimal voltage per die instead of a conservative voltage, programming interference was reduced, the RBER degradation rate was decreased by 35% to 50%, and the equivalent lifetime was extended by more than 35%. In aging tests on 1000 devices, the automatic rollback mechanism trigger rate was approximately 1.2%, with no rollback failures or data loss.

[0084] In addition, process step refers to the different levels of process maturity in semiconductor manufacturing, from engineering samples and customer samples to mass production. Each level corresponds to a set of verified manufacturing process parameters.

[0085] Variant identifiers refer to the circuit design or process fine-tuning marks made for different application scenarios (such as standard operating conditions, low power operating conditions, high speed operating conditions, or wide temperature operating conditions) of the same version of the die, used to distinguish die subcategories with different performance orientations under the same version.

[0086] Matching distance refers to the quantitative difference between two version identifiers under a unified hierarchical coding system. It takes into account the weighted differences of process step, major version number, sub-version number and variant identifier, and is used to determine whether the similarity condition of parameter inheritance is met.

[0087] The version compatibility matrix is ​​a two-dimensional comparison table that records the feasibility of automatic parameter learning and the required fine-tuning measures for each combination, with NAND die model, version identifier and eMMC controller chip model as the row and column dimensions. It is used to guide the pre-filling strategy of the parameter database and the cross-version parameter inheritance rules.

[0088] Version downgrading refers to a situation where the current die version identifier is lower than the highest version identifier recorded for that die model in the parameter database, indicating that the die may be a process rollback or a product from an old batch. The downgrading flag is a Boolean flag used to mark that the die has an abnormal version status. When triggered, it loads conservative parameters of the old version to avoid reliability risks caused by aggressive parameters.

[0089] A cloud-based parameter database refers to a copy of the parameter database deployed on a remote server. It serves as an extended backup of the local parameter database and is used to share verified parameter sets across multiple production lines or factories. When a local search fails, the cloud database is queried first. Once a match is found, the corresponding parameter set is synchronized to the local database to reduce repetitive learning time and achieve global sharing of parameter knowledge.

[0090] Rapid validation refers to a process of performing a short-term reliability check on a set of candidate parameters with a reduced sample size (e.g., 20 programming / readback operations) before loading the rollback parameter set. The aim is to quickly screen out parameter candidates that can be safely rolled back, and avoid secondary anomalies caused by directly using untested parameters.

[0091] On-site optimization refers to the automatic parameter fine-tuning results of shipped equipment in the end-use environment based on actual operating data. These results are distinguished from the gold sample parameter snapshot baseline. When equipment is returned for repair or firmware upgrade, the on-site optimization values ​​can be retained or rolled back to the snapshot baseline to balance performance improvement and mass production consistency.

[0092] Temperature compensation coefficient refers to the linear fitting parameter describing the optimal programming voltage as a function of ambient temperature. It includes first-order coefficients (the slope of voltage change with temperature) and second-order coefficients (the curvature of voltage change with temperature). It is used to dynamically adjust the programming voltage according to the current temperature during operation to ensure that the RBER remains at the optimal level under different temperatures.

[0093] The programming step voltage refers to the voltage increment between each programming pulse during incremental step pulse programming (ISPP). This value determines the balance between programming accuracy and speed: the smaller the step voltage, the higher the programming accuracy but the longer it takes; the larger the step voltage, the faster the programming speed but the wider the threshold voltage distribution.

[0094] The read reference voltage is the discrimination level used to distinguish different threshold voltage states of memory cells during read operations. The selection of this voltage directly affects the read error rate and data retention capability, and it needs to be calibrated according to the characteristics of different versions of the die.

[0095] The maximum number of programming pulses refers to the upper limit of the maximum number of programming pulses that can be applied during incremental step pulse programming (ISPP). It is used to prevent infinite loop programming caused by abnormal die or parameter drift and to protect memory cells from overstress damage.

[0096] The rollback count refers to the cumulative number of times the automatic rollback mechanism has been triggered in the history of the same die. This count is used to control the relearning strategy in a graded manner: the lower the count, the faster and more aggressive the relearning; the higher the count, the more conservative and cautious the learning. Once the threshold is reached, the conservative parameters are permanently locked.

[0097] Safety margin refers to the additional reliability buffer value added on top of the conservative ONFI parameters. By increasing the programming time margin and programming voltage margin, it ensures stable operation under the worst conditions and avoids occasional failures caused by parameters approaching their limits.

[0098] Lock levels include: Unlocked (Lock level 0, normal mode, automatic firmware management, allowing free and unrestricted learning); Mass production locked (Lock level 1, mass production baseline mode, automatic and restricted firmware management, allowing learning but the results must be constrained to within ±10% of the parameters corresponding to the gold sample parameter snapshot); Permanent locked (Lock level 2, quality certification freeze mode, only allowing modification through quality certification tools, prohibiting any on-site learning or optimization, used to ensure stability after firmware version freezing).

[0099] The aforementioned pSLC parameter adaptive matching method constructs a unique identifier by reading the manufacturer's identifier, device identifier, and version identifier of the NAND flash die during the power-on initialization phase. This identifier is then used as a search key to find the corresponding optimal or verified parameter set in the parameter database. Once a match is found, this parameter set is directly loaded to ensure accurate matching for known revisions. If no match is found, an automatic parameter learning process is initiated to obtain a new parameter set and update the database, thereby supporting matching of unknown revisions through similarity. The entire process allows for dynamic parameter adjustment without restarting the device, significantly improving the flexibility and efficiency of NAND flash die adaptation and reducing the need for and risk of human intervention, thus enhancing the stability and reliability of the device. Furthermore, by monitoring performance indicators in real time and performing parameter rollback when necessary, the robustness of the device is further ensured.

[0100] Figure 2 This is a schematic block diagram of a pSLC parameter adaptive matching device 300 provided in an embodiment of the present invention. Figure 2 As shown, corresponding to the above-described pSLC parameter adaptive matching method, the present invention also provides a pSLC parameter adaptive matching apparatus 300. This pSLC parameter adaptive matching apparatus 300 includes a unit for executing the above-described pSLC parameter adaptive matching method, and the apparatus can be configured in a server. Specifically, please refer to... Figure 2 The pSLC parameter adaptive matching device 300 includes a bare die identification unit 301, a parameter retrieval unit 302, a parameter loading unit 303, and an automatic parameter learning unit 304.

[0101] The die identification unit 301 is used to read the manufacturer identifier, device identifier, and version identifier of each die through the open NAND flash memory interface command during power-on initialization to construct a unique die identifier; the parameter retrieval unit 302 is used to search the parameter database for the existence of a corresponding parameter record using the unique die identifier as the retrieval key; the parameter loading unit 303 is used to directly load the verified parameter set in the parameter record to the corresponding die when the retrieval is successful; the automatic parameter learning unit 304 is used to start an automatic parameter learning process for the die when the retrieval is unsuccessful, obtain a new parameter set and write it into the parameter database for direct loading when the retrieval is successful in the future.

[0102] In one embodiment, the automatic parameter learning unit 304 is used to determine the optimal programming time by gradually shortening the programming time based on the conservative value in the open NAND flash memory interface parameter page as an initial reference and verifying it with the original bit error rate as a criterion; to perform multi-point voltage scanning within a preset scanning range of the reference voltage and select the voltage with the lowest original bit error rate as the optimal programming voltage; to perform parameter calibration at at least two temperature points and fit the temperature compensation coefficient; and to determine the low-density parity check code rate based on the original bit error rate distribution after the programming erase cycle.

[0103] In one embodiment, the above-described apparatus further includes: The loading unit is used to load the verified parameter set of the corresponding old version and mark the downgrade flag when the version record of the current die already exists in the parameter database and the version identifier of the current die is lower than the highest version identifier of the die of the current model in the parameter database.

[0104] The narrowing unit is used to calculate the parameter inheritance confidence based on the verified parameter set and the conservative value of the open NAND flash memory interface parameter page when there is no exact matching record of the target version identifier in the parameter database, but there is a verified parameter set of adjacent version identifiers of the same model. The verified parameter set and the interface conservative value are weighted and fused with the inheritance confidence as the learning starting point to narrow the search range of automatic parameter learning to a preset ratio range.

[0105] The marking unit is used to monitor at least one of the following performance indicators in real time during the operation after parameter loading: raw bit error rate, frequency of uncorrectable errors, and programming failure rate. When the performance indicator exceeds the corresponding warning threshold, the unit attempts to roll back to the historical version parameter set with a higher number of verifications for the same die in the parameter database, the same version verified parameter set for other dies in the same storage device, or the conservative value of the open NAND flash memory interface parameter page, in order of priority, and marks the reason for rollback and the number of rollbacks.

[0106] The mass production learning unit is used to select prototypes covering all incoming material version combinations to perform complete parameter learning before large-scale mass production, generate gold sample parameter snapshots and write them into the parameter database as read-only baselines; during the mass production stage, if the bare die version identifier exists in the gold sample parameter snapshot, the snapshot parameters are directly loaded and automatic parameter learning is skipped; if it does not exist, automatic parameter learning is started, and the new parameter set obtained by learning is constrained within the preset fluctuation range of the parameters corresponding to the gold sample parameter snapshot before being written into the parameter database.

[0107] The search unit is used to search for other manufacturer parameter records of the same or similar process nodes when the search fails and there is no matching record of the target die in the parameter database. The temperature compensation coefficient and voltage reference parameters are shared as the learning starting point for automatic parameter learning, while the timing parameters are learned independently.

[0108] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned pSLC parameter adaptive matching device 300 and each unit can be referred to the corresponding description in the foregoing method embodiments. For the sake of convenience and brevity, it will not be repeated here.

[0109] The aforementioned pSLC parameter adaptive matching device 300 can be implemented as a computer program, which can, for example... Figure 3 It runs on the computer device shown.

[0110] Please see Figure 3 , Figure 3 This is a schematic block diagram of a computer device provided in an embodiment of this application. The computer device 500 can be a server, wherein the server can be a standalone server or a server cluster composed of multiple servers.

[0111] See Figure 3 The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a device bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.

[0112] The non-volatile storage medium 503 can store an operating device 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a pSLC parameter adaptive matching method.

[0113] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.

[0114] The internal memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a pSLC parameter adaptive matching method.

[0115] This network interface 505 is used for network communication with other devices. Those skilled in the art will understand that... Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0116] The processor 502 is used to run a computer program 5032 stored in the memory to implement all the steps of the pSLC parameter adaptive matching method.

[0117] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0118] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer device to implement the process steps of the embodiments of the above methods.

[0119] Therefore, the present invention also provides a storage medium. This storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein when executed by a processor, the computer program causes the processor to perform all the steps implementing the pSLC parameter adaptive matching method.

[0120] The storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.

[0121] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0122] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0123] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the device of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0124] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0125] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. The pSLC parameter adaptive matching method, characterized in that, include: During power-on initialization, the manufacturer identifier, device identifier, and version identifier of each die are read by opening the NAND flash memory interface command to construct a unique identifier for each die; Using the unique identifier of the bare die as the search key, search the parameter database to see if a corresponding parameter record exists; If the search is successful, the verified parameter set in the parameter record is directly loaded into the corresponding die. If the search fails to find a match, an automatic parameter learning process is initiated for that bare die to obtain a new parameter set and write it into the parameter database for direct loading when a subsequent search finds a match.

2. The pSLC parameter adaptive matching method according to claim 1, characterized in that, The automatic parameter learning process initiated for the bare die, obtaining a new parameter set and writing it into the parameter database for direct loading during subsequent retrieval, includes: Using the conservative values ​​in the open NAND flash memory interface parameter page as an initial baseline, the programming time is gradually reduced and verified using the original bit error rate as a criterion to determine the optimal programming time; Perform multi-point voltage scanning within the preset scanning range of the reference voltage, and select the voltage with the lowest original bit error rate as the optimal programming voltage. Parameters are calibrated at at least two temperature points, and the temperature compensation coefficient is obtained by fitting. The low-density parity check code rate is determined based on the original bit error rate distribution after the programming erase cycle.

3. The pSLC parameter adaptive matching method according to claim 2, characterized in that, The parameter database is stored in the controller's non-volatile reserved area. Each record in the parameter database contains a unique identifier for the die, a parameter set, a verification count field, and a historical version sequence. The parameter database stores multiple versions of verified parameter sets for the same die model. The verification count is set to an initial value when a new parameter set is written and increments each time a search hits and loads the data.

4. The pSLC parameter adaptive matching method according to claim 2, characterized in that, Also includes: If a version record for this type of die already exists in the parameter database, and if the version identifier of the current die is detected to be lower than the highest version identifier of this type of die in the parameter database, the verified parameter set of the corresponding old version is loaded, and a downgrade flag is marked.

5. The pSLC parameter adaptive matching method according to claim 2, characterized in that, Also includes: When there is no exact matching record for the target version identifier in the parameter database, but there is a verified parameter set for adjacent version identifiers of the same model, the parameter inheritance confidence is calculated based on the verified parameter set and the conservative value of the open NAND flash memory interface parameter page. The verified parameter set and the conservative value of the interface are weighted and fused with the inheritance confidence as the learning starting point, and the search range of automatic parameter learning is narrowed to a preset ratio range.

6. The pSLC parameter adaptive matching method according to claim 2, characterized in that, Also includes: During the operation after parameter loading, at least one of the following performance metrics is monitored in real time: raw bit error rate, frequency of uncorrectable errors, and programming failure rate. When the performance index exceeds the corresponding warning threshold, the system will attempt to roll back to the historical version parameter set with a higher number of verifications for the same die in the parameter database, the same version verified parameter set for other dies in the same storage device, or the conservative value of the open NAND flash memory interface parameter page, in order of priority. The reason for the rollback and the number of rollbacks will be marked.

7. The pSLC parameter adaptive matching method according to claim 2, characterized in that, Also includes: Before mass production, a prototype covering all incoming material versions is selected to perform complete parameter learning, a gold sample parameter snapshot is generated and written into the parameter database as a read-only baseline. During the mass production stage, if the bare die version identifier exists in the gold sample parameter snapshot, the snapshot parameters are loaded directly and automatic parameter learning is skipped. If it does not exist, automatic parameter learning is initiated, and the newly learned parameter set is constrained within the preset fluctuation range of the parameter corresponding to the gold sample parameter snapshot and then written into the parameter database.

8. The pSLC parameter adaptive matching method according to claim 2, characterized in that, Also includes: When a search fails to find a matching manufacturer record for the target die in the parameter database, other manufacturer parameter records for the same or similar process nodes are searched. Temperature compensation coefficients and voltage reference parameters are shared as the starting point for automatic parameter learning, while timing parameters are learned independently.

9. The pSLC parameter adaptive matching method according to claim 4, characterized in that, The version identifier adopts a unified hierarchical coding system, including process step, major version number, sub-version number and variant identifier; when there is no exact version match in the parameter database, fuzzy matching is started: the search is performed in descending order of priority according to exact matching, adjacent version matching, cross-model matching of the same process node, and cross-manufacturer matching of the same process node, and parameter inheritance is started when the matching distance is within a preset threshold. 10.pSLC parameter adaptive matching device, characterized in that, include: The die identification unit is used to read the manufacturer identifier, device identifier, and version identifier of each die through the open NAND flash memory interface command during power-on initialization, and construct a unique identifier for each die; The parameter retrieval unit is used to search the parameter database for the existence of a corresponding parameter record using the unique identifier of the bare die as the retrieval key. The parameter loading unit is used to directly load the verified parameter set in the parameter record to the corresponding bare die when a search hit occurs; An automatic parameter learning unit is used to initiate an automatic parameter learning process for the bare die when the search fails, obtain a new parameter set and write it into the parameter database for direct loading when the search succeeds in the subsequent search.

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