A low tail latency SSD hardware scheduling method, system and device
Patent Information
- Application Number
- CN202611500339.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-24
- Publication Date
- 2026-10-30
AI Technical Summary
但现有令牌桶调度机制仅从总量层面管控带宽配额,未区分不同数据长度命令的调度优先级,当短长度命令批量涌入提交队列时,会持续挤占调度资源,导致长长度命令长期无法被调度执行,出现长命令饥饿现象,进而引发毫秒级的尾部延迟峰值,严重破坏延迟确定性
[0016]本发明的有益效果是:首先,本发明融合令牌桶带宽管控机制与按命令数据长度划分区间的加权轮询调度逻辑,以区间当前权重值、令牌桶剩余令牌数作为双重执行判定条件,针对不同数据长度的NVMe读写命令分配差异化调度配额,可避免短数据长度命令持续挤占调度资源造成的长命令饥饿问题,有效抑制共享NVMeSSD场景下的尾部延迟峰值,提升存储存取延迟的确定性,适配金融交易、实时数据库、AI推理等延迟敏感业务。
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Figure CN123011157A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solid-state storage service quality scheduling technology, and in particular to a low-tail-latency jitter SSD hardware scheduling method, system and device. Background Technology
[0002] As enterprise-level applications in data centers continue to demand higher storage performance, NVMe solid-state drives (SSDs) based on the PCIe bus are gradually replacing traditional hard disk drives (HDDs) as the mainstream storage medium due to their high throughput and low average latency. At the same time, business scenarios such as transactional databases, real-time analytics, and financial transactions no longer only require low average latency, but also place stringent demands on the predictability of storage tail latency—significant fluctuations in tail latency can directly impact the stability and service quality of the business chain.
[0003] The current NVMe protocol introduces controller PCIe bandwidth and IOPS quality of service characteristics, typically based on a token bucket mechanism to limit bandwidth rates, thereby allocating resources when multiple controllers share the same SSD device. However, the existing token bucket scheduling mechanism only manages bandwidth quotas at the total amount level and does not differentiate the scheduling priority of commands with different data lengths. When short-length commands flood the submission queue in batches, they continuously consume scheduling resources, causing long-length commands to be unable to be scheduled and executed for a long time, resulting in long command starvation. This leads to millisecond-level tail latency peaks, severely compromising latency determinism.
[0004] In addition, existing weighted round-robin scheduling schemes are mostly implemented at the software layer, and there is still a gap in hardware-level scheduling mechanisms adapted to NVMe hardware controllers. They cannot accurately suppress tail latency jitter at the hardware level while adhering to protocol QoS specifications, making it difficult to meet the low latency jitter requirements in high-concurrency shared storage scenarios. Summary of the Invention
[0005] To address the above problems, this invention proposes a low-tail-latency jitter SSD hardware scheduling method, system, and device.
[0006] To achieve the above objectives, the present invention employs the following technical solution: A low-tail-latency jitter SSD hardware scheduling method includes: S1. Configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the token replenishment cycle based on the capacity limit. Divide the data length of the command into multiple consecutive data length intervals and determine the maximum length interval. Preset a baseline weight value for each data length interval and initialize the current weight value of all data length intervals to the corresponding baseline weight value. S2. Within the current scheduling period, select a candidate command from the queue of commands to be executed, and determine the data length range to which the candidate command belongs based on its data length. When the current weight value of the data length range to which the candidate command belongs is greater than 0, and the number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, execute the candidate command. After execution, deduct the number of tokens required to execute the candidate command from the token bucket, and decrement the current weight value of the data length range to which the candidate command belongs by 1. S3. If the data length range of the currently executed candidate command is the maximum length range, then reset the current weight value of all data length ranges to the corresponding baseline weight value and enter the next scheduling cycle; otherwise, continue command scheduling within the current scheduling cycle based on the current weight value.
[0007] In a preferred embodiment of the present invention, the data length range includes at least a short length range, a medium length range, and a maximum length range; if the data length of a command is less than a preset first byte threshold, the command is determined to belong to the short length range; if the data length of a command is greater than or equal to the preset first byte threshold and less than a preset second byte threshold, the command is determined to belong to the medium length range; if the data length of a command is greater than or equal to the preset second byte threshold and less than a preset third byte threshold, the command is determined to belong to the maximum length range. Among them, the preset first byte threshold is less than the preset second byte threshold, and the preset second byte threshold is less than the preset third byte threshold; the base weight value of the short length interval is greater than the base weight value of the medium length interval, and the base weight value of the medium length interval is greater than the base weight value of the maximum length interval.
[0008] As a preferred embodiment of the present invention, when the current weight value of the data length interval to which the candidate command belongs is not greater than 0, or the current number of remaining tokens in the token bucket is lower than the number of tokens required to execute the candidate command, the execution of the candidate command is skipped, and the next candidate command is selected from the queue of commands to be executed and re-evaluated.
[0009] As a preferred embodiment of the present invention, if the current weight value of all data length intervals is 0 and no command has been scheduled or executed within the preset scheduling time, then the current weight value of all data length intervals is directly reset to the corresponding baseline weight value, the current scheduling cycle ends and the next scheduling cycle begins.
[0010] As a preferred embodiment of the present invention, when selecting candidate commands from the queue of commands to be executed, the candidate commands are selected sequentially in the order in which they entered the queue of commands to be executed; during the traversal of the same queue of commands to be executed, candidate commands that have been determined to be skipped are not determined again.
[0011] As a preferred embodiment of the present invention, the host can dynamically modify the baseline weight value, token replenishment period, capacity limit, and preset first, second, and third byte thresholds for each data length range through NVMe administrator commands; once the modification is completed, it will take effect in the next scheduling cycle.
[0012] As a preferred embodiment of the present invention, when a command enters the command queue to be executed, the cumulative waiting time is recorded; When polling to select candidate commands, if the current candidate command belongs to the maximum length interval and the cumulative waiting time exceeds the preset timeout threshold, the current candidate command is marked as a timeout candidate command; for timeout candidate commands, the current weight value of the maximum length interval is increased by a preset step size; the increased current weight value of the maximum length interval does not exceed twice the corresponding baseline weight value; Once all timeout candidate commands have been scheduled and executed, the current weight values of all data length ranges are reset to the corresponding baseline weight values, and the next scheduling cycle begins. If the number of tokens required to execute a timeout candidate command is greater than the number of tokens remaining in the current token bucket, and the cumulative waiting time exceeds the preset second timeout threshold, then the current weight value of the maximum length interval will be reset to the corresponding baseline weight value.
[0013] A low-tail-latency jitter SSD hardware scheduling system includes: The initialization module is used to configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the replenishment cycle based on the capacity limit. It divides the data length of the command into multiple consecutive data length intervals and determines the maximum length interval. It presets a baseline weight value for each data length interval and initializes the current weight value of all data length intervals to the corresponding baseline weight value. The command determination module is used to select candidate commands from the queue of commands to be executed within the current scheduling period, and determine the data length range to which the candidate command belongs based on the data length of the candidate command; when the current weight value of the data length range to which the candidate command belongs is greater than 0, and the current number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, the candidate command is executed; after execution, the number of tokens required to execute the candidate command is deducted from the token bucket, and the current weight value of the data length range to which the candidate command belongs is decremented by 1; The reset decision module is used to reset the current weight value of all data length intervals to the corresponding baseline weight value if the data length interval to which the currently executed candidate command belongs is the maximum length interval, and then enter the next scheduling cycle; otherwise, it continues the command scheduling in the current scheduling cycle based on the current weight value.
[0014] An electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the low tail latency jitter SSD hardware scheduling method.
[0015] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the low tail latency jitter SSD hardware scheduling method.
[0016] The beneficial effects of this invention are as follows: First, this invention integrates the token bucket bandwidth management mechanism with the weighted round-robin scheduling logic that divides the interval according to the command data length. It uses the current weight value of the interval and the remaining number of tokens in the token bucket as dual execution judgment conditions, and allocates differentiated scheduling quotas for NVMe read and write commands with different data lengths. This can avoid the problem of long command starvation caused by short data length commands continuously occupying scheduling resources, effectively suppress the tail latency peak in the shared NVMe SSD scenario, improve the determinism of storage access latency, and adapt to latency-sensitive businesses such as financial transactions, real-time databases, and AI inference.
[0017] Secondly, this invention defines the data length interval with the largest upper limit value as the maximum length interval, and uses the completion of the command in the maximum length interval as the trigger condition for global weight reset to construct a closed-loop scheduling cycle; each completed command synchronously deducts the current weight of the corresponding interval, balances the scheduling opportunities of commands in each length interval within a single cycle, and stably controls the latency jitter from the hardware scheduling logic level.
[0018] Next, this invention relies on the mechanism of the token bucket continuously replenishing tokens according to a fixed token replenishment cycle and deducting tokens according to command consumption. It strictly follows the NVMe protocol controller PCIe bandwidth and IOPS service quality specifications. On the basis of compliantly completing the bandwidth resource rate limiting allocation, it makes up for the defect of traditional token bucket scheduling that cannot distinguish command IO size, and takes into account the overall PCIe bus bandwidth utilization and IO scheduling fairness.
[0019] Finally, the entire scheduling logic can be implemented entirely with the internal digital hardware circuitry of the NVMe controller, without relying on processor software scheduling. Hardware judgment, weight counting, and token counting are completed in real time in parallel, resulting in low scheduling decision latency. At the same time, all parameters can be configured in a standardized manner, which can adapt to enterprise-level storage services with different concurrency levels and different IO sizes, making the solution more robust and adaptable to engineering. Attached Figure Description
[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein: Figure 1 This is a flowchart of the method in an embodiment of the present invention; Figure 2 This is a system structure diagram in an embodiment of the present invention. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.
[0022] like Figure 1 As shown, this is an embodiment of the present invention, which provides a low-tail-latency jitter SSD hardware scheduling method, including: S1. Configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the token replenishment cycle based on the capacity limit. Divide the data length of the command into multiple consecutive data length intervals and determine the maximum length interval. Preset a baseline weight value for each data length interval and initialize the current weight value of all data length intervals to the corresponding baseline weight value.
[0023] In this embodiment, the data length range includes at least a short length range, a medium length range, and a maximum length range. If the data length of a command is less than a preset first byte threshold, the command is determined to belong to the short length range. If the data length of a command is greater than or equal to the preset first byte threshold and less than a preset second byte threshold, the command is determined to belong to the medium length range. If the data length of a command is greater than or equal to the preset second byte threshold and less than a preset third byte threshold, the command is determined to belong to the maximum length range. The preset first byte threshold is less than the preset second byte threshold, and the preset second byte threshold is less than the preset third byte threshold. The baseline weight value of the short length range is greater than the baseline weight value of the medium length range, and the baseline weight value of the medium length range is greater than the baseline weight value of the maximum length range.
[0024] Specifically, in this embodiment, the token replenishment period is set to 1 microsecond, and the upper limit of the token bucket capacity corresponds to the total number of tokens converted from the maximum effective bandwidth within a unit cycle of the PCIe 4.0×4 link. Preferably, it also includes PCIe 5.0 / 6.0 / 7.0. The token bucket replenishes tokens at a constant rate with the token replenishment period as the interval, and replenishment stops when the number of tokens in the token bucket reaches the upper limit of the token bucket capacity, thereby realizing the rate limitation of the PCIe bus bandwidth.
[0025] Based on the data byte length of the NVMe read / write command, multiple consecutive and non-overlapping data length intervals are defined. In this embodiment, the data length intervals are specifically divided into three categories: short length interval, medium length interval, and maximum length interval, with corresponding preset first byte threshold, preset second byte threshold, and preset third byte threshold. In this embodiment, the preset first byte threshold is 4KB, the preset second byte threshold is 64KB, and the preset third byte threshold is 1024KB, satisfying that the preset first byte threshold is less than the preset second byte threshold, and the preset second byte threshold is less than the preset third byte threshold.
[0026] In this embodiment, the ratio of the baseline weight values for the short-length interval, medium-length interval, and maximum-length interval is set to 4:2:1; the baseline weight value for the short-length interval is set to 4, the baseline weight value for the medium-length interval is set to 2, and the baseline weight value for the maximum-length interval is set to 1. As a preferred embodiment, in this embodiment, the baseline weight value for the short-length interval is set to 40, the baseline weight value for the medium-length interval is set to 20, and the baseline weight value for the maximum-length interval is set to 10, which is determined according to the PCIe rate. The faster the PCIe rate, the larger the baseline weight value. The longer the data length of the command, the lower the baseline weight value of the corresponding data length interval, thereby avoiding short-length commands from occupying the scheduling channel for a long time from the scheduling quota level.
[0027] Before the scheduling logic starts, the current weight values of all data length intervals are uniformly initialized to their respective base weight values. At the same time, the data length interval with the largest upper limit value is determined as the maximum length interval. In this embodiment, the data length interval with the preset third byte threshold of 1024KB as the upper limit is the maximum length interval. This data length interval will be used as the trigger judgment node for subsequent scheduling cycle reset.
[0028] S2. Within the current scheduling period, select a candidate command from the queue of commands to be executed, and determine the data length range to which the candidate command belongs based on the data length of the candidate command. When the current weight value of the data length range to which the candidate command belongs is greater than 0, and the number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, execute the candidate command. After execution, deduct the number of tokens required to execute the candidate command from the token bucket, and decrement the current weight value of the data length range to which the candidate command belongs by 1.
[0029] In this embodiment, when the current weight value of the data length interval to which the candidate command belongs is not greater than 0, or the number of remaining tokens in the token bucket is less than the number of tokens required to execute the candidate command, the execution of the candidate command is skipped, and the next candidate command is selected from the queue of commands to be executed for re-evaluation. If the current weight value of all data length intervals is 0, and no command has been scheduled for execution within the preset scheduling time, the current weight values of all data length intervals are directly reset to the corresponding baseline weight values, the current scheduling cycle ends, and the next scheduling cycle begins. When selecting candidate commands from the queue of commands to be executed, they are selected sequentially in the order in which they entered the queue; during the traversal of the same queue of commands to be executed, candidate commands that have already been skipped are not re-evaluated.
[0030] Specifically, candidate commands are selected from the queue of commands to be executed. This queue corresponds to the submission queue defined by the NVMe protocol and is used to store NVMe read and write commands issued by the host. Candidate commands are selected sequentially in the order they entered the queue of commands to be executed. The hardware scheduling circuit reads the data length field of the candidate command to determine the data length range to which the command belongs.
[0031] In this embodiment, an NVMe read / write command with a data length of 16KB is greater than the preset first byte threshold of 4KB and less than the preset second byte threshold of 64KB, and the command is determined to belong to the medium length range.
[0032] In this embodiment, 1 token is consumed for every 4KB of data transmission; for example, a 4KB short command consumes 1 token, a 64KB medium command consumes 16 tokens, and a 1024KB maximum command consumes 256 tokens.
[0033] The scheduling circuit will issue and execute the candidate command if both of the following conditions are met: First, the current weight value of the data length range to which the candidate command belongs is greater than 0; second, the current number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command.
[0034] After a command is executed, the number of tokens corresponding to the data length of the command is deducted from the token bucket, and the current weight value of the data length range to which the candidate command belongs is decremented by 1. For example, if the current weight value of the short length range is 4, after successfully executing a 4KB read / write command, the current weight value of the short length range is updated to 3, and 1 token is deducted from the token bucket.
[0035] If either of the above two conditions is not met, i.e., the current weight value of the data length interval to which the candidate command belongs is not greater than 0, or the current number of remaining tokens in the token bucket is lower than the number of tokens required to execute the candidate command, the execution of the candidate command is skipped, the next candidate command is selected from the queue of commands to be executed, and the judgment is repeated.
[0036] During a single traversal of the same queue of commands to be executed, candidate commands that have already been skipped will not be subject to repeated condition checks, thus avoiding the repeated verification of the same command in a single traversal and the consumption of hardware scheduling resources. When the hardware scheduling pointer reaches the end of the queue of commands to be executed, the current queue traversal is completed; if there are still commands to be executed in the queue, the next round of queue traversal begins.
[0037] If the current weight value of all data length intervals drops to 0, and no command is successfully scheduled and executed within the preset scheduling time, it is determined that the weight quota of the current scheduling cycle has been exhausted. The current weight value of all data length intervals is then reset to the corresponding base weight value, the current scheduling cycle ends, and the next scheduling cycle begins.
[0038] In this embodiment, the preset scheduling duration is set to 10 microseconds. This parameter is stored in a configurable hardware register inside the NVMe controller and can be adjusted by the host through NVMe administrator commands.
[0039] S3. If the data length range of the currently executed candidate command is the maximum length range, then reset the current weight value of all data length ranges to the corresponding baseline weight value and enter the next scheduling cycle; otherwise, continue command scheduling within the current scheduling cycle based on the current weight value.
[0040] In this embodiment, when a command enters the queue of commands to be executed, the cumulative waiting time is recorded. When polling to select candidate commands, if the current candidate command belongs to the maximum length interval and the cumulative waiting time exceeds a preset timeout threshold, the current candidate command is marked as a timeout candidate command. For timeout candidate commands, the current weight value of the maximum length interval is increased by a preset step size. The increased current weight value of the maximum length interval does not exceed twice the corresponding baseline weight value. After all timeout candidate commands have been scheduled and executed, the current weight values of all data length intervals are reset to the corresponding baseline weight values, and the next scheduling cycle begins. If the tokens required to execute a timeout candidate command are greater than the remaining tokens in the current token bucket, and the cumulative waiting time exceeds a preset second timeout threshold, the current weight value of the maximum length interval is reset to the corresponding baseline weight value.
[0041] Specifically, after a single candidate command is executed, the hardware determination circuit first verifies the data length range to which the command belongs: If the data length range of the currently executed candidate command is the maximum length range, a global weight reset operation is triggered, which resets the current weight values of all data length ranges to the corresponding baseline weight values, and ends the current scheduling cycle, entering the next scheduling cycle.
[0042] In this embodiment, an NVMe read / write command with a data length of 512KB belongs to the maximum length range. After the command is executed, the current weight values of the short length range, medium length range, and maximum length range are reset to 4, 2, and 1, respectively, and the scheduling cycle completes one full rotation. If the data length range of the currently executed candidate command belongs to the short or medium length range, a global reset is not triggered. Based on the reduced current weight value, the scheduling of subsequent commands within the current scheduling cycle continues. For example, if an NVMe read / write command with a data length of 16KB belongs to the medium length range, after execution, the current weight value of the medium length range decreases from 2 to 1, and the scheduling circuit continues to poll and select subsequent candidate commands according to the original rules.
[0043] The host can dynamically modify the core scheduling parameters via NVMe administrator commands. Modifiable parameters include the baseline weight value for each data length range, the token replenishment period, the token bucket capacity limit, and preset first-byte threshold, second-byte threshold, and third-byte threshold. All parameters are stored in a configurable hardware register set within the NVMe controller. During parameter modification, the current scheduling cycle continues to use the old parameters before modification. At the end of the current scheduling cycle and the start of the next cycle, the updated parameters are loaded and take effect, preventing logical anomalies caused by sudden parameter changes during scheduling.
[0044] In this embodiment, if the host adjusts the preset third byte threshold from 1024KB to 2048KB, 1024KB will still be used as the upper limit for determining the maximum length range in the current scheduling cycle. After the next scheduling cycle starts, the new threshold of 2048KB will be used to determine the range.
[0045] To further suppress tail delay jitter in extreme scenarios, this embodiment configures a long command timeout priority compensation mechanism, which is implemented as follows: From the moment each command enters the queue of commands to be executed, a hardware timer records the enqueue timestamp of the command and calculates the cumulative waiting time. During the polling process to select candidate commands, if the current candidate command belongs to the maximum length interval and its cumulative waiting time exceeds the preset timeout threshold, the candidate command is marked as a timeout candidate command. When the command is marked as a timeout candidate command for the first time, the weight value is increased by a preset step size based on the current weight value of the maximum length interval. The current weight value of the maximum length interval after the increase shall not exceed twice the baseline weight value corresponding to the maximum length interval. The same command triggers only one weight increase operation.
[0046] In this embodiment, the preset timeout threshold is set to 50 microseconds, the preset step size is set to 1, and the maximum length interval baseline weight value is 1. A command with a maximum length interval of 768KB is judged to have timed out after waiting for a total of 56 microseconds. The current weight value of its maximum length interval is increased from 1 to 2, and the increase stops after reaching twice the upper limit of the baseline weight value.
[0047] When there are marked timeout candidate commands within the scheduling cycle, commands with the maximum length range in a single execution will not trigger a global weight reset. After all the marked timeout candidate commands have been scheduled and executed, the current weight values of all data length ranges will be reset to the corresponding baseline weight values, and the next scheduling cycle will begin, ensuring that all timeout commands can obtain high-priority scheduling quotas.
[0048] If the tokens required to execute a timeout candidate command exceed the remaining tokens in the current token bucket, and its cumulative waiting time exceeds the preset second timeout threshold, the current weight value of the maximum length range will be forcibly reset to the corresponding baseline weight value. The weight increase operation will be revoked to prevent commands in the maximum length range from occupying the increased scheduling weight quota for an extended period, causing short and medium length range commands to continuously fail to obtain scheduling execution opportunities, leading to starvation of short IO services. When the tokens replenished in the token bucket exceed the tokens required to execute the timeout candidate command, if the command is still in the queue of pending commands, the weight increase operation will be triggered again.
[0049] In this embodiment, the preset second timeout threshold is set to 200 microseconds. If the tokens required to execute a timeout candidate command belonging to the maximum length range are greater than the remaining tokens in the current token bucket, and the cumulative waiting time reaches 210 microseconds, the current weight value of the maximum length range is reset from the temporary boost value 2 to the corresponding base weight value 1. The internal hardware scheduling circuit of the NVMe controller switches to the basic weighted round-robin scheduling logic, giving priority to scheduling short-length and medium-length range commands with sufficient token resources to ensure overall IO throughput performance.
[0050] like Figure 2 As shown, another embodiment of the present invention provides a low-tail-latency jitter SSD hardware scheduling system, comprising: The initialization module is used to configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the replenishment cycle based on the capacity limit. It divides the data length of the command into multiple consecutive data length intervals and determines the maximum length interval. It presets a baseline weight value for each data length interval and initializes the current weight value of all data length intervals to the corresponding baseline weight value. The command determination module is used to select candidate commands from the queue of commands to be executed within the current scheduling period, and determine the data length range to which the candidate command belongs based on the data length of the candidate command; when the current weight value of the data length range to which the candidate command belongs is greater than 0, and the current number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, the candidate command is executed; after execution, the number of tokens required to execute the candidate command is deducted from the token bucket, and the current weight value of the data length range to which the candidate command belongs is decremented by 1; The reset decision module is used to reset the current weight value of all data length intervals to the corresponding baseline weight value if the data length interval to which the currently executed candidate command belongs is the maximum length interval, and then enter the next scheduling cycle; otherwise, it continues the command scheduling in the current scheduling cycle based on the current weight value.
[0051] In this embodiment, it further includes: an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the low tail latency jitter SSD hardware scheduling method.
[0052] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the low tail latency jitter SSD hardware scheduling method.
[0053] In summary, this invention first divides the command data into multiple data length intervals according to the command data length, and configures the baseline weight value differently. It combines the remaining tokens in the token bucket and the current weight value of the data length interval as dual conditions to determine the qualification for command execution, thereby achieving a balanced allocation of scheduling quotas for NVMe commands of different sizes. This alleviates the problem of command starvation in the maximum length interval caused by a large number of short-length commands continuously preempting scheduling resources, effectively reduces IO tail latency and latency jitter in mixed IO load scenarios, and is suitable for application scenarios with high requirements for storage latency stability, such as databases and real-time computing services.
[0054] Secondly, this invention establishes clear scheduling cycle flow rules, using the completion of the command execution within the maximum length interval as the trigger condition for global weight reset; simultaneously, it adds a fallback reset logic for weight exhaustion to ensure the stability of the closed-loop scheduling process and prevent long-term weight imbalance from undermining scheduling fairness. The entire scheduling logic is implemented based on the NVMe controller hardware circuitry, requiring no software arbitration and resulting in lower scheduling decision latency.
[0055] Next, the present invention adds a timeout compensation mechanism for the maximum length interval command, which dynamically increases the interval weight for timeout candidate commands whose waiting time exceeds the preset timeout threshold, and sets a weight upper limit constraint to prevent the priority from tilting indefinitely; at the same time, a second timeout threshold is set as a stop-loss condition, and the temporary weight gain is canceled when the bandwidth resources are exhausted, taking into account both the tail delay optimization of long commands and the basic throughput guarantee of short commands.
[0056] Finally, this invention supports the host to dynamically configure all core scheduling parameters through NVMe administrator commands. Modified parameters take effect in the next scheduling cycle, preventing logical disorder caused by sudden parameter changes during the scheduling process. It can flexibly adapt to varying mixed read and write business loads, and the solution has good scalability and engineering feasibility.
[0057] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any other combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product, which includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions according to this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another.
[0058] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. This storage medium can be a read-only memory, a disk, or an optical disk, etc.
[0059] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various variations or substitutions within the technical scope disclosed in this application, and these should all be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A low-tail-latency jitter SSD hardware scheduling method, characterized in that, include: S1. Configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the token replenishment cycle based on the capacity limit. Divide the data into multiple consecutive data length intervals according to the data length of the command, and determine the maximum length interval; preset a baseline weight value for each data length interval, and initialize the current weight value of all data length intervals to the corresponding baseline weight value; S2. Within the current scheduling period, select candidate commands from the queue of commands to be executed, and determine the data length range to which the candidate command belongs based on its data length. When the current weight value of the data length interval to which the candidate command belongs is greater than 0, and the current number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, the candidate command is executed; after execution, the number of tokens required to execute the candidate command is deducted from the token bucket, and the current weight value of the data length interval to which the candidate command belongs is reduced by 1; S3. If the data length range of the currently executed candidate command is the maximum length range, then reset the current weight value of all data length ranges to the corresponding baseline weight value and enter the next scheduling cycle; otherwise, continue command scheduling within the current scheduling cycle based on the current weight value.
2. The low tail latency jitter SSD hardware scheduling method according to claim 1, characterized in that, The data length range includes at least a short length range, a medium length range, and a maximum length range; if the data length of a command is less than a preset first byte threshold, the command is determined to belong to the short length range; if the data length of a command is greater than or equal to the preset first byte threshold and less than the preset second byte threshold, the command is determined to belong to the medium length range; if the data length of a command is greater than or equal to the preset second byte threshold and less than the preset third byte threshold, the command is determined to belong to the maximum length range. Among them, the preset first byte threshold is less than the preset second byte threshold, and the preset second byte threshold is less than the preset third byte threshold; the base weight value of the short length interval is greater than the base weight value of the medium length interval, and the base weight value of the medium length interval is greater than the base weight value of the maximum length interval.
3. The low tail latency jitter SSD hardware scheduling method according to claim 1, characterized in that, If the current weight value of the data length range to which the candidate command belongs is not greater than 0, or the current number of remaining tokens in the token bucket is lower than the number of tokens required to execute the candidate command, the execution of the candidate command is skipped, and the next candidate command is selected from the queue of commands to be executed and re-evaluated.
4. The low tail latency jitter SSD hardware scheduling method according to claim 1, characterized in that, If the current weight value of all data length intervals is 0, and no command has been scheduled or executed within the preset scheduling time, then the current weight value of all data length intervals will be reset to the corresponding baseline weight value, the current scheduling cycle will end, and the next scheduling cycle will begin.
5. The low tail latency jitter SSD hardware scheduling method according to claim 3, characterized in that, When selecting candidate commands from the queue of commands to be executed, the candidates are selected in turn in the order in which they entered the queue. During the traversal of the same queue of commands to be executed, candidate commands that have been skipped will not be evaluated again.
6. The low tail latency jitter SSD hardware scheduling method according to claim 1, characterized in that, The host can dynamically modify the baseline weight value, token replenishment period, capacity limit, and preset thresholds for the first, second, and third bytes for each data length range through NVMe administrator commands; once the modification is completed, it will take effect in the next scheduling cycle.
7. The low tail latency jitter SSD hardware scheduling method according to claim 5, characterized in that, When a command enters the queue of commands to be executed, the cumulative waiting time is recorded; When polling to select candidate commands, if the current candidate command belongs to the maximum length interval and the cumulative waiting time exceeds the preset timeout threshold, the current candidate command is marked as a timeout candidate command; for timeout candidate commands, the current weight value of the maximum length interval is increased by a preset step size; the increased current weight value of the maximum length interval does not exceed twice the corresponding baseline weight value; Once all timeout candidate commands have been scheduled and executed, the current weight values of all data length ranges are reset to the corresponding baseline weight values, and the next scheduling cycle begins. If the number of tokens required to execute a timeout candidate command is greater than the number of tokens remaining in the current token bucket, and the cumulative waiting time exceeds the preset second timeout threshold, then the current weight value of the maximum length interval will be reset to the corresponding baseline weight value.
8. A low-tail-latency jitter SSD hardware scheduling system, applied to the low-tail-latency jitter SSD hardware scheduling method according to any one of claims 1 to 7, characterized in that, include: The initialization module is used to configure the token replenishment cycle and capacity limit of the token bucket. The token bucket continuously replenishes tokens according to the token replenishment cycle based on the capacity limit. Divide the data into multiple consecutive data length intervals according to the data length of the command, and determine the maximum length interval; preset a baseline weight value for each data length interval, and initialize the current weight value of all data length intervals to the corresponding baseline weight value; The command determination module is used to select candidate commands from the queue of commands to be executed within the current scheduling period, and determine the data length range to which the candidate command belongs based on the data length of the candidate command. When the current weight value of the data length interval to which the candidate command belongs is greater than 0, and the current number of remaining tokens in the token bucket is not less than the number of tokens required to execute the candidate command, the candidate command is executed; after execution, the number of tokens required to execute the candidate command is deducted from the token bucket, and the current weight value of the data length interval to which the candidate command belongs is reduced by 1; The reset decision module is used to reset the current weight values of all data length intervals to the corresponding baseline weight values if the data length interval to which the currently executed candidate command belongs is the maximum length interval, and then enter the next scheduling cycle; otherwise, it continues the command scheduling in the current scheduling cycle based on the current weight values.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the low tail latency jitter SSD hardware scheduling method as described in any one of claims 1 to 7.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the low tail latency jitter SSD hardware scheduling method as described in any one of claims 1 to 7.
