Parallel cable processing method, apparatus and related device

Abstract

The application relates to the technical field of computers, and particularly provides a parallel cable processing method and device and related equipment, aiming to solve the problem that it is difficult to achieve both speed and accuracy when simulating long cables, cables with branches or coiled cables in a virtual environment. To this end, the parallel cable processing method comprises the following steps: acquiring a cable topology and a cable state, wherein the cable topology comprises cable nodes and constraint edges, and the cable state comprises the positions and postures of the cable nodes; constructing a block variable material system according to the plurality of constraint edges in the cable topology, wherein the block variable material system is used to represent the constraint relationship of the cable topology and is configured to generate the state increment of each cable node by parallel solving; performing parallel direct solving on the block variable material system to generate the position increment and the posture increment of each cable node; and calculating a closed-loop constraint residual based on the plurality of constraint edges in the cable topology to correct the position increment and the posture increment, and updating the cable state.

Description

Technical Field

[0001] This application relates to the field of computer technology, specifically providing a parallel cable processing method, apparatus, and related equipment. Background Technology

[0002] In robot simulation, cable assembly, flexible object manipulation, virtual training environments, and graphics simulation, slender flexible bodies such as cables, hoses, ropes, and wires often need to simultaneously represent tension, bending, torsion, contact, and bifurcation structures. Common solutions include constraint-by-constraint local projection methods based on Position Based Dynamics (PBD) / Extended Position Based Dynamics (XPBD), local iterative methods based on rod models, open-chain solution methods based on tridiagonal systems, and global solution methods based on general sparse linear systems or Karush-Kuhn-Tucker (KKT) conditions.

[0003] Traditional PBD or XPBD methods typically decompose cable material constraints into local stretch, bend, and torsion constraints, projecting them onto adjacent nodes or local node groups in each iteration. While these methods are simple in structure and easy to parallelize, in long-chain cables, local constraint corrections require multiple iterations to propagate along the entire cable. Therefore, when the number of cable segments increases, the material stiffness is high, or there are strong end forces or intermediate contact disturbances, traditional local iterative methods often require a large number of iterations to achieve low material residuals.

[0004] Existing direct solution schemes for rods / cables can establish block tridiagonal systems for open chains or acyclic tree structures and improve long-range stiffness propagation through direct solution. However, such schemes typically have the following limitations: First, for ultra-long single chains, the Thomas algorithm's forward elimination and backward substitution within a single acyclic cable sub-chain (strand) have serial dependencies, making it difficult to fully utilize GPU parallelism; second, for bifurcated or complex topologies, an additional acyclic cable sub-chain tree (strand-tree) scheduling mechanism needs to be designed; third, for topologies containing loops, directly adding closed-loop edges to the tree-based solution system will disrupt the tree Thomas algorithm or block tridiagonal structure of the tree topology; fourth, while using a general sparse KKT solution can express closed-loop constraints, it has high implementation costs, poor real-time performance, and significant data structure and scheduling overhead on the graphics processing unit (GPU).

[0005] Furthermore, in cable simulations involving collisions and contacts, material and contact solutions are usually not isolated problems; if material constraints and contact constraints are completely separated, local disturbances near the contact point are difficult to propagate quickly to distant ends or branches; if a complete global solution is performed in each iteration step, the computational cost is high.

[0006] It is evident that the existing technology has the following main problems: First, the error propagation speed of local PBD / XPBD iteration is relatively slow in long-chain cables. Since each iteration mainly corrects the constraint error between local adjacent nodes, the effects of long-distance stiffness and end-to-end constraints need to go through multiple iterations to propagate; the longer the cable, the slower the convergence speed, especially in high stiffness, small compliance, or large time step scenarios.

[0007] Second, the conventional open-chain Thomas solution is difficult to directly handle branched cables. The open-chain tridiagonal solution usually assumes that the cable is a single continuous chain, while the actual cable may contain Y-shaped branches, multi-branch structures, or tree structures. If it is forcibly split into multiple independent chain segments, it will weaken the material coupling between branches. If the whole is constructed as a general sparse system, it will increase the solution cost and the complexity of GPU implementation.

[0008] Third, direct Thomas solving of very long single strands suffers from insufficient GPU parallelism. Although Thomas solving is superior in terms of linear complexity, its forward elimination and backward substitution have obvious serial dependencies. When there are only a few very long strands in the scene, relying solely on strand-level parallelism is insufficient to fully utilize GPU resources.

[0009] Fourth, while node-by-node PCR / PSR or general parallel tridiagonal solving can improve parallelism, in 6DoF cable material systems, each node involves a large block matrix and intermediate variables. If reduction is performed directly on a node-by-node basis, it can easily lead to high register usage, shared memory pressure, and register overflow into local memory (Local Memory Spill), thereby reducing occupancy and actual execution efficiency.

[0010] Fifth, loop-containing cable topologies can disrupt the direct solution structure of tree structures. If all edges are added to the treepair system, closed-loop edges will form loops, rendering the reduction and expansion (strand-tree condensation / expansion) structure of the Tree Thomas or sub-chain tree structures ineffective. If closed-loop edges are directly deleted, cable loops cannot remain closed, leading to an increase in the closure residual. If a global KKT system is constructed for all variables, the computational and storage overhead is significant.

[0011] Sixth, there is a lack of a stable and efficient interleaving mechanism between direct material solutions and contact solutions. Contact constraints usually occur locally, but their physical effects should propagate to the far end and branches of the cable through cable material coupling. Existing solutions that rely solely on local contact and local material projection have insufficient propagation capabilities; and frequent global solutions are costly.

[0012] Accordingly, there is a need in the field for a new direct material solution scheme suitable for parallel execution on GPUs to address the above problems. Summary of the Invention

[0013] In order to overcome the above-mentioned deficiencies, this application is made to solve or at least partially solve the following technical problem: how to achieve both speed and accuracy when simulating long cables, forked cables or looped cables in a virtual environment.

[0014] In a first aspect, this application provides a parallel cable processing method, comprising: acquiring a cable topology and a cable state, wherein the cable topology includes multiple cable nodes and multiple constraint edges, and the cable state includes the positions and orientations of the multiple cable nodes; constructing a block variable material system based on the multiple constraint edges in the cable topology, wherein the block variable material system is used to characterize the constraint relationships of the cable topology and is configured to generate state increments for each cable node through parallel solving; performing parallel direct solving on the block variable material system to generate position increments and orientation increments for each cable node; calculating closed-loop constraint residuals based on the multiple constraint edges in the cable topology to correct the position increments and the orientation increments, and updating the cable state.

[0015] In some exemplary embodiments of this application, based on the foregoing scheme, after updating the cable state, the method further includes: generating a control command based on the updated cable state; sending the control command to a physical actuator to drive the physical actuator to perform an operation on the physical cable; or mapping the updated cable state to a target object in a virtual scene to control the target object to present a deformation posture in the display interface that matches the cable state.

[0016] In some exemplary embodiments of this application, based on the foregoing scheme, the multiple constraint edges include: generating forest edges; constructing a block variable material system based on the multiple constraint edges in the cable topology, including: resolving the cable topology into multiple acyclic cable sub-chains based on the generated forest edges; and constructing a block variable material system based on the multiple acyclic cable sub-chains.

[0017] In some exemplary embodiments of this application, based on the aforementioned scheme, the multiple constraint edges further include closed-loop edges. Calculating closed-loop constraint residuals based on the multiple constraint edges in the cable topology to correct the position increment and the attitude increment includes: obtaining the current position and current attitude of the cable nodes connected at both ends of the closed-loop edge; calculating the relative position deviation and relative attitude deviation between the cable nodes connected at both ends of the closed-loop edge; calculating the closed-loop constraint residuals based on the relative position deviations and the relative attitude deviations; and superimposing the closed-loop constraint residuals as a correction term onto the right-hand term vector of the block variable material system to correct the position increment and the attitude increment.

[0018] In some exemplary embodiments of this application, based on the foregoing scheme, the cable state further includes the linear velocity and angular velocity of each cable node. Updating the cable state includes: calculating the linear velocity increment and angular velocity increment of each cable node based on the position increment and the attitude increment; and updating the position and attitude of each cable node based on the linear velocity increment, the angular velocity increment, the corrected position increment, and the attitude increment.

[0019] In some exemplary embodiments of this application, based on the foregoing scheme, parallel direct solution is performed on the block variable material system to generate the position increment and attitude increment of each cable node, including: mapping the block variable material system into multiple sub-matrix blocks, wherein each sub-matrix block corresponds to an acyclic cable sub-chain; and performing matrix decomposition operation on the multiple sub-matrix blocks through a multi-threaded parallel computing architecture to generate the position increment and attitude increment of each cable node.

[0020] In some exemplary embodiments of this application, based on the aforementioned scheme, a multi-threaded parallel computing architecture is used to perform matrix decomposition operations on multiple sub-matrix blocks to generate position and attitude increments for each cable node. This includes: when the number of cable nodes in the acyclic cable sub-chain exceeds a preset threshold, dividing the acyclic cable sub-chain into multiple continuous sub-chain blocks, wherein each sub-chain block contains continuous cable nodes; performing parallel local elimination processing on the multiple sub-chain blocks to determine the variables and equivalent constraint relationships of adjacent boundary cable nodes of the multiple sub-chain blocks; calculating the position and attitude increments of the adjacent boundary cable nodes based on the variables and equivalent constraint relationships of the adjacent boundary cable nodes of the multiple sub-chain blocks; and calculating the position and attitude increments of the cable nodes in the multiple sub-chain blocks in parallel based on the position and attitude increments of the adjacent boundary cable nodes.

[0021] In some exemplary embodiments of this application, based on the foregoing scheme, before resolving the cable topology into multiple acyclic cable sub-chains based on the generated forest edges, the method further includes: dividing the multiple constraint edges into generated forest edges and closed-loop edges.

[0022] In a second aspect, a parallel cable processing apparatus is provided, comprising: a cable information acquisition module for acquiring cable topology and cable state, wherein the cable topology includes multiple cable nodes and multiple constraint edges, and the cable state includes the positions and orientations of the multiple cable nodes; a block variable material system construction module for constructing a block variable material system based on the multiple constraint edges in the cable topology, wherein the block variable material system is used to characterize the constraint relationships of the cable topology and is configured to generate state increments for each cable node through parallel solving; a cable state increment generation module for performing parallel direct solving on the block variable material system to generate position increments and orientation increments for each cable node; and a cable state update module for calculating closed-loop constraint residuals based on the multiple constraint edges in the cable topology to correct the position increments and the orientation increments and update the cable state.

[0023] In a third aspect, an electronic device is provided, comprising at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program that, when executed by the at least one processor, implements the method described in any of the above-described parallel cable processing methods.

[0024] In a fourth aspect, a computer-readable storage medium is provided, wherein a plurality of program codes are stored therein, the program codes being adapted to be loaded and run by a processor to perform the method described in any of the above-described parallel cable processing methods.

[0025] The above-described technical solutions of this application have at least one or more of the following beneficial effects: In implementing the parallel cable processing method, apparatus, and related equipment provided in this application, by acquiring the cable topology containing multiple cable nodes and constraint edges, as well as the position and attitude states of each node, complete and accurate initial input data is provided for subsequent construction of physical constraint models and state updates, realizing accurate mapping and digitization of the cable physical model and the current motion state. Furthermore, by constructing a block variable material system based on constraint edges to characterize constraint relationships and configured to support parallel solution, the complex cable topology physical constraints are transformed into mathematical data structures that are easy for the underlying computer to process, realizing a structured expression of physical constraint conditions. In addition, by performing parallel direct solution on the block variable material system, the mechanical and kinematic equations of each node are processed simultaneously using a multi-threaded or parallel computing architecture, achieving efficient and accurate generation of position and attitude increments of each cable node, significantly improving the solution efficiency and real-time performance of complex cable systems. Moreover, by calculating the closed-loop constraint residual based on constraint edges and using the residual to correct the generated position and attitude increments, the physical constraint violation phenomenon caused by topological structure closure or numerical calculation truncation is effectively eliminated, achieving high-fidelity and high-stability update of cable states. Attached Figure Description

[0026] The disclosure of this application will become more readily understood with reference to the accompanying drawings. It will be readily understood by those skilled in the art that these drawings are for illustrative purposes only and are not intended to limit the scope of protection of this application. Wherein: Figure 1 This is a schematic diagram of the parallel cable processing method in the embodiments of this application; Figure 2 This is a schematic diagram of the topology transformation process of Strand-Tree decomposition in the embodiments of this application; Figure 3 This is a schematic diagram of the reduction and expansion process of the tree-based Thomas algorithm in the embodiments of this application; Figure 4 This is a schematic diagram of the Tile PSR solution process for ultra-long Strands in the embodiments of this application; Figure 5 This is a schematic diagram of the process of generating forests and dividing loop pairs in the embodiments of this application; Figure 6 This is a schematic diagram of the parallel cable processing method in the embodiments of this application; Figure 7 This is a schematic diagram of the cyclic injection process in an embodiment of this application; Figure 8 This is a schematic diagram of the PBD / contact scheduling algorithm in the embodiments of this application; Figure 9 This is a schematic diagram of the overall process of the parallel cable processing scheme in the embodiments of this application; Figure 10 This is a schematic diagram of a long-chain convergence experiment; Figure 11 This is a schematic diagram of a bifurcation propagation experiment. Detailed Implementation

[0027] Some embodiments of this application are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of this application and are not intended to limit the scope of protection of this application.

[0028] In the description of this application, "module" and "processor" can include hardware, software, or a combination of both. A module can include hardware circuitry, various suitable sensors, communication ports, memory, and may also include software components, such as program code, or a combination of software and hardware. A processor can be a central processing unit, microprocessor, image processor, digital signal processor, or any other suitable processor. The processor has data and / or signal processing capabilities. The processor can be implemented in software, in hardware, or a combination of both. Computer-readable storage media includes any suitable medium capable of storing program code, such as magnetic disks, hard disks, optical disks, flash memory, read-only memory, random access memory, etc. The term "A and / or B" means all possible combinations of A and B, such as only A, only B, or A and B. The terms "at least one A or B" or "at least one of A and B" have a similar meaning to "A and / or B" and can include only A, only B, or A and B. The singular terms "a" or "this" can also include plural forms.

[0029] Here we will first explain some of the terms used in this application.

[0030] Position Based Dynamics (PBD): A method for physical simulation using position-constrained projection.

[0031] Extended Position Based Dynamics (XPBD): Improves the coupling relationship between stiffness and time step and number of iterations in PBD by using parameters such as stiffness (compliance).

[0032] Graphics Processing Unit (GPU): Used for parallel execution of cable material solving, constraint assembly, reduction, unrolling, and state updates.

[0033] A loopless cable sub-strand: A continuous path in a cable topology, consisting of a set of continuous cable nodes or cable segments.

[0034] Strand-Tree: A tree-like structure composed of multiple strands, with parent strands and child strands connected by attach nodes, used to support direct material solutions for branching cables.

[0035] 6-DOF (Degree of Freedom) block variables: Six positive variables corresponding to each cable node, including three-dimensional position increments and three-dimensional attitude / rotation increments.

[0036] Cosserat constraint: Used to describe the tensile, bending, and torsional material constraints of slender cables.

[0037] Block Thomas Solver: A direct solution method for block tridiagonal matrices, including forward elimination / condensation and backward substitution / expansion.

[0038] The Tree Thomas algorithm for tree topology is a direct solution method that extends Block Thomas to tree or Strand-Tree structures, where the contributions of child Strands can be aggregated to the connection nodes of the parent Strand.

[0039] Progressive / Staged Neighbor Reduction (PSR): In this application, it refers to a GPU parallel solution method that divides a very long strand into continuous modules (tiles), exposes the boundary equivalence after local elimination of each tile, and then performs progressive reduction and reverse expansion according to adjacent tiles.

[0040] Modular Progressive Proximity Reduction (Tile PSR): Tile-level PSR uses continuous cable blocks / tiles as the basic parallel unit, rather than a single node as the basic reduction unit. Its goal is to balance register usage, shared memory usage, and GPU parallel efficiency while maintaining long-range material coupling.

[0041] Generate a forest: Select a set of acyclic edges from the cable topology graph that forms one or more tree subgraphs to maintain the structure for direct solution of Tree Thomas or Tile PSR.

[0042] Union-Find: Used to determine whether cable topology edges will form loops, and to divide edges into forest edges and closed loop edges.

[0043] A loop pair is a cable constraint edge that forms a loop after being added to a forest.

[0044] Loop Pair Buffer: Used to store information such as the endpoints of the loop pair, material parameters, static relative pose, residuals, and compliance.

[0045] Right-hand side (RHS) of linear system: In this application, it can be used to inject closed-loop edge constraint residuals.

[0046] Karush-Kuhn-Tucker (KKT) conditions: used to denote a constraint solution system containing constraint multipliers.

[0047] Schur complement: A method for obtaining a smaller equivalent system after eliminating some variables, which can be used in this application to solve closed-loop edge-constrained multipliers.

[0048] Block Gauss-Seidel (Block GS) iteration: can be used to solve contact or collision constraints.

[0049] Alternating Direction Method of Multipliers (ADMM): This method can be used as an implementation for solving contact or constraint problems.

[0050] In some embodiments, the embodiments of this application are applicable to scenarios such as large-scale robot simulation, flexible cable handling, robot cable handling, wire harness assembly, virtual training, visual simulation, hose handling, game / animation physics, industrial simulation and digital twins, etc., and can be used in scenarios such as robot grasping cables, cable assembly, hose handling, wire harness simulation, embodied intelligent data generation and graphics simulation, etc., and can provide a unified GPU solution framework under long chain, branch, ultra-long chain and ring topology.

[0051] See appendix Figure 1 , Figure 1 This is a schematic flowchart illustrating the main steps of a parallel cable processing method according to an embodiment of this application. Figure 1 As shown, the parallel cable processing method in this application embodiment mainly includes the following steps S102 to S108.

[0052] S102, obtain the cable topology and cable status. The cable topology includes multiple cable nodes and multiple constraint edges. The cable status includes the position and orientation of multiple cable nodes.

[0053] In some embodiments, the cable topology in this application is indirectly obtained through sensors, vision systems, or preset models. Cable topology is a logical structure describing how the various parts of a cable are interconnected; it's like the "skeleton" of the cable. It doesn't care about the current shape of the cable; it only cares about "which is next to which." For example, it records that section 1 connects to section 2, and section 2 connects to section 3. In industrial design or robot assembly, the cable topology is usually determined during the product design phase. For example, in automotive wiring harness design, engineers use CAD software to predefine the routing, connection points, and fixing positions of each cable. These data can be directly imported into the simulation system as "topology" input, or in complex or unknown environments (such as disaster relief robots), computer vision or deep learning algorithms can be used to automatically identify the branches, connection points, and entanglement states of cables from 2D / 3D images, thereby reconstructing the topology. In this embodiment, the cable nodes are the basic physical units constituting the discrete cable model, typically containing physical attributes such as mass, position, and orientation. Since a computer cannot simulate an infinitely continuous rope, it is cut into many small segments; these cutting points are the "nodes." In this embodiment, the constraint edges define the physical constraint relationships between adjacent nodes. The mathematical model of the system (such as tensile stiffness, bending stiffness, torsional stiffness, etc.) is equivalent to an "invisible spring" or "strong glue" connecting two nodes. It stipulates that the two nodes cannot be too far apart (anti-tension), cannot be bent too severely (anti-bending), and cannot be twisted together (anti-torsion). The cable state in the embodiments of this application describes the set of kinematic and dynamic parameters of the cable system at a specific moment, which is equivalent to the "current posture" of the cable at that instant. In the laboratory or high-precision simulation, an optical motion capture system with multiple cameras and reflective markers is often used to track the three-dimensional coordinates and orientation of key points on the cable in real time. Alternatively, in large structures (such as... In bridges and spacecraft, FBG sensors can be embedded inside cables to infer the strain and deformation of the cable by measuring changes in the wavelength of the light signal, thereby calculating the position and orientation of the nodes. In the embodiments of this application, the position and orientation of the cable nodes refer to the coordinates of the nodes in the three-dimensional Cartesian coordinate system and the parameters of the rotation state of the nodes in the three-dimensional space. For example, in automobile manufacturing, robots need to grasp and insert complex wire harness plugs. The system first obtains the topology of the wire harness from the CAD model (which wires are connected to which plugs), then scans the current bending shape (state) of the wire harness in real time with a 3D camera, and then completes the precise insertion by combining force control sensors.

[0054] More specifically, embodiments of this application also obtain the material parameters, static length, static relative posture, and branch connection relationship of the cable.

[0055] S104. Based on multiple constraint edges in the cable topology, a block variable material system is constructed. The block variable material system is used to characterize the constraint relationships of the cable topology and is configured to generate the state increments of each cable node through parallel solving.

[0056] In some embodiments, the block variable material system in this application is a structured sparse matrix system (usually a block tridiagonal matrix) assembled from block variables. In numerical computation, the block variable is the state of each node (containing 3 position coordinates and 3 attitude parameters) packaged into a 6-dimensional vector (i.e., a "block"). The material system refers to a global linear equation system (usually a stiffness matrix) assembled from material properties (such as stiffness and mass) and topology. The parallel solution in this application uses multi-threaded or multi-core processors to decompose the large matrix into multiple independent sub-matrices and perform mathematical operations simultaneously. The state increment in this application refers to the change in the physical states such as node position, attitude, and velocity within a small time step.

[0057] S106 performs parallel direct solution on the block variable material system to generate the position and attitude increments of each cable node.

[0058] In some embodiments, this application utilizes the multi-threading of the GPU to break down a large task into multiple independent small tasks for simultaneous processing. Through matrix decomposition (such as Cholesky decomposition, Thomas algorithm, etc.), the solution to the system of equations is directly obtained through a finite number of precise calculations, rather than repeatedly guessing and approximating as in traditional methods. In this application embodiment, the position increment is the change in the coordinates of the node in three-dimensional space within a tiny time step; the attitude increment is the change in the rotation state of the node within a tiny time step.

[0059] S108 calculates the closed-loop constraint residual based on multiple constraint edges in the cable topology to correct the position increment and attitude increment, and updates the cable state.

[0060] In some embodiments, the closed-loop constraint residual in this application refers to the difference between the actually calculated state and the state required by the physical closed-loop rule. Imagine a cable connected end to end to form a loop (closed loop). Ideally, the two ends should fit together perfectly. However, when the cable is cut and multiple computing cores are used to perform parallel calculations, after the calculations are completed and put back together, it may be found that the two ends are not only not aligned, but are actually separated by 0.01 meters, or the angle of twist is different by 5 degrees. This "misaligned distance" and "mismatched angle" are the closed-loop constraint residual.

[0061] In some embodiments, if the method in this application is run on software (e.g., industrial simulation software, 3D design tools, high-definition games) on a PC, workstation, or cloud server, the software can cut the long line into many segments (tiles) due to the use of parallel solving and block variable material systems. Utilizing a graphics card (GPU) or multi-core CPU for simultaneous calculation, it can provide users with extremely smooth performance. If the method in this application is applied to a physical object (e.g., a robotic arm), because this application calculates the cable's state (position, orientation) in real time in virtual space, and the algorithm is fast enough (parallel processing) and accurate enough (residual correction), it can predict in advance whether the cable will entangle nearby machines or be pulled apart, protecting the physical equipment from damage. This means safer automated operation and more precise remote control.

[0062] In some embodiments, this application achieves accurate mapping and digital representation of the cable physical model and the current motion state by acquiring the cable topology containing multiple cable nodes and constraint edges, as well as the position and attitude states of each node; by constructing a block variable material system based on the constraint edges to represent the constraint relationships and configured to support parallel solution, a structured expression of the physical constraints of complex cable topology is realized, and the physical model is transformed into a mathematical data structure that is easy for the underlying computer to process; by performing parallel direct solution on the block variable material system, the mechanical and kinematic equations of each node are processed simultaneously using a multi-threaded or parallel computing architecture, achieving efficient and accurate generation of position and attitude increments of each cable node, greatly improving the solution efficiency and real-time performance of complex cable systems; by calculating the closed-loop constraint residual based on the constraint edges and using the residual to correct the generated position and attitude increments, high-fidelity and high-stability updates of the cable state are achieved, effectively eliminating the physical constraint violation phenomenon caused by the closed loop of the topology or the truncation of parallel numerical calculation.

[0063] In some embodiments, the multiple constraint edges in this application include: generating forest edges; constructing a block variable material system based on the multiple constraint edges in the cable topology, including resolving the cable topology into multiple acyclic cable sub-chains based on the generated forest edges; and constructing a block variable material system based on the multiple acyclic cable sub-chains. Specifically, this application embodiment achieves decoupling and structured decomposition of complex cable topologies by resolving the cable topology into multiple acyclic cable sub-chains based on the generated forest edges and constructing a block variable material system based on the multiple acyclic cable sub-chains. This eliminates closed-loop dependencies in physical constraints, thereby providing an independent data foundation for parallel computing of the underlying hardware and significantly reducing the computational complexity of global matrix solving.

[0064] In some embodiments, the present application decomposes the acyclic cable subgraph formed by generating forest edges into multiple continuous Strand representations and records the parent-child Strand relationship, Attach Node and Strand Level, and the order of nodes within the Strand.

[0065] In addition, in the embodiments of this application, the selection of the main path in the Strand-Tree can be based on the longest subtree priority, node number priority, material stiffness priority, cable length priority, branch weight priority, or preset topology rules. As long as the generated forest can be decomposed into multiple continuous Strands and the parent-child Strand relationship and Attach Node are recorded, they are all alternative solutions.

[0066] In some embodiments, such as Figure 2 As shown in the embodiments of this application, the three typical topology transformation processes of Strand-Tree decomposition include the following steps: linear topology decomposition, Y-branch cable decomposition, and multi-branch cable decomposition. Linear topology decomposition directly maps a linear, branchless cable topology to a single hierarchical structure, forming a complete root Strand, where the entire cable is treated as an independent computational unit. Y-branch cable decomposition identifies the branch point as a "connection node" for Y-shaped cable topologies with a single branching point, splitting the structure into parent-child relationships. The trunk is defined as the root Strand, and the two branches are defined as child Strand A and child Strand B, respectively. Multi-branch cable decomposition introduces the concept of hierarchy (level 0, level 1, level 2) for tree-like cable topologies with multiple levels and complex branches, decomposing them level by level to establish a strict tree-like hierarchical structure (level 0: the topmost trunk is the root Strand; level 1: branches below the root are child Strand A (level 1); level 2: branches at the very end are child Strands). B (Level 2); All branches are connected to their parent Strand via connecting nodes.

[0067] More specifically, the block variable material system in this embodiment constructs 6DoF block variables for cable nodes, including position and attitude increments. It assembles block matrices and right-hand side terms based on Stretcher, Bend, and Twist constraints. Furthermore, this embodiment couples Stretch, Bend, and Twist material constraints to one or a few global / semi-global solutions using 6DoF block variables and direct material solving, allowing errors to propagate along the entire strand. Long-chain convergence experiments show that, with the same number of solver steps, the L2 norm of the stretch residuals from the Direct Strand method is significantly lower than that of Local PBD Jacobi iteration and XPBD GS baseline, thus improving the convergence speed of long-chain cable material constraints.

[0068] In addition, in this embodiment, the 6DoF block variable of each cable node can be represented as position increment and rotation vector increment, or it can be represented by quaternion increment, exponential mapping, local frame increment, director frame increment, or other equivalent attitude representation; the material system in this embodiment can adopt micro-polar elastic rod (cosserat rod, a rod model built based on the Cosserat continuum mechanics theory, which can capture the slender flexible body Twist, Bend, and Twist with extreme accuracy), discrete elastic rod (a numerical model obtained by spatially discretizing the continuous Cosserat rod theory, which can retain the accurate torsional and bending physical properties of the Cosserat rod while transforming it into discrete constraint equations suitable for parallel computer solution), mass-spring rod (a flexible body modeling method), elastic beam model, position constraint model, or other slender body models that can express Stretch, Bend, and Twist); the direct material solution in this embodiment can be executed once per simulation step or once every N PBD iterations; a minimum computational share can be set. Quota, Interval Cadence, Adaptive Schedule, or dynamic scheduling based on the number of constraint residuals / contact constraints.

[0069] In some embodiments, the multiple constraint edges in this application also include closed-loop edges. The closed-loop constraint residual is calculated based on the multiple constraint edges in the cable topology to correct the position and attitude increments. This includes: obtaining the current position and current attitude of the cable nodes connected at both ends of the closed-loop edge; calculating the relative position deviation and relative attitude deviation between the cable nodes connected at both ends of the closed-loop edge; calculating the closed-loop constraint residual based on the relative position deviation and relative attitude deviation; and superimposing the closed-loop constraint residual as a correction term onto the right-hand term vector of the block variable material system to correct the position and attitude increments. Specifically, this application embodiment determines the closed-loop constraint residual by obtaining the current state of the nodes at both ends of the closed-loop edge and calculating their relative position and relative attitude deviations, and then superimposing this residual as a correction term onto the right-hand term vector of the block variable material system. This achieves accurate feedback and compensation for physical errors generated by parallel computing, effectively eliminating the phenomenon of closed-loop structure breakage or penetration caused by decoupled computing, thereby ensuring the physical continuity and simulation accuracy of the cable under complex topological constraints.

[0070] In some embodiments, the cable state in this application also includes the linear velocity and angular velocity of each cable node. Updating the cable state includes: calculating the linear velocity increment and angular velocity increment of each cable node based on the position increment and attitude increment; and updating the position and attitude of each cable node based on the linear velocity increment, angular velocity increment, corrected position increment, and attitude increment. Specifically, this application embodiment achieves a complete closed-loop evolution of the cable physical state by calculating the linear velocity increment and angular velocity increment of each cable node based on the position increment and attitude increment, and updating the node state in combination with the corrected position increment, attitude increment, and velocity increment. This ensures that the position, attitude, and velocity information of the simulation system at the next moment all satisfy the physical conservation laws, thereby guaranteeing the numerical stability and temporal continuity of the cable dynamic simulation process.

[0071] In some embodiments, the embodiments of this application calculate the closed-loop residual based on the closed-loop edges in the Loop Pair Buffer, and inject the closed-loop constraint into the direct material solution through RHS injection, KKT multipliers, or Schur complement system.

[0072] More specifically, embodiments of this application also control the execution frequency of direct material solution in the outer or inner loop of PBD / XPBD; and interleave direct material solution with contact constraint, block Gauss-Seidel iteration, graph coloring, or alternating direction method of multipliers (ADMM) contact solution stages.

[0073] In addition, the closed-loop edge buffer in this application embodiment can store endpoint indexes, initial pose transformation (RestTransform), material parameters, Jacobian, residuals, multipliers, compliance, damping, or subsets thereof. The buffer can be a CPU array, GPU array, structure array, service-oriented architecture (SoA) layout, or compressed sparse layout.

[0074] In some embodiments, this application implements control the execution frequency of direct material solution by scheduling and interleaving it with the Contact, Block GS, Graph Coloring, or ADMM contact stages. This allows contact perturbations to propagate to distant ends and branches through subsequent direct material solutions, while avoiding the need to perform an expensive full global solution in each iteration step. This facilitates integration with PBD / XPBD Contact processes.

[0075] In some embodiments, this application performs parallel direct solution on the block variable material system to generate the position and attitude increments of each cable node. This includes mapping the block variable material system into multiple sub-matrix blocks, where each sub-matrix block corresponds to an acyclic cable sub-chain. A multi-threaded parallel computing architecture is used to perform matrix decomposition operations on the multiple sub-matrix blocks to generate the position and attitude increments of each cable node. Specifically, this application achieves efficient parallel solution for the position and attitude increments of cable nodes by mapping the block variable material system into multiple sub-matrix blocks corresponding to acyclic cable sub-chains and utilizing a multi-threaded parallel computing architecture to perform matrix decomposition operations on each sub-matrix block. This fully utilizes the multi-core computing resources of the underlying hardware, avoids the slow convergence speed problem of traditional iterative methods, and thus significantly improves the computational efficiency and real-time performance of complex cable system simulation.

[0076] In some embodiments, this application implements Tree / Block ThomasCondensation / Expansion on a normal-length Strand.

[0077] In some embodiments, this application uses a multi-threaded parallel computing architecture to perform matrix decomposition operations on multiple sub-matrix blocks to generate position and attitude increments for each cable node. This includes: when the number of cable nodes in a loopless cable sub-chain exceeds a preset threshold, dividing the loopless cable sub-chain into multiple continuous sub-chain blocks, where each sub-chain block contains continuous cable nodes; performing parallel local elimination processing on the multiple sub-chain blocks to determine the variables and equivalent constraint relationships of adjacent boundary cable nodes in the multiple sub-chain blocks; calculating the position and attitude increments of adjacent boundary cable nodes based on the variables and equivalent constraint relationships of adjacent boundary cable nodes in the multiple sub-chain blocks; and calculating the position and attitude increments of cable nodes in the multiple sub-chain blocks in parallel based on the position and attitude increments of adjacent boundary cable nodes. Specifically, this application embodiment divides the ultra-long acyclic cable subchain into multiple continuous subchain blocks, performs local elimination processing in parallel to determine the equivalent constraint relationship of boundary variables, and then solves the boundary increment first and then restores the internal node increment in parallel. This achieves deep decoupling and multi-level parallel processing of the ultra-long cable calculation task, thereby effectively solving the problem of unbalanced computational load when solving ultra-long cables in single-thread or conventional parallel processing, and greatly improving the overall solution efficiency and real-time performance of complex cable systems.

[0078] In some embodiments, this application performs Tile-level proximity reduction, coarse-grained system solution, and inverse expansion on ultra-long Strands.

[0079] In some embodiments, for very long strands, if the Thoma forward elimination and backward replacement of a single strand are used directly, there is a strong serial dependency within the single strand, resulting in insufficient GPU parallelism. If node-by-node PCR / PSR is used, each thread needs to store a large number of 6DoF block matrices, intermediate Schur complements, and right-hand entries, which can easily cause excessive register pressure, LocalMemory Spill, and reduced Occupancy.

[0080] In some embodiments, Tile PS divides a very long strand into multiple consecutive tiles. Each tile undergoes local elimination and exposes boundary equivalences. The solution is then obtained through successive reduction and reverse expansion of adjacent tiles. Compared to a single Strand Thomas, this embodiment reduces serial dependencies within the very long chain. Compared to segment-by-segment PSR / PCR, this embodiment controls the size of intermediate variables for each thread or thread block through tile-based local elimination, which helps reduce register pressure and improve actual occupancy.

[0081] In some embodiments, such as Figure 3As shown, the implementation of this application's ultra-long Strand performing Tile-level proximity reduction, coarse-grained system solution, and reverse expansion specifically includes two main stages: leaf-to-root reduction and root-to-leaf expansion. The data flow in leaf-to-root reduction is bottom-up (from child node to parent node), involving multiple child Strands at the bottom layer (such as sub-Strands). Each of the child strands (1, 2, ..., n) possesses local degrees of freedom. Local calculations are performed on each child strand to form a contribution matrix and vector. This local information is passed up to the parent strand through the connection nodes. All local contributions eventually converge at the top root strand. At the root node, a global reduced system equation is constructed and solved to obtain the unknowns of the root node. The data flow from root to leaf is top-down (from parent node to child node). The root strand has already obtained the global solution. The root strand decomposes the calculation results and recovers the boundary conditions or increments at the connection nodes. This information is passed down to each child strand through the connection nodes. After receiving the information from the parent, each child strand combines it with its own local equations to recover the local degree of freedom increments. Finally, each child strand obtains the complete solution.

[0082] This application employs Tile-level PSR, where each Tile performs local direct elimination within a GPU thread block or warp group, exposing only the equivalent relationship between boundary variables at both ends of the Tile to the next level of reduction. This confines a large number of internal variables to local Tile computation, preventing each thread from holding too much cross-layer state. Simultaneously, proximity reduction of adjacent Tile can break the serial dependency of ultra-long Strands, improving the internal parallelism of the Strand. The Tile length, the number of nodes processed per thread, the number of Tile processed per thread block, the number of reduction levels, and the Coarse System size can be selected based on the GPU's register budget, shared memory budget, thread block size, number of warps, target occupancy, or estimated kernel (in the GPU programming model, a kernel is a function specifically executed on the GPU device that can be concurrently called by thousands of threads) execution time. Thus, this application achieves a balance between register usage and parallel efficiency.

[0083] In some embodiments, such as Figure 4As shown, the Tile PSR solution steps for ultra-long strands in this application embodiment include: Stage 1: Tile partitioning and local elimination; Stage 2: Constructing a hierarchical Super-Tile; Stage 3: Coarse mesh solution; Stage 4: Reverse expansion / back substitution; Stage 5: Interior point solution. In Stage 1, within each Tile, the boundary nodes at both ends (x0, x1...) are retained, and Gaussian elimination (local Schur complement) is performed on the interior nodes to generate a local equivalent stiffness matrix (such as S...). k1 In stage 2, adjacent tiles are combined into larger units called "Super-Tile". In stage 3, all Super-Tiles form a smaller "coarse grid system" at the top layer (or a specific intermediate layer) to directly solve this reduced global linear equation system. In stage 4, the solution is back-substituted layer by layer from the top layer down. Using the coarse grid solution obtained in stage 3 and the Schur complement information stored in stage 2, the solution of the boundary nodes of the lower-level Super-Tile is gradually recovered. Finally, in stage 5, the solution is back-substituted to the original tile at the bottom layer through the local back-substitution formula.

[0084] In some embodiments, this application uses Strand-Tree reduction and expansion, allowing the material response of a child Strand to be propagated to the parent Strand, and corrections in the parent Strand to be propagated back to the sibling branch. Bifurcation propagation experiments show that the Direct Strand method can produce more significant correction displacements at the trunk, source branch, sibling root, and sibling tip locations, indicating that local disturbances can propagate across branches. Therefore, this application's embodiments enhance the cross-branch propagation capability in forked cables.

[0085] In some embodiments, before resolving the cable topology into multiple acyclic cable subchains based on generated forest edges, the parallel cable processing method of this application further includes: dividing multiple constraint edges into generated forest edges and closed-loop edges. Specifically, by dividing multiple constraint edges into generated forest edges and closed-loop edges, this application achieves graph-theoretic decoupling and structural classification of complex cable topologies, providing a clear data foundation for subsequent parallel computation of the system into acyclic subchains. This effectively avoids the obstacle of closed-loop dependencies to parallel solution, improving the overall algorithm's execution efficiency and numerical stability.

[0086] In some embodiments, the present application embodiments divide cable constraint edges into generated forest edges and closed loop edges based on disjoint-set data structures or equivalent connectivity determination methods; in addition to disjoint-set data structures, the present application embodiments may also divide edges into generated forest edges and closed loop edges through depth-first search, breadth-first search, minimum spanning tree, maximum spanning tree, generated forest selection based on material stiffness weights, or other connectivity determination methods.

[0087] In some embodiments, the present application selects a forest by disjoint-set data structure, stores closed-loop edges as LoopPairs in a buffer, and injects closed-loop constraints in the direct solution iteration through RHS / KKT / Schur-Style Loop Pass. Thus, closed-loop edges do not destroy the acyclic structure of Tree Thomas or Tile PSR, while closed-loop constraints can still participate in the material solution, reducing loop closure error.

[0088] More in detail, such as Figure 5 As shown, the process of generating forest and Loop Pair partitioning in this embodiment of the application specifically includes: first, receiving a cable network topology containing nodes (such as 1-11) and connecting edges; using a disjoint-set data structure algorithm to filter edges; after the above processing, outputting two independent datasets, output 1: generated forest (tree pairs) and output 2: loop pair buffer (removed edges).

[0089] It should be noted that, in this embodiment of the application, the contributions of the child Strand are aggregated to the parent Strand through leaf-to-root condensation, and the corrections of all cable nodes are restored through root-to-leaf expansion.

[0090] In some embodiments, the Loop Pair in this application can be injected into the direct solution system through RHS injection, KKT multipliers, Schur complement, local Newton iteration, XPBD Compliance constraints, projective closed-loop correction, or a hybrid approach.

[0091] In some embodiments, for cable topologies containing loops, this application does not directly add all edges to the tree-based direct solution system. Instead, it first selects a forest as the main tree structure using a disjoint-set data structure. Edges that would form loops are removed from the Tree Pair and stored in the Loop Pair Buffer. In this way, the Tree Thomas or Tile PSR solver always processes only the acyclic main structure, maintaining its direct solution efficiency and regular data structure. In this application embodiment, closed-loop edges are not deleted but are injected as additional constraints in the Newton iteration or material iteration of the direct solver. Through RHS, KKT, or Schur-Style Loop Pass, the residuals of the closed-loop edges can affect their two endpoints and propagate to the entire cable through direct solution, thereby reducing the closed-loop residuals and maintaining the stability of the loop structure.

[0092] More specifically, for the tree-like main structure, the embodiments of this application use Tree Thoma or Tile PSR to solve directly; for a small number of closed loop edges, constraints are injected through Loop Pair Pass to avoid constructing a large global KKT system for all cable variables, thus making it more suitable for real-time or near-real-time GPU simulation and reducing the cost of general global sparse solution.

[0093] In some embodiments, the Tile length and reduction level in this application embodiment can be determined by a fixed threshold, or by offline performance benchmarks, runtime adaptive tuning, register budget models, shared memory models, occupancy estimation, strand length thresholds, or GPU architecture parameters.

[0094] In addition, for ordinary Strands, the embodiments of this application can employ Block Thomas, Tree Thomas, LDL decomposition, Cholesky decomposition, Block Cyclic Reduction, or other block tridiagonal / tree system solution methods; for ultra-long Strands, Tile PSR, Tile-level PCR, Cyclic Reduction, Recursive Doubling, Hybrid Thomas-PCR, or other hierarchical proximity reduction methods can be employed.

[0095] In some embodiments, such as Figure 6 As shown, the parallel cable processing method in this application embodiment specifically includes: S602, Obtain cable topology: Obtain cable graph G=(V,E), where V represents the set of cable nodes and E represents the set of cable material constraint edges. Each edge e=(i,j) corresponds to the Stretch, Bend, Twist or Cosserat material constraint between two cable nodes.

[0096] S604, dividing the generated forest edges and loop edges: Initialize the disjoint-set data structure, traverse the cable constraint e=(i,j), if node i and node j belong to different connected components, add the edge to the Tree Pair Buffer and perform the Union operation (a constructed data structure whose core feature is memory sharing: multiple different data types can be defined within a Union, but these data members share the same memory space); if node i and node j already belong to the same connected component, identify the edge as a non-tree edge that will form a loop and store it in the Loop Pair Buffer. The edges in the Tree Pair Buffer form one or more generated forest subgraphs, and the Loop Pair Buffer stores the loop edge information.

[0097] S606, Constructing a Strand-Tree: Based on generating forest edges, the cable topology is decomposed into multiple Strands. Each Strand is a continuous cable path along the parent-child direction. For branching structures, the main path can be selected based on longest subtree priority, predetermined priority, node numbering order, or other rules; branch paths are treated as Child Strands, and their ParentStrand and Attach Node are recorded. For Open-Chain, the Strand-Tree degenerates into a single Strand.

[0098] S608, Construct 6DoF block variables: Construct a block variable δq=[δp,δθ] for each cable node, where δp is the three-dimensional position increment and δθ is the three-dimensional attitude or rotation increment. Based on the cable material parameters, mass parameters, inertia parameters, Compliance, time step and current state, construct the block matrix of each node, the coupling block between adjacent nodes and the right-hand term.

[0099] S610, Assembly Material System: Calculates Stretch, Bend, Twist or Cosserat residuals for each generated forest edge and assembles the corresponding contributions into the block tridiagonal or tree block system. This system is used to solve for material corrections on the entire Strand or the entire Strand-Tree, rather than constrained local projections.

[0100] S612 selects the solution path based on the strand length and GPU resources: for strands with a length below a predetermined threshold or with low expected serial overhead, the Tree / Block Thomas solution path is selected; for very long strands with a length exceeding the predetermined threshold, the Tile PSR solution path is selected. This selection can be based on the strand length, cable block variable dimension, target GPU register budget, shared memory budget, thread block size, number of warp, target occupancy, or estimated execution time.

[0101] S614 performs Tree / block Thomas algorithm solving on ordinary Strands: Block Thomas elimination is performed within each Strand. For Strand-Trees, condensation is performed from leaf Strands to the root Strand, transferring the equivalent contribution of child Strands to the Attach Nodes of the parent Strand; then expansion is performed from the root Strand to the leaf Strands to obtain the position and pose increments of each node. Multiple Strands at the same level can be executed in parallel on the GPU.

[0102] S616, Tile PSR solution for an ultra-long strand: Divide the ultra-long strand into multiple consecutive tiles. Each tile contains consecutive cable nodes or cable segments. Perform local elimination in parallel on multiple tiles on the GPU, eliminating internal variables of the tiles and retaining only the equivalent Schur complement relationship and equivalent right-hand side terms between the 6DoF block variables of the left and right boundaries of the tiles. Subsequently, perform progressive proximity reduction by merging adjacent tiles pairwise to form higher-level super-tile equivalence relationships until a smaller Coarse System is obtained. After solving the Coarse System, expand it stepwise in the reverse order of reduction, propagate the boundary solutions back to each tile, and recover the position and orientation increments of the internal cable nodes in parallel within each tile.

[0103] S618, Execute Loop Pass: For each loop pass in the Loop Pair Buffer, calculate the Cosserat pose residual between the two endpoints of the loop pass, including at least one of the following: position closure residual, attitude closure residual, stretch residual, bend residual, or twist residual. Then, inject the loop closure residual into the direct material solver in any of the following ways: Method 1: RHS Injection. The closed-loop edge residual is converted into an equivalent right-hand side correction acting on the two endpoints, and this right-hand side correction is added to the Tree / Tile PSR direct solution system without changing the sparse structure of the generated forest matrix.

[0104] Method 2: KKT multiplier injection. A constraint Jacobian matrix and constraint multipliers are constructed for the closed-loop edges. The closed-loop constraint multipliers are solved by updating them using a small-scale KKT algorithm, and the corresponding reaction terms of the multipliers are applied to the direct solution system of the generated forest.

[0105] Method 3: Schur complement injection. The system response corresponding to the Jacobian constraint of the closed-loop edge is calculated using the generated forest direct solver. The Schur complement system with closed-loop edge constraints is constructed, the closed-loop edge multipliers are solved, and the right-hand side of the generated forest direct solver system is updated based on these multipliers.

[0106] The aforementioned loop pass can be executed once or multiple times within each Newton iteration or material solution iteration. Closed loop edges are not added to the Tree Pair Buffer, thus not disrupting the acyclic structure upon which the Tree Thomas or Tile PSR depends.

[0107] In some embodiments, such as Figure 7 As shown, the specific process of the cyclic transfer injection (RHS / KKT / Schur) in this application embodiment includes: generating a forest direct solution system, calculating the closed-loop residual / Jacobi matrix, providing three different injection methods to add loop information to the equation system according to the solver's requirements, and a direct material solution system. Among them, RHS injection directly corrects the right-hand side terms, which is equivalent to applying a virtual force to the system to eliminate the closed-loop error; KKT multiplier injection is usually used in the Lagrange multiplier method to directly handle constraint forces; Schur supplementary injection is a more advanced mathematical process that condenses the stiffness effect of the loop into the existing system matrix. After the above injections, the core "tree (forest) structure" remains unchanged and does not require complex topological decomposition again.

[0108] S620 interleaves direct material solutions with contact solutions: Direct material solutions are executed within the PBD / XPBD iterative flow according to a predetermined schedule, interleaved with collision, contact, joint, or friction constraint solution stages. The contact stage can employ Block GS, Graph Coloring, Jacobian, ADMM, or other contact solution methods. Perturbations generated by local contacts can propagate along the Strand, branches, and generating forests in subsequent direct material solutions.

[0109] It should be noted that the contact solution in the embodiments of this application can adopt Block GS, Jacobi, GraphColoring, ADMM, XPBD Contact, Frictional Contact Projection, Barrier Method or other contact constraint processing methods. The direct material solution can be located before contact, after contact, in the contact interval or dynamically inserted according to the schedule.

[0110] S622, Update cable status: Apply the obtained position and attitude increments to the cable node status, and proceed to the next PBD / XPBD iteration or the next simulation sub-step.

[0111] In addition, such as Figure 8 As shown, the algorithm flow of PBD / contact scheduling in this application embodiment includes: time stepping loop, core calculation process within a single step, cross-step iteration and contact processing. More specifically, the entire simulation process is divided into discrete time steps (Step0, Step1, ..., Stepk, Stepk+1). Within each time step (e.g., the kth step), the system sequentially executes the following four key stages: direct material solution, using hybrid methods, including SPH, ADMM, or PBD transformation to handle the interaction between fluid and solid, or complex soft deformation, solving using RKS / KKT / Schur methods, writing the calculated physical quantities into the system state, completing the physical state update of the current time step, and preparing for the next step.

[0112] It should be noted that the parallel cable processing method in this application embodiment can be implemented through Compute Unified Device Architecture (CUDA), Warp, Taichi, Open Computing Language (OpenCL), Apple's underlying graphics and computing API (Metal), Vulkan compute, Heterogeneous-compute Interface for Portability (HIP), Single Instruction, Multiple Data (CPU SIMD), or other parallel computing frameworks. This application does not limit specific APIs or frameworks. In addition, this application embodiment is a unified cable direct solution framework for long chains, forks, ultra-long chains, and ring topologies, which simultaneously supports open-chain, tree cable, ultra-long strand, and cyclic cable graph in the same solution process.

[0113] For ease of understanding this application, as Figure 9 As shown, the overall process of this application embodiment includes nine main steps: inputting cable topology and state, generating forest partitioning (disjoint set), Strand-Tree decomposition, free material solution, solution path selection, direct material solution results, environment injection (RHS / KKT / Schur), contact solution PBD / block GS / ADMM, and cable state update; more specifically, this application embodiment first receives the geometric and physical information of the cable, specifically including node position p and direction θ (i.e., 6 degrees of freedom), as well as the connection topology of the cable. Simultaneously, the input also includes the stiffness properties of the material and the current boundary conditions and load conditions, as data for subsequent calculations. Initial state; secondly, based on the input topology, the complex cable network is divided into two independent regions using a disjoint-set data structure algorithm: a tree buffer (corresponding to the "sparse" part in the diagram, i.e., a loop-free tree structure) and a ring buffer (corresponding to the "dense" part in the diagram, i.e., the region containing closed loops or complex connections). This step decouples the problem. Then, a hierarchical definition is performed on the divided structure, clarifying the parent-child relationship between the root strand (parent) and child strands (child). In this structure, "one-to-one" tree pair connections and "many-to-one" ring pair connections are defined. Afterward, the linear equations of the local material system are constructed and solved. This step involves the block partitioning of the stiffness matrix (e.g., K...). pp K pθ(etc.), for positional degrees of freedom (Δp) and directional degrees of freedom (Δθ) and the corresponding force / moment residuals (f) p m θ The calculation process yields the initial deformation increment under the current constraints. Then, based on the problem's scale and characteristics, the optimal solution strategy is dynamically selected. This embodiment selects between the Tree Thomas solver (for fast solving of ordinary strands) and the Tile PSR solver (for block-parallel solving of very long strands) to balance computational efficiency and accuracy. Next, the selected solution algorithm is executed to calculate the final displacement increment Δp and rotation increment Δθ. Then, by calculating the loop residual and Jacobian matrix, environmental constraints (such as closed-loop limitations) are injected into the system as correction terms using Schur complement or KKT conditions, ensuring the physical consistency of the cable when forming loops or subject to strong external constraints. Then, the PBD method, combined with Block GS or ADMM, is used to solve contact constraints, preventing penetration and simulating contact behaviors such as friction. Finally, all the calculated increments (Δp, Δθ) are integrated to update the final position p of the cable node. new and direction θ new Then, the time step is advanced (t→t+Δt) to complete the calculation of the current frame and provide a new initial state for the next iteration or the next time step.

[0114] In some embodiments, such as Figure 10 As shown in the embodiments of this application, the StretchResidual L2 varies with the Solver Step for different numbers of cable segments. According to experimental results, the Direct Strand method exhibits a faster Stretch Residual decrease rate compared to the Local PBD Jacobi and XPBD GS baselines in long-chain scenarios such as N=16, 32, 64, and 128, with the final Residual typically being several orders of magnitude lower. The figure shows that Direct_Strand_1x1 can decrease to approximately 10^-7 to 10^-8 for multiple lengths, while Local PBD Jacobi and XPBD GS typically remain around 10^-3 to 10^-4 for the same number of steps.

[0115] In some embodiments, such as Figure 11As shown in the embodiments of this application, the average corrected displacement of different solution methods in a branched cable is illustrated at the trunk, source branch, sibling at root, sibling at tip upper, and sibling at tip lower positions. Experimental results show that Direct_Strand_1x1 produces more significant correction propagation at the trunk, sibling root, and two sibling tips, indicating that direct material solution can propagate local disturbances across the trunk and sibling branches. In contrast, Local PBD Jacobi has a weaker propagation range, and XPBD GS also has a relatively limited propagation amplitude.

[0116] In some embodiments, the parallel cable processing apparatus of this application includes: a cable information acquisition module, used to acquire cable topology and cable state, wherein the cable topology includes multiple cable nodes and multiple constraint edges, and the cable state includes the positions and orientations of the multiple cable nodes; a block variable material system construction module, used to construct a block variable material system based on the multiple constraint edges in the cable topology, wherein the block variable material system is used to characterize the constraint relationships of the cable topology and is configured to generate state increments of each cable node through parallel solving; a cable state increment generation module, used to perform parallel direct solving on the block variable material system to generate position increments and orientation increments of each cable node; and a cable state update module, used to calculate closed-loop constraint residuals based on the multiple constraint edges in the cable topology to correct the position increments and orientation increments and update the cable state.

[0117] In some embodiments, the multiple constraint edges in this application include: generating forest edges. The block variable material system construction module in this application is further configured to resolve the cable topology into multiple acyclic cable sub-chains based on the generated forest edges; and to construct a block variable material system based on the multiple acyclic cable sub-chains.

[0118] In some embodiments, the multiple constraint edges in this application embodiment also include closed-loop edges. The cable state update module in this application embodiment is further used to obtain the current position and current attitude of the cable nodes connected at both ends of the closed-loop edge; calculate the relative position deviation and relative attitude deviation between the cable nodes connected at both ends of the closed-loop edge; calculate the closed-loop constraint residual based on the relative position deviation and relative attitude deviation; and superimpose the closed-loop constraint residual as a correction term onto the right-hand term vector of the block variable material system to correct the position increment and attitude increment.

[0119] In some embodiments, the cable state in this application embodiment also includes the linear velocity and angular velocity of each cable node. The cable state update module in this application embodiment is further configured to calculate the linear velocity increment and angular velocity increment of each cable node based on the position increment and attitude increment; and update the position and attitude of each cable node based on the linear velocity increment, angular velocity increment, corrected position increment and attitude increment.

[0120] In some embodiments, the cable state increment generation module in this application embodiment is further configured to map the block variable material system into multiple sub-matrix blocks, wherein each sub-matrix block corresponds to an acyclic cable sub-chain; and to perform matrix decomposition operations on multiple sub-matrix blocks through a multi-threaded parallel computing architecture to generate the position increment and attitude increment of each cable node.

[0121] In some embodiments, the cable state increment generation module in this application is further configured to: divide the acyclic cable subchain into multiple continuous subchain blocks when the number of cable nodes in the acyclic cable subchain exceeds a preset threshold, wherein each subchain block contains continuous cable nodes; perform parallel local elimination processing on the multiple subchain blocks to determine the variables and equivalent constraint relationships of the adjacent boundary cable nodes of the multiple subchain blocks; calculate the position increment and attitude increment of the adjacent boundary cable nodes based on the variables and equivalent constraint relationships of the adjacent boundary cable nodes of the multiple subchain blocks; and calculate the position increment and attitude increment of the cable nodes of the multiple subchain blocks in parallel based on the position increment and attitude increment of the adjacent boundary cable nodes.

[0122] In some embodiments, the parallel cable processing apparatus in this application further includes: a constraint edge partitioning module, used to partition multiple constraint edges into generated forest edges and closed loop edges before parsing the cable topology into multiple acyclic cable sub-chains based on generated forest edges.

[0123] It should be noted that although the steps in the above embodiments are described in a specific order, those skilled in the art will understand that in order to achieve the effect of this application, different steps do not necessarily have to be executed in such an order. They can be executed simultaneously (in parallel) or in other orders. These adjusted solutions are equivalent to the technical solutions described in this application and therefore will also fall within the protection scope of this application.

[0124] Those skilled in the art will understand that all or part of the processes in the method of the above-described embodiment can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form. The computer-readable storage medium can include any entity or device capable of carrying the computer program code, a medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory, a random access memory, an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0125] Another aspect of this application provides a computer-readable storage medium.

[0126] In one embodiment of a computer-readable storage medium according to this application, the computer-readable storage medium can be configured to store a program that performs the parallel cable processing method of the above-described method embodiments. This program can be loaded and run by a processor to implement the above-described parallel cable processing method. For ease of explanation, only the parts related to the embodiments of this application are shown; for specific technical details not disclosed, please refer to the method section of the embodiments of this application. The computer-readable storage medium can be a storage device comprising various electronic devices. Optionally, in the embodiments of this application, the computer-readable storage medium is a non-transitory computer-readable storage medium.

[0127] Another aspect of this application provides an electronic device. In one embodiment of an electronic device according to this application, the electronic device may include at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program that, when executed by the at least one processor, implements the methods described in any of the above embodiments.

[0128] The electronic devices described in this application may include, but are not limited to, mobile phones, tablets, desktop computers, laptops, handheld computers, notebook computers, in-vehicle devices, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, etc., and the embodiments of this application do not limit them.

[0129] The technical solutions of this application have been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of this application is obviously not limited to these specific embodiments. Without departing from the principles of this application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of this application.

Claims

1. A method for processing parallel cables, comprising: Obtain the cable topology and cable status. The cable topology includes multiple cable nodes and multiple constraint edges, and the cable status includes the position and orientation of multiple cable nodes. Based on multiple constraint edges in the cable topology, a block variable material system is constructed. The block variable material system is used to characterize the constraint relationships of the cable topology and is configured to generate the state increment of each cable node through parallel solving. Parallel direct solution is performed on the block variable material system to generate the position and attitude increments of each cable node; The closed-loop constraint residuals are calculated based on multiple constraint edges in the cable topology to correct the position increment and the attitude increment, thereby updating the cable state.

2. The parallel cable processing method according to claim 1, characterized in that, Multiple constraint edges include: generating forest edges, and constructing a block variable material system based on multiple constraint edges in the cable topology, including: Based on the generated forest edges, the cable topology is parsed into multiple acyclic cable sub-chains; A block variable material system is constructed based on multiple acyclic cable subchains.

3. The parallel cable processing method according to claim 1, characterized in that, The multiple constraint edges also include closed-loop edges. Closed-loop constraint residuals are calculated based on the multiple constraint edges in the cable topology to correct the position increment and the attitude increment, including: Obtain the current position and current orientation of the cable nodes connected at both ends of the closed loop edge; Calculate the relative positional deviation and relative attitude deviation between the cable nodes connected at both ends of the closed loop edge; The closed-loop constraint residual is calculated based on the relative position deviation and the relative attitude deviation. The closed-loop constraint residual is superimposed as a correction term onto the right-hand term vector of the block variable material system to correct the position increment and the attitude increment.

4. The parallel cable processing method according to claim 1, characterized in that, The cable status also includes the linear velocity and angular velocity of each cable node. Updating the cable status includes: Based on the position increment and the attitude increment, calculate the linear velocity increment and angular velocity increment of each cable node; The position and attitude of each cable node are updated based on the linear velocity increment, the angular velocity increment, the corrected position increment, and the attitude increment.

5. The parallel cable processing method according to claim 2, characterized in that, Parallel direct solution is performed on the block variable material system to generate the position and attitude increments of each cable node, including: The block variable material system is mapped into multiple sub-matrix blocks, where each sub-matrix block corresponds to a loopless cable sub-chain; Through a multi-threaded parallel computing architecture, matrix decomposition operations are performed on multiple sub-matrix blocks to generate position and attitude increments for each cable node.

6. The parallel cable processing method according to claim 5, characterized in that, Using a multi-threaded parallel computing architecture, matrix decomposition operations are performed on multiple sub-matrix blocks to generate position and attitude increments for each cable node, including: When the number of cable nodes in the acyclic cable subchain exceeds a preset threshold, the acyclic cable subchain is divided into multiple consecutive subchain blocks, wherein each subchain block contains consecutive cable nodes. Parallel local elimination is performed on multiple sub-chain blocks to determine the variables and equivalent constraint relationships of adjacent boundary cable nodes of multiple sub-chain blocks; Based on the variables and equivalent constraint relationships of adjacent boundary cable nodes in multiple sub-chain blocks, calculate the position increment and attitude increment of the adjacent boundary cable nodes; Based on the position and attitude increments of the adjacent boundary cable nodes, the position and attitude increments of the cable nodes of multiple sub-chain blocks are calculated in parallel.

7. The parallel cable processing method according to claim 2, characterized in that, Before resolving the cable topology into multiple acyclic cable subchains based on the generated forest edges, the method further includes: dividing the multiple constraint edges into generated forest edges and closed-loop edges.

8. A parallel cable processing device, characterized in that, include: The cable information acquisition module is used to acquire cable topology and cable status. The cable topology includes multiple cable nodes and multiple constraint edges, and the cable status includes the position and orientation of multiple cable nodes. A block variable material system construction module is used to construct a block variable material system based on multiple constraint edges in the cable topology. The block variable material system is used to characterize the constraint relationship of the cable topology and is configured to generate the state increment of each cable node through parallel solving. The cable state increment generation module is used to perform parallel direct solution on the block variable material system to generate the position increment and attitude increment of each cable node; The cable status update module is used to calculate the closed-loop constraint residual based on multiple constraint edges in the cable topology, so as to correct the position increment and the attitude increment and update the cable status.

9. An electronic device, characterized in that, include: At least one processor; And, a memory communicatively connected to the at least one processor; The memory stores a computer program, which, when executed by the at least one processor, implements the parallel cable processing method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a plurality of program codes, characterized in that, The program code is adapted to be loaded and run by a processor to perform the parallel cable processing method according to any one of claims 1 to 7.

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