A method for reducing stress at a chip package interface
Patent Information
- Application Number
- CN202611077991.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-20
- Publication Date
- 2026-10-30
AI Technical Summary
[0004]本发明的目的是解决现有技术中存在应力集中区域易发生界面分层、裂纹扩展及焊点疲劳等失效问题
[0085]1、本发明通过建立封装界面应力模型，对芯片、封装基板、焊料及封装材料之间因热膨胀系数差异产生的应力分布进行预测，准确识别封装界面的应力集中区域，并结合梯度柔性界面层对应力集中区域实施针对性的柔顺调节，使界面刚度沿厚度方向连续变化，减弱不同材料之间因变形不一致导致的应力突变，促进热失配应力在界面区域内逐步扩散与均匀释放，从而有效降低芯片边缘、焊点及材料交界处的局部应力集中，提高封装界面的整体受力均匀性。
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Figure CN123013528A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor packaging reliability technology, and in particular to a method for reducing stress at the chip packaging interface. Background Technology
[0002] As chip packaging develops towards higher integration and miniaturization, there are significant differences in the coefficients of thermal expansion among chips, packaging substrates, solders, and packaging materials. This can easily lead to thermal mismatch stress during packaging curing, reflow soldering, and use.
[0003] Existing technologies typically employ methods such as adding buffer layers, stress relief layers, or optimizing the packaging structure to reduce interface stress. However, due to the inconsistent deformation degrees of different materials, interface stress is difficult to release uniformly, easily leading to stress concentration at chip edges, solder joints, and material interfaces. Under long-term thermal cycling, stress concentration areas are prone to failure problems such as interface delamination, crack propagation, and solder joint fatigue, thereby affecting the reliability and lifespan of the chip package. Summary of the Invention
[0004] The purpose of this invention is to solve the problems in the prior art where stress concentration areas are prone to interface delamination, crack propagation, and weld fatigue failure.
[0005] To achieve the above objectives, the present invention employs the following technical solution: a method for reducing stress at the chip packaging interface, comprising:
[0006] S1. Establish a packaging interface stress model, obtain packaging material and process parameters, establish a packaging interface stress model, predict stress distribution and identify stress concentration areas.
[0007] S2. Construct a gradient flexible interface: Construct a gradient flexible interface layer according to the stress concentration area, and gradually release local stress by adjusting the mechanical properties.
[0008] S3. Construct a stress transfer network: Construct a stress transfer network within the gradient flexible interface layer to guide local stress to diffuse to the surrounding area and reduce stress concentration.
[0009] S4. Implement phased thermal curing, and cure in stages according to the preset temperature curve to gradually release and equalize the residual stress of the encapsulation.
[0010] S5. Perform stress correction, detect residual stress at the packaging interface, and make local corrections to areas exceeding the limit until the stress meets the preset requirements.
[0011] In a preferred embodiment, step S1 includes: obtaining the coefficient of thermal expansion, elastic modulus, Poisson's ratio, geometric dimensions, and packaging process parameters of the chip, packaging substrate, solder, underfill material, and molding compound; establishing a packaging interface stress model based on the material parameters and process parameters; simulating and analyzing the interface stress during packaging curing and thermal cycling to obtain the stress distribution at the packaging interface; and determining the location, range, and stress level of the stress concentration area.
[0012] S1-1, Interface stress gradient function, used to calculate the degree of stress concentration at different locations on the encapsulation interface:
[0013] ,
[0014] in: : Interface stress gradient index Normal stress in the X direction Normal stress in the Y direction Interfacial shear stress Interface coordinates : Interface tangent coordinates Shear stress weighting coefficient;
[0015] S1-2, Considering the thermal expansion mismatch of different materials:
[0016] ,
[0017] in, : Thermal stress at the interface of the i-th layer Material elastic modulus Poisson's ratio : Coefficient of thermal expansion of the material : Equivalent thermal expansion coefficient of adjacent layers Temperature change Distance from the interface Stress attenuation length;
[0018] S1-3, Interface stress concentration factor:
[0019] ,
[0020] in: : Interface stress concentration factor Maximum interfacial stress Mean interfacial stress Gradient correction coefficient Stress gradient Maximum gradient;
[0021] S1-4, Packaging Comprehensive Stress Level Index:
[0022] ,
[0023] in: Overall stress level Weighting coefficient; Von Mises stress, Material yield stress Maximum shear stress The interface allows for shear stress. Stress gradient exponent : Reference gradient value;
[0024] S1-5, Surface Hazard Assessment Function:
[0025] ,
[0026] in: Interface risk index Stress concentration areas Sensitivity index;
[0027] S1-6, Packaging process influencing factors: Incorporating the curing process into the model:
[0028] ,
[0029] in: Process influence coefficient Curing temperature Curing time Heating and cooling rates Refer to the process parameters. Process sensitivity coefficient;
[0030] Then, the stress was corrected:
[0031] ,
[0032] Corrected interfacial stress : Interfacial thermal stress obtained from initial calculations.
[0033] In one preferred embodiment, the stress concentration region is divided into a high-stress region, a medium-stress region, and a low-stress region based on the equivalent stress value, and the material composition, thickness, and elastic modulus of the gradient flexible interface layer are determined according to the stress level of each region.
[0034] In a preferred embodiment, step S2 includes: forming a continuously varying mechanical property gradient along the direction from the chip to the packaging substrate in the gradient flexible interface layer, so that the elastic modulus of the flexible interface layer gradually increases from the high stress region to the low stress region, so as to reduce the stress concentration caused by the sudden change in interface stiffness.
[0035] S2-1, Gradient compliance continuity function, used to describe the continuous change in mechanical properties of the gradient flexible interface layer along the thickness direction:
[0036] ,
[0037] in: :Location Gradient compliance coefficient at the location; : Initial compliance coefficient corresponding to high-stress regions; The termination compliance coefficient corresponding to the low-stress region. : Interface thickness direction coordinate; Total thickness of the gradient flexible interface layer; Gradient-continuous adjustment exponent; used to describe the continuous change in compliance performance from the chip side to the package substrate side, rather than a step change.
[0038] S2-2, Gradient interlayer transition smoothness index, used to evaluate whether the transition between different layers of material is smooth:
[0039] ,
[0040] in: Interlayer transition smoothness index; Total number of gradient layers; : No. Layer compliance coefficient, Compliance coefficient of the adjacent next layer : Compliance difference normalization constant; The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties.
[0041] S2-3, Gradient stiffness mitigation factor, used to evaluate the ability of a gradient structure to mitigate abrupt changes in stiffness:
[0042] ,
[0043] in: Gradient stiffness release factor; : No. Layer and First The difference in mechanical properties between layers; Number of gradient layers; This represents the rate of change in performance between adjacent layers; it is used to evaluate whether gradient design can effectively avoid abrupt changes in stiffness.
[0044] S2-4, Gradient Coordination Transfer Index, used to evaluate the coordination transfer capability of loads in the gradient layer:
[0045] ,
[0046] in: Gradient coordination and transfer exponent; : Rate of change in performance between adjacent gradient layers; : Number of gradient layers; the closer the value is to 1, the smoother the external load can be transmitted; the lower the value, the larger the local performance jump.
[0047] S2-5, Gradient layer design optimization function, used to comprehensively evaluate the design effect of gradient interface:
[0048] ,
[0049] in: : Gradient layer comprehensive evaluation value, , , , Evaluation weighting coefficients Interlayer transition smoothness index; Gradient stiffness release factor; Gradient uniformity; Gradient coordination and transfer exponent;
[0050] Among them, gradient uniformity Defined as the degree to which the overall distribution of the gradient compliance coefficient approximates an ideal linear or exponential distribution, it can be characterized as follows:
[0051] ,
[0052] in: Gradient uniformity; : No. Actual compliance coefficient of the layer; Reference compliance coefficient under ideal distribution;
[0053] The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties.
[0054] In a preferred embodiment, the gradient flexible interface layer is formed by sequentially stacking materials with different elastic moduli, so that the gradient flexible interface layer has continuously varying compliance properties.
[0055] In a preferred embodiment, step S3 includes: the stress transmission network consists of multiple interconnected stress transmission units, each stress transmission unit is arranged along at least two different directions to form a multi-directional stress diffusion path, so that local stress is gradually transmitted to and redistributed to adjacent areas;
[0056] S3-1, Adaptive adjustment function for stress transfer element density, used to reflect that the density of elements in high-stress areas is higher than that in low-stress areas:
[0057] ,
[0058] in: :Location Stress transfer element distribution density at the location, : Basic transfer unit density, : A measure of regional stress level Density adjustment index;
[0059] S3-2, Multidirectional Stress Diffusion Direction Factor, used to describe the diffusion capability formed by stress transfer elements arranged in different directions:
[0060] ,
[0061] in: Multidirectional stress diffusion direction factor Number of stress transfer path directions : No. Directional path weight coefficient, : No. directional stress transfer path angle : Local principal stress diffusion direction angle.
[0062] In a preferred embodiment, the size, spacing, and distribution density of the stress transfer units are adjusted according to the stress level of the corresponding region, wherein the density of stress transfer units in high-stress regions is greater than that in low-stress regions, so as to improve the stress diffusion capability.
[0063] S3-3, Stress path migration efficiency coefficient, used to evaluate the efficiency of local stress redistribution after passing through multiple transfer elements:
[0064] ,
[0065] in: Stress path migration efficiency coefficient Number of stress transfer paths : No. Input stress transfer along the path, : No. Output stress dispersion along the path, : A correction factor to prevent the denominator from being zero;
[0066] S3-4, Stress network comprehensive diffusion evaluation function, used to comprehensively evaluate the design effect of stress transfer network:
[0067] ,
[0068] in: Comprehensive evaluation value of stress transfer network , , , Evaluation weighting coefficients Network connectivity diffusion index Multidirectional diffusion direction factor Stress path migration efficiency coefficient Spatial equilibrium optimization index.
[0069] As a preferred embodiment, step S4 includes: staged thermosetting including a preheating stage, a heating curing stage, a heat preservation stage and a cooling stage, with a preset time maintained in each heat preservation stage to release the thermal stress generated during the curing process and promote the redistribution of residual stress;
[0070] S4-1, Material Curing Adaptation Function, reflects the degree of matching between thermosetting process parameters and the curing characteristics of the encapsulation material:
[0071] ,
[0072] in: Material curing compatibility Importance weights for stage m. : Process characteristic value of stage m, : Optimal curing characteristic values of the material;
[0073] S4-2, Insulation stress release efficiency function, describes the contribution of the insulation stage to stress release capability:
[0074] ,
[0075] in: Thermal stress release efficiency Quantity of insulation stage : The release response coefficient during the nth heat preservation stage : The holding time of the nth heat preservation stage.
[0076] As a preferred implementation, the heating rate, holding temperature, holding time and cooling rate of each stage are adjusted according to the curing characteristics and stress distribution of the encapsulation material, so that the residual stress generated in each stage is gradually reduced.
[0077] S4-3, Stage Residual Stress Attenuation Coefficient, used to evaluate the degree of residual stress attenuation throughout the entire staged thermosetting process:
[0078] ,
[0079] in: : Stage residual stress attenuation coefficient, Total number of thermosetting stages. : Duration weight of stage m : Residual stress retention rate in stage m;
[0080] S4-4. Comprehensive optimization index for phased thermosetting, comprehensively evaluating the entire phased thermosetting process:
[0081] ,
[0082] in: Thermosetting comprehensive optimization index Weights of each evaluation item : Residual stress attenuation coefficient of order 1 Thermal stress release efficiency Temperature regulation coordination index Temperature stability Material curing compatibility.
[0083] In a preferred embodiment, step S5 includes: re-detecting the residual stress at the encapsulation interface and comparing the detection result with a preset stress threshold. When the residual stress in a local area exceeds the preset threshold, local thermal compensation, local flexible adjustment, or local stress release treatment is performed on the corresponding area. The detection and correction are repeated until the residual stress at the encapsulation interface meets the preset uniformity requirement.
[0084] Compared with the prior art, the advantages and positive effects of the present invention are as follows:
[0085] 1. This invention establishes a stress model of the packaging interface to predict the stress distribution caused by the difference in thermal expansion coefficients between the chip, packaging substrate, solder, and packaging materials. It accurately identifies the stress concentration areas at the packaging interface and combines a gradient flexible interface layer to implement targeted compliance adjustment of the stress concentration areas, so that the interface stiffness changes continuously along the thickness direction. This reduces the stress abrupt change caused by inconsistent deformation between different materials, promotes the gradual diffusion and uniform release of thermal mismatch stress in the interface area, thereby effectively reducing local stress concentration at chip edges, solder joints, and material junctions, and improving the overall stress uniformity of the packaging interface.
[0086] 2. This invention constructs a multi-directional stress transfer network within a gradient flexible interface layer and combines it with a staged thermosetting process. This allows the thermal stress generated during the encapsulation process to be gradually redistributed along multiple transfer paths, continuously releasing and balancing residual stress at each curing stage. This avoids the problem of limited stress release capacity of traditional single buffer layers, reduces the high stress state formed by thermal cycling accumulation in local areas, thereby reducing the probability of interface delamination, crack initiation, and crack propagation, and further improving the stability and reliability of the encapsulation structure under long-term thermal cycling conditions.
[0087] 3. After the packaging is completed, the residual stress at the interface is detected again, and local correction measures such as thermal compensation, flexible adjustment or stress release are implemented for local areas that exceed the preset threshold. Through the iterative cycle of detection and correction, the residual stress at the packaging interface gradually becomes more uniform, avoiding long-term concentration of local stress that could cause solder joint fatigue, interface cracking and packaging failure. At the same time, it reduces the impact of material performance dispersion and process fluctuations on stress distribution, and improves the consistency of chip packaging, long-term service reliability and service life. Attached Figure Description
[0088] Figure 1 A flowchart of a method for reducing stress at the chip packaging interface provided by the present invention;
[0089] Figure 2 Finite element stress prediction results for a method to reduce chip packaging interface stress provided by the present invention;
[0090] Figure 3 Gradient flexible interface design parameters for a method to reduce chip packaging interface stress provided by the present invention;
[0091] Figure 4 The gradient interface stiffness mitigation capability of the method for reducing interface stress in chip packaging provided by this invention;
[0092] Figure 5 Stress transfer network parameters for a method to reduce stress at the chip packaging interface provided by the present invention;
[0093] Figure 6 A comprehensive evaluation of the stress network for a method to reduce stress at the chip packaging interface provided by the present invention;
[0094] Figure 7 The present invention provides a staged thermosetting process for a method to reduce stress at the chip packaging interface.
[0095] Figure 8 Thermosetting evaluation results of a method for reducing interface stress in chip packaging provided by the present invention;
[0096] Figure 9 The residual stress closed-loop correction result is provided for a method for reducing chip packaging interface stress according to the present invention. Detailed Implementation
[0097] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0098] Please see Figure 1 This invention provides a technical solution: a method for reducing stress at the chip packaging interface, comprising:
[0099] S1. Establish a packaging interface stress model, obtain packaging material and process parameters, establish a packaging interface stress model, predict stress distribution and identify stress concentration areas.
[0100] S2. Construct a gradient flexible interface: Construct a gradient flexible interface layer according to the stress concentration area, and gradually release local stress by adjusting the mechanical properties.
[0101] S3. Construct a stress transfer network: Construct a stress transfer network within the gradient flexible interface layer to guide local stress to diffuse to the surrounding area and reduce stress concentration.
[0102] S4. Implement phased thermal curing, and cure in stages according to the preset temperature curve to gradually release and equalize the residual stress of the encapsulation.
[0103] S5. Perform stress correction, detect residual stress at the packaging interface, and make local corrections to areas exceeding the limit until the stress meets the preset requirements.
[0104] like Figure 1As shown, step S1 includes: obtaining the thermal expansion coefficient, elastic modulus, Poisson's ratio, geometric dimensions, and packaging process parameters of the chip, packaging substrate, solder, underfill material, and molding compound; establishing a packaging interface stress model based on the material parameters and process parameters; simulating and analyzing the interface stress during the packaging curing and thermal cycling process; obtaining the stress distribution of the packaging interface; and determining the location, range, and stress level of the stress concentration area.
[0105] S1-1, Interface stress gradient function, used to calculate the degree of stress concentration at different locations on the encapsulation interface:
[0106] ,
[0107] in: : Interface stress gradient index Normal stress in the X direction Normal stress in the Y direction Interfacial shear stress Interface coordinates : Interface tangent coordinates Shear stress weighting coefficient;
[0108] S1-2, Considering the thermal expansion mismatch of different materials:
[0109] ,
[0110] in, : Thermal stress at the interface of the i-th layer Material elastic modulus Poisson's ratio : Coefficient of thermal expansion of the material : Equivalent thermal expansion coefficient of adjacent layers Temperature change Distance from the interface Stress attenuation length;
[0111] S1-3, Interface stress concentration factor:
[0112] ,
[0113] in: : Interface stress concentration factor Maximum interfacial stress Mean interfacial stress Gradient correction coefficient Stress gradient Maximum gradient;
[0114] S1-4, Packaging Comprehensive Stress Level Index:
[0115] ,
[0116] in: Overall stress level Weighting coefficient; Von Mises stress, Material yield stress Maximum shear stress The interface allows for shear stress. Stress gradient exponent : Reference gradient value;
[0117] S1-5, Surface Hazard Assessment Function:
[0118] ,
[0119] in: Interface risk index Stress concentration areas Sensitivity index;
[0120] S1-6, Packaging process influencing factors: Incorporating the curing process into the model:
[0121] ,
[0122] in: Process influence coefficient Curing temperature Curing time Heating and cooling rates Refer to the process parameters. Process sensitivity coefficient;
[0123] Then, the stress was corrected:
[0124] ,
[0125] Corrected interfacial stress : Interfacial thermal stress obtained from initial calculations.
[0126] The stress concentration region is divided into high-stress region, medium-stress region and low-stress region according to the equivalent stress value, and the material composition, thickness and elastic modulus of the gradient flexible interface layer are determined according to the stress level of each region.
[0127] Specifically, by comprehensively considering the material properties, geometric parameters, and process parameters of the multi-layered structure including the chip, packaging substrate, solder, underfill material, and molding compound, a simulation model of the packaging interface stress is established. Multi-dimensional evaluation indicators such as stress gradient function, thermal expansion mismatch correction model, stress concentration factor, and comprehensive stress level index are introduced to achieve accurate analysis of the interface stress distribution, stress concentration location, and severity during packaging curing and thermal cycling. Simultaneously, residual stress in the actual manufacturing process is corrected by incorporating process influencing factors, improving the accuracy of stress prediction. By conducting graded evaluations of different regions, the material composition, thickness, and elastic modulus of the gradient flexible interface layer can be matched and designed for high, medium, and low stress areas, achieving stress relief and reliability improvement of the packaging structure, and reducing the risk of failures such as interface cracking and delamination.
[0128] like Figure 1 As shown, step S2 includes: the gradient flexible interface layer forms a continuously changing mechanical property gradient along the direction from the chip to the packaging substrate, so that the elastic modulus of the flexible interface layer gradually increases from the high stress region to the low stress region, so as to reduce the stress concentration caused by the sudden change in interface stiffness.
[0129] S2-1, Gradient compliance continuity function, used to describe the continuous change in mechanical properties of the gradient flexible interface layer along the thickness direction:
[0130] ,
[0131] in: :Location Gradient compliance coefficient at the location; : Initial compliance coefficient corresponding to high-stress regions; The termination compliance coefficient corresponding to the low-stress region. : Interface thickness direction coordinate; Total thickness of the gradient flexible interface layer; Gradient-continuous adjustment exponent; used to describe the continuous change in compliance performance from the chip side to the package substrate side, rather than a step change.
[0132] S2-2, Gradient interlayer transition smoothness index, used to evaluate whether the transition between different layers of material is smooth:
[0133] ,
[0134] in: Interlayer transition smoothness index; Total number of gradient layers; : No. Layer compliance coefficient, Compliance coefficient of the adjacent next layer : Compliance difference normalization constant; The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties.
[0135] S2-3, Gradient stiffness mitigation factor, used to evaluate the ability of a gradient structure to mitigate abrupt changes in stiffness:
[0136] ,
[0137] in: Gradient stiffness release factor; : No. Layer and First The difference in mechanical properties between layers; Number of gradient layers; This represents the rate of change in performance between adjacent layers; it is used to evaluate whether gradient design can effectively avoid abrupt changes in stiffness.
[0138] S2-4, Gradient Coordination Transfer Index, used to evaluate the coordination transfer capability of loads in the gradient layer:
[0139] ,
[0140] in: Gradient coordination and transfer exponent; : Rate of change in performance between adjacent gradient layers; : Number of gradient layers; the closer the value is to 1, the smoother the external load can be transmitted; the lower the value, the larger the local performance jump.
[0141] S2-5, Gradient layer design optimization function, used to comprehensively evaluate the design effect of gradient interface:
[0142] ,
[0143] in: : Gradient layer comprehensive evaluation value, , , , Evaluation weighting coefficients Interlayer transition smoothness index; Gradient stiffness release factor; Gradient uniformity; Gradient coordination and transfer exponent;
[0144] Among them, gradient uniformity Defined as the degree to which the overall distribution of the gradient compliance coefficient approximates an ideal linear or exponential distribution, it can be characterized as follows:
[0145] ,
[0146] in: Gradient uniformity; : No. Actual compliance coefficient of the layer; Reference compliance coefficient under ideal distribution;
[0147] The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties.
[0148] The gradient flexible interface layer is formed by sequentially stacking materials with different elastic moduli, giving the gradient flexible interface layer continuously varying compliance properties.
[0149] Specifically, by constructing a gradient flexible interface layer that continuously varies along the chip to the packaging substrate, the interface mechanical properties achieve a smooth transition, effectively reducing stress concentration caused by abrupt changes in interface stiffness, improving the continuity and uniformity of load transfer, and thus enhancing the stress relief capability and interface bonding reliability of the packaging structure. Simultaneously, by using parameters such as the gradient compliance continuity function, interlayer transition smoothness index, gradient stiffness mitigation factor, gradient coordination transfer index, and gradient layer design optimization function, the gradient structure can be quantitatively evaluated and optimized. This allows for a reasonable configuration of the gradient distribution, improving the design accuracy and optimization efficiency of the gradient interface, and providing effective guarantees for the long-term stability, thermal cycling resistance, and overall reliability of the packaging structure.
[0150] like Figure 1 As shown, step S3 includes: the stress transmission network consists of multiple interconnected stress transmission units, each stress transmission unit is arranged along at least two different directions to form a multi-directional stress diffusion path, so that the local stress is gradually transmitted to the adjacent area and redistributed.
[0151] S3-1, Adaptive adjustment function for stress transfer element density, used to reflect that the density of elements in high-stress areas is higher than that in low-stress areas:
[0152] ,
[0153] in: :Location Stress transfer element distribution density at the location, : Basic transfer unit density, : A measure of regional stress level Density adjustment index;
[0154] S3-2, Multidirectional Stress Diffusion Direction Factor, used to describe the diffusion capability formed by stress transfer elements arranged in different directions:
[0155] ,
[0156] in: Multidirectional stress diffusion direction factor Number of stress transfer path directions : No. Directional path weight coefficient, : No. directional stress transfer path angle : Local principal stress diffusion direction angle.
[0157] The size, spacing, and distribution density of the stress transfer units are adjusted according to the stress level of the corresponding area. The density of stress transfer units in high-stress areas is greater than that in low-stress areas to improve stress diffusion capability.
[0158] S3-3, Stress path migration efficiency coefficient, used to evaluate the efficiency of local stress redistribution after passing through multiple transfer elements:
[0159] ,
[0160] in: Stress path migration efficiency coefficient Number of stress transfer paths : No. Input stress transfer along the path, : No. Output stress dispersion along the path, : A correction factor to prevent the denominator from being zero;
[0161] S3-4, Stress network comprehensive diffusion evaluation function, used to comprehensively evaluate the design effect of stress transfer network:
[0162] ,
[0163] in: Comprehensive evaluation value of stress transfer network , , , Evaluation weighting coefficients Network connectivity diffusion index Multidirectional diffusion direction factor Stress path migration efficiency coefficient Spatial equilibrium optimization index.
[0164] Specifically, by constructing a stress transfer network composed of multiple interconnected stress transfer units and forming stress diffusion paths along multiple directions, local high stress in the encapsulation structure can be gradually transferred and redistributed to the surrounding areas, effectively reducing stress concentration. Simultaneously, using an adaptive adjustment function for stress transfer unit density, the unit size, spacing, and distribution density are dynamically adjusted according to the stress level in different regions, giving high-stress areas stronger stress diffusion capabilities. Combining multi-directional stress diffusion direction factors, stress path migration efficiency coefficients, and a comprehensive stress network diffusion evaluation function, stress diffusion capability, transfer efficiency, network connectivity, and spatial balance are comprehensively optimized, achieving multi-path coordinated transfer and uniform dispersion of stress within the structure. This improves stress relief effects, reduces the risk of local cracking, delamination, and fatigue failure, and further enhances the reliability and long-term service stability of the encapsulation structure.
[0165] like Figure 1 As shown, step S4 includes: staged thermal curing including a preheating stage, a heating curing stage, a heat preservation stage and a cooling stage, with a preset time maintained in each heat preservation stage to release the thermal stress generated during the curing process and promote the redistribution of residual stress.
[0166] S4-1, Material Curing Adaptation Function, reflects the degree of matching between thermosetting process parameters and the curing characteristics of the encapsulation material:
[0167] ,
[0168] in: Material curing compatibility Importance weights for stage m. : Process characteristic value of stage m, : Optimal curing characteristic values of the material;
[0169] S4-2, Insulation stress release efficiency function, describes the contribution of the insulation stage to stress release capability:
[0170] ,
[0171] in: Thermal stress release efficiency Quantity of insulation stage : The release response coefficient during the nth heat preservation stage : The holding time of the nth heat preservation stage.
[0172] The heating rate, holding temperature, holding time, and cooling rate at each stage are adjusted according to the curing characteristics and stress distribution of the encapsulation material to gradually reduce the residual stress generated at each stage.
[0173] S4-3, Stage Residual Stress Attenuation Coefficient, used to evaluate the degree of residual stress attenuation throughout the entire staged thermosetting process:
[0174] ,
[0175] in: : Stage residual stress attenuation coefficient, Total number of thermosetting stages. : Duration weight of stage m : Residual stress retention rate in stage m;
[0176] S4-4. Comprehensive optimization index for phased thermosetting, comprehensively evaluating the entire phased thermosetting process:
[0177] ,
[0178] in: Thermosetting comprehensive optimization index Weights of each evaluation item : Residual stress attenuation coefficient of order 1 Thermal stress release efficiency Temperature regulation coordination index Temperature stability Material curing compatibility.
[0179] Specifically, by setting up a phased thermosetting process including preheating, temperature rise curing, heat preservation, and cooling, and optimizing the heating rate, heat preservation temperature, heat preservation time, and cooling rate of each stage based on the curing characteristics and stress distribution of the packaging material, the thermal stress and residual stress generated during the curing process can be gradually released and redistributed, avoiding stress concentration caused by drastic temperature changes. At the same time, by combining the material curing adaptation function, heat preservation stress release efficiency function, stage residual stress attenuation coefficient, and phased thermosetting comprehensive optimization index, the material curing matching, stress release efficiency, residual stress attenuation effect, and overall thermosetting process are comprehensively evaluated and optimized. This achieves synergistic matching between the curing process and material performance, improves residual stress control capability, reduces the risk of failure such as package warpage, interface cracking, and delamination, and further enhances the reliability and long-term service stability of the chip packaging structure.
[0180] like Figure 1 As shown, step S5 includes: detecting the residual stress at the encapsulation interface again, and comparing the detection result with a preset stress threshold. When the residual stress in a local area exceeds the preset threshold, local thermal compensation, local flexible adjustment, or local stress release treatment is performed on the corresponding area. The detection and correction are repeated until the residual stress at the encapsulation interface meets the preset uniformity requirements.
[0181] Specifically, by re-detecting the residual stress at the packaging interface and comparing it with a preset stress threshold, when the residual stress in a local area exceeds the threshold, targeted local thermal compensation, local flexible adjustment, or local stress release treatment is implemented. The detection and correction are repeated until the residual stress reaches the preset uniformity requirement, thereby forming a closed-loop optimization control mechanism. This enables precise correction of local stress concentration, improves the uniformity and stability of residual stress distribution, effectively reduces the risks of packaging warpage, interface cracking, delamination, and fatigue failure, and further enhances the reliability, yield, and long-term service stability of the chip packaging structure.
[0182] like Figure 2 As shown, this embodiment first performs finite element simulation analysis on the chip packaging structure. By establishing a packaging structure model, the interface stress distribution in different regions, such as the chip center, chip edge, chip corners, solder ball perimeter, and substrate center, is detected. The Von Mises stress in the chip center region is 48.6 MPa, and in the substrate center region it is 53.4 MPa, indicating relatively low stress levels. However, the stresses at the chip edge, corners, and solder ball perimeter reach 86.5 MPa, 112.8 MPa, and 97.2 MPa respectively, significantly higher than other regions, indicating a significant stress concentration phenomenon at the geometric edges of the packaging structure.
[0183] Based on the evaluation results of stress gradient Gs and stress level SL, the stress gradient in the four corner regions reaches 0.95, and the stress level reaches 0.93, thus identifying them as major stress concentration areas. Therefore, this embodiment determines the design location of the subsequent gradient flexible interface based on the finite element prediction results, enabling the interface structure to provide targeted stress relief in high-stress areas and improve the accuracy of stress control.
[0184] like Figure 3 As shown, in this embodiment, based on the stress distribution results obtained in step S1, a gradient flexible interface structure with continuously varying characteristics is set in different stress regions. Specifically, a material with a lower elastic modulus is used in the high-stress region, with an elastic modulus set to 2.6 GPa and a thickness increased to 62 μm, to improve the structural compliance; a 3.8 GPa material is used for transition in the medium-stress region; and a 5.2 GPa material is used to connect with the substrate structure in the low-stress region.
[0185] The data in the table show that as the regional stress level decreases, the elastic modulus of the interface material gradually increases, achieving a continuous transition from the flexible region to the rigid region. Specifically, the compliance coefficient Φ remains within the range of 0.52 to 0.95, and the transition index Ψ reaches 0.91, indicating that there is no significant abrupt change in stiffness between different material layers.
[0186] The gradient design described above can effectively reduce the interfacial shear stress caused by the mismatch in the thermal expansion coefficients of the materials, allowing the thermomechanical load to be gradually released along the gradient direction and improving the reliability of the encapsulation interface.
[0187] like Figure 4 As shown, this embodiment further tests the stiffness mitigation effect under different numbers of gradient layers to determine the optimal number of gradient structures.
[0188] Experimental results show that when the number of gradient layers increases from 2 to 5, the stiffness mitigation factor Γ increases from 0.58 to 0.89, and the coordination transfer index Ω increases from 0.74 to 0.95, indicating that increasing the number of gradient layers can enhance the stress transfer capability.
[0189] Among them, the two-layer structure is prone to local stiffness abrupt changes due to rapid changes in material properties; while the four-layer gradient structure achieves a stiffness mitigation factor of 0.84 and a coordination transfer index of 0.91, which is sufficient to meet the requirements for continuous stress transfer. Therefore, this embodiment preferably adopts a four-layer gradient interface structure, which ensures the mitigation effect while taking into account structural complexity and manufacturing cost.
[0190] like Figure 5 As shown, this embodiment further constructs a stress transfer network based on the gradient flexible interface. By adjusting the network unit density, the number of diffusion directions, and the stress migration path in different regions, local stress is diffused to the surrounding areas.
[0191] Experimental data show that in high-stress areas, a higher network unit density P=3.86 is used, and eight stress diffusion directions are set, so that the diffusion factor D reaches 0.91 and the stress migration efficiency T reaches 0.88; while in low-stress areas, due to the lower load-bearing requirements, only a lower network density is set.
[0192] This demonstrates that differentiated network design enables high-stress areas to have stronger stress dispersion capabilities, preventing local areas from bearing concentrated loads for extended periods and improving the overall stability of the packaging structure.
[0193] like Figure 6 As shown, this embodiment compares the traditional regular mesh structure with the gradient stress transfer network designed in this invention.
[0194] Test results show that the traditional mesh structure has a network connectivity index C of 0.63, a diffusion factor D of 0.66, a stress path efficiency T of 0.61, and a comprehensive evaluation index y of only 0.648; while after adopting the structure of the present invention, the network connectivity index increases to 0.92, the diffusion factor increases to 0.91, the path efficiency increases to 0.88, and the comprehensive evaluation index reaches 0.903.
[0195] Compared to traditional structures, the overall stress regulation capability of this embodiment is improved by approximately 39.4%, indicating that by constructing a directional stress transfer network, the stress distribution within the package can be effectively improved.
[0196] like Figure 7 As shown, this embodiment adopts a staged thermosetting process, including a preheating stage, a temperature rise curing stage, a heat preservation stage, and a cooling stage.
[0197] The process involves setting a preheating temperature of 80°C and maintaining it for 20 minutes to allow the internal temperature of the encapsulation material to gradually equalize. Subsequently, a low heating rate is used to enter the curing stage at 150°C to avoid rapid heating causing internal temperature differences. Temperature is maintained at 175°C and 200°C to ensure the curing reaction is fully completed and to release the thermal stress generated by curing shrinkage. Finally, a slow cooling method is used to gradually redistribute the residual stress inside the material.
[0198] By using the above-mentioned multi-stage temperature control method, thermal shock caused by rapid temperature rise and fall can be avoided, thus improving the stability of the curing process.
[0199] like Figure 8 As shown, this embodiment evaluates the thermosetting effect before and after optimization by using material curing compatibility M, thermal insulation stress release efficiency Y, residual stress attenuation coefficient ℜ, and comprehensive optimization index y.
[0200] Experimental results show that the optimized material curing compatibility increased from 0.78 to 0.96, indicating that the matching degree between the thermosetting parameters and the material curing characteristics was significantly improved; the insulation stress release efficiency increased from 0.69 to 0.93, indicating that the staged insulation can effectively release the internal stress generated during the curing process; and the residual stress attenuation coefficient increased from 0.58 to 0.89.
[0201] Ultimately, the comprehensive evaluation index y of thermosetting increased from 0.62 to 0.91, indicating that the optimized thermosetting process can significantly reduce the residual stress inside the encapsulation structure.
[0202] like Figure 9 As shown, in this embodiment, after the thermosetting process is completed, the residual stress at the encapsulation interface is detected again, and local thermal compensation, flexible adjustment and stress release are performed based on the detection results.
[0203] The test results showed that the maximum residual stress reached 64.3 MPa without correction, and the stress uniformity was only 0.73. After the first correction, the maximum residual stress was reduced to 49.6 MPa. After three cycles of testing and correction, the maximum residual stress was further reduced to 32.8 MPa, and the stress uniformity was improved to 0.96.
[0204] The above results show that this embodiment, through closed-loop detection and feedback correction mechanism, can accurately adjust local abnormal stress areas, so that the packaging interface can achieve a more uniform and stable stress state.
[0205] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments for application in other fields. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.
Claims
1. A method of reducing stress at a chip package interface, comprising: include: S1. Establish a packaging interface stress model, obtain packaging material and process parameters, establish a packaging interface stress model, predict stress distribution and identify stress concentration areas. S2. Construct a gradient flexible interface: Construct a gradient flexible interface layer according to the stress concentration area, and gradually release local stress by adjusting the mechanical properties. S3. Construct a stress transfer network: Construct a stress transfer network within the gradient flexible interface layer to guide local stress to diffuse to the surrounding area and reduce stress concentration. S4. Implement phased thermal curing, and cure in stages according to the preset temperature curve to gradually release and equalize the residual stress of the encapsulation. S5. Perform stress correction, detect residual stress at the packaging interface, and make local corrections to areas exceeding the limit until the stress meets the preset requirements.
2. The method of claim 1, wherein the stress-reducing material is a material having a coefficient of thermal expansion that is substantially equal to a coefficient of thermal expansion of the chip. Step S1 includes: obtaining the thermal expansion coefficient, elastic modulus, Poisson's ratio, geometric dimensions, and packaging process parameters of the chip, packaging substrate, solder, underfill material, and molding compound; establishing a packaging interface stress model based on the material parameters and process parameters; simulating and analyzing the interface stress during the packaging curing and thermal cycling process; obtaining the stress distribution of the packaging interface; and determining the location, range, and stress level of the stress concentration area. S1-1, Interface stress gradient function, used to calculate the degree of stress concentration at different locations on the encapsulation interface: , wherein: : interface stress gradient index, : X-direction normal stress, : Y-direction normal stress, : interface shear stress, : interface coordinate, : interface tangential coordinate, : shear stress weight coefficient; S1-2, Considering the thermal expansion mismatch of different materials: , wherein, : thermal stress at the interface of the i-th layer, : elastic modulus of the material, : Poisson's ratio, : thermal expansion coefficient of the material, : equivalent thermal expansion coefficient of the adjacent layer, : amount of temperature change, : distance from the interface, : stress decay length; S1-3, Interface stress concentration factor: , wherein: : interfacial stress concentration factor, : maximum interfacial stress, : average interfacial stress, : gradient correction factor, : stress gradient, : maximum gradient; S1-4, Packaging Comprehensive Stress Level Index: , wherein: : integrated stress level, : weight coefficient; : Von Mises stress, : material yield stress, : maximum shear stress, : interface allowable shear stress, : stress gradient exponent, : reference gradient value; S1-5, Surface Hazard Assessment Function: ， in: Interface risk index Stress concentration areas Sensitivity index; S1-6, Packaging process influencing factors: Incorporating the curing process into the model: ， in: Process influence coefficient Curing temperature Curing time Heating and cooling rates Refer to the process parameters. Process sensitivity coefficient; Then, the stress was corrected: ， Corrected interfacial stress : Interfacial thermal stress obtained from initial calculations.
3. The method for reducing chip packaging interface stress according to claim 2, characterized in that, The stress concentration region is divided into high-stress region, medium-stress region and low-stress region according to the equivalent stress value, and the material composition, thickness and elastic modulus of the gradient flexible interface layer are determined according to the stress level of each region.
4. The method for reducing interface stress in a chip package according to claim 1, characterized in that, Step S2 includes: forming a continuously changing mechanical property gradient in the gradient flexible interface layer along the direction from the chip to the packaging substrate, so that the elastic modulus of the flexible interface layer gradually increases from the high stress region to the low stress region, so as to reduce the stress concentration caused by the sudden change in interface stiffness. S2-1, Gradient compliance continuity function, used to describe the continuous change in mechanical properties of the gradient flexible interface layer along the thickness direction: ， in: :Location Gradient compliance coefficient at the location; : Initial compliance coefficient corresponding to high-stress regions; The termination compliance coefficient corresponding to the low-stress region. : Interface thickness direction coordinate; Total thickness of the gradient flexible interface layer; Gradient-continuous adjustment exponent; used to describe the continuous change in compliance performance from the chip side to the package substrate side, rather than a step change. S2-2, Gradient interlayer transition smoothness index, used to evaluate whether the transition between different layers of material is smooth: ， in: Interlayer transition smoothness index; Total number of gradient layers; : No. Layer compliance coefficient, Compliance coefficient of the adjacent next layer : Compliance difference normalization constant; The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties. S2-3, Gradient stiffness mitigation factor, used to evaluate the ability of a gradient structure to mitigate abrupt changes in stiffness: ， in: Gradient stiffness release factor; : No. Layer and First The difference in mechanical properties between layers; Number of gradient layers; This represents the rate of change in performance between adjacent layers; it is used to evaluate whether gradient design can effectively avoid abrupt changes in stiffness. S2-4, Gradient Coordination Transfer Index, used to evaluate the coordination transfer capability of loads in the gradient layer: ， in: Gradient coordination and transfer exponent; : Rate of change in performance between adjacent gradient layers; : Number of gradient layers; the closer the value is to 1, the smoother the external load can be transmitted; the lower the value, the larger the local performance jump. S2-5, Gradient layer design optimization function, used to comprehensively evaluate the design effect of gradient interface: ， in: : Gradient layer comprehensive evaluation value, , , , Evaluation weighting coefficients Interlayer transition smoothness index; Gradient stiffness release factor; Gradient uniformity; Gradient coordination and transfer exponent; Among them, gradient uniformity Defined as the degree to which the overall distribution of the gradient compliance coefficient approximates an ideal linear or exponential distribution, it can be characterized as follows: ， in: Gradient uniformity; : No. Actual compliance coefficient of the layer; Reference compliance coefficient under ideal distribution; The closer to 1, the more continuous the interlayer transition; the closer to 0, the more obvious the abrupt change in material properties.
5. The method for reducing interface stress in a chip package according to claim 4, characterized in that: The gradient flexible interface layer is formed by sequentially stacking materials with different elastic moduli, giving the gradient flexible interface layer continuously varying compliance properties.
6. The method for reducing chip packaging interface stress according to claim 1, characterized in that, Step S3 includes: the stress transmission network is composed of multiple interconnected stress transmission units, each stress transmission unit is arranged along at least two different directions to form a multi-directional stress diffusion path, so that local stress is gradually transmitted to and redistributed to adjacent areas. S3-1, Adaptive adjustment function for stress transfer element density, used to reflect that the density of elements in high-stress areas is higher than that in low-stress areas: , in: :Location Stress transfer element distribution density at the location, : Basic transfer unit density, : A measure of regional stress level Density adjustment index; S3-2, Multidirectional Stress Diffusion Direction Factor, used to describe the diffusion capability formed by stress transfer elements arranged in different directions: , in: Multidirectional stress diffusion direction factor Number of stress transfer path directions : No. Directional path weight coefficient, : No. directional stress transfer path angle : Local principal stress diffusion direction angle.
7. The method for reducing stress at the chip packaging interface according to claim 6, characterized in that, The size, spacing, and distribution density of the stress transfer units are adjusted according to the stress level of the corresponding region. The stress transfer unit density in the high-stress region is greater than that in the low-stress region to improve the stress diffusion capability. S3-3, Stress path migration efficiency coefficient, used to evaluate the efficiency of local stress redistribution after passing through multiple transfer elements: , in: Stress path migration efficiency coefficient Number of stress transfer paths : No. Input stress transfer along the path, : No. Output stress dispersion along the path, : A correction factor to prevent the denominator from being zero; S3-4, Stress network comprehensive diffusion evaluation function, used to comprehensively evaluate the design effect of stress transfer network: , in: Comprehensive evaluation value of stress transfer network , , , Evaluation weighting coefficients Network connectivity diffusion index Multidirectional diffusion direction factor Stress path migration efficiency coefficient Spatial equilibrium optimization index.
8. The method for reducing interface stress in a chip package according to claim 1, characterized in that, Step S4 includes: staged thermal curing including a preheating stage, a temperature rise curing stage, a heat preservation stage and a cooling stage, with a preset time maintained in each heat preservation stage to release the thermal stress generated during the curing process and promote the redistribution of residual stress; S4-1, Material Curing Adaptation Function, reflects the degree of matching between thermosetting process parameters and the curing characteristics of the encapsulation material: , in: Material curing compatibility Importance weights for stage m. : Process characteristic value of stage m, : Optimal curing characteristic values of the material; S4-2, Insulation stress release efficiency function, describes the contribution of the insulation stage to stress release capability: , in: Thermal stress release efficiency Quantity of insulation stage : The release response coefficient during the nth heat preservation stage : The holding time of the nth heat preservation stage.
9. A method for reducing stress at the chip packaging interface according to claim 8, characterized in that, The heating rate, holding temperature, holding time, and cooling rate at each stage are adjusted according to the curing characteristics and stress distribution of the encapsulation material to gradually reduce the residual stress generated at each stage. S4-3, Stage Residual Stress Attenuation Coefficient, used to evaluate the degree of residual stress attenuation throughout the entire staged thermosetting process: , in: : Stage residual stress attenuation coefficient, Total number of thermosetting stages. : Duration weight of stage m : Residual stress retention rate in stage m; S4-4. Comprehensive optimization index for phased thermosetting, comprehensively evaluating the entire phased thermosetting process: , in: Thermosetting comprehensive optimization index Weights of each evaluation item : Residual stress attenuation coefficient of order 1 Thermal stress release efficiency Temperature regulation coordination index Temperature stability Material curing compatibility.
10. A method for reducing stress at the chip packaging interface according to claim 1, characterized in that, Step S5 includes: re-detecting the residual stress at the encapsulation interface and comparing the detection result with a preset stress threshold. When the residual stress in a local area exceeds the preset threshold, local thermal compensation, local flexible adjustment, or local stress release treatment is performed on the corresponding area. The detection and correction are repeated until the residual stress at the encapsulation interface meets the preset uniformity requirements.