Cross-design undo recovery method and apparatus, storage medium, and electronic device

Abstract

The application relates to a cross-design undo recovery method and device, a storage medium and an electronic device, and relates to the technical field of chip electronic design automation. The method comprises the following steps: in response to an undo operation for a target design, obtaining a target operation identifier to be undone by the target design; according to a mapping relationship between the operation identifier and the design, determining a target design set associated with the target operation identifier, and determining a target rollback position of each to-be-undone design in the target design set; and according to a hierarchical dependency relationship between each to-be-undone design in the target design set, restoring each to-be-undone design in the target design set to the corresponding target rollback position. By applying the technical solution of the application, the defects of traditional single-design independent undo that cannot be cross-design rollback are overcome, the problems of inconsistent editing states of associated designs, invalid circuit hierarchy references and abnormal layout parameter matching are avoided, and the accuracy and data consistency of hierarchical circuit design undo recovery can be improved.

Description

Technical Field

[0001] This application relates to the field of electronic design automation technology, specifically to a method, apparatus, storage medium, and electronic device for cross-design undo recovery. Background Technology

[0002] In most electronic design automation (EDA) circuit design undo / recovery schemes, a single design-independent undo mechanism is adopted. This mechanism can only perform rollback operations on the currently active target design and cannot link related top-level or sub-circuits across different levels. This can easily lead to problems such as inconsistent editing status of related designs, failure of circuit hierarchy references, and abnormal layout parameter matching. As a result, the accuracy and data consistency of undo / recovery are poor. Summary of the Invention

[0003] In view of this, this application provides a method, apparatus, storage medium and electronic device for cross-design undo recovery, the main purpose of which is to solve the technical problems of low efficiency and poor accuracy of cross-design undo recovery of verification rules in related solutions.

[0004] In a first aspect, this application provides a method for cross-design revocation recovery, including: In response to a cancellation operation targeting a target design, obtain the target operation identifier that the target design needs to be cancelled; Based on the mapping relationship between operation identifiers and designs, determine the target design set associated with the target operation identifier, and determine the target rollback position for each design to be undone in the target design set; Based on the hierarchical dependencies between the designs to be revoked in the target design set, each design to be revoked in the target design set is restored to its corresponding target rollback position.

[0005] Optionally, before obtaining the target operation identifier that needs to be revoked for the target design in response to a revocation operation for the target design, the method includes: In response to an editing operation for a circuit design, an operation identifier is assigned to the editing operation; Obtain the design set associated with the editing operation; The operation identifier is written into the checkpoint sequence of each design in the design set, and the current position index of each design is updated. The checkpoint sequence is used to record the operation identifier of the corresponding design that has been modified according to the editing time sequence.

[0006] Optionally, based on the mapping relationship between operation identifiers and designs, the set of target designs associated with the target operation identifier is determined, including: Based on the mapping relationship between operation identifiers and designs, a first set of designs associated with the target operation identifier is determined, wherein the first set of designs is the set of designs directly affected by the undo operation; Based on the designs associated with the designs in the first design set, a second design set associated with the target operation identifier is determined. The second design set is a set of designs indirectly affected by the undo operation. Based on the target design, the first design set, and the second design set, a target design set is determined.

[0007] Optionally, based on the designs associated with the designs in the first design set, a second design set associated with the target operation identifier is determined, including: Obtain the checkpoint sequence for each design in the first design set; Based on the checkpoint sequence of each design, determine the range of operation identifiers to be revoked associated with the target operation identifier; Based on each operation identifier in the interval of operation identifiers to be revoked, a second set of designs associated with the target operation identifier is determined according to the mapping relationship between the operation identifier and the design.

[0008] Optionally, determining the target rollback position for each design to be revoked in the target design set includes: Obtain the checkpoint sequence for each design to be revoked in the target design set; Determine the target location index corresponding to the target operation identifier in the checkpoint sequence; The target location index is determined as the target rollback location of the design to be revoked.

[0009] Optionally, according to the hierarchical dependencies between the designs to be revoked in the target design set, each design to be revoked in the target design set is restored to its corresponding target rollback position, including: Sort the designs to be withdrawn in the target design set according to the hierarchical dependencies between them; According to the sorting results, the local undo function of each design to be undone is called to restore each design to be undone in the target design set to the corresponding target rollback position.

[0010] Optionally, the method provided in this application also includes: In response to the add command of the edit operation, obtain the current position index of each design associated with the edit operation; Based on the current position index, mark the subsequent operation identifier corresponding to each design as the operation identifier to be deleted; Based on the mapping relationship between the operation identifier and the design, obtain the design associated with the operation identifier to be deleted, and remove the operation identifier to be deleted from the checkpoint sequence of the mapping relationship and the design associated with the operation identifier to be deleted.

[0011] Secondly, this application provides a cross-design revocation recovery device, comprising: The acquisition module is configured to acquire the target operation identifier that needs to be revoked in response to a revocation operation for the target design. The determination module is configured to determine the target design set associated with the target operation identifier based on the mapping relationship between the operation identifier and the design, and to determine the target rollback position for each design to be revoked in the target design set; The recovery module is configured to restore each design to be undone in the target design set to its corresponding target rollback position according to the hierarchical dependency relationship between the designs to be undone in the target design set.

[0012] Thirdly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in the first aspect.

[0013] Fourthly, this application provides an electronic device including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor executes the computer program to implement the method described in the first aspect.

[0014] By employing the above technical solution, this application provides a method, apparatus, storage medium, and electronic device for cross-design undo and recovery. Specifically, in response to an undo operation targeting a target design, the method obtains a target operation identifier for the target design to be undone; based on the mapping relationship between the operation identifier and the design, it determines the target design set associated with the target operation identifier and determines the target rollback position for each design to be undone in the target design set; and according to the hierarchical dependency relationship between the designs to be undone in the target design set, it restores each design to be undone to its corresponding target rollback position. By applying the technical solution of this application, the shortcomings of traditional single-design independent undoing that cannot be linked across designs are overcome, and problems such as inconsistent editing states of associated designs, invalid circuit hierarchy references, and abnormal layout parameter matching are avoided, thereby improving the accuracy and data consistency of hierarchical circuit design undo and recovery.

[0015] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A flowchart illustrating a cross-design undo recovery method provided in an embodiment of this application is shown. Figure 2 The illustration shows a flowchart of a specific cross-design undo recovery method provided in an embodiment of this application; Figure 3 This illustration shows a schematic diagram of the data structure hierarchy of a cross-design undo recovery method provided in an embodiment of this application; Figure 4 A flowchart illustrating a method for determining a target design set according to an embodiment of this application is shown; Figure 5 A flowchart illustrating a method for sorting designs to be withdrawn, according to an embodiment of this application, is shown. Figure 6 A schematic diagram of a cross-design undo recovery device provided in an embodiment of this application is shown. Detailed Implementation

[0019] To better understand the above-mentioned objectives, features, and advantages of this application, the solution of this application will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0020] The cross-design undo and recovery method in this application can be applied to integrated circuit EDA layout design scenarios, such as chip hierarchical schematic collaborative editing and multi-level sub-circuit joint undo and recovery scenarios. The execution subject of this method can be a local integrated circuit design software client or a cloud-based collaborative layout design service backend server.

[0021] In EDA tools, undo / redo is a frequently used and crucial function. Related solutions typically rely on the single-design rollback capability provided by the underlying database (such as OpenAccess): checkpoints can be set within each design to restore it to its previous state. However, in hierarchical circuit design, a single user operation often modifies multiple designs simultaneously—for example, performing a hierarchical check in the top-level schematic may also update the internal data of sub-circuit modules. If such multi-design-related modifications rely solely on independent undo mechanisms for each design, the following problems will arise: Atomicity deficiency: When a user undoes a top-level design, only the data of that design itself can be rolled back. Modifications to related sub-designs cannot be automatically synchronized and undoed, causing inconsistencies across design states and even database reference errors.

[0022] The process is cumbersome: users need to manually switch to each indirectly modified sub-design and perform an undo operation on each one, which greatly reduces design efficiency.

[0023] Conflicts with the underlying Application Programming Interface (API): Some underlying databases only have read permissions when opening a design, but write permissions are required for rollback. If the application layer cannot coordinate the access permissions and rollback order between multiple designs, it can easily lead to exceptions.

[0024] To address the technical issues of single-design independent undoing in related solutions, which prevent cross-design rollback and result in poor accuracy and data consistency during undo recovery, this embodiment provides a cross-design undo recovery method. Figure 1 As shown, Figure 1 This paper illustrates a flowchart of a cross-design undo recovery method provided in an embodiment of this application. The method includes: Step 101: In response to the undo operation for the target design, obtain the target operation identifier that needs to be undone in the target design; In one embodiment, the target design is the EDA circuit design file selected and opened when the user triggers the undo operation. The target design can be a top-level schematic parent design or a bottom-level sub-circuit symbol sub-design. This application does not limit the level or component scale of the target design.

[0025] In one embodiment, the undo operation is a rollback command triggered by the user in the EDA software interface, which includes various operation forms such as single-step undo, batch multi-step undo, and undo at a specified historical node.

[0026] In one embodiment, the target operation identifier is a globally unique, monotonically increasing numerical number. Each circuit editing operation is assigned a unique operation identifier, which is used to locate the historical editing node that needs to be rolled back and to retrieve the retrieval primary key of the associated circuit design.

[0027] In one embodiment, undo operations can be identified and the corresponding target design can be determined by listening to interactive events such as software shortcut keys, right-click menus, and history panels.

[0028] For example, if only the most recent operation needs to be undone, the operation identifier corresponding to the position preceding the current position index is taken as the target operation identifier.

[0029] In one embodiment, the target operation identifier can be read as the target operation identifier by shifting the corresponding number of steps forward from the current position index of the target design based on the number of undo steps input by the user; alternatively, the target operation identifier can be directly extracted as the number bound to the historical operation list item by the user clicking on it; or the target operation identifier can be directly determined by receiving a manually input number.

[0030] Step 102: Based on the mapping relationship between operation identifiers and designs, determine the target design set associated with the target operation identifier, and determine the target rollback position for each design to be revoked in the target design set; In one embodiment, the mapping relationship between operation identifiers and designs is a global storage container, where the key is the operation identifier and the value is a set of all circuit designs directly modified by the edit operation. This is used to reverse-look up all modified circuits by operation number. The mapping relationship between operation identifiers and designs can be represented as a mapping table or a mapping array; the specific form of the mapping relationship is not limited in this application.

[0031] In one embodiment, the target design set is the complete impact design closure of the aforementioned target design, which is obtained by summarizing the aforementioned target designs, designs directly modified by the undo operation, and indirectly related designs after deduplication. It includes all top-level and nested sub-circuits that need to be rolled back synchronously in this undo operation.

[0032] In one embodiment, the design to be revoked is any circuit design within the target design set that requires synchronous state rollback.

[0033] In one embodiment, the target rollback position is the boundary parameter of the design to be revoked. The value of the target rollback position is the array index of the target operation identifier in the design's own checkpoint sequence, which means that the design needs to be restored to the historical snapshot before the index.

[0034] In one embodiment, the target rollback location is typically different for each design to be revoked.

[0035] In one embodiment, when determining the target design set based on the mapping relationship, the first layer of directly related designs can be obtained by looking up the target operation identifier in a table; then, the checkpoint sequence of the directly related designs is traversed to extract the complete interval of the operation identifiers that need to be revoked, and all operation identifiers within the traversal range are iteratively searched for indirect related designs. After merging and deduplication, the target design set is formed; the iterative search can be performed using a breadth-first queue traversal or a depth-first recursive traversal.

[0036] In one embodiment, when determining the target rollback position of a single design to be revoked, the target operation identifier index can be matched by linearly traversing the checkpoint sequence, or a binary search can be used to quickly locate the index; if the checkpoint sequence of the design does not contain the target operation identifier, the earliest operation index in the interval can be taken as the target rollback position.

[0037] Step 103: Based on the hierarchical dependencies between the designs to be revoked in the target design set, restore each design to be revoked in the target design set to its corresponding target rollback position.

[0038] In one embodiment, the hierarchical dependency relationship is an inherent reference constraint relationship of the EDA circuit. The top-level parent design instantiates and calls the lower-level child design, and the parent design depends on the child design. Undoing execution must follow the order of child design priority and parent design last.

[0039] In one embodiment, an adjacency list can be constructed based on hierarchical dependencies, and all designs to be revoked can be rearranged using methods such as topological sorting, dependency tree post-order traversal, and hierarchical depth descending order marking to ensure that the referenced underlying sub-circuits are at the front of the sorted list.

[0040] In one embodiment, restoring the design to be undone to the target rollback position means calling the local undo function of each design in sequence according to the sorting result. The function calls the underlying native undo interface of EDA in a loop, continuously moving the current position index of the design forward until the current index is less than the target rollback position. The local undo function can be implemented in various ways, such as serial single-step execution, parallel execution of dependent sub-circuits, transaction batch execution, and direct snapshot jump.

[0041] In one embodiment, in the transaction batch execution mode, data is persisted only if all designs are successfully undone, and the entire design is rolled back if any design execution fails, which can ensure the consistency of multi-level circuit design data.

[0042] In response to an undo operation targeting a design, the system obtains the target operation identifier for that design. Based on the mapping between the operation identifier and the design, it determines the set of target designs associated with the target operation identifier and the target rollback position for each design to be undone in the target design set. According to the hierarchical dependencies between the designs to be undone in the target design set, it restores each design to its corresponding target rollback position. By applying the technical solution of this application, the system overcomes the shortcomings of traditional single-design independent undo operations that cannot be linked across designs, avoids problems such as inconsistent editing states of associated designs, invalid circuit hierarchy references, and abnormal layout parameter matching, and improves the accuracy and data consistency of hierarchical circuit design undo and recovery.

[0043] Furthermore, based on the above embodiments, before obtaining the target operation identifier that needs to be revoked in response to a revocation operation on the target design, the method includes: In response to an editing operation for a circuit design, an operation identifier is assigned to the editing operation; In one embodiment, the circuit design is a design file stored independently within the EDA tool. The circuit design is divided into a top-level parent schematic and bottom-level sub-circuit symbols. A single editing operation may only modify a single design, but it may also simultaneously modify multi-level related circuit designs.

[0044] In one embodiment, editing operations refer to all modifications that change the circuit layout, device parameters, and hierarchical reference relationships, including adding or deleting devices, adjusting connections, editing ports, and modifying device parameters.

[0045] In one embodiment, the operation identifier is a globally unified, monotonically increasing numerical number, with each complete edit operation corresponding to a unique operation identifier.

[0046] In one embodiment, a global memory counter can be set, with the initial operation flag set to 0 during initialization, and a new number assigned by performing an increment operation each time an edit operation is triggered; In one embodiment, the current maximum operation identifier can also be persistently stored in the project file, and the original value can be continued to be allocated after the project is restarted, thus avoiding duplicate numbering.

[0047] Obtain the design set associated with the editing operation; In one embodiment, the design set associated with the editing operation is a set of all circuit designs that are directly modified and synchronously updated by the current editing action. The single design editing scenario set only includes the current operation design, while the cross-level verification operation set includes the top-level design and all referenced sub-circuits.

[0048] In one embodiment, all design objects modified in the current operation can be read directly by calling the underlying EDA editing API to obtain the associated design set.

[0049] In one embodiment, it is also possible to traverse all instantiated sub-circuits within the top-level design and summarize the top-level and all levels of sub-circuits to form an associated design set.

[0050] In one embodiment, the associated design set can also be obtained by reading the data change log generated in this operation and matching the corresponding circuit design according to the file modification path.

[0051] The operation identifier is written into the checkpoint sequence of each design in the design set, and the current position index of each design is updated. The checkpoint sequence is used to record the operation identifier of the corresponding design that has been modified according to the editing time sequence.

[0052] In one embodiment, the checkpoint sequence is an ordered storage sequence specific to a single circuit design, sorted according to the time in which the edits occurred. The first element of the sequence is the baseline identifier 0, representing the original blank state of the design without any edits. All elements in the sequence are global operation identifiers that have modified the design.

[0053] In one embodiment, the current position index is a pointer subscript variable bound to a single circuit design, used to mark which historical editing node the design is currently at. When adding an edit, it shifts backward, and when performing an undo operation, it rolls back forward.

[0054] In one embodiment, when writing the operation identifier to the checkpoint sequence, the operation identifier can be written to the checkpoint sequence of each design in the design set by appending to the end of a linear array; alternatively, the operation identifier can be written to the checkpoint sequence of each design in the design set by storing the sequence using a doubly linked list.

[0055] In one embodiment, updating the current position index can be done by directly assigning the index equal to the sequence length minus one after each append operation flag; alternatively, an independent pointer variable can be used to offset and maintain the index separately, decoupling it from the sequence storage logic.

[0056] This embodiment assigns a globally unique operation identifier to the response circuit editing operation, locks all circuit designs associated with a single edit, and then synchronously writes the same operation identifier into the checkpoint sequence of all modified designs and updates the current position index of each design. It then uses Alibaba's globally unified operation timing and independent local history storage architecture for each design to achieve atomic synchronous rollback of multiple circuits. At the same time, each design independently maintains its own editing history, supports fine-grained redo branch cleanup and management, and improves the data consistency of multi-design collaborative editing in EDA software.

[0057] Furthermore, based on the above embodiments, according to the mapping relationship between operation identifiers and designs, the target design set associated with the target operation identifier is determined, including: Based on the mapping relationship between operation identifiers and designs, a first set of designs associated with the target operation identifier is determined, wherein the first set of designs is the set of designs directly affected by the undo operation; In one embodiment, the design directly affected by the undo operation refers to the circuit design that writes the target operation identifier into its own checkpoint sequence.

[0058] In one embodiment, when determining the first design set, the table can be looked up once using only the target operation identifier as the retrieval key to extract all designs corresponding to the key as the first design set; alternatively, for multi-step batch cancellation scenarios, all operation identifiers within the range of operation identifiers to be cancelled can be traversed, all directly modified designs can be merged by batch table lookup, and the first design set can be obtained by summarizing and deduplicating.

[0059] In one embodiment, the first set of designs associated with the target operation identifier can be determined by reading the design list corresponding to the target operation identifier in a single index reading within the mapping relationship.

[0060] In one embodiment, the first design set can also be obtained by traversing all operation identifiers within the cancellation interval, querying the mapping relationship one by one, merging all query results, and removing duplicate designs.

[0061] In one embodiment, the first design set associated with the target operation identifier can also be generated by reading the pre-cached operation and design association index without traversing the underlying mapping relationship, directly reading the cached result.

[0062] Based on the designs associated with the designs in the first design set, a second design set associated with the target operation identifier is determined. The second design set is a set of designs indirectly affected by the undo operation. In one embodiment, the design associated with the design in the first design set refers to the new circuit design obtained by taking each circuit design in the first design set as a new tracing starting point, reading the checkpoint sequence of the design itself, extracting the complete revocation operation identifier interval corresponding to this revocation, and traversing all operation identifiers within the range to query the mapping relationship again.

[0063] In one embodiment, the design indirectly affected by the undo operation refers to the modification not directly made by the edit operation corresponding to the target operation identifier, but by other edit operations within the undo interval. If these modifications are missed, it will cause data asynchrony in multiple circuits.

[0064] In one embodiment, when determining the second design set, the circuit designs that have not been marked in the first design set are iteratively traced back to related designs. The marked designs avoid infinite looping of circular circuits. New designs that have not appeared before are continuously summarized until no new designs are generated.

[0065] In one embodiment, a breadth-first queue iterative tracing can be used, where the queue stores the designs to be processed, each design is retrieved to extract the operation range, the table is looked up to expand the related designs, and only designs that have never been recorded are added to the second design set; alternatively, a depth-first recursive tracing can be used, where each design in the first set is used as the root node to recursively trace the related designs downwards.

[0066] Based on the target design, the first design set, and the second design set, a target design set is determined.

[0067] In one embodiment, the target design is the circuit design selected when the user triggers the undo operation; the target design set is the complete impact design closure, which includes all circuit designs that are directly or indirectly affected by this undo operation and require synchronous rollback.

[0068] In one embodiment, determining the target design set refers to merging the initial target design, all designs in the first design set, and all designs in the second design set into a unified list, removing duplicate circuit design objects, and obtaining a complete set of designs to be cancelled without repetition.

[0069] In one embodiment, the target design, the designs in the first design set, and the designs in the second design set can all be stored in a hash Set structure, and the deduplication feature of the hash structure can be used to generate the target design set; alternatively, the merged design list can be traversed sequentially, and the unique identifier of each design can be compared one by one, retaining only the design that appears for the first time to complete the deduplication.

[0070] This embodiment gathers the first set of directly affected designs, iteratively traces the second set of indirectly affected designs, and then merges the initial target designs and removes duplicates to obtain a complete set of target designs. This can cover all top-level schematics and nested sub-circuits at all levels affected by the cancellation interval operation changes in one go. It solves the defects in related schemes that only query a single target operation and miss multi-level related sub-circuits, resulting in data fragmentation and hierarchical reference errors after cancellation. It ensures that all related circuits can be uniformly sorted and rolled back synchronously, achieving data atomic consistency across design cancellations.

[0071] Furthermore, based on the above embodiments, a second design set associated with the target operation identifier is determined based on the designs associated with the designs in the first design set, including: Obtain the checkpoint sequence for each design in the first design set; In one embodiment, obtaining the checkpoint sequence of each design in the first design set refers to sequentially traversing each circuit design in the first design set and reading all operation identifier sequence data bound to the local storage structure of that design.

[0072] In one embodiment, when the circuit design resides in memory, the checkpoint sequence of the design can be read directly from memory to complete the data acquisition.

[0073] In one embodiment, the checkpoint sequence can also be loaded from the design-related engineering files on demand only when the undo process is triggered, reducing the program's resident memory usage.

[0074] In one embodiment, a cached copy of the checkpoint sequence can also be read to prevent foreground editing operations from tampering with the original sequence data during the undo operation.

[0075] Based on the checkpoint sequence of each design, determine the range of operation identifiers to be revoked associated with the target operation identifier; In one embodiment, the interval of operation flags to be revoked is a continuous range of operation flags within a single circuit design checkpoint sequence, from the current position index of the design to the target operation flag. All operations within this interval must be rolled back synchronously.

[0076] In one embodiment, determining the interval of operation identifiers to be undone means locating the array index corresponding to the target operation identifier within the checkpoint sequence of a single design, and combining it with the current position index of the design to extract all operation identifiers between the two, forming a continuous operation interval.

[0077] In one embodiment, the target operation identifier can be matched by traversing the checkpoint sequence in a linear order, and the interval can be truncated based on the matched index; alternatively, binary search can be used to quickly locate the index by utilizing the monotonically increasing characteristic of the operation identifier.

[0078] In one embodiment, if the designed checkpoint sequence does not find the target operation identifier, the earliest operation index of the interval time sequence or the baseline 0 index can be used as the boundary to generate the operation interval; the operation identifier range can also be extracted by shifting forward by the corresponding length from the current index according to the number of undo steps input by the user.

[0079] Based on each operation identifier in the interval of operation identifiers to be revoked, a second set of designs associated with the target operation identifier is determined according to the mapping relationship between the operation identifier and the design.

[0080] In one embodiment, determining the second design set refers to iterating through all operation identifiers within the traversal interval to successively look up the table mapping relationship, filtering out circuit designs that are not in the first design set, and simultaneously iterating and tracing newly added designs until no new designs are generated, marking processed designs to avoid loop circuit dead loops, summarizing all newly added designs and removing duplicates to form the second design set.

[0081] In one embodiment, new designs can be collected one by one by sequentially traversing each operation identifier in the interval based on the mapping relationship; alternatively, all operation identifiers in the interval can be batch-transmitted into the mapping to achieve batch query, reducing the number of loop interactions; after each table lookup, a difference operation is performed with the first design set, and only unrecorded designs are retained and added to the second design set.

[0082] This embodiment obtains the checkpoint sequence of each design in the first design set; based on the checkpoint sequence of each design, it determines the range of operation identifiers that need to be revoked associated with the target operation identifier; based on each operation identifier in the range of operation identifiers that need to be revoked, it determines the second set of designs associated with the target operation identifier according to the mapping relationship between the operation identifier and the design, no longer limited to only searching a single target operation identifier; it can explore all indirectly affected sub-circuits under multi-level nesting and cross-reference relationships, avoiding the problems of missing some associated designs, inconsistent data of multiple circuits after revocation, and layout reference errors caused by only querying the target operation in related schemes.

[0083] Furthermore, based on the above embodiments, determining the target rollback position for each design to be revoked in the target design set includes: Obtain the checkpoint sequence for each design to be revoked in the target design set; In one embodiment, obtaining the checkpoint sequence of each design to be revoked in the target design set means iterating through all circuit designs in the set and reading the complete operation identifier sequence data bound to the local storage structure of that design.

[0084] In one embodiment, the memory array can be read directly when the circuit design is resident in memory to obtain the checkpoint sequence of each design to be undone in the target design set; the sequence can also be loaded on demand from the project supporting file when the undo process is triggered to reduce the program's resident memory usage; or a cached copy of the checkpoint sequence can be read to prevent editing operations from tampering with the original sequence data.

[0085] Determine the target location index corresponding to the target operation identifier in the checkpoint sequence; In one embodiment, the target location index is the array index corresponding to the target operation identifier in a single checkpoint sequence, used to define the termination boundary of the design undo operation.

[0086] In one embodiment, determining the target location index refers to retrieving an element in a single checkpoint sequence of designs to be revoked whose matching value is equal to the target operation identifier, and extracting the array index corresponding to that element; if the sequence does not have a target operation identifier, a fallback boundary index can be configured to avoid retrieval of null values ​​and errors.

[0087] In one embodiment, the operation identifiers within the checkpoint sequence can be compared from beginning to end using a linear sequential traversal to obtain the target position index; alternatively, the monotonically increasing characteristic of the operation identifiers can be used to quickly locate the index using binary search, thereby determining the target position index; if the target operation identifier is not found in the checkpoint sequence of the design to be revoked, the index corresponding to the earliest operation in the time sequence within the range of the revoked operation identifiers can be taken as the fallback index, or the baseline index 0 can be used to force a rollback to the original blank state of the design.

[0088] The target location index is determined as the target rollback location of the design to be revoked.

[0089] In one embodiment, determining the target location index as the target rollback location means assigning the retrieved index value to the temporary variable m_undoIndex inside the local storage structure SleUndoData of the design to be rolled back, as a boundary marker specifically for this rollback process.

[0090] In one embodiment, the index value can be directly assigned to the temporary index variable of the design structure in memory, which only takes effect in this undo process and is automatically released after the undo is completed; alternatively, the target position index can be bound and stored with the EDA underlying checkpoint snapshot, so that the corresponding historical snapshot node can be directly jumped to based on the index during undo; alternatively, the rollback positions of each design target can be stored in the undo transaction cache, so that the cache can be cleared and the local design data can be not permanently modified when the undo execution is abnormal.

[0091] For example, the target design set includes a top-level design A and a sub-circuit B, with the target operation identifier being 2; the checkpoint sequence of A is [0,2], and the target position index obtained is 1, so index 1 is determined as the target rollback position of A; the checkpoint sequence of B is [0,1,2], and the target position index obtained is 2, so index 2 is determined as the target rollback position of B; when the undo is performed later, A needs to roll back to before index 1, and B needs to roll back to before index 2.

[0092] This embodiment obtains the checkpoint sequence of each design to be revoked in the target design set; determines the target position index corresponding to the target operation identifier in the checkpoint sequence; and determines the target position index as the target rollback position of the design to be revoked. It can adapt to different scenarios where the editing history of different circuit designs varies in length and the index of the same operation identifier is not consistent in different sequences, and assigns an independent rollback boundary to each associated circuit. At the same time, it is equipped with a fallback retrieval logic to be compatible with designs that are only indirectly associated and whose sequences do not contain target operation identifiers, avoiding program interruption due to retrieval anomalies. It provides standardized boundary parameters for subsequent hierarchical and orderly execution of multi-design synchronous revocation, ensuring that all associated circuits are accurately rolled back to the same historical time sequence, and achieving data consistency across design revocations.

[0093] Furthermore, based on the above embodiments, according to the hierarchical dependencies between the designs to be revoked in the target design set, each design to be revoked in the target design set is restored to its corresponding target rollback position, including: Sort the designs to be withdrawn in the target design set according to the hierarchical dependencies between them; In one embodiment, the designs to be revoked are all top-level designs and nested sub-circuit designs within the target design set that need to be synchronously rolled back to a specified historical node.

[0094] In one embodiment, sorting refers to rearranging and organizing an unordered set of designs to be rolled back based on circuit hierarchy dependency logic. The sorting rule is that dependent sub-designs take priority and dependent parent designs take precedence, ensuring that the lower-level sub-circuits complete the rollback first and the top-level circuits perform the update later.

[0095] In one embodiment, a circuit-dependent adjacency list can be constructed, and a topological sorting algorithm can be used to count the in-degree of each design, and the dependent lower-level sub-designs can be output layer by layer.

[0096] In one embodiment, a circuit hierarchy tree can also be constructed, and the leaf circuits can be output preferentially through post-order traversal.

[0097] In one embodiment, the design can also be quickly sorted by depth by marking each layer with a depth value, with the lower-level sub-circuit having a larger depth value.

[0098] According to the sorting results, the local undo function of each design to be undone is called to restore each design to be undone in the target design set to the corresponding target rollback position.

[0099] In one embodiment, the sorting result is a list of designs to be withdrawn, arranged in a hierarchical order, with children preceding parents.

[0100] In one embodiment, the local undo function is a low-level execution interface that is independently encapsulated for each circuit design. It has built-in index offset, snapshot loading, and state rollback logic, and can receive the target rollback position as an input parameter to complete the undo of a single design.

[0101] In one embodiment, the target rollback position is the index boundary of the checkpoint sequence of each design to be revoked, used to determine the historical node where the current design needs to be rolled back to terminate, and the target rollback position is used to ensure that each design is rolled back accurately.

[0102] In one embodiment, executing the undo order according to the sorting result means following the normalized hierarchical order, triggering the design undo logic one by one, and restoring the synchronous state of all designs to be undone.

[0103] In one embodiment, a serial single-step execution method can be adopted, where the next parent design is executed only after the previous sub-design has been completely rolled back.

[0104] In one embodiment, a parallel execution approach can also be adopted, enabling multi-threaded synchronous undoing of multiple independent underlying sub-circuits, with the top-level parent design executed serially at the end, which can improve the undoing efficiency of designs in large-scale integrated circuits.

[0105] For example, the target design set contains a top-level parent design A and a bottom-level child design B, with the hierarchical dependency relationship being A depends on B; after sorting, an ordered list [B, A] is obtained; the local undo function of child design B is called first to roll back B to its own target rollback position, and then the local undo function of parent design A is called to roll back A to its own exclusive target rollback position, so as to achieve precise rollback for circuit timing compliance and data synchronization.

[0106] This embodiment solves the problems of parent and child circuit reference timing disorder, layout rendering errors, and component mismatch caused by traditional unordered revocation by sorting the designs to be revoked based on circuit hierarchy dependencies, and strictly follows the EDA circuit hierarchy operation logic. At the same time, by matching independent target rollback positions through the local revocation function corresponding to each design, it realizes differentiated synchronous rollback of multiple designs, taking into account the compliance of the revocation execution order and the accuracy of the rollback boundary, improving the stability and consistency of cross-design revocation, and avoiding data fragmentation and engineering damage after multiple design revocations.

[0107] Furthermore, based on the above embodiments, the cross-design undo recovery method also includes: In response to the add command of the edit operation, obtain the current position index of each design associated with the edit operation; In one embodiment, the addition command for editing operations is any new editing behavior initiated by the user in the EDA circuit design interface, including trigger commands that can generate new operation records, such as adding or deleting components, modifying connections, adjusting parameters, and updating hierarchies.

[0108] In one embodiment, each design associated with the edit operation is all active circuit designs that are directly modified and synchronously updated in this new edit, including the top-level design and the corresponding modified sub-circuit designs.

[0109] In one embodiment, the current position index is a pointer subscript variable specific to each circuit design, used to mark the current historical editing node position of the design.

[0110] In one embodiment, the current position index of each design (active design) associated with the editing operation can be obtained in real time by directly reading from memory; alternatively, the position index corresponding to the currently opened project can be loaded by reading the project's persistent file.

[0111] Based on the current position index, mark the subsequent operation identifier corresponding to each design as the operation identifier to be deleted; In one embodiment, the subsequent operation identifier is the set of all operation identifiers in a single design checkpoint sequence whose index is greater than the current position index, corresponding to historical operations that were previously canceled by the user but not redone and are in a shelved state.

[0112] In one embodiment, the operation identifier to be deleted is a set of all invalid and invalid redo branch operation identifiers. These operation identifiers become outdated after the new edit operation is generated and cannot be redone again. If they are not cleaned up, it will cause historical redundancy, timing disorder, and abnormal node jump.

[0113] In one embodiment, marking the operation to be deleted involves collecting, deduplicating, and uniformly marking all subsequent operation identifiers to form a standardized deletion list.

[0114] In one embodiment, all subsequent operation identifiers can be automatically deduplicated using a hash set to avoid redundant cleanup; alternatively, global state bits can be used to mark the corresponding operation identifiers in place, adding deletion markers to the mapping relationship without requiring additional memory allocation.

[0115] Based on the mapping relationship between the operation identifier and the design, obtain the design associated with the operation identifier to be deleted, and remove the operation identifier to be deleted from the checkpoint sequence of the mapping relationship and the design associated with the operation identifier to be deleted.

[0116] In one embodiment, invalid redo records at both the global and design-local levels are cleared to ensure complete alignment of global and local time-series data.

[0117] In one embodiment, a line-by-line deletion method can be used to clear the mapping key-value pairs of each operation identifier to be deleted one by one and remove the identifier from the corresponding design checkpoint sequence; alternatively, a batch deletion method can be used to clear the mapping relationships and local records of all operation identifiers to be deleted at once, thereby improving the cleaning efficiency.

[0118] This embodiment obtains the current position index of each design associated with the editing operation in response to the add command of the editing operation; according to the current position index, the subsequent operation identifier corresponding to each design is marked as the operation identifier to be deleted; according to the mapping relationship between the operation identifier and the design, the design associated with the operation identifier to be deleted is obtained, and the operation identifier to be deleted is removed from the checkpoint sequence of the mapping relationship and the design associated with the operation identifier to be deleted; compared with the traditional method of clearing all design redo records, this solution can realize fine-grained branch cleaning of single design, retain the redo capability of non-edited designs, avoid the problems of chaotic undo / redo jumps and invalid historical nodes caused by the mixing of new and old operations, and maximize the preservation of the user's effective operation history, thereby improving the timing standardization and data stability of the entire EDA cross-design editing, undo, and redo process.

[0119] In one embodiment, this application provides an application-layer undo / redo management framework, including: (1) Global operation record and checkpoint mapping mechanism: Set a globally incrementing operation identifier m_cpId; maintain an m_undoCheckPointMap, with the operation identifier as the key and the design set (SleUndoEntry) directly modified by the operation as the value; maintain a local checkpoint list m_checkPoints for each design (oaDesign) participating in undo management, and store the identifiers of all operations it participates in in order, while recording the current position index m_index.

[0120] Whenever a new operation occurs, the following steps are executed: increment m_cpId; record the design set (designs) modified by this operation and the operation name in m_undoCheckPointMap[m_cpId]; for each design in designs, call the underlying setCp(m_cpId) to create a checkpoint, add m_cpId to the end of m_checkPoints for that design, and update m_index to point to the new position.

[0121] (2) Recursive impact collection during undo preparation: When an undo operation is performed on a design D and the target reverts to the operation identifier index (or includes itself), the following recursive preparation process is executed: Get a list of all operation flags that need to be undone from the current m_index to the target index (inclusive or exclusive of itself) of design D; For each operation identifier in the list, obtain the set of designs that it directly affects through m_undoCheckPointMap, and set a target undo index m_undoIndex for the SleUndoData of these designs (corresponding to the earliest checkpoint position that the design needs to roll back to). Mark the current design D as processed, and recursively perform the above process on all newly discovered designs until no new designs are added; This results in a set of mappings designed to their target backoff index.

[0122] (3) Hierarchical Dependency-Based Order Undoing: The set of designs to be undone is topologically sorted according to the circuit hierarchy (main design - sub-design), so that the referenced sub-design is placed before the parent design; Following the sorted order, the undo function of each design is called sequentially. This function calls the underlying oaDesign::undo() function step by step based on the difference between its m_index and m_undoIndex, until the current position reaches the target index, thereby restoring the design to the state before the target operation.

[0123] (4) Intelligent cleanup of redo branches: The addition of a new operation will trigger the cleanup of existing redo branches. The cleanup process starts only from the set of designs involved in the new operation, determines the successor checkpoint of each design through its current m_index, and then marks these successor checkpoints and other related designs as to be deleted. During cleanup, a strategy of removing only the checkpoints of the currently active design and skipping other designs can be adopted to ensure that the branches are truncated while preserving as much of the independent redo capability of other designs that have not been explicitly abandoned by the user.

[0124] In one embodiment, such as Figure 2 As shown, Figure 2 The diagram illustrates a specific cross-design undo and recovery method provided in this application. First, the user executes an editing operation. Then, a global operation identifier m_cpld (operation identifier) ​​is assigned. Next, the design set corresponding to the operation is recorded in m_undoCheckPointMap (the mapping relationship between the operation identifier and the design). Then, the design set is traversed, and setCp (set checkpoint) is called for each design, updating the checkpoint list and m_index (current position index). After all operations are completed, the process enters the operation completion node. Subsequently, a judgment node is entered to determine if undo is triggered. If the judgment result is negative, the process jumps to the continue editing or redo step and flows back to the operation completion node. If the judgment result is positive, the process sequentially executes the input target design D and target operation identifier index, recursively collects all affected designs and their rollback target positions (target design set, target rollback position), sorts by hierarchical dependency (sub-designs first), and calls the undo (local undo function) of each design in sequence, gradually rolling back to before the target position, finally reaching the undo completion node.

[0125] In one embodiment, such as Figure 3 As shown, Figure 3This diagram illustrates the hierarchical architecture of a cross-design undo / recovery method provided in this application. It can be divided into three parts: a global module at the top, Design B on the lower left, and Design A on the lower right. The top layer of the global module is the global operation identifier m_cpld (global operation identifier), which is associated downwards with m_undoCheckPointMap (a mapping relationship between operation identifiers and designs). The key of this mapping structure is cpld (operation identifier), and the value is SieUndoEntry (operation record entry). SieUndoEntry contains two fields: operation name and the list of involved designs (design list). SieUndoEntry (operation record entry) is associated downwards with Design B and Design A respectively. Design B internally contains SieUndoData B (Design B local undo data structure), which is bound to the m_checkPoints array (checkpoint sequence), m_index current position (current position index), and m_undoIndex target position (target undo position). Design A internally contains SieUndoData... A (Design A local undo data structure), which is respectively bound to the m_checkPoints array (checkpoint sequence), m_index current position (current position index), and m_undoIndex target position (target undo position).

[0126] In one embodiment, such as Figure 4 As shown, Figure 4This document illustrates a flowchart of a method for determining a target design set according to an embodiment of this application. First, the current design (curDesign), the target operation ID (target), and whether it contains itself (isSelf) are input. Then, the `curDesign.getUndoIndexes` operation is executed to obtain the list of IDs to be undone. Next, each ID is iterated through, and the corresponding `SieUndoEntry` (operation record entry) is retrieved from `m_undoCheckPointMap` (the mapping relationship between operation IDs and designs). The set of designs directly modified by this operation (`designs`) is then retrieved and merged into the undoDesigns set (the set of designs to be processed). An `m_undoIndex` (target location index) is set as the target location for each design. Afterward, the current design is marked as processed, added to the output mapping, and disabled. Then, each design in `undoDesigns` is iterated through again, first determining whether the design is enabled. If the determination result is yes, the checkpoint corresponding to the currently set `m_undoIndex` (target location index) for that design is retrieved. ID (checkpoint identifier), recursively calls the preUndo function, and continues to trace the associated design with the design and the new target ID as parameters; if the result of determining whether the design is enabled is no, it directly jumps to the judgment node of whether there is a next design. If there is a next design, it loops back to the step of traversing undoDesigns. If there is no next design, the recursion ends and the complete set of affected designs is output.

[0127] In one embodiment, such as Figure 5 As shown, Figure 5 This diagram illustrates a method for sorting designs to be withdrawn, as provided in an embodiment of this application. The left side shows the withdrawal order, marked with arrows indicating the order: bottom-level sub-circuit LEAF (bottom-level leaf design), sub-design SUB2 (second-level sub-design), sub-design SUB1 (first-level sub-design), and top-level design TOP (top-level parent design). The text box below indicates the sorting rule: dependents come first, dependents come last; that is, withdraw sub-designs first, then parent designs. The right side shows the hierarchical relationship, marked with dashed lines pointing to sub-design SUB1 (first-level sub-design) and sub-design SUB2 (second-level sub-design), with sub-design SUB1 (first-level sub-design) then pointing to the bottom-level sub-circuit LEAF (bottom-level leaf design). Overall, this demonstrates the parent-child hierarchical dependency structure of the EDA circuit and the corresponding withdrawal execution order, following the sorting rule of withdrawing dependent bottom-level sub-designs first and withdrawing top-level parent designs last.

[0128] For example, the following detailed description uses two designs, A (top-level schematic) and B (sub-circuit symbol), as examples.

[0129] Initial state: Both A and B are open, the Undo stack is empty, global m_cpId=0, and each checkpoint list contains baseline checkpoint 0.

[0130] Step 1: Make a simple modification to B (such as adding a graphic).

[0131] Calling add(“editB”,B,{B}) sets m_cpId to 1; m_undoCheckPointMap[1]={B}; When B calls setCp(1), its m_checkPoints becomes [0,1] and m_index=1.

[0132] Step 2: Perform a hierarchical check on A (the operation affects both A and B).

[0133] Calling add(“hierCheck”,A,{A,B}) changes m_cpId to 2; m_undoCheckPointMap[2]={A,B}; When A calls setCp(2), A's m_checkPoints becomes [0,2] and m_index=1; When B calls setCp(2), B's m_checkPoints becomes [0,1,2] and m_index=2.

[0134] Step 3: Undo twice in window B.

[0135] First cancellation (target: operation 2): Recursive collection phase: Starting from B, getUndoIndexes(2,true) returns {2}; obtain the affected set {A,B} from m_undoCheckPointMap[2]; set the target indices of A and B to the positions of operation 2 in each list respectively; recursively process A and obtains the same result. The final design to be undone is {A,B}, and the goal is to roll back to before operation 2.

[0136] Order: B is a sub-design of A, so cancel B first, then cancel A.

[0137] Execution: B calls undo(), m_index decreases from 2 to 1, restoring the state after operation 1; A calls undo(), m_index decreases from 1 to 0, restoring the initial state.

[0138] Second cancellation (target operation 1): If only B is involved, getUndoIndexes(1,true) returns {1}, and the design set {B} is collected; the m_index of B is reduced from 1 to 0, and B is restored to its initial state.

[0139] Step 4: Perform a hierarchy check on A again (this time only A is modified, for example, a read-only check).

[0140] Calling add(“hierCheck2”,A,{A}) changes m_cpId to 3; Redo Cleanup Phase: Starting from the new operation design set {A}, it is found that A has a redo starting point operation 2, and operation 2 affects {A,B}. Therefore, the record of operation 2 is cleaned up, and operation 2 is removed from the checkpoint lists of A and B. At this time, operation 1 is still retained in B's list (because it is not on the redo branch of A), so B still has the ability to redo operation 1, which meets the expectation that the user may only want to redo the edits of B and abandon the previous hierarchical checks.

[0141] This application embodiment, in response to an undo operation on a target design, obtains the target operation identifier of the target design to be undone; based on the mapping relationship between the operation identifier and the design, determines the target design set associated with the target operation identifier, and determines the target rollback position for each design to be undone in the target design set; according to the hierarchical dependency relationship between the designs to be undone in the target design set, restores each design to its corresponding target rollback position. By applying the technical solution of this application, the shortcomings of traditional single-design independent undoing cannot be linked and rolled back across designs, avoiding problems such as inconsistent editing states of associated designs, invalid circuit hierarchy references, and abnormal layout parameter matching, and improving the accuracy and data consistency of hierarchical circuit design undoing and recovery.

[0142] Furthermore, as Figure 1 The specific implementation of the method shown in this embodiment provides a cross-design undo and restore device 600, such as... Figure 6 As shown, Figure 6 This application provides a schematic diagram of a cross-design undo recovery device 600, which includes: The acquisition module 601 is configured to acquire the target operation identifier that needs to be revoked in response to a revocation operation for the target design. The determination module 602 is configured to determine the target design set associated with the target operation identifier based on the mapping relationship between the operation identifier and the design, and to determine the target rollback position of each design to be canceled in the target design set; The recovery module 603 is configured to restore each design to be undone in the target design set to the corresponding target rollback position according to the hierarchical dependency relationship between each design to be undone in the target design set.

[0143] In some examples, the acquisition module 601 is specifically configured to assign an operation identifier to an editing operation in response to an editing operation for a circuit design; Obtain the design set associated with the editing operation; The operation identifier is written into the checkpoint sequence of each design in the design set, and the current position index of each design is updated. The checkpoint sequence is used to record the operation identifier of the corresponding design that has been modified according to the editing time sequence.

[0144] In some examples, the determining module 602 is specifically configured to determine a first set of designs associated with the target operation identifier based on the mapping relationship between the operation identifier and the design, wherein the first set of designs is a set of designs directly affected by the undo operation; Based on the designs associated with the designs in the first design set, a second design set associated with the target operation identifier is determined. The second design set is a set of designs indirectly affected by the undo operation. Based on the target design, the first design set, and the second design set, a target design set is determined.

[0145] In some examples, the determination module 602 is specifically configured to obtain a sequence of checkpoints for each design in the first design set; Based on the checkpoint sequence of each design, determine the range of operation identifiers to be revoked associated with the target operation identifier; Based on each operation identifier in the interval of operation identifiers to be revoked, a second set of designs associated with the target operation identifier is determined according to the mapping relationship between the operation identifier and the design.

[0146] In some examples, the determination module 602 is specifically configured to obtain a sequence of checkpoints for each design to be revoked in the target design set; Determine the target location index corresponding to the target operation identifier in the checkpoint sequence; The target location index is determined as the target rollback location of the design to be revoked.

[0147] In some examples, recovery module 603 is specifically configured to sort the designs to be revoked in the target design set according to the hierarchical dependencies between the designs to be revoked in the target design set; According to the sorting results, the local undo function of each design to be undone is called to restore each design to be undone in the target design set to the corresponding target rollback position.

[0148] In some examples, the cross-design undo / restore device 600 also includes a deletion module, which is specifically configured to obtain the current position index of each design associated with the editing operation in response to an add instruction of the editing operation; Based on the current position index, mark the subsequent operation identifier corresponding to each design as the operation identifier to be deleted; Based on the mapping relationship between the operation identifier and the design, obtain the design associated with the operation identifier to be deleted, and remove the operation identifier to be deleted from the checkpoint sequence of the mapping relationship and the design associated with the operation identifier to be deleted.

[0149] Based on the above, Figure 1 Accordingly, this embodiment also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method. Figure 1 The method shown.

[0150] Based on this understanding, the technical solution of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer device (such as personal computer, server, or network device, etc.) to execute the methods of various implementation scenarios of this application.

[0151] Based on the above, Figure 1 The method shown, and Figure 6 To achieve the above objectives, the present application also provides an electronic device, which may include a storage medium and a processor; the storage medium is used to store a computer program; the processor is used to execute the computer program to achieve the above-described virtual device embodiments. Figure 1 The method shown.

[0152] Optionally, the aforementioned physical devices may also include a user interface, a network interface, a camera, radio frequency (RF) circuitry, sensors, audio circuitry, a Wi-Fi module, etc. The user interface may include a display screen, input units such as a keyboard, etc., and optional user interfaces may also include USB interfaces, card reader interfaces, etc. The network interface may optionally include standard wired interfaces, wireless interfaces (such as Wi-Fi interfaces), etc.

[0153] Those skilled in the art will understand that the physical device structure provided in this embodiment does not constitute a limitation on the physical device, and may include more or fewer components, or combine certain components, or have different component arrangements. The storage medium may also include an operating system and a network communication module. The operating system is a program that manages the hardware and software resources of the aforementioned physical device, supporting the operation of information processing programs and other software and / or programs. The network communication module is used to enable communication between the various components within the storage medium, as well as communication with other hardware and software in the information processing physical device.

[0154] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented using software plus necessary general-purpose hardware platforms, or it can be implemented using hardware. By applying the solution of this embodiment, when the validity of the target data changes, it can be ensured that the tag corresponding to the target data can automatically update its data and location information as the target data is refreshed, thereby improving data tagging efficiency.

[0155] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the term "comprising" or any other variations thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0156] The above are merely specific embodiments of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to these embodiments, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method for cross-design undo and recovery, characterized in that, include: In response to a cancellation operation targeting a target design, obtain the target operation identifier that the target design needs to be cancelled; Based on the mapping relationship between operation identifiers and designs, determine the target design set associated with the target operation identifier, and determine the target rollback position for each design to be undone in the target design set; Based on the hierarchical dependencies between the designs to be revoked in the target design set, each design to be revoked in the target design set is restored to its corresponding target rollback position.

2. The method according to claim 1, characterized in that, Before obtaining the target operation identifier that needs to be revoked in response to a revocation operation on the target design, the method includes: In response to an editing operation for a circuit design, an operation identifier is assigned to the editing operation; Obtain the design set associated with the editing operation; The operation identifier is written into the checkpoint sequence of each design in the design set, and the current position index of each design is updated. The checkpoint sequence is used to record the operation identifier of the corresponding design that has been modified according to the editing time sequence.

3. The method according to claim 1, characterized in that, The step of determining the target design set associated with the target operation identifier based on the mapping relationship between the operation identifier and the design includes: Based on the mapping relationship between operation identifiers and designs, a first set of designs associated with the target operation identifier is determined, wherein the first set of designs is the set of designs directly affected by the undo operation; Based on the designs associated with the designs in the first design set, a second design set associated with the target operation identifier is determined. The second design set is a set of designs indirectly affected by the undo operation. Based on the target design, the first design set, and the second design set, a target design set is determined.

4. The method according to claim 3, characterized in that, The step of determining the second set of designs associated with the target operation identifier based on the designs associated with the designs in the first design set includes: Obtain the checkpoint sequence for each design in the first design set; Based on the checkpoint sequence of each design, determine the range of operation identifiers to be revoked associated with the target operation identifier; Based on each operation identifier in the interval of operation identifiers to be revoked, a second set of designs associated with the target operation identifier is determined according to the mapping relationship between the operation identifier and the design.

5. The method according to claim 1, characterized in that, Determining the target rollback position for each design to be revoked in the target design set includes: Obtain the checkpoint sequence for each design to be revoked in the target design set; Determine the target location index corresponding to the target operation identifier in the checkpoint sequence; The target location index is determined as the target rollback location of the design to be revoked.

6. The method according to claim 1, characterized in that, The step of restoring each design to be revoked in the target design set to its corresponding target rollback position according to the hierarchical dependency relationship between the designs to be revoked in the target design set includes: Sort the designs to be withdrawn in the target design set according to the hierarchical dependencies between them; According to the sorting results, the local undo function of each design to be undone is called to restore each design to be undone in the target design set to the corresponding target rollback position.

7. The method according to claim 1, characterized in that, The method further includes: In response to the add command of the edit operation, obtain the current position index of each design associated with the edit operation; Based on the current position index, mark the subsequent operation identifier corresponding to each design as the operation identifier to be deleted; Based on the mapping relationship between the operation identifier and the design, obtain the design associated with the operation identifier to be deleted, and remove the operation identifier to be deleted from the checkpoint sequence of the mapping relationship and the design associated with the operation identifier to be deleted.

8. A cross-design undo recovery device, characterized in that, include: The acquisition module is configured to acquire the target operation identifier that needs to be revoked in response to a revocation operation for the target design. The determination module is configured to determine the target design set associated with the target operation identifier based on the mapping relationship between the operation identifier and the design, and to determine the target rollback position for each design to be revoked in the target design set; The recovery module is configured to restore each design to be undone in the target design set to its corresponding target rollback position according to the hierarchical dependency relationship between the designs to be undone in the target design set.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 7.

10. An electronic device comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of any one of claims 1 to 7.

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