Pressure verification method and device of interconnection structure and electronic equipment

Abstract

Embodiments of the present application disclose a pressure verification method and device of an interconnection structure and electronic equipment, and relate to the technical field of integrated circuit verification. The method is invented to reduce the time for pressure verification of a first interconnection structure. The method comprises: setting initial burst transmission parameters for pressure verification of a current first interconnection structure to be verified; starting pressure verification of the first interconnection structure, and transmitting data traffic to the first interconnection structure according to the initial burst transmission parameters by a burst transmitter; detecting a specified state index of the first interconnection structure; judging whether the value of the specified state index reaches a first preset threshold; and if the value of the specified state index does not reach the first preset threshold, adjusting the initial burst transmission parameters until the value of the specified state index reaches or exceeds the first preset threshold, so as to perform pressure verification on the first interconnection structure. The present application is suitable for pressure verification of an interconnection structure.

Description

Technical Field

[0001] This application relates to the field of integrated circuit verification technology, and in particular to a stress verification method, apparatus, electronic device, and readable storage medium for interconnect structures. Background Technology

[0002] In modern chip design, interconnect architecture is the core infrastructure for realizing system-level data transmission. Verifying the behavior of these networks under different traffic patterns, especially their performance under extreme stress conditions, is a crucial step in ensuring the correctness and robustness of chip design.

[0003] Currently, a common verification method is to generate test cases by randomly inserting delays at the input. The basic process includes: constructing an input sequence with random delays, running a simulation, and observing whether network congestion or backpressure occurs. However, the random delay strategy only blindly adjusts the transmission delay, making it difficult to effectively and specifically trigger congestion scenarios. Extensive simulation runs and random combinations often require a very long time to accidentally "bump into" a fully loaded interconnect structure or severe backpressure—i.e., extreme stress conditions—leading to a lengthy stress verification process. Summary of the Invention

[0004] In view of this, embodiments of this application provide a stress verification method, apparatus, electronic device, and readable storage medium for an interconnect structure, which facilitates reducing the time required for stress verification of a first interconnect structure.

[0005] In a first aspect, embodiments of this application provide a stress verification method for an interconnect structure, applied in a stress verification environment for an interconnect structure. The method includes: setting initial burst transmission parameters for stress verification on a first interconnect structure to be verified; initiating stress verification on the first interconnect structure, wherein a burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters; detecting a specified state indicator of the first interconnect structure; the magnitude of the specified state indicator characterizes the congestion level of the first interconnect structure; determining whether the value of the specified state indicator reaches a first preset threshold; wherein the first preset threshold is the value of the specified state parameter when the first interconnect structure is under extreme stress; if the value of the specified state indicator does not reach the first preset threshold, adjusting the initial burst transmission parameters until the value of the specified state indicator reaches or exceeds the first preset threshold, thereby performing stress verification on the first interconnect structure.

[0006] According to a specific implementation of an embodiment of this application, the initial burst transmission parameters include a request quantity threshold and a burst quantity; wherein, the burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters, including: the burst transmitter receiving data request requests sent by the data acquisition module; when the cumulative number of received data request requests reaches the request quantity threshold, sending data packets of the burst quantity to the cache module in the chip to send data traffic from the cache module to the first interconnect structure.

[0007] According to a specific implementation of an embodiment of this application, the specified state indicator includes the number of concurrent data packets of unprocessed data packets in the first interconnection structure; wherein, detecting the specified state indicator of the first interconnection structure includes: detecting the number of concurrent data packets corresponding to the first interconnection structure within a first preset time period; if the value of the specified state indicator does not reach a first preset threshold, adjusting the initial burst transmission parameter includes: if the number of concurrent data packets does not reach a preset data packet threshold, adjusting the initial burst transmission parameter; or, the specified state indicator includes the delay time of data packets; wherein, detecting the specified state indicator of the first interconnection structure includes: within a second preset time period, detecting the time elapsed from when a data packet enters the first interconnection structure to when it leaves the first interconnection structure, and using the elapsed time as the delay time; if the value of the specified state indicator does not reach the first preset threshold, adjusting the initial burst transmission parameter includes If the delay time does not reach a preset first time threshold, the initial burst transmission parameters are adjusted; or, the specified status indicator includes the number of concurrent data packets and the delay time of unprocessed data packets in the first interconnection structure; detecting the specified status indicator of the first interconnection structure includes: detecting the number of concurrent data packets corresponding to the first interconnection structure within a third preset time period; detecting the time taken for a data packet to travel from entering the first interconnection structure to leaving the first interconnection structure within a fourth preset time period, and using the time taken as the delay time; before adjusting the initial burst transmission parameters, the method further includes: weighted summing of the number of concurrent data packets and the delay time to obtain the current synthetic parameter value; if the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted, including: if the current synthetic parameter value does not reach the preset synthetic threshold, the initial burst transmission parameters are adjusted.

[0008] According to a specific implementation of an embodiment of this application, adjusting the initial burst transmission parameters includes: if the current burst transmission parameter is greater than the previous burst transmission parameter, and the current value of the specified state indicator is greater than the previous value of the specified state indicator, then the current burst transmission parameter is added to a first positive value to obtain a new burst transmission parameter; or, if the current burst transmission parameter is less than the previous burst transmission parameter, and the current value of the specified state indicator is greater than the previous value of the specified state indicator, then the current burst transmission parameter is added to a first negative value to obtain a new burst transmission parameter.

[0009] According to a specific implementation of an embodiment of this application, after adjusting the initial burst transmission parameters until the specified state indicator reaches or exceeds a first preset threshold, the method further includes: detecting the specified state indicator within a fifth preset time period; determining whether the change in the detected specified state indicator exceeds a second preset threshold; and if it exceeds the second preset threshold, adjusting the burst transmission parameters.

[0010] According to a specific implementation of an embodiment of this application, after adjusting the initial burst transmission parameters until the value of the specified state indicator reaches or exceeds a first preset threshold, the method further includes: recording or saving the burst transmission parameters when the specified state indicator reaches or exceeds the preset threshold, as initial burst transmission parameters for stress verification of the second interconnect structure; wherein, the second interconnect structure and the first interconnect structure are interconnect structures of the same type.

[0011] Secondly, embodiments of this application provide a stress verification device for an interconnect structure, applied in a stress verification environment for an interconnect structure. The device includes: a setting module, used to set initial burst transmission parameters for stress verification of a first interconnect structure to be verified; a sending module, used to initiate stress verification on the first interconnect structure, wherein a burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters; a detection module, used to detect a specified state indicator of the first interconnect structure; the magnitude of the specified state indicator represents the congestion level of the first interconnect structure; a judgment module, used to judge whether the value of the specified state indicator reaches a first preset threshold; wherein the first preset threshold is the value of the specified state parameter when the first interconnect structure is under extreme stress; and an adjustment module, used to adjust the initial burst transmission parameters if the value of the specified state indicator does not reach the first preset threshold, until the value of the specified state indicator reaches or exceeds the first preset threshold, so as to perform stress verification on the first interconnect structure.

[0012] According to a specific implementation of an embodiment of this application, the initial burst transmission parameters include a request quantity threshold and a burst quantity; wherein, the transmission module is specifically used for: receiving data request requests sent by the data acquisition module; when the cumulative number of received data request requests reaches the request quantity threshold, sending data packets of the burst quantity to the cache module in the chip to send data traffic from the cache module to the first interconnect structure.

[0013] According to a specific implementation of an embodiment of this application, the specified state indicator includes the number of concurrent data packets of unprocessed data packets in the first interconnection structure; wherein, the detection module is specifically used to: detect the number of concurrent data packets corresponding to the first interconnection structure within a first preset time period; the adjustment module is specifically used to: adjust the initial burst transmission parameters if the number of concurrent data packets does not reach a preset data packet threshold; or, the specified state indicator includes the delay time of data packets; wherein, the detection module is specifically used to: detect the time elapsed from the entry of a data packet into the first interconnection structure to the exit of the first interconnection structure within a second preset time period, and use the elapsed time as the delay time; the adjustment module is specifically used to: adjust the initial burst transmission parameters if the delay time does not reach a preset first time threshold. The device further includes: a burst transmission parameter adjustment module; or, the specified status indicator includes the number of concurrent data packets and the delay time of unprocessed data packets in the first interconnection structure; the detection module is specifically used to: detect the number of concurrent data packets corresponding to the first interconnection structure within a third preset time period; detect the time taken for a data packet to travel from entering the first interconnection structure to leaving the first interconnection structure within a fourth preset time period, and use the traveled time as the delay time; the device further includes: a synthesis module, used to weight and sum the number of concurrent data packets and the delay time to obtain a current synthesis parameter value before the adjustment module adjusts the initial burst transmission parameter; the adjustment module is specifically used to: adjust the initial burst transmission parameter if the current synthesis parameter value does not reach a preset synthesis threshold.

[0014] According to a specific implementation of an embodiment of this application, the adjustment module is specifically used for: if the current burst transmission parameter is greater than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then the current burst transmission parameter is added to a first positive value to obtain a new burst transmission parameter; or, if the current burst transmission parameter is less than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then the current burst transmission parameter is added to a first negative value to obtain a new burst transmission parameter.

[0015] According to a specific implementation of an embodiment of this application, the device is further configured to: after the adjustment module adjusts the initial burst transmission parameters until the specified state indicator reaches or exceeds a first preset threshold, detect the specified state indicator within a fifth preset time period; determine whether the change in the detected specified state indicator exceeds a second preset threshold; and if it exceeds the second preset threshold, adjust the burst transmission parameters.

[0016] According to a specific implementation of an embodiment of this application, the device is further configured to: after the adjustment module adjusts the initial burst transmission parameters until the value of the specified state indicator reaches or exceeds a first preset threshold, record or save the burst transmission parameters of the specified state indicator reaching or exceeding the preset threshold as initial burst transmission parameters for stress verification of the second interconnect structure; wherein the second interconnect structure and the first interconnect structure are interconnect structures of the same type.

[0017] Thirdly, embodiments of this application provide an electronic device, the electronic device comprising: a processor and a memory, wherein the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the stress verification method of the interconnect structure described in any of the foregoing implementations.

[0018] Fourthly, embodiments of this application provide a computer-readable storage medium storing one or more programs that can be executed by one or more processors to implement the stress verification method for the interconnect structure described in any of the foregoing implementations.

[0019] The stress verification method, apparatus, electronic device, and readable storage medium of the interconnect structure in this embodiment initiate stress verification on the first interconnect structure. A burst transmitter sends data traffic to the first interconnect structure according to initial burst transmission parameters, detecting a specified status indicator of the first interconnect structure. The magnitude of the specified status indicator represents the congestion level of the first interconnect structure. It is determined whether the value of the specified status indicator reaches a first preset threshold. If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted until the value of the specified status indicator reaches or exceeds the first preset threshold. The first preset threshold is the value of the specified status parameter when the first interconnect structure is under extreme stress. Thus, when the value of the specified status indicator reaches or exceeds the first preset threshold, the first interconnect structure is under extreme stress. By adjusting the burst transmission parameters based on the value of the specified status indicator, the first interconnect structure is under extreme stress when the value of the specified status indicator reaches or exceeds the first preset threshold. In other words, by targeting the value of the specified status indicator to reach or exceed the first preset threshold, the adjustment of the burst transmission parameters has direction, thereby facilitating a reduction in the time required for stress verification of the first interconnect structure. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 A schematic flowchart illustrating a stress verification method for an interconnect structure provided in an embodiment of this application; Figure 2 This is a schematic diagram of the first interconnection structure provided in a specific embodiment of this application; Figure 3 A schematic diagram of a pressure verification system structure including a verification environment and a test object is provided for an embodiment of this application; Figure 4 A schematic diagram of the structure of a pressure verification system provided in another embodiment of this application; Figure 5 This is a schematic diagram of the burst transmitter's workflow; Figure 6 A schematic diagram of a pressure verification device for an interconnected structure provided in an embodiment of this application; Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0022] The embodiments of this application will now be described in detail with reference to the accompanying drawings. It should be understood that the described embodiments are merely some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0023] To enable those skilled in the art to better understand the technical concept, implementation scheme and beneficial effects of the embodiments of this application, detailed descriptions are provided below through specific embodiments.

[0024] Figure 1 A schematic flowchart of a stress verification method for an interconnect structure provided in an embodiment of this application is shown below. Figure 1 As shown, this embodiment of the stress verification method for interconnect structures is applied in a stress verification environment for interconnect structures; the method of this embodiment may include: S101. For the first interconnection structure to be verified, set the initial burst transmission parameters for stress verification.

[0025] The first interconnect structure can be a network-on-chip (NoC), an interconnect network between caches, an internal communication network within a computing cluster, or a specific type of bus.

[0026] S102. Initiate stress verification on the first interconnect structure. The burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters.

[0027] Sending data traffic to the first interconnect structure is essentially a stress test for the first interconnect structure.

[0028] S103, Detect the specified status indicators of the first interconnection structure.

[0029] The magnitude of the specified status index characterizes the congestion level of the first interconnect structure.

[0030] S104. Determine whether the value of the specified status indicator has reached the first preset threshold.

[0031] The first preset threshold can be the value of a specified state parameter of the first interconnect structure under extreme pressure.

[0032] S105. If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted until the value of the specified status indicator reaches or exceeds the first preset threshold, so as to perform stress verification on the first interconnection structure.

[0033] If the value of the specified status indicator does not reach the first preset threshold, it indicates that the first interconnection structure is not yet under extreme pressure. In this case, the initial burst transmission parameters need to be adjusted until the specified status indicator reaches or exceeds the first preset threshold. If the specified status indicator reaches or exceeds the first preset threshold, it indicates that the first interconnection structure is under extreme pressure.

[0034] This embodiment uses feedback signals to drive the adjustment of burst transmission parameters, which is adaptive. This allows for more effective and purposeful verification (e.g., to stably reach or approach the "FIFO full" state).

[0035] In this embodiment, a stress verification is initiated on the first interconnect structure. The burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters, and detects a specified status indicator of the first interconnect structure. The magnitude of the specified status indicator represents the congestion level of the first interconnect structure. It is determined whether the value of the specified status indicator has reached a first preset threshold. If the value of the specified status indicator has not reached the first preset threshold, the initial burst transmission parameters are adjusted until the value of the specified status indicator reaches or exceeds the first preset threshold. The first preset threshold is the value of the specified status parameter when the first interconnect structure is under extreme stress. Thus, when the value of the specified status indicator reaches or exceeds the first preset threshold, the first interconnect structure is under extreme stress. By adjusting the burst transmission parameters based on the value of the specified status indicator, the first interconnect structure is under extreme stress when the value of the specified status indicator reaches or exceeds the first preset threshold. In other words, by aiming for the value of the specified status indicator to reach or exceed the first preset threshold, the adjustment of the burst transmission parameters has a direction, thereby reducing the time for stress verification of the first interconnect structure and avoiding the problem of existing random delay strategies blindly adjusting the transmission delay, which requires a very long time to accidentally put the interconnect structure under extreme stress.

[0036] The stress verification method in this embodiment helps explore different parameter combinations, potentially uncovering previously inaccessible, hidden congestion patterns and boundary conditions. It can more effectively reach and maintain these critical extreme operating conditions that may expose design weaknesses. Furthermore, existing technologies primarily rely on the verification environment pulling the output port of the device under test (DUT) low to create data accumulation within the DUT, thereby causing the FIFO cache to become full or under backpressure. This approach places certain requirements on the DUT's interface capabilities; when the DUT does not provide such signals, the verification method will be unusable. The stress verification method in this embodiment does not rely on pulling the backpressure signal (Ready signal) low from the output port of the DUT.

[0037] The stress verification method of this embodiment can be applied to any routing / switching network that needs to verify its performance and stability under high load and extreme traffic pressure.

[0038] To simulate burst traffic transmission to the first interconnect structure within a certain time period, in some examples, the initial burst transmission parameters may include a request quantity threshold block_cnt and a burst quantity burst_cnt.

[0039] The step S102, in which the burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters, may include: S102a, The burst transmitter receives the data request sent by the data acquisition module.

[0040] The data acquisition module in the chip can be a central processing unit, image processor, or other module that needs to acquire and process data.

[0041] S102b When the cumulative number of received data request requests reaches the request quantity threshold, the burst transmitter sends a burst of data packets to the cache module in the chip to send data traffic from the cache module to the first interconnect structure.

[0042] The burst of data packets can be generated or stored internally by the burst transmitter, or it can be obtained by the burst transmitter from other modules.

[0043] The cache module can be a first-in-first-out (FIFO) cache queue. The cache module can store data packets, so that the first interconnect structure can obtain the data packet from the cache module as soon as it needs it, in order to prevent the first interconnect structure from needing data but the burst transmitter has not sent data at this time, which would cause the problem of not being able to obtain data in time.

[0044] When stress testing the first interconnection structure, the first interconnection structure has multiple status indicators that can characterize the congestion level of the first interconnection structure, such as the end-to-end delay on the critical path of the first interconnection structure exceeding a threshold, the queue depth of a specific node exceeding a threshold, the packet loss rate exceeding a threshold, the error rate increasing, the throughput decreasing, etc. In some examples of this application, the specified status indicators include the number of concurrent packets of unprocessed data packets in the first interconnection structure.

[0045] The data packet concurrency can be the total number of all pending data packets within the test object (DUT) in any verification period. The maximum value of pending data packets at each time point in the verification period can be used as the data packet concurrency; the average value of pending data packets at each time point in the verification period can also be used as the data packet concurrency.

[0046] The specified state indicators for detecting the first interconnect structure include: Step S103, detecting the concurrent number of data packets corresponding to the first interconnection structure, includes: S103a. Within a first preset time period, detect the number of concurrent data packets corresponding to the first interconnection structure.

[0047] Correspondingly, step S104, which involves adjusting the initial burst transmission parameters if the value of the specified status indicator does not reach the first preset threshold, may include: S104a. If the number of concurrent data packets does not reach the preset data packet threshold, the initial burst transmission parameters are adjusted.

[0048] In some other examples of this application, the specified status indicators include the delay time of data packets.

[0049] The specified state indicators for detecting the first interconnect structure in step S103 include: S103b: Within a second preset time period, detect the time elapsed from when the data packet enters the first interconnection structure to when it leaves the first interconnection structure, and use the elapsed time as the delay time.

[0050] Within a second preset time period, the time taken for each data packet to travel from entering the first interconnection structure to leaving the first interconnection structure can be detected. The maximum value among these times can be taken as the delay time, or the average value can be taken as the delay time.

[0051] A longer delay usually indicates more severe congestion in the interconnect structure.

[0052] Correspondingly, if the value of the specified status indicator in step S104 does not reach the first preset threshold, the initial burst transmission parameters are adjusted, which may include: S104b: If the delay time does not reach the preset first time threshold, the initial burst transmission parameters are adjusted.

[0053] The delay time did not reach the preset first time threshold, indicating that the congestion level of the first interconnection structure did not reach an extreme pressure state. Therefore, the initial burst transmission parameters need to be adjusted.

[0054] In some other examples of this application, the specified status indicators include the number of concurrent packets and the packet latency of unprocessed packets in the first interconnect structure.

[0055] The specified state index for detecting the first interconnect structure in step S103 may include: S103c: Within a third preset time period, detect the number of concurrent data packets corresponding to the first interconnection structure; The third preset time can be the same as or different from the first preset time.

[0056] The method for determining the number of concurrent data packets corresponding to the first interconnection structure in this step is the same as that for determining the number of concurrent data packets corresponding to the first interconnection structure in the previous embodiment.

[0057] S103d. During the fourth preset time period, detect the time taken for the data packet to travel from entering the first interconnection structure to leaving the first interconnection structure, and use the time taken as the delay time.

[0058] The fourth preset time can be the same as or different from the second preset time; the fourth preset time can be the same as or different from the third preset time.

[0059] The method for determining the time taken for a data packet to travel from entering the first interconnect structure to leaving the first interconnect structure in this step is the same as the method for determining the time taken for a data packet to travel from entering the first interconnect structure to leaving the first interconnect structure in the previous embodiment.

[0060] In the case of detecting two specified state parameters, before adjusting the initial burst transmission parameters, the method of this embodiment may further include: S106. The weighted sum of the number of concurrent data packets and the delay time is used to obtain the current synthesis parameter value.

[0061] The number of concurrent data packets and the latency are weighted and combined to form a single indicator that comprehensively reflects the network congestion status, namely the current synthetic parameter value WSM.

[0062] For example, WSM = w1 * Max_Concurrent + w2 * Max_Delay Among them, w1 and w2 are pre-set weighting factors used to balance the importance of packet concurrency and latency; Max_Concurrent is the maximum concurrency (Max Concurrent Pending); Max_Delay is the maximum latency (Max Packet Latency).

[0063] Step S104c: If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted, which may include: If the current synthesis parameter value does not reach the preset synthesis threshold, the initial burst transmission parameters will be adjusted.

[0064] In the above embodiments, the initial burst transmission parameters can be adjusted according to the pressure response characteristics of the first interconnection structure.

[0065] The burst transmission parameters are adjusted based on the pressure response characteristics of the first interconnection structure, such as the pressure response characteristics exhibiting a nonlinear "inverted U-shaped" feature: 1. When the burst length is less than the path depth, double buffering cannot form a backlog, and the network is in a low-load state; 2. When the burst length is too large and exceeds the physical capacity of the first interconnect structure, the excess data is blocked outside the network entry point by the back-pressure mechanism (i.e., it stays in the cache module), which does not increase the amount of in-flight data inside the first interconnect structure. Moreover, the excessively long burst flow will cause the arbitration behavior to degenerate into serial transmission, reducing the intensity of multi-path concurrent contention. 3. Only when the burst transmission parameters are within a specific range can the intense contention of multiple data streams at the selector (Mux) be maintained while filling the buffers at each level of the first interconnect structure, thereby measuring the true performance boundary of the first interconnect structure.

[0066] Interconnection structures with "inverted U-shaped" pressure response characteristics can employ a multi-level converging tree topology, such as... Figure 2 In the illustrated embodiment, the nodes at each level of the interconnect structure are cascaded through a double buffer and a round-robin arbitrator (RR Mux), and are subject to closed-loop flow control restrictions by the upstream token mechanism.

[0067] In a multi-level converged tree topology, data flows must be forwarded layer by layer through multiple nodes before reaching the final upstream exit. Each transmission node includes the following key units: 1. Double Buffer: Located at the input of each path level, it is used to temporarily store data packets. Its capacity is extremely limited (usually only able to hold a small number of data packets). When the buffer is full, it pulls the Ready signal low to the next higher level node, generating back-pressure to prevent new data from entering.

[0068] 2. Multiplexer Arbitration (Mux with Arbitration): Located at the convergence point of multiple paths. When multiple Double Buffers connected to the same Mux have data waiting to be sent simultaneously, the arbitration logic inside the Mux (Round-Robin, RR in this embodiment) determines which port to serve first.

[0069] Since RR arbitration can only process one packet at a time, unselected ports must wait. This waiting causes its preceding Double Buffer to fill up rapidly, which in turn propagates the backpressure signal downstream, eventually leading to a blockage at the source.

[0070] The first interconnection structure in this embodiment can be an interconnection structure with a tree topology that adopts multi-level aggregation, that is, the pressure response characteristic of the first interconnection structure is an "inverted U-shaped" characteristic.

[0071] In an embodiment where the initial burst transmission parameters are adjusted for an interconnect structure with an "inverted U" characteristic, step S105 of adjusting the initial burst transmission parameters may include: S105a. If the current burst transmission parameter is greater than the previous burst transmission parameter, and the value of the current specified status indicator is greater than the value of the previous specified status indicator, then the current burst transmission parameter is added to the first positive value to obtain the new burst transmission parameter.

[0072] When the pressure response characteristics of the first interconnect structure exhibit a nonlinear "inverted U-shape", if the current burst transmission parameter is greater than the previous burst transmission parameter (i.e., the burst transmission parameter increases) and the specified state index increases significantly, then the direction is considered "correct", and the burst transmission parameter can continue to be increased when adjusting the burst transmission parameter.

[0073] The current burst transmission parameter is added to the first positive value, and the resulting new burst transmission parameter is greater than the current burst transmission parameter. In other words, the burst transmission parameter is increased during adjustment.

[0074] In an embodiment where a pair of initial burst transmission parameters are adjusted, step S105, adjusting the initial burst transmission parameters, may include: S105b If the current burst transmission parameter is less than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then the current burst transmission parameter is added to the first negative value to obtain the new burst transmission parameter.

[0075] When the pressure response characteristics of the first interconnect structure exhibit a nonlinear "inverted U-shape", if the current burst transmission parameter is less than the previous burst transmission parameter (i.e., the burst transmission parameter increases) and the specified state index increases significantly, then the direction is considered "correct", and the burst transmission parameter can continue to be reduced when adjusting the burst transmission parameter.

[0076] The current burst transmission parameter is added to the first negative value, and the resulting new burst transmission parameter is less than the current burst transmission parameter. In other words, the burst transmission parameter is reduced during adjustment.

[0077] In one specific embodiment, when the burst transmission parameters include the request quantity threshold block_cnt and the burst quantity burst_cnt, if increasing block_cnt or burst_cnt causes a significant increase in WSM, then the direction is considered "correct" and should continue to be increased; otherwise, it should be reduced.

[0078] After adjusting the initial burst transmission parameters in step S105 until the specified state indicator reaches or exceeds the first preset threshold, the method of this embodiment may further include: S107. Within the fifth preset time period, detect the specified status indicator.

[0079] S108. Determine whether the change in the detected specified state index exceeds the second preset threshold.

[0080] S109. If the second preset threshold is exceeded, the burst transmission parameters are adjusted.

[0081] Once the specified status indicator reaches or exceeds the first preset threshold, the verification environment enters the "steady-state observation" mode to continue monitoring the specified status indicator. If the change in the specified status indicator is large within a short period of time, the burst transmission parameters need to be adjusted.

[0082] If the change in the specified state indicator is small or unchanged, it means that the burst transmission parameter of the specified state indicator reaching or exceeding the preset threshold can put the first interconnection structure under extreme pressure. This state can be maintained for further analysis as needed.

[0083] To efficiently perform stress verification on interconnect structures of the same type as the first interconnect structure, in some examples, after adjusting the initial burst transmission parameters in step S105 until the value of the specified state indicator reaches or exceeds a first preset threshold, the method of this embodiment further includes: S110. Record or save the burst transmission parameters when the specified state index reaches or exceeds a preset threshold, as the initial burst transmission parameters for stress verification of the second interconnection structure.

[0084] The second interconnect structure is of the same type as the first interconnect structure. By reusing the burst transmission parameters determined in this embodiment that enable the first interconnect structure to be under extreme pressure to a second interconnect structure of the same type as the first interconnect structure, the efficiency of pressure verification of the second interconnect structure can be improved.

[0085] In such Figure 3In one specific embodiment shown, the device under test (DUT) includes a caching module (Fifo data), a request forwarding module (Fifo pull) (the caching module and the request forwarding module can be collectively referred to as the Downstream Management Module) and a first interconnection structure (also called the data exchange matrix (Fabric Data)). The DUT is a typical multi-level interconnection structure system based on credit-based flow control. Its specific working principle is as follows: 1. Flow Injection and Flow Control Mechanisms The system's entry point is a caching module, responsible for data generation, cache management, and injection control. This module employs a strict request-grant closed-loop flow control mechanism. Token Mechanism: Data transmission requires sufficient credit limits. The burst sender does not send data directly; instead, it first receives pull requests from the data acquisition module. For a pull request to originate from the caching module, it must first acquire a token from the caching module, indicating available space. Each time a token is acquired, the token count is decremented by one.

[0086] Burst Generation: The Burst transmitter has programmable burst generation capabilities. It can accumulate data locally or wait to accumulate a certain number of tokens (i.e., the "storage" phase), and then continuously write a large number of data packets to the cache module in a short period of time (i.e., the "flood discharge" phase), thereby forming high-density burst traffic.

[0087] Data transmission: When there is data in the cache module and the reverse voltage signal (Ready) given by the first interconnection structure is high, the data packet is sent to the first interconnection structure. For each data packet sent, the token count is incremented by one.

[0088] In practice, the performance of this DUT is constrained by both "flow control closed loop" and "physical cache depth": 1. Physical limit of Inflight: The total number of data packets that can be accommodated simultaneously within the first interconnect structure, which mainly depends on the total capacity of all cascaded double buffers.

[0089] 2. Shifting the transmission bottleneck: Under low load, data packets arrive and are processed immediately, and the buffer is idle. Under saturated load (which is the focus of this application), arbitration conflicts at the Mux selector cause the buffer to fill up, and the first interconnect structure is in the "maximum in transit" state, at which point the latency is the highest. Under over-saturation, due to the limited total number of tokens or entry bandwidth, excess data accumulates in the cache and cannot enter the first interconnection structure, causing the first interconnection structure to actually degenerate into serial transmission, and the internal concurrency actually decreases.

[0090] For the above-mentioned test subjects, such as Figure 4 and Figure 5 In the illustrated embodiment, the verification environment in this application includes a burst generator, a smart detector, and an adaptive adjustment module.

[0091] The Burst Generator injects controlled burst traffic into the input of the first interconnect structure. Its output should conform to the DUT's input interface protocol.

[0092] Adjustable burst transmission parameters mainly include: the request quantity threshold `block_cnt` and the burst quantity `burst_cnt`, where... block_cnt indicates how many requests must be accumulated before sending; burst_cnt indicates the number of data packets sent in each burst.

[0093] like Figure 5 As shown, the burst transmitter starts two processes. The first process waits for the number of Block_cnt request requests received, while the second process, a watchdog, handles situations such as initializing the tested object if an exception occurs. When the number of received request requests reaches a first threshold, a burst_cnt number of data packets are sent at once.

[0094] The intelligent detector can monitor key metrics of the first interconnect structure in real time to determine the degree of congestion. The monitored metrics include: maximum concurrent pending and maximum packet latency.

[0095] Maximum Concurrent Pending: The maximum number of pending data packets within the tested object during any given simulation cycle. This is an important indicator of network congestion.

[0096] Maximum Packet Latency: This measures the maximum number of cycles taken for a data packet to travel from the input port of the device under test (DUT) to the output port. Increased latency typically indicates network congestion.

[0097] Weighted Synthesized Metric (WSM): This metric combines the two metrics (maximum concurrency and maximum latency) with weights to form a single metric that comprehensively reflects network congestion. For example, WSM = w1 * Max_Concurrent + w2 * Max_Delay, where w1 and w2 are pre-defined weighting factors used to balance the importance of the two metrics.

[0098] In practical applications, strategies such as setting weights and adjusting burst transmission parameters can be used to purposefully guide the verification process to a specific level of congestion.

[0099] The working process of the adaptive adjustment module: 1. Set the initial burst transmission parameters.

[0100] 2. Start stress verification: the burst transmitter sends data traffic according to the initial burst transmission parameters.

[0101] The data acquisition module requests data from the data forwarding module via network routing (Fabric Pull). Before forwarding the request, the forwarding module checks the number of tokens in the cache module. If the number of tokens is greater than 1, a token can be obtained, the request is forwarded to the burst sender, and the number of tokens in the cache module is decremented by 1. The maximum value of the token is the maximum number of data packets the cache module can store. When the first interconnect structure retrieves a data packet from the cache module, the token number is decremented by 1.

[0102] When the cumulative number of data request requests received by the burst transmitter reaches block_cnt, a burst of data packets of the number block_cnt is injected into the cache module.

[0103] 3. The intelligent detection module calculates and updates WSM in real time.

[0104] The intelligent detection module detects the maximum concurrency and maximum latency in real time and calculates the WSM according to the signing formula.

[0105] Determine whether the current WSM has reached the congestion threshold.

[0106] If the WSM has not reached the congestion threshold and is still within the verification time, then block_cnt and block_cnt are fine-tuned.

[0107] The specific fine-tuning strategy is as follows: adjust according to the changing trend of WSM. For example, if increasing block_cnt or burst_cnt causes a significant increase in WSM, then the direction is considered "correct" and should continue to be increased; otherwise, decrease it. Specifically, a simple gradient descent or hill-climbing approach can be used to make small adjustments to one or more parameters, repeat steps 2-3, and observe the changes in WSM.

[0108] If the WSM reaches the threshold (FIFO full or severely congested), the verification environment enters "steady-state observation" mode, or remains in this state for further analysis as needed.

[0109] If WSM fails to improve or becomes stuck within the preset time, you can try switching parameter adjustment strategies, such as changing from increasing parameters to decreasing parameters, or starting a new parameter exploration process.

[0110] 4. Termination.

[0111] The verification ends when the preset verification time is reached, the congestion target is reached, or all parameter combinations are explored.

[0112] Applying the above embodiments can alleviate the burden on verification engineers of manually designing complex stress test cases and monitoring verification over long periods. Furthermore, the verification method of this embodiment is automated and exploratory; it is not merely a verification of fixed parameters, but actively seeks parameter combinations that may cause a sharp decline in network performance or specific states (such as a full FIFO), thus comprehensively covering all potential congestion patterns and improving coverage.

[0113] Figure 6 A schematic diagram of the structure of the pressure verification device with interconnected structure provided in an embodiment of this application is shown below. Figure 6As shown, the stress verification device for interconnect structures in this embodiment is applied to a stress verification environment for interconnect structures. The device includes: a setting module 11, used to set initial burst transmission parameters for stress verification of the first interconnect structure to be verified; a sending module 12, used to initiate stress verification for the first interconnect structure, wherein a burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters; a detection module 13, used to detect a specified state indicator of the first interconnect structure; the magnitude of the specified state indicator represents the congestion level of the first interconnect structure; a judgment module 14, used to judge whether the value of the specified state indicator reaches a first preset threshold; wherein the first preset threshold is the value of the specified state parameter when the first interconnect structure is under extreme stress; and an adjustment module 15, used to adjust the initial burst transmission parameters if the value of the specified state indicator does not reach the first preset threshold, until the value of the specified state indicator reaches or exceeds the first preset threshold, so as to perform stress verification on the first interconnect structure.

[0114] The apparatus of this embodiment can be used to perform Figure 1 The technical solutions of the method embodiments shown are similar in principle and in effect, and will not be described again here.

[0115] In this embodiment, the device initiates stress verification on the first interconnect structure. The burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters and detects a specified status indicator of the first interconnect structure. The magnitude of the specified status indicator represents the congestion level of the first interconnect structure. It is determined whether the value of the specified status indicator has reached a first preset threshold. If the value of the specified status indicator has not reached the first preset threshold, the initial burst transmission parameters are adjusted until the value of the specified status indicator reaches or exceeds the first preset threshold. The first preset threshold is the value of the specified status parameter when the first interconnect structure is under extreme stress. Thus, when the value of the specified status indicator reaches or exceeds the first preset threshold, the first interconnect structure is under extreme stress. By adjusting the burst transmission parameters based on the value of the specified status indicator, the first interconnect structure is under extreme stress when the value of the specified status indicator reaches or exceeds the first preset threshold. In other words, by aiming for the value of the specified status indicator to reach or exceed the first preset threshold, the adjustment of the burst transmission parameters has direction, thereby facilitating the reduction of the stress verification time for the first interconnect structure.

[0116] As an optional implementation, the initial burst transmission parameters include a request quantity threshold and a burst quantity; wherein, the transmission module is specifically used for: receiving data request requests sent by the data acquisition module; when the cumulative number of received data request requests reaches the request quantity threshold, sending data packets of the burst quantity to the cache module in the chip, so as to send data traffic from the cache module to the first interconnect structure.

[0117] As an optional implementation, the specified status indicator includes the number of concurrent data packets of unprocessed data packets in the first interconnection structure; wherein, the detection module is specifically used to: detect the number of concurrent data packets corresponding to the first interconnection structure within a first preset time period; the adjustment module is specifically used to: adjust the initial burst transmission parameters if the number of concurrent data packets does not reach a preset data packet threshold; or, the specified status indicator includes the delay time of data packets; wherein, the detection module is specifically used to: detect the time elapsed from the entry of a data packet into the first interconnection structure to the exit of the first interconnection structure within a second preset time period, and use the elapsed time as the delay time; the adjustment module is specifically used to: adjust the initial burst transmission parameters if the delay time does not reach a preset first time threshold. The parameters are adjusted; or, the specified status indicators include the number of concurrent data packets and the delay time of unprocessed data packets in the first interconnection structure; the detection module is specifically used to: detect the number of concurrent data packets corresponding to the first interconnection structure within a third preset time period; detect the time taken for a data packet to travel from entering the first interconnection structure to leaving the first interconnection structure within a fourth preset time period, and use the time taken as the delay time; the device further includes: a synthesis module, used to weight and sum the number of concurrent data packets and the delay time to obtain a current synthesis parameter value before the adjustment module adjusts the initial burst transmission parameters; the adjustment module is specifically used to: adjust the initial burst transmission parameters if the current synthesis parameter value does not reach a preset synthesis threshold.

[0118] As an optional implementation, the adjustment module is specifically used to: if the current burst transmission parameter is greater than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then add the current burst transmission parameter to a first positive value to obtain a new burst transmission parameter; or, if the current burst transmission parameter is less than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then add the current burst transmission parameter to a first negative value to obtain a new burst transmission parameter.

[0119] As an optional implementation, the device is further configured to: after the adjustment module adjusts the initial burst transmission parameters until the specified state indicator reaches or exceeds a first preset threshold, detect the specified state indicator within a fifth preset time period; determine whether the change in the detected specified state indicator exceeds a second preset threshold; and if it exceeds the second preset threshold, adjust the burst transmission parameters.

[0120] As an optional implementation, the device is further configured to: after the adjustment module adjusts the initial burst transmission parameters until the value of the specified state indicator reaches or exceeds a first preset threshold, record or save the burst transmission parameters when the specified state indicator reaches or exceeds the preset threshold, as initial burst transmission parameters for stress verification of the second interconnect structure; wherein the second interconnect structure and the first interconnect structure are interconnect structures of the same type.

[0121] The apparatus described in the above embodiments can be used to execute the technical solutions of the above method embodiments. The implementation principle and technical effects are similar, and will not be repeated here.

[0122] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, as shown below. Figure 7 As shown, it may include a processor 61 and a memory 62, wherein the memory 62 is used to store executable program code; the processor 61 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 62, which is used to execute the stress verification method of any interconnect structure provided in the foregoing embodiments, and thus can also achieve the corresponding beneficial technical effects, which have been described in detail above and will not be repeated here.

[0123] The aforementioned electronic devices exist in various forms, including but not limited to: (1) Personal computer devices: These devices have computing and processing functions and generally also have mobile Internet access capabilities.

[0124] (2) Server: A device that provides computing services. The components of a server include a processor, hard disk, memory, system bus, etc. Servers are similar to general computer architectures, but because they need to provide highly reliable services, they have higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability.

[0125] (3) Other electronic devices with data interaction functions.

[0126] Accordingly, embodiments of this application also provide a computer-readable storage medium storing one or more programs, which can be executed by one or more processors to implement the stress verification method of any interconnect structure provided in the foregoing embodiments, thus achieving the corresponding technical effects. This has been described in detail above and will not be repeated here.

[0127] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0128] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0129] In particular, the device embodiment is basically similar to the method embodiment, so the description is relatively simple. For relevant details, please refer to the description of the method embodiment.

[0130] For ease of description, the above apparatus is described by dividing it into various functional units / modules. Of course, in implementing this application, the functions of each unit / module can be implemented in one or more software and / or hardware.

[0131] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0132] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A stress verification method for an interconnect structure, characterized in that, The method, applied to a stress verification environment for interconnect structures, includes: For the first interconnect structure to be verified, set the initial burst transmission parameters for stress verification; Stress verification is initiated on the first interconnect structure, and the burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters; Detect a specified status indicator of the first interconnect structure; the magnitude of the specified status indicator represents the congestion level of the first interconnect structure. Determine whether the value of the specified state indicator reaches a first preset threshold; wherein, the first preset threshold is the value of the specified state parameter when the first interconnect structure is under extreme pressure. If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted until the value of the specified status indicator reaches or exceeds the first preset threshold, so as to perform stress verification on the first interconnection structure.

2. The method according to claim 1, characterized in that, The initial burst sending parameters include the request quantity threshold and the burst quantity; The burst transmitter sends data traffic to the first interconnect structure according to the initial burst transmission parameters, including: The burst transmitter receives data request messages sent by the data acquisition module; When the cumulative number of received data request requests reaches the request number threshold, the burst of data packets is sent to the cache module in the chip to send data traffic from the cache module to the first interconnect structure.

3. The method according to claim 1, characterized in that, The specified status indicator includes the number of concurrent data packets of unprocessed data packets in the first interconnection structure; wherein, detecting the specified status indicator of the first interconnection structure includes: Within a first preset time period, detect the number of concurrent data packets corresponding to the first interconnection structure; If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted, including: If the number of concurrent data packets does not reach the preset data packet threshold, the initial burst transmission parameters are adjusted; or, The specified status indicator includes the data packet delay time; wherein, detecting the specified status indicator of the first interconnection structure includes: Within a second preset time period, the time elapsed from when the data packet enters the first interconnect structure to when it leaves the first interconnect structure is detected, and the elapsed time is used as the delay time. If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted, including: If the delay time does not reach the preset first time threshold, then the initial burst transmission parameters are adjusted; or, The specified status indicators include the number of concurrent data packets and the latency of unprocessed data packets in the first interconnection structure; detecting the specified status indicators of the first interconnection structure includes: Within a third preset time period, the number of concurrent data packets corresponding to the first interconnection structure is detected; Within a fourth preset time period, the time elapsed from when the data packet enters the first interconnect structure to when it leaves the first interconnect structure is detected, and the elapsed time is used as the delay time. Before adjusting the initial burst transmission parameters, the method further includes: The current synthesis parameter value is obtained by weighted summing of the number of concurrent data packets and the delay time; If the value of the specified status indicator does not reach the first preset threshold, the initial burst transmission parameters are adjusted, including: If the current synthesis parameter value does not reach the preset synthesis threshold, the initial burst transmission parameter is adjusted.

4. The method according to claim 1, characterized in that, Adjusting the initial burst transmission parameters includes: If the current burst transmission parameter is greater than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then the current burst transmission parameter is added to the first positive value to obtain a new burst transmission parameter; or, If the current burst transmission parameter is less than the previous burst transmission parameter, and the current value of the specified status indicator is greater than the previous value of the specified status indicator, then the current burst transmission parameter is added to the first negative value to obtain a new burst transmission parameter.

5. The method according to claim 1, characterized in that, After adjusting the initial burst transmission parameters until the specified state indicator reaches or exceeds a first preset threshold, the method further includes: Within a fifth preset time period, the specified state indicator is detected; Determine whether the change in the detected specified state indicator exceeds a second preset threshold. If the second preset threshold is exceeded, the burst transmission parameters are adjusted.

6. The method according to claim 1, characterized in that, After adjusting the initial burst transmission parameters until the value of the specified state indicator reaches or exceeds a first preset threshold, the method further includes: Record or save the burst transmission parameters when the specified state index reaches or exceeds a preset threshold, as the initial burst transmission parameters for stress verification of the second interconnect structure; wherein the second interconnect structure is the same type of interconnect structure as the first interconnect structure.

7. A pressure verification device with an interconnected structure, characterized in that, The apparatus, used in a stress verification environment for interconnect structures, includes: The configuration module is used to set the initial burst transmission parameters for stress verification of the first interconnect structure to be verified. The sending module is used to initiate stress verification on the first interconnect structure, and the burst transmitter sends data traffic to the first interconnect structure according to the initial burst sending parameters; The detection module is used to detect a specified status indicator of the first interconnect structure; the magnitude of the specified status indicator represents the congestion level of the first interconnect structure. The judgment module is used to determine whether the value of the specified state indicator reaches a first preset threshold; wherein, the first preset threshold is the value of the specified state parameter when the first interconnect structure is under extreme pressure. An adjustment module is used to adjust the initial burst transmission parameters if the value of the specified status indicator does not reach a first preset threshold, until the value of the specified status indicator reaches or exceeds the first preset threshold, so as to perform stress verification on the first interconnection structure.

8. The apparatus according to claim 7, characterized in that, The initial burst transmission parameters include a request quantity threshold and a burst quantity; wherein, the transmission module is specifically used for: The burst transmitter receives data request messages sent by the data acquisition module; When the cumulative number of received data request requests reaches the request number threshold, the burst of data packets is sent to the cache module in the chip to send data traffic from the cache module to the first interconnect structure.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory, wherein the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the method described in any one of claims 1-6.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, which can be executed by one or more processors to implement the method described in any one of claims 1-6.

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