Training system, prediction system, and training method

Abstract

The present application relates to a training system, a prediction system and a training method. A training system, a training method, a prediction system, a prediction method, a computer readable recording medium storing a program therein and a non-transitory computer program product, wherein the training method is executed by a processing module; a to-be-trained module includes a neural network model and a plurality of parameters; the to-be-trained module is configured to receive a network input and generate a network output based on the network input, the neural network model and the plurality of parameters; the training method includes the following steps: receiving training data, wherein each training data includes training input data and label data, the training input data includes a stress time of one of the reference circuits, a plurality of element ratios corresponding to a plurality of basic elements, a driving strength, an operating voltage; and the label data includes a speed decay rate; and training the to-be-trained module based on the training data.

Description

Technical Field

[0001] This invention relates to the field of circuit aging simulation, specifically the application of neural networks in circuit aging prediction. Background Technology

[0002] To determine the impact of aging on the speed of a digital standard cell circuit, existing technologies require spice simulation. This involves using a specific spice aging model provided by the semiconductor wafer manufacturer (Fab) and the user's aging conditions (such as High Temperature Operation Life (HTOL) or Stress Condition) to obtain the parameters (such as Idsat, Vth, etc.) of the NMOS or PMOS device before and after aging. This data is then used for further simulation to obtain the speed degradation ratio of the digital standard cell circuit and to evaluate the final aging speed. Summary of the Invention

[0003] In view of the above, some embodiments of the present invention provide a training system, a training method, a prediction system, a prediction method, a computer-readable recording medium containing stored programs, and a non-transitory computer program product to improve the problems of the prior art.

[0004] Some embodiments of the present invention provide a training system comprising a processing module and a module to be trained; the processing module is configured to receive training data, wherein each training data includes training input data and label data, the training input data including a pressure time of a reference circuit, a plurality of component ratios corresponding to a plurality of basic components, drive strength, and operating voltage; the label data including a speed decay rate; and the module to be trained including a neural network model and a plurality of parameters; the module to be trained is configured to receive network input and generate network output based on the network input, the neural network model, and the parameters; wherein the processing module is configured to train the module to be trained based on the aforementioned training data.

[0005] Some embodiments of the present invention provide a training method for training a module to be trained, executed by a processing module; the module to be trained includes a neural network model and multiple parameters; the module to be trained is configured to receive network input and generate network output based on the network input, the neural network model, and the aforementioned parameters; the training method includes performing the following steps: receiving training data, wherein each training data includes training input data and label data, the training input data including a pressure time in a reference circuit, multiple component ratios corresponding to multiple basic components, drive strength, and operating voltage; and the label data including a speed decay rate; and training the module to be trained based on the training data.

[0006] Some embodiments of the present invention provide a prediction system comprising a neural network module and a prediction processing module; the neural network module includes a prediction neural network model configured to have the same architecture as the neural network model, the neural network module is configured to store the plurality of parameters trained by the aforementioned training system and is configured to receive an input to be predicted, and generate a prediction output of the input to be predicted based on the input to be predicted, the prediction neural network model and the aforementioned parameters; and the prediction processing module is configured to input feature data of the circuit to be predicted as the input to be predicted into the neural network module to obtain a prediction output, wherein the feature data includes the stress time of the circuit to be predicted, the ratio of a plurality of components corresponding to basic components, the driving intensity and the operating voltage.

[0007] Some embodiments of the present invention provide a prediction method, comprising: a prediction processing module inputting feature data of a circuit to be predicted as prediction input to a neural network module, wherein the feature data includes the pressure time, multiple component ratios of corresponding basic components, driving intensity, and operating voltage of the circuit to be predicted; and the neural network module receiving the prediction input and generating a prediction output of the prediction input data based on the prediction input, the prediction neural network model of the neural network module, and parameters trained by the aforementioned training method; wherein the prediction neural network model has the same architecture as the neural network model.

[0008] Some embodiments of the present invention provide a computer-readable medium containing a stored program and a non-transitory computer program product, which can complete the aforementioned training method after the processing unit loads and executes the program.

[0009] Based on the above, some embodiments of the present invention provide a training system, a training method, a prediction system, a prediction method, a computer-readable recording medium containing stored programs, and a non-transitory computer program product. By training to obtain multiple parameters of a neural network model corresponding to a basic component and applying the aforementioned neural network model and the prediction system using the multiple parameters of the neural network model, the speed degradation rate can be predicted in the laboratory when no aging model is provided. The prediction system using the aforementioned neural network model and the multiple parameters of the neural network model can be reused to predict aging results under various operating voltage and stress time conditions, thereby avoiding repeated actual circuit aging simulations and saving resources and time. Attached Figure Description

[0010] Figure 1 This is a block diagram of a training system drawn according to an embodiment of the present invention.

[0011] Figure 2 This is a schematic diagram of a neural network model illustrated according to some embodiments of the present invention.

[0012] Figure 3 The reference circuit diagram is drawn according to some embodiments of the present invention.

[0013] Figure 4 This is a schematic diagram of training input data illustrated according to some embodiments of the present invention.

[0014] Figure 5 The graph illustrates the relationship between speed decay rate and pressure time, based on some embodiments of the present invention.

[0015] Figure 6 These are schematic diagrams illustrating training results based on some embodiments of the present invention.

[0016] Figures 7 to 10 These are schematic diagrams illustrating the performance of a prediction system based on some embodiments of the present invention.

[0017] Figure 11 This is a schematic diagram illustrating the training and prediction process according to an embodiment of the present invention.

[0018] Figure 12 This is a block diagram of a prediction system drawn according to some embodiments of the present invention.

[0019] Figure 13 This is a block diagram of an electronic device system illustrated according to some embodiments of the present invention.

[0020] Figure 14 This is a flowchart illustrating a training method based on some embodiments of the present invention.

[0021] Figure 15This is a flowchart illustrating a training method based on some embodiments of the present invention.

[0022] Figure 16 The flowchart illustrates a prediction method based on some embodiments of the present invention. Detailed Implementation

[0023] The foregoing descriptions and other technical contents, features, and effects of this invention will be clearly presented in the following detailed description of embodiments with reference to the accompanying drawings. Any modifications and alterations that do not affect the effects and objectives achieved by this invention should still fall within the scope of the technical contents disclosed in this invention. In all drawings, the same reference numerals will be used to denote the same or similar elements.

[0024] Figure 1 This is a block diagram of a training system drawn according to an embodiment of the present invention. Please refer to [link / reference]. Figure 1 The training system 100 includes a processing module 101 and a training module 102. The processing module 101 is configured to receive at least one training data set, each containing training input data and label data. The training input data includes stress time, component ratios corresponding to multiple basic components, drive strength, and operating voltage of a benchmark circuit; the label data includes the speed decay rate of the benchmark circuit. The training module 102 includes a neural network model 103 and multiple parameters. The training module 102 is configured to receive network input and generate a network output based on the network input, the neural network model 103, and the multiple parameters. The speed decay rate of the benchmark circuit is the ratio of the rate at which the benchmark circuit decays under user aging conditions (e.g., High Temperature Operation Life (HTOL) or Stress Condition) to the rate at which it decays under normal operation without user aging or stress conditions. For example, if the speed of the reference circuit under normal operation without the user's aging or stress conditions is 1, and the speed of the reference circuit after the user's aging or stress conditions is 0.9, then the speed degradation rate of the reference circuit is 0.9.

[0025] Figure 2 The diagrams illustrate neural network models based on some embodiments of the present invention. Please also refer to... Figure 1 as well as Figure 2In some embodiments of the present invention, the neural network model 103 includes an input layer 201, an intermediate layer 202, and an output layer 203. The input layer 201 includes input neurons 2011–201p, where p is a positive integer. Input neurons 2011–201p are configured to receive network inputs respectively, and the input value obtained by input neuron 201k is x. k-1 Where k = 1, 2, ..., p. The intermediate layer 202 contains four hidden layers: hidden layers 2021 to 2024. Hidden layer 2021 contains neurons 20211 to 2021q, hidden layer 2022 contains neurons 20221 to 2022r, hidden layer 2023 contains neurons 20231 to 2023s, and hidden layer 2024 contains neurons 20241 to 2024t, where q, r, s, and t are positive integers. The output layer 203 contains output neuron 2031. The output layer 203 outputs the network output y.

[0026] The input layer 201, hidden layers 2021-2024, and output layer 203 are interconnected via multiple connection paths in a fully-connected manner. That is, as... Figure 2 As illustrated, each of the input neurons 2011 to 201p in the input layer 201 is connected to each of the neurons 20211 to 2021q in the hidden layer 2021 via a connection path, each of the neurons 20211 to 2021q in the hidden layer 2021 is connected to each of the neurons 20221 to 2022r in the hidden layer 2022 via a connection path, ..., and each of the neurons 20241 to 2024t in the hidden layer 2024 is connected to the output neuron 2031 in the output layer 203 via a connection path.

[0027] All the aforementioned connection paths contain a weight. In the connection paths of input layer 201 and hidden layer 2021, the weight of the connection path between input neuron 2011 and neuron 20211 is... …, the weights of the connection paths between input neuron 2011 and neuron 2021q are… The weights of the connection paths between input neuron 201p and neuron 20211 are: …, the weights of the connection paths between input neurons 201p and 2021q are… And so on.

[0028] In the connection paths of hidden layers 2021 and 2022, the weights of the connection paths between neurons 20211 and 20221 are: …, the weights of the connection paths between neurons 20211 and 2022r are… The weights of the connection paths between neurons 2021q and 20221 are: …, the weights of the connection paths between neurons 2021q and 2022r are… And so on. In the connection paths of hidden layers 2022 and 2023, the weights of the connection paths between neurons 20221 and 20231 are... …, the weights of the connection paths between neurons 20221 and 2023s are… The weights of the connection paths between neurons 2022r and 2023s are: …, the weights of the connection paths between neurons 2022r and 2023s are… And so on. In the connection paths of hidden layers 2023 and 2024, the weights of the connection paths between neurons 20231 and 20241 are... …, the weights of the connection paths between neurons 20231 and 2024t are… The weights of the connection paths between neurons 20231 and 20241 are: …, the weights of the connection paths between neurons 2023s and 2024t are… And so on.

[0029] In the connection paths of hidden layer 2024 and output layer 203, the weights of the connection paths between neuron 20241 and output neuron 2031 are: …, the weights of the connection paths between neuron 2024t and output neuron 2031 are…

[0030] Neurons 20211–2021q, 20221–2022r, 20231–2023s, and 20241–2024t in the intermediate layer 202, and neuron 2031 in the output layer 203, all contain a bias, a weighted input, and an activation function. For example... Figure 2 As shown in the diagram, neuron 20211 has partial weights. Weighted input The activation function α1, ..., neuron 2021q has partial weights. Weighted input Activation function α1; Neuron 20221 has partial weights Weighted input The activation function α2, ..., neuron 2022r has partial weights. Weighted input Activation function α2; neuron 20231 has partial weights Weighted input The activation function α3, ..., neurons 2023s have partial weights. Weighted input Activation function α3; neuron 20241 has partial weights Weighted input The activation function α4, ..., neuron 2024t has partial weights. Weighted input Activation function α4; output neuron 2031 has partial weights. Weighted input Activation function α5. The following uses neuron 20211 as an example to illustrate how neurons in the intermediate layer 202 and the output layer 203 operate.

[0031] Weighted input The input values ​​of the input neurons 2011 to 201p in the input layer 201 are based on a weighted sum of the weights and partial weights, as shown in the following program (Eq1):

[0032]

[0033] The output of neuron 20211 is The outputs of intermediate layer 202 and output layer 203 are analogous to those described above. The activation functions α1 to α5 can be preset as needed. In some embodiments of this invention, activation functions α1 to α5 are set as sigmoid functions. It is worth noting that activation functions α1 to α5 do not necessarily have to be the same. For example, activation function α5 can be set to a different function than activation functions α1 to α4.

[0034] In this embodiment, the parameters of the module 102 to be trained include the weights of all the aforementioned connection paths, the partial weights of all neurons, and the output neuron.

[0035] Figure 11 This is a schematic diagram illustrating the training and prediction process according to an embodiment of the present invention. Please refer to... Figure 11In some embodiments of the present invention, the processing module 101 loads a training dataset 1104 from the database 1100 to train the module 102 to be trained. The training dataset 1104 includes at least one of the aforementioned training data. The database 1100 includes an aging simulation database 1102 completed by aging simulation using a reference circuit 1103 composed of pre-planned basic components, and a high-temperature operating life test silicon data database 1101 consisting of test lines of the reference circuit 1103 composed of the aforementioned pre-planned basic components, measured under different stress times and operating voltages during high-temperature operating life tests (HTOL).

[0036] In some embodiments of the present invention, the aforementioned reference circuit 1103 is a ring oscillator, wherein the ring oscillator includes an enable stage and an even number of inverter stages, each of the aforementioned inverter stages having the same drive strength, and each of the plurality of inverter stages being composed of one of the aforementioned basic elements. The component ratios of the reference circuit corresponding to the plurality of basic elements in the aforementioned training data are the component ratios of the aforementioned inverter stages corresponding to the aforementioned basic elements.

[0037] Figure 3 The circuit diagrams shown are based on some embodiments of the present invention. Please refer to [link / reference]. Figure 3 In some embodiments of the present invention, the aforementioned basic elements include inverter elements, NAND gate elements, NOR gate elements, and XOR gate elements. The aforementioned ring oscillator is illustrated as ring oscillator 300. Ring oscillator 300 includes an enable stage 301 and inverter stages 302 to 3033 (i.e., the number of inverter stages 302 to 3033 is 32). Each of inverter stages 302 to 3032 has a fan-out of 3. Each of inverter stages 302 to 3033 has the same drive strength, and each of inverter stages 302 to 3033 is composed of one of the aforementioned basic elements. In this embodiment, the aforementioned drive strength includes three levels: D1, D2, and D4.

[0038] Figure 4 This is a schematic diagram of training input data illustrated according to some embodiments of the present invention. Please also refer to... Figures 3 to 4In some embodiments of the present invention, the pressure time is measured in years, and the operating voltage is measured in volts. In this embodiment, the values ​​1, 2, and 4 represent three levels, D1, D2, and D4, respectively. In the training input data 401, the value corresponding to the pressure time of 0.0571 indicates that the pressure time of the aging simulation is 500 hours; the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutually exclusive OR gate element are 1.0, 0.0, 0.0, and 0.0, respectively, indicating that the inverter stages 302 to 3033 are entirely composed of inverter elements. The value corresponding to the drive strength of 1.0 indicates that the drive strength of each of the inverter stages 302 to 3033 is D1. The value corresponding to the operating voltage of 0.95 indicates that the operating voltage of the aging simulation is 0.95 volts. In the training input data 402, the value corresponding to the pressure time is 2, indicating that the pressure time of the aging simulation is 2 years; the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutually exclusive OR gate element are 0.25, 0.25, 0.25, and 0.25, respectively, indicating that inverter stages 302 to 3033 are composed of inverter elements in 1 / 4 (0.25) proportion, reverse gate elements in 1 / 4 (0.25) proportion, reverse OR gate elements in 1 / 4 (0.25) proportion, and mutually exclusive OR gate elements in 1 / 4 (0.25) proportion (for example, inverter stages 302 to 309 are composed of inverter elements, inverter stages 3010 to 3017 are composed of reverse gate elements, inverter stages 3018 to 3025 are composed of reverse OR gate elements, and inverter stages 3026 to 3033 are composed of mutually exclusive OR gate elements). The aforementioned ratio is also referred to as the component ratio corresponding to the basic components (in this embodiment, the basic components are inverter components, inverse gate components, inverse OR gate components, and mutually exclusive OR gate components). A value of 2.0 corresponding to the drive strength indicates that the drive strength of each of inverter stages 302 to 3033 is D2. A value of 0.75 corresponding to the operating voltage indicates that the operating voltage for the aging simulation is 0.75 volts.

[0039] Figure 5 The speed decay rate versus pressure-time relationship diagram is illustrated based on some embodiments of the present invention. Please refer to... Figure 5 The aforementioned reference circuit 1103 is an embodiment of a ring oscillator 300 (containing an enable stage 301 and 32 inverter stages 302-3033, each with a fan-out of 3). Figure 5In the illustrated example, the operating voltage of the aging simulation is 0.95 volts, the temperature of the aging simulation conditions is 150°C, and the drive intensity of each of the inverter stages 302 to 3033 is D1. The lines marked as mixed type represent that the inverter stages 302 to 3033 are composed of a mixture of inverter elements, reverse gate elements, reverse OR gate elements, and mutually exclusive OR gate elements. The lines marked as inverter elements represent that the inverter stages 302 to 3033 are composed entirely of inverter elements, and so on.

[0040] Depend on Figure 5 It is known that, on the same reference circuit, even if the drive strength, operating voltage, and component ratio of the corresponding basic components (in this embodiment, the basic components are inverter components, inverted gate components, inverted or gate components, and mutually exclusive or gate components) of each of the inverter stages 302 to 3033 are fixed, there is no simple functional relationship between the speed decay rate of the reference circuit and the pressure time.

[0041] The following is a detailed description, with reference to the accompanying drawings, of the training methods of some embodiments of the present invention and how the modules of the training system 100 work together.

[0042] Figure 14 This is a flowchart illustrating a training method based on some embodiments of the present invention. Please also refer to... Figure 1 , Figure 2 as well as Figure 14 ,exist Figure 14 In the illustrated embodiment, the training method is executed by processing module 101 to train module 102. The training method includes steps S1401 to S1402 executed by processing module 101. In step S1401, at least one set of training data is received, wherein each set of training data includes training input data and label data, and the training input data includes one of the reference circuits (e.g.,...). Figure 3 The training data includes the pressure time of the ring oscillator 300, the ratio of multiple basic components, the drive strength of the basic components constituting the reference circuit, and the operating voltage. The tag data includes the speed decay rate. In step S1402, the training module 102 is trained based on the aforementioned training data to obtain the trained values ​​of these multiple parameters.

[0043] In the foregoing embodiments, by training a neural network model corresponding to a basic component, multiple parameters can be obtained. This allows the neural network model to be repeatedly used to predict aging results under various operating voltages and stress times, thereby avoiding repeated simulations of actual circuit aging and saving resources and time.

[0044] Figure 15 This is a flowchart illustrating a training method based on some embodiments of the present invention. Please also refer to... Figure 1 , Figure 14as well as Figure 15 In some embodiments of the present invention, the aforementioned step S1402 is included in the execution of steps S1501 to S1502 within a training epoch. In step S1501, the processing module 101 repeatedly performs the following steps: using the training input data of the current data from the aforementioned at least one training data set as the network input of the module 102 to be trained; and obtaining a loss based on the network output of the module 102 to be trained and the label data of the current data. In step S1502, the processing module 101 updates the parameters of the module 102 to be trained based on the average of all losses obtained in step S1501 and the update algorithm used by the processing module 101.

[0045] In some embodiments of the present invention, the aforementioned loss is the mean squared error. In some embodiments of the present invention, the aforementioned update algorithm is the adaptive moment estimation (Adam) method. It is worth noting that the processing module 101 may also employ other update algorithms, such as one of the following: gradient descent (GD), stochastic gradient descent (SGD), momentum method, RMSProp method, and Adagrad method.

[0046] Figure 6 These are schematic diagrams illustrating training results based on some embodiments of the present invention. Please also refer to... Figures 1 to 3 as well as Figure 6 In this embodiment, the neural network model 103 is as follows: Figure 2 As illustrated, activation functions α1 to α5 are set to sigmoid functions. At the start of training, processing module 101 randomly sets the initial values ​​of the weights of all connections, all neurons, and the partial weights of the output neurons based on a probability distribution (e.g., a normal distribution). Processing module 101 can use software-simulated random functions provided by general programming languages, such as the `random()` function of the `random` module in Python, to randomly set the initial values ​​of the weights of all connections, all neurons, and the partial weights of the output neurons. The aforementioned reference circuit 1103 is illustrated as a ring oscillator 300. The aforementioned basic components include inverter elements, inverting gate elements, inverting OR gate elements, and mutually exclusive OR gate elements. Training input data is as follows: Figure 4The diagram shows 1080 sets of data. Processing module 101 performs 10,000 training iterations (i.e., 10,000 training epochs) with a batch size of 90. The aforementioned loss uses mean squared error, and the aforementioned update algorithm is an adaptive moment estimation method. After training, processing module 101 obtains the post-training values ​​of the weights of all connection paths, all neurons, and the partial weights of the output neurons. Figure 6 The illustration shows the Figure 4 The training input data shown is used as network input to the neural network model 103, which uses the trained values ​​to generate the network output and corresponding data. Figure 4 The plot shows the comparison results of the labeled data of the training input data, where the horizontal axis represents the index of the training input data.

[0047] Figure 12 This is a block diagram of a prediction system illustrated according to some embodiments of the present invention. Please refer to [link / reference]. Figure 12 The prediction system 1200 includes a prediction processing module 1201 and a neural network module 1202. The neural network module 1202 includes a prediction neural network model 12021, which is configured to have the same architecture as the neural network model 103. The neural network module 1202 is configured to receive and store multiple parameters of the training module 102 obtained after training by the training system 100. The neural network module 1202 is also configured to receive the input to be predicted and generate a prediction output corresponding to the input based on the input to be predicted, the prediction neural network model 12021, and the stored parameters.

[0048] The following is a detailed description, with reference to the accompanying drawings, of some embodiments of the prediction method of the present invention and how the various modules of the prediction system 1200 work together.

[0049] Figure 16 The flowchart illustrates a prediction method based on some embodiments of the present invention. Please also refer to... Figure 11 , Figure 12 as well as Figure 16 ,exist Figure 16In the illustrated embodiment, the prediction method includes steps S1601 to S1602. In step S1601, the prediction processing module 1201 inputs the feature data 1105 of the circuit to be predicted as the input to the neural network module 1202, wherein the feature data 1105 includes the pressure time of the circuit to be predicted, the ratio of multiple components corresponding to the basic components, the driving intensity, and the operating voltage. In step S1602, the neural network module 1202 receives the input to be predicted and generates a prediction output 1106 corresponding to the input data (feature data 1105) based on the received input to be predicted, the prediction neural network model 12021 of the neural network module 1202, and the parameters obtained by the training system 100.

[0050] Figures 7 to 10 These are schematic diagrams illustrating the performance of a prediction system based on some embodiments of the present invention. Please also refer to... Figures 7 to 10 Following the above Figure 6 In the illustrated embodiment, the neural network module 1202 is configured to receive and store multiple parameters of the training module 102 obtained after the training system 100 has completed training, and to predict that the neural network model 12021 has the same architecture as the neural network model 103. Figures 7 to 10 The diagram illustrates the test results of the predictive system 1200, which utilizes test data to evaluate its performance. The test data has the same structure as the training data, with each test data set containing both input and label data. The input data includes the stress time, component ratios for multiple basic elements, drive strength, and operating voltage of a benchmark circuit; the label data includes the speed degradation rate of the benchmark circuit.

[0051] Figure 7 The graph depicts the rate of decay of labeled data from multiple sets of test data. Figure 7 The curve formed by the solid line in the middle and the predicted output of the test input data corresponding to multiple sets of test data generated by the neural network module 1202 (the curve is shown in the image). Figure 7 (The dashed line in the middle). Figure 7 In the multiple sets of test data, the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutually exclusive OR gate element are 1.0, 0.0, 0.0, and 0.0, respectively (indicating that inverter stages 302 to 3033 are all composed of inverter elements), the value corresponding to the drive strength is 1.0 (indicating that the drive strength of each of inverter stages 302 to 3033 is D1), and the value corresponding to the operating voltage is 0.95 (indicating that the operating voltage of the aging simulation is 0.95 volts). Figure 7 The stress time for multiple sets of test data is Figure 7 The horizontal axis coordinates of each point in the middle.

[0052] Figure 8 The graph depicts the rate of decay of labeled data from multiple sets of test data. Figure 8 The curve formed by the solid line in the middle and the predicted output of the test input data corresponding to multiple sets of test data generated by the neural network module 1202 (the curve is shown in the image). Figure 8 (The dashed line in the middle). Figure 8 In multiple sets of test data, the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutually exclusive OR gate element are 1.0, 0.0, 0.0, and 0.0, respectively. The value corresponding to the drive strength is 1.0, and the value corresponding to the operating voltage is 0.85 (indicating that the operating voltage of the aging simulation is 0.85 volts). Figure 8 The stress time for multiple sets of test data is Figure 8 The horizontal axis coordinates of each point in the middle.

[0053] Figure 9 The graph depicts the rate of decay of labeled data from multiple sets of test data. Figure 9 The curve formed by the solid line in the middle and the predicted output of the test input data corresponding to multiple sets of test data generated by the neural network module 1202 (the curve is shown in the image). Figure 9 (The dashed line in the middle). Figure 9 In multiple sets of test data, the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutual exclusion OR gate element are all not 1 (indicating that inverter stages 302 to 3033 are composed of a mixture of inverter elements, reverse gate elements, reverse OR gate elements, and mutual exclusion OR gate elements), the value corresponding to the drive strength is 1.0 (indicating that the drive strength of each of inverter stages 302 to 3033 is D1), and the value corresponding to the operating voltage is 0.9 (indicating that the operating voltage of the aging simulation is 0.9 volts). Figure 9 The stress time for multiple sets of test data is Figure 9 The horizontal axis coordinates of each point in the middle.

[0054] Figure 10 The graph depicts the rate of decay of labeled data from multiple sets of test data. Figure 10 The curve formed by the solid line in the middle and the predicted output of the test input data corresponding to multiple sets of test data generated by the neural network module 1202 (the curve is shown in the image). Figure 10 (The dashed line in the middle). Figure 10In multiple sets of test data, the values ​​corresponding to the inverter element, the reverse gate element, the reverse OR gate element, and the mutual exclusion OR gate element are all not 1 (indicating that inverter stages 302 to 3033 are composed of a mixture of inverter elements, reverse gate elements, reverse OR gate elements, and mutual exclusion OR gate elements), the corresponding drive strength value is 2.0 (indicating that the drive strength of each of inverter stages 302 to 3033 is D2), and the corresponding operating voltage value is 0.9 (indicating that the operating voltage of the aging simulation is 0.9 volts). Figure 10 The stress time for multiple sets of test data is Figure 10 The horizontal axis coordinates of each point in the middle.

[0055] Figure 13 These are block diagrams of electronic device systems illustrated according to some embodiments of the present invention. Figure 13 As shown, at the hardware level, electronic device 1300 includes a processing unit 1301, internal memory 1302, and non-volatile memory 1303. Internal memory 1302 is, for example, random-access memory (RAM). Non-volatile memory 1303 is, for example, at least one magnetic disk storage device. Of course, electronic device 1300 may also include other hardware required for its functions.

[0056] Internal memory 1302 and non-volatile memory 1303 are used to store programs, which may include program code, including computer operation instructions. Internal memory 1302 and non-volatile memory 1303 provide instructions and data to processing unit 1301. Processing unit 1301 reads the corresponding computer program from non-volatile memory 1303 into internal memory 1302 and then runs it, forming training system 100 or prediction system 1200 at the logical level.

[0057] The processing unit 1301 may be an integrated circuit chip with signal processing capabilities. In implementation, the methods and steps disclosed in the foregoing embodiments can be performed through the integrated logic circuitry of the hardware or instructions in the software form of the processing unit 1301. The processing unit 1301 may be a graphics processor or a general-purpose processor, including a central processing unit, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array, or other programmable logic devices, and can implement or execute the methods and steps disclosed in the foregoing embodiments.

[0058] This specification also provides a computer-readable storage medium that stores at least one instruction. When executed by the processing unit 1301 of the electronic device 1300, the at least one instruction enables the processing unit 1301 of the electronic device 1300 to perform the methods and steps disclosed in the foregoing embodiments.

[0059] Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other internal memory technologies, CD-ROM, digital versatile disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient media, such as modulated data signals and carrier waves.

[0060] Based on the above, some embodiments of the present invention provide a training system, a training method, a prediction system, a prediction method, a computer-readable recording medium containing stored programs, and a non-transitory computer program product. By training to obtain multiple parameters of a neural network model corresponding to a basic component and applying the aforementioned neural network model and the prediction system using the multiple parameters of the neural network model, the speed degradation rate can be predicted in the laboratory when no aging model is provided. The prediction system using the aforementioned neural network model and the multiple parameters of the neural network model can be reused to predict aging results under various operating voltage and stress time conditions, thereby avoiding repeated actual circuit aging simulations and saving resources and time.

[0061] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0062] [Symbol Explanation]

[0063] 100: Training System

[0064] 101: Processing Module

[0065] 102: Module to be trained

[0066] 103: Neural Network Model

[0067] 201: Input Layer

[0068] 2011~201p: Input neurons

[0069] 202: Intermediate Layer

[0070] 2021-2024: Hidden Layer

[0071] 20211~2021q, 20221~2022r, 20231~2023s, 20241~2024t: Neurons

[0072] 203: Output Layer

[0073] 2031: Output Neuron

[0074] x0,…,x p-1 Input value

[0075]

[0076] Weight

[0077] Weighted input

[0078] partial weight

[0079] p, q, r, s, t: positive integers

[0080] α1~α5: Activation functions

[0081] y: Network output

[0082] 300: Ring Oscillator

[0083] 301: Energy Level

[0084] 302~3033: Inverter stage

[0085] 401~402: Training input data

[0086] 1100: Database

[0087] 1101: High-Temperature Service Life Test Silicon Data Database

[0088] 1102: Aging Simulation Database

[0089] 1103: Reference Circuit

[0090] 1104: Training Dataset

[0091] 1105: Feature Data

[0092] 1106: Predicted Output

[0093] 1200: Prediction System

[0094] 1201: Prediction Processing Module

[0095] 1202: Neural Network Module

[0096] 12021: Predictive Neural Network Model

[0097] 1300: Electronic Equipment

[0098] 1301: Processing Unit

[0099] 1302: Internal Memory

[0100] 1303: Non-volatile memory

[0101] S1401~S1402, S1501~S1502, S1601~S1602: Steps.

Claims

1. A training system comprising: A processing module, configured to receive at least one set of training data, wherein, Each training data set includes training input data and label data. The training input data includes a pressure time for at least one reference circuit, a component ratio corresponding to multiple basic components, a drive strength, and an operating voltage. The label data includes a speed decay rate. A module to be trained includes a neural network model and multiple parameters; the module to be trained is configured to receive a network input and generate a network output based on the network input, the neural network model and the multiple parameters. The processing module is configured to train the module to be trained based on the at least one training data.

2. The training system according to claim 1, wherein, The step of training the module to be trained based on the at least one training data is performed in one training round: (a) Repeatedly perform the following steps: using the training input data of the current data from the at least one training dataset as the network input; and obtaining a loss based on the network output and the label data of the current data; as well as (b) Update the multiple parameters based on an average of all the losses obtained in step (a) and an update algorithm.

3. The training system according to claim 2, wherein, The loss is calculated using a mean square error.

4. The training system according to claim 2, wherein, This update algorithm is an adaptive moment estimation method.

5. The training system according to claim 1, wherein, The neural network model includes an input layer, four hidden layers, and an output layer connected in a fully connected manner. The input layer is configured to receive network inputs, and the output layer is configured to output the network outputs.

6. The training system according to claim 1, wherein, Each of the at least one reference circuit is a ring oscillator, wherein the ring oscillator includes a uniform energy level and an even number of inverter stages, each of the plurality of inverter stages having the same drive strength and each of the plurality of inverter stages being composed of one of the plurality of basic elements, and the plurality of elements being a plurality of composition ratios of the plurality of inverter stages corresponding to the plurality of basic elements.

7. The training system according to claim 6, wherein, These basic components include inverter elements, inverting gate elements, inverting OR gate elements, and mutually exclusive OR gate elements.

8. The training system according to claim 6, wherein, The number of inverter stages is 32.

9. A prediction system, wherein the plurality of parameters are trained using the training system of claims 1 to 8, the prediction system comprising: A neural network module includes a predictive neural network model configured to have the same architecture as the neural network model. The neural network module is configured to store trained parameters and to receive an input to be predicted, and to generate a predicted output of the input to be predicted based on the input to be predicted, the predictive neural network model, and the parameters. A prediction processing module is configured to input a feature data of a circuit to be predicted as the input to the neural network module to obtain the prediction output, wherein, The feature data includes a pressure time for the circuit to be predicted, a ratio of multiple components corresponding to multiple basic components, a drive strength, and an operating voltage.

10. A training method for training a module to be trained, executed by a processing module; the module to be trained includes a neural network model and a plurality of parameters; the module to be trained is configured to receive a network input and generate a network output based on the network input, the neural network model, and the plurality of parameters; the training method includes performing the following steps: (a) Receive at least one set of training data, wherein, Each training data set includes a training input data set and a label data set. The training input data set includes a pressure time set for at least one reference circuit, a component ratio corresponding to multiple basic components, a drive strength, and an operating voltage. The label data set includes a speed decay rate. as well as (b) Train the module to be trained based on the at least one training data.

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