A printing master board wiring and impedance control method, device, equipment and medium

Abstract

The application discloses a printing main control board wiring and impedance control method, device, equipment and medium, and relates to the technical field of printed circuit board layout wiring, to solve the problems of large impedance fluctuation of high-speed differential distribution lines and poor consistency of mass production of the existing printing main control board. The method comprises the following steps: obtaining the basic parameters of a printing main control board to be wired; determining the differential reference parameters of each partition by using impedance simulation software according to the target impedance and process parameters; determining the target line width adjustment area of each partition according to the power segmentation groove position; performing high-speed differential signal wiring in each partition according to the preset differential distribution line constraint and the differential reference parameters, and increasing the line width of the wiring in the target line width adjustment area, to obtain a wired main board; laying copper skin in the wired main board, and optimizing the via holes and the copper skin in the wired main board, to obtain a target printing main control board. The application is used for reducing the differential impedance fluctuation of the printing main control board, and improving the impedance consistency and yield of batch production.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board layout and routing technology, and in particular to a method, apparatus, equipment and medium for wiring and impedance control of a printed circuit board main control board. Background Technology

[0002] With the rapid iteration of high-speed, high-definition inkjet printing technology, industrial inkjet printers are gradually developing towards higher speeds, higher precision, and multi-printer array collaborative operation. This has significantly increased the requirements for the stability of high-speed signal transmission on the printer's main control board. The printer's main control board integrates core functions such as image decoding, data transmission, printhead driving, and motor motion control. It is equipped with numerous low-voltage differential signal (LVDS) high-speed image differential links, USB high-speed communication differential links, and printhead synchronization differential clock links, with signal transmission rates reaching 500Mbps to 2.5Gbps. The quality of differential signal transmission directly determines the clarity of the printed image, the printhead synchronization accuracy, and the overall stability of the machine. The industry-standard impedance for high-speed differential lines is 100Ω, with mass production tolerances controlled within ±5%. The printer's main control board integrates the main control chip, DDR cache, printhead driver interface, raster encoder, and host computer communication interface. Numerous LVDS printhead differential signals, DDR differential data lines, and encoder high-speed differential clocks are concentrated on a small board surface.

[0003] Currently, the high-speed differential wiring of printer main control boards in the industry generally adopts a traditional standardized design method, directly calculating the line width and spacing based on the nominal dielectric constant and standard copper thickness theoretical parameters of the board manufacturer to complete batch wiring. However, in order to control mass production costs, printer main control boards generally use economical substrates. These substrates are affected by production batches and manufacturing processes, and the dielectric constant has a fluctuation deviation of ±0.3. Using nominal parameters for design will lead to a large deviation between the actual circuit impedance and the theoretical value, resulting in high impedance dispersion. Moreover, due to the mixed functional areas of the printer main control board, the copper thickness of the power supply area is inconsistent with that of the signal area. There are also a large number of ground layer divisions, component padding, and solder mask thickening structures on the board. The wiring parameters of the traditional standardized design cannot be adapted to the differentiated structure within the board, which can easily cause abrupt changes in differential circuit impedance, signal reflection, and crosstalk.

[0004] Therefore, there is an urgent need for a method, device, equipment, and medium for wiring and impedance control of the main control board. Summary of the Invention

[0005] The purpose of this invention is to provide a method, apparatus, device, and medium for wiring and impedance control of a printing main control board, which solves the problems of large impedance fluctuations and poor mass production consistency of existing high-speed differential wiring in printing main control boards, which easily leads to printing defects.

[0006] To achieve the above objectives, the present invention provides the following technical solution: In a first aspect, the present invention provides a method for wiring and impedance control of a printed circuit board, comprising: Obtain the basic parameters of the main control board to be wired and printed; the basic parameters include target impedance, line width adjustment parameters, power supply segmentation slot position, and process parameters of each partition; the partitions of the main control board to be wired and printed are divided according to signal function; Based on the target impedance and the process parameters, impedance simulation software is used to determine the differential reference parameters for each partition; the differential reference parameters include the reference line width and coupling spacing. The target linewidth adjustment area for each partition is determined based on the location of the power segmentation slot; High-speed differential signal routing is performed in each partition according to the preset differential routing constraints and the differential reference parameters, and the line width of the traces in the target line width adjustment area is increased according to the line width adjustment parameters to obtain the routing motherboard. Copper foil is laid inside the wiring motherboard, and the vias and copper foil inside the wiring motherboard are optimized to obtain the target printing main control board.

[0007] Optionally, the step of performing high-speed differential signal routing in each partition according to the preset differential routing constraints and the differential reference parameters, and adjusting the line width in the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard includes: Based on the preset differential routing constraints and the differential reference parameters, each set of high-speed differential signals is arranged in pairs at equal intervals on the same layer of the main control board to be routed and printed. The trace width of the traces within the target trace width adjustment area of ​​each partition is increased according to the trace width adjustment parameters to obtain differential traces. When the differential traces reach a position requiring a layer change, a pair of differential layer change vias are arranged. The corners of the differential traces use a 45° chamfer or rounded transition. The safe distance between the differential traces and adjacent power traces and switching power traces is greater than or equal to three times the target differential trace width. Multiple parallel first grounding vias are set at the target location of the target differential trace; the target differential trace is a differential trace that passes through at least two power supply regions with different voltages; the target location is the projection of the power supply split slot on the top signal layer or the bottom signal layer; A serpentine compensation method is used to compensate for the shorter traces in the same group of differential traces to obtain the wiring motherboard.

[0008] Optionally, the method of using serpentine compensation to compensate for shorter traces in the same group of differential traces includes: Calculate the difference in length between the same set of differential traces; Add a serpentine trace of length equal to the difference to the target area of ​​the shorter trace in the differential trace; Increase the line width of the arc-shaped raised section of the serpentine trace.

[0009] Optionally, the step of laying copper foil within the wiring motherboard and optimizing the vias and copper foil within the wiring motherboard to obtain the target printing main control board includes: Copper foil is laid inside the wiring motherboard to obtain ground copper layer and power copper layer; A grounding via array is arranged around the differential switching via; the grounding via array includes a plurality of annular second grounding vias; the spacing between adjacent second grounding vias is less than or equal to 1 / 20 of the wavelength; the distance between the second grounding via and the differential switching via is less than or equal to 25 μm; The copper layer directly below the differential layer switching via is hollowed out according to the pad diameter of the differential layer switching via, forming a circular hollow area; the diameter of the circular hollow area is larger than the pad diameter; Back-drilling process is used to remove residual vias in differential layer-swapping vias with transmission rates exceeding the preset transmission rate, resulting in a preliminary optimized motherboard. Signal integrity simulation was performed on the preliminarily optimized motherboard to identify areas of impedance anomalies; Impedance correction is performed on the aforementioned impedance anomaly region to obtain the target printed main control board.

[0010] Optionally, the impedance anomaly region includes a low impedance region and a high impedance region; the impedance correction of the impedance anomaly region to obtain the target printed main control board includes: The copper cladding in the ground layer located directly below the differential traces in the low impedance region is hollowed out to form a rectangular hollow area. Grounded copper foil is laid at both ends of the differential trace located in the region of high impedance to obtain the target printed main control board.

[0011] Optionally, determining the target linewidth adjustment area for each partition based on the position of the power segmentation slot includes: The power supply partition slot is expanded outward by a predetermined length to form an expanded area; The extended area is extended in the thickness direction of the main control board to be wired and printed and penetrates all the layers of the main control board to be wired and printed, forming the target linewidth adjustment area.

[0012] Optionally, the differential reference parameters include a first reference parameter and a second reference parameter, both of which include a reference linewidth and a coupling spacing; the first reference parameter is the differential reference parameter corresponding to the surface microstrip line, and the second reference parameter is the differential reference parameter corresponding to the inner stripline line; the process parameters include at least the dielectric constant of the substrate, the dielectric thickness, and the copper foil thickness; the step of determining the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters includes: Determining the differential reference parameters for any partition: Import the target impedance and the process parameters of the current partition into the impedance simulation software; The differential reference parameters for matching the target impedance were obtained by performing simulation calculations using surface microstrip line model and stripline model respectively. Complete the determination of differential baseline parameters for all partitions.

[0013] Compared with existing technologies, the present invention provides a method for routing and impedance control of a printed main control board, comprising: obtaining basic parameters of the main control board to be routed; the basic parameters include target impedance, linewidth adjustment parameters, power supply slot positions, and process parameters of each partition; each partition of the main control board to be routed is divided according to signal function; determining the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include reference linewidth and coupling spacing; determining the target linewidth adjustment area of ​​each partition based on the power supply slot positions; performing high-speed differential signal routing in each partition according to preset differential routing constraints and the differential reference parameters, and adjusting the linewidth of the traces in the target linewidth adjustment area according to the linewidth adjustment parameters to obtain the routing main board; laying copper foil in the routing main board, and optimizing the vias and copper foil in the routing main board to obtain the target printed main control board. This invention recalculates the differential reference parameters required for routing on each print control board before routing. Even during mass production, when the dielectric constant of the board fluctuates due to production batches and manufacturing processes, it ensures that the actual impedance of each partition of the motherboard after routing is close to the theoretical target impedance, reducing impedance dispersion. Furthermore, by partitioning the print control board according to function and calculating the differential reference parameters for each partition based on its process parameters, different regions use corresponding differential reference parameters for routing. This avoids severe differential impedance drift caused by significant differences in the dielectric environment and copper foil thickness across different regions of the print control board. Additionally, by widening the target linewidth adjustment area corresponding to the power supply segmentation location, the impedance abrupt change problem caused by cross-segmentation is solved from the design source. This significantly improves the impedance consistency and yield rate of mass-produced print control motherboards.

[0014] Secondly, the present invention also provides a wiring and impedance control device for a printing main control board, comprising: The data acquisition module is used to acquire the basic parameters of the main control board to be wired and printed; the basic parameters include target impedance, line width adjustment parameters, power supply segmentation slot position, and process parameters of each partition; the partitions of the main control board to be wired and printed are divided according to signal function; The differential reference parameter determination module is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference line width and coupling spacing; The target linewidth adjustment area determination module is used to determine the target linewidth adjustment area of ​​each partition based on the position of the power segmentation slot. The routing module is used to perform high-speed differential signal routing in each partition according to the preset differential routing constraints and the differential reference parameters, and to adjust the line width of the traces in the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard. An optimization module is used to lay copper foil inside the wiring motherboard and optimize the vias and copper foil inside the wiring motherboard to obtain the target printing main control board.

[0015] Thirdly, the present invention also provides a device for printing main control board wiring and impedance control, comprising: A communication unit / interface is used to acquire the basic parameters of the main control board to be wired and printed; the basic parameters include target impedance, line width adjustment parameters, power supply partition slot position, and process parameters of each partition; the partitions of the main control board to be wired and printed are divided according to signal function. The processing unit / processor is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference linewidth and the coupling spacing. The target linewidth adjustment area for each partition is determined based on the location of the power segmentation slot; High-speed differential signal routing is performed in each partition according to the preset differential routing constraints and the differential reference parameters, and the line width of the traces in the target line width adjustment area is increased according to the line width adjustment parameters to obtain the routing motherboard. Copper foil is laid inside the wiring motherboard, and the vias and copper foil inside the wiring motherboard are optimized to obtain the target printing main control board.

[0016] Fourthly, the present invention also provides a computer-readable storage medium storing instructions that, when executed by a processor, implement the method for wiring and impedance control of a printed circuit board.

[0017] Compared with the prior art, the beneficial effects of the second aspect device solution, the third aspect equipment solution, and the fourth aspect computer-readable storage medium solution provided by the present invention are the same as the beneficial effects of the printed main control board wiring and impedance control method described in the above technical solutions, and will not be repeated here. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings: Figure 1 A flowchart of a printing main control board wiring and impedance control method provided by the present invention; Figure 2 This invention provides a schematic diagram of the wiring and impedance control device for a printing main control board; Figure 3 This is a schematic diagram of a wiring and impedance control device for a printed main control board provided by the present invention. Detailed Implementation

[0019] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are merely used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" are not necessarily different.

[0020] It should be noted that in this invention, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0021] In this invention, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c, where a, b, and c can be single or multiple.

[0022] Before introducing the embodiments of the present invention, the relevant terms involved in the embodiments of the present invention are first defined as follows: LVDS: Low Voltage Differential Signaling.

[0023] The existing high-speed differential routing of printer main control PCBs has the following defects: 1. The main control board of the printer mostly uses 4-layer low-cost board material with a compact layout and many power layer division blocks. Differential traces are very easy to cross power and ground divisions, resulting in the breakage of the reference return plane and a sudden change in differential impedance of more than 15%, which causes signal distortion, printhead inkjet timing disorder, and defects such as white lines and horizontal lines in printing; 2. The conventional equal-length winding is used, and only the spacing is adjusted. The line spacing at the arc of the winding will increase, resulting in a local differential impedance increase of 8-15Ω, and signal overshoot and ringing; 3. Differential layer replacement vias do not have matching grounding optimization. Impedance changes will occur in the via residual stakes and pad areas; 4. Traditional impedance is designed according to the uniform line width and line spacing of the whole board, ignoring the differences in copper thickness and substrate resin thickness in different areas of the main control board. The measured impedance dispersion of batch PCBs is large, and the mass production consistency is poor.

[0024] To address the aforementioned issues, this invention provides a method, apparatus, device, and medium for wiring and impedance control of a printed circuit board (PCB). For the complex operating conditions of PCBs, it employs a method of partitioned impedance calibration and segmented compensation-based differential impedance precision control. This involves steps such as layer pre-calibration, partitioned design of differential basic parameters, impedance compensation mode with locally altered linewidth using serpentine equal-length winding, differential via ground ring optimization, localized cutout fine-tuning of reference ground, and pre-printing TDR segmented simulation calibration to achieve end-to-end impedance control. This stabilizes the differential impedance of the PCB at 90Ω±5% (LVDS) and 100Ω±5% (high-speed clock), significantly reducing signal reflection and common-mode interference, improving the stability of high-speed image data transmission, reducing PCB rework rates, and adapting to mass production of small-size, high-density PCBs. The following description, in conjunction with the accompanying drawings, further clarifies this process.

[0025] See Figure 1 This invention provides a method for wiring and impedance control of a printed circuit board, comprising the following steps: Step 101: Obtain the basic parameters of the main control board to be wired and printed.

[0026] The basic parameters include target impedance, linewidth adjustment parameters, power supply segmentation slot position, and process parameters for each partition; the partitions of the main control board to be wired and printed are divided according to signal function. The main control board to be routed and printed is a PCB board with completed component placement. This board can include four standard stack-up layers, from top to bottom: top signal layer, ground layer, power layer, and bottom signal layer. The ground layer is a complete copper layer, while the power layer requires a single copper layer to be segmented into multiple power regions with different voltages. The gaps between these power regions are called power segmentation slots. These slots are pre-drawn on the PCB board, and the copper layer is segmented according to these slots during subsequent copper pouring.

[0027] The main control board to be printed is divided into sections according to signal functions. Specifically, based on the signal functions of each device on the top signal layer, the main control board is divided into four functional sections: the printhead interface area, the DDR buffer area, the main control FPGA area, and the encoder interface area. Each section of this main control board is a three-dimensional functional area that vertically penetrates all layers, covering all top-level signal layers, ground layers, power layers, and bottom-level signal layers from top to bottom. The high-speed differential signal type in the printhead interface area is the printhead LVDS drive differential signal; the high-speed differential signal type in the DDR buffer area is the DDR data differential signal; the high-speed differential signal type in the encoder interface area is the encoder high-speed clock differential signal; and the main control FPGA area contains the FPGA main control chip.

[0028] The target impedance includes a first target impedance and a second target impedance. The first target impedance is the target impedance of the surface microstrip line, and the second target impedance is the target impedance of the inner strip line.

[0029] The process parameters include at least the dielectric constant of the substrate, the dielectric thickness, and the copper foil thickness.

[0030] Step 102: Based on the target impedance and the process parameters, use impedance simulation software to determine the differential reference parameters for each partition.

[0031] The differential reference parameters include a first reference parameter and a second reference parameter. Both the first and second reference parameters include the reference linewidth and coupling spacing. The first reference parameter is the differential reference parameter corresponding to the surface microstrip line, and the second reference parameter is the differential reference parameter corresponding to the inner stripline line.

[0032] Step 103: Determine the target linewidth adjustment area for each partition based on the position of the power segmentation slot.

[0033] Since the stratum is locally divided into slots by the power source, the trace width of the trace in the target trace width adjustment area corresponding to the location of the power source slot is adjusted upwards separately, which can pre-compensate for the impedance rise caused by the lack of reference ground.

[0034] Step 104: Perform high-speed differential signal routing in each partition according to the preset differential routing constraints and the differential reference parameters, and adjust the line width of the traces in the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard.

[0035] The preset differential distribution line constraints are as follows: (1) Differential traces in the same group must be routed in parallel on the same signal layer throughout the entire route. Differential traces in the same group are strictly prohibited from being routed across different layers. Two differential traces in the same group shall be routed with equal spacing throughout the entire route. The line width and coupling spacing of the straight segments of the differential traces shall be based on the target parameters of each partition.

[0036] (2) All routing corners should use a 45° chamfer or rounded transition, and 90° right angles should not be used to avoid narrowing of corners and causing a sudden increase in impedance.

[0037] (3) The safe distance between differential traces and surrounding power traces and switching power lines is greater than or equal to 3 times the baseline width of the differential trace, which can reduce impedance drift caused by crosstalk due to changes in the equivalent dielectric constant.

[0038] (4) Differential traces for nozzle LVDS drive differential, DDR data differential, and encoder high-speed clock differential are prohibited from crossing power supply partition slots. If crossing a partition slot is necessary, at least three nearby grounding vias must be connected in parallel within the power supply partition slot to establish a continuous return ground. The location of the parallel grounding vias is at the position in the layer where the differential trace is located, directly opposite the power supply partition slot.

[0039] Step 105: Lay copper foil inside the wiring motherboard and optimize the vias and copper foil inside the wiring motherboard to obtain the target printing main control board.

[0040] Figure 1The aforementioned method pioneered a partitioned impedance pre-calibration design for the main control board, precisely dividing the main control PCB into four functional areas: the printhead interface area, the DDR cache area, the main control FPGA area, and the encoder interface area. Combining the stack-up structure and ground plane segmentation status of each area, the baseline linewidth and coupling spacing of the surface microstrip lines and inner striplines are independently calculated using professional impedance simulation software. Simultaneously, addressing the issue of missing reference ground around power segmentation, linewidth pre-compensation is performed on adjacent areas. This solves the impedance abrupt change problem caused by cross-segmentation, board process deviations, and regional structural differences from the design source, compressing the overall differential impedance fluctuation from the traditional ±12% to within ±5%, significantly improving the impedance consistency and yield rate of PCB mass production.

[0041] based on Figure 1 In addition to the method described herein, this specification also provides some specific implementation methods of the method, which will be described below.

[0042] As an optional approach, step 102 can be implemented based on steps 21-23: Step 21: Determine the differential reference parameters for any partition: Import the target impedance and the process parameters of the current partition into the impedance simulation software.

[0043] Impedance simulation software is a standard impedance calculation tool in the field of high-speed PCB design. It is used to solve the problem of accurate control of transmission line characteristic impedance during the circuit board design stage, ensuring the integrity of high-speed signal transmission. It supports complex layer stacks and various transmission line models.

[0044] Step 22: Simulation calculations are performed using the surface microstrip line model and the stripline model respectively to obtain the differential reference parameters for matching the target impedance.

[0045] When calculating the first reference parameter, select the surface microstrip line model and input the process parameters and the first target impedance. The software will automatically calculate the differential reference parameter matching the first target impedance. When calculating the second reference parameter, select the stripline model and input the process parameters and the second target impedance. The software will automatically calculate the differential reference parameter matching the second target impedance. The process parameters for different partitions are different and need to be obtained separately. Step 23: Complete the determination of the differential reference parameters for all partitions.

[0046] The calculation of the differential reference parameters for each partition is performed through steps 21-22. Steps 21-22 are repeated to complete the calculation of the differential reference parameters for the nozzle interface area, DDR buffer area, main control FPGA area, and encoder interface area.

[0047] As an optional approach, step 103 can be implemented based on steps 31-32: Step 31: Expand the side length of the power supply dividing slot outward by a preset length to form an expanded area.

[0048] The preset length can be set according to requirements. For example, the preset length is 1.5mm, 1.6mm, etc.

[0049] Step 32: Extend the outward expansion area toward the thickness direction of the main control board to be wired and print, and penetrate all the layers of the main control board to be wired and print, to form the target linewidth adjustment area.

[0050] The target linewidth adjustment area is a three-dimensional spatial region, encompassing all areas within the main control board to be routed and printed that vertically correspond to the power supply partition slots. Due to the presence of the power supply partition slots, the reference ground for traces located within this target linewidth adjustment area is missing. Therefore, by increasing the linewidth of the traces in this area for pre-impedance compensation, the impedance rise caused by the lack of a reference ground can be compensated.

[0051] As an optional approach, step 104 can be implemented based on steps 41-43: Step 41: Based on the preset differential routing constraints and the differential reference parameters, arrange each group of high-speed differential signals in pairs at equal intervals within the same layer of the main control board to be routed. Adjust the linewidth of the traces arranged within the target linewidth adjustment area of ​​each partition according to the linewidth adjustment parameters to obtain differential traces. When the differential traces reach a position requiring a layer change, arrange a pair of differential layer change vias. The corners of the differential traces use a 45° chamfer or rounded transition. The safe distance between the differential traces and adjacent power traces and switching power traces is greater than or equal to three times the target differential linewidth. The target differential linewidth is the reference linewidth of the current differential trace. For example, the linewidth adjustment parameter can range from 0.3 to 0.8 mil.

[0052] Step 42: Set multiple parallel first grounding vias at the target location of the target differential trace.

[0053] The target differential trace is a differential trace that passes through at least two power supply regions with different voltages; the target location is the vertical projection position of the power supply divider slot on the top signal layer or the bottom signal layer.

[0054] Step 43: Use a serpentine compensation method to compensate for the shorter traces in the same group of differential traces to obtain the wiring motherboard.

[0055] Specifically, step 43 can be implemented based on steps 431-433: Step 431: Calculate the difference in length between the differential traces in the same group; Step 432: Add a serpentine trace of length equal to the difference to the target area of ​​the shorter trace in the differential trace.

[0056] The target area is the free area of ​​the traces, avoiding areas with dense vias, connectors, and other sensitive locations. Preferably, compensation is only applied to differential traces with a difference greater than or equal to 5 mil. The radius of the arc of the serpentine trace's raised section is greater than or equal to three times the baseline width of the current differential trace, and the serpentine trace has no more than five bends to suppress local impedance accumulation and offset.

[0057] Step 433: Increase the line width of the arc-shaped raised section of the serpentine trace.

[0058] The range of the increased line width can be 0.4-1.0 mil.

[0059] Because the outward expansion of the arc-shaped raised section of the serpentine trace increases the spacing between differential traces in the same group, causing a local increase in impedance, the impedance increase can be offset by increasing the line width of the arc-shaped raised section through the above steps. The straight traces other than the serpentine traces still use the baseline line width, simultaneously achieving equal-length compensation and constant impedance.

[0060] The above steps propose a segmented differential linewidth compensation technology, which differs from the traditional uniform linewidth routing method. It maintains the baseline parameters of the straight segments of the differential routing unchanged, only widening the linewidth of the serpentine winding arc protrusions to accurately offset the impedance increase caused by the winding structure. While meeting the design requirement of ≤5mil length error within the differential pair, it achieves continuous and consistent impedance between the winding and straight segments. Simultaneously, it limits the radius of the winding arc and the number of consecutive bends, completely solving the industry problem of balancing uniform length compensation and constant impedance in confined layout spaces. This effectively eliminates printhead inkjet timing disorders and printing defects caused by discontinuous winding impedance.

[0061] As an optional approach, step 105 can be implemented based on steps 51-56: Step 51: Lay copper foil inside the wiring motherboard to obtain ground copper and power copper.

[0062] Specifically, a whole copper sheet is laid in the ground layer to obtain ground layer copper cladding. After laying a whole copper sheet in the power layer, the copper sheet at the power segmentation slot is segmented and removed to obtain power layer copper cladding.

[0063] Step 52: Arrange a grounding via array around the differential layer switching via.

[0064] The grounding via array includes multiple ring-shaped second grounding vias; the second grounding vias are vias connecting to the copper-clad ground plane. The spacing between adjacent second grounding vias is less than or equal to 1 / 20 of the wavelength; the distance between the second grounding via and the differential layer switching via is less than or equal to 25μm. Each group of differential layer switching vias is configured with at least 4 second grounding vias to form a closed return current channel, stabilizing the differential impedance of the via segment. The closed return current channel means that the differential pair's differential layer switching vias are wrapped by the grounding via array, so that the return current is confined to the periphery of the differential signal, preventing it from spreading widely and running across segments.

[0065] Step 53: Based on the pad diameter of the differential layer switching via, the copper layer directly below the differential layer switching via is hollowed out to form a circular hollow area.

[0066] The diameter of the circular cutout area is larger than the diameter of the pad. For example, the diameter of the circular cutout area is 6-10 mil larger than the diameter of the pad.

[0067] By partially hollowing out the area below the pads of differential vias, the local impedance drop caused by excessively large pad copper area can be offset.

[0068] Step 54: Use back drilling to remove residual vias in differential layer-swapping vias with transmission rates higher than the preset transmission rate, and obtain a preliminarily optimized motherboard.

[0069] For example, the preset transmission rate can be 20Gbps, and removing via residual stakes can eliminate the impedance distortion caused by the parasitic inductance of the via residual stakes.

[0070] Step 55: Perform signal integrity simulation on the preliminarily optimized motherboard to determine the impedance anomaly region.

[0071] Signal integrity simulation verifies the impedance continuity, timing deviation, reflected noise, crosstalk coupling, and return path integrity of high-speed differential signals. Based on the simulation results, routing schemes and layer stack-up structures are iteratively optimized. The simulation results must include at least the impedance of each region. Impedance anomaly regions are determined based on the impedance magnitude. Impedance anomaly regions include regions with excessively high impedance and regions with excessively low impedance. Regions with impedance exceeding the target impedance by more than 5% are defined as regions with excessively high impedance; regions with impedance below the target impedance by more than 5% are defined as regions with excessively low impedance.

[0072] Step 56: Perform impedance correction on the impedance anomaly region to obtain the target printed main control board.

[0073] Specifically, step 56 can be implemented based on steps 561 and 562: Step 561: Hollow out the copper layer directly below the differential trace in the low impedance region to form a rectangular hollow area.

[0074] The side length of the rectangular cutout area can range from 0.4 to 0.6 mm. Specific values ​​can be fine-tuned through simulation. By creating a rectangular cutout, the equivalent thickness of the dielectric can be increased, slightly improving the differential impedance.

[0075] Step 562: Lay grounded copper foil at both ends of the differential traces located in the region of high impedance to obtain the target printed main control board.

[0076] The two ends of a differential trace refer to the start and end points of the differential trace. The ground copper layer is laid on the layer containing the differential trace and connected to the ground copper layer. Adding a ground copper layer nearby can reduce the equivalent impedance and achieve fine-tuning within ±3Ω without changing the trace width.

[0077] To further improve the accuracy of impedance, partitioned TDR time-domain reflection simulation and mass production calibration of impedance strips at the board factory can be performed after step 56.

[0078] Specifically, differential line segments from each partition are extracted from the print control motherboard and imported into HyperLynx software for TDR (Time Domain Reflectometry) simulation. Linewidth correction and ground clearance methods are used to optimize the differential line segments for each partition. The optimized print control board is then manufactured, and corresponding dedicated impedance test strips are added to the printhead interface area, DDR cache area, and encoder interface area. The board manufacturer uses TDR for actual testing and fine-tunes the etching coefficient in small batches based on the test data. Impedance fluctuations in mass production can be controlled within ±5%.

[0079] By establishing a comprehensive impedance control system across the entire design, simulation, fine-tuning, and mass production chain: First, through a combination of differential via ring grounding arrays, partial hollowing of pad ground layers, and high-speed signal back-drilling to remove residual stakes, the impedance in the via layer replacement area is stabilized, eliminating signal distortion caused by parasitic parameters. Second, an innovative and refined impedance correction method using partial hollowing of ground layers and fine-tuning of side grounding copper foil achieves ±3Ω high-precision impedance fine-tuning without modifying the main wiring. Third, a new partitioned TDR segmented simulation and dedicated impedance test strip mass production calibration mechanism are added, which dynamically corrects etching process parameters based on actual test data from the board manufacturer, breaking down the deviation barriers between design and mass production, comprehensively ensuring the integrity of the entire high-speed differential signal chain, and significantly improving the operational stability and product quality of high-speed, high-precision printing equipment.

[0080] This invention is applicable to the research and development, layout optimization, and mass production scenarios of main control PCBs for various inkjet printing, graphic printing, and digital printing equipment. It is especially suitable for industrial-grade high-speed inkjet printing equipment equipped with multi-printer arrays, high-speed image transmission, and high-precision synchronous control. It mainly covers PCB design and mass production process control scenarios for main control boards, image decoding boards, printhead driver boards, etc., that carry LVDS high-speed image differential, USB high-speed data differential, and printhead synchronous differential clock signals.

[0081] The embodiments of the present invention can divide functional modules according to the above method examples. For example, each function can be divided into its own functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in the embodiments of the present invention is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0082] When dividing each function into modules according to its corresponding function. Figure 2 A schematic diagram of a wiring and impedance control device for a printed circuit board provided by the present invention is shown. Figure 2 As shown, the device includes: The data acquisition module 201 is used to acquire the basic parameters of the main control board to be wired and printed; the basic parameters include the target impedance, line width adjustment parameters, power supply partition slot position, and process parameters of each partition; the partitions of the main control board to be wired and printed are divided according to signal function. The differential reference parameter determination module 202 is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference line width and coupling spacing. The target linewidth adjustment area determination module 203 is used to determine the target linewidth adjustment area of ​​each partition according to the position of the power segmentation slot; The routing module 204 is used to perform high-speed differential signal routing in each partition according to the preset differential routing constraints and the differential reference parameters, and to adjust the line width of the traces in the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard. The optimization module 205 is used to lay copper foil in the wiring motherboard and optimize the vias and copper foil in the wiring motherboard to obtain the target printing main control board.

[0083] Optionally, the wiring module 204 may specifically include: The routing unit is used to arrange each group of high-speed differential signals in pairs at equal intervals on the same layer of the main control board to be routed, according to preset differential routing constraints and the differential reference parameters. It also adjusts the line width of the traces within the target line width adjustment area of ​​each partition according to the line width adjustment parameters to obtain differential traces. When the differential traces reach a position requiring a layer change, a pair of differential layer change vias are arranged. The corners of the differential traces use 45° chamfers or rounded transitions. The safe distance between the differential traces and adjacent power traces and switching power traces is greater than or equal to three times the target differential line width. The first grounding via arrangement unit is used to set multiple parallel first grounding vias at the target location of the target differential trace; the target differential trace is a differential trace that passes through at least two power supply regions with different voltages; the target location is the projection of the power supply split slot on the top signal layer or the bottom signal layer. The compensation unit is used to compensate for shorter traces in the same group of differential traces using a serpentine compensation method, resulting in a wiring motherboard.

[0084] Optionally, the compensation unit can be specifically used for: Calculate the difference in length between the same set of differential traces; Add a serpentine trace of length equal to the difference to the target area of ​​the shorter trace in the differential trace; Increase the line width of the arc-shaped raised section of the serpentine trace.

[0085] Optionally, the optimization module 205 may specifically include: A copper foil laying unit is used to lay copper foil inside the wiring motherboard to obtain ground layer copper foil and power layer copper foil. The second grounding via arrangement unit is used to arrange a grounding via array around the differential layer switching via; the grounding via array includes a plurality of annular second grounding vias; the spacing between adjacent second grounding vias is less than or equal to 1 / 20 of the wavelength; the distance between the second grounding via and the differential layer switching via is less than or equal to 25 μm; The first hollowing unit is used to hollow out the ground copper layer directly below the differential layer via according to the pad diameter of the differential layer via, forming a circular hollow area; the diameter of the circular hollow area is larger than the pad diameter; The through-hole residual pile removal unit is used to remove through-hole residual piles in differential layer-swapping through-holes with a transmission rate greater than the preset transmission rate using back drilling technology, so as to obtain a preliminary optimized motherboard. An impedance anomaly region determination unit is used to perform signal integrity simulation on the preliminarily optimized motherboard to determine the impedance anomaly region. An impedance correction unit is used to correct the impedance abnormality region to obtain the target printed main control board.

[0086] Optionally, the impedance anomaly region includes a low impedance region and a high impedance region; the impedance correction unit can specifically be used for: The copper cladding in the ground layer located directly below the differential traces in the low impedance region is hollowed out to form a rectangular hollow area. Grounded copper foil is laid at both ends of the differential trace located in the region of high impedance to obtain the target printed main control board.

[0087] Optionally, the target line width adjustment area determination module 203 may specifically include: The expansion unit is used to expand the power distribution slot outwards by a predetermined length to form an expansion area. The extension unit is used to extend the outer expansion area towards the thickness direction of the main control board to be wired and print, and penetrate all the stacked layers of the main control board to be wired and print, to form a target linewidth adjustment area.

[0088] Optionally, the differential reference parameters include a first reference parameter and a second reference parameter, both of which include a reference linewidth and a coupling spacing; the first reference parameter is the differential reference parameter corresponding to the surface microstrip line, and the second reference parameter is the differential reference parameter corresponding to the inner stripline line; the process parameters include at least the dielectric constant of the substrate, the dielectric thickness, and the copper foil thickness; the differential reference parameter determination module 202 may specifically include: The data import unit is used to determine the differential reference parameters for any partition: importing the target impedance and the process parameters of the current partition into the impedance simulation software; The simulation unit is used to perform simulation calculations using surface microstrip line model and stripline model respectively to obtain the differential reference parameters for matching the target impedance; The unit for determining all partition baseline parameters is used to complete the determination of differential baseline parameters for all partitions.

[0089] The above mainly describes the solutions provided by the embodiments of the present invention from the perspective of the interaction between various modules. It is understood that, in order to achieve the above functions, it includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the present invention can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0090] All relevant content of each step involved in the above method embodiments can be referenced from the functional description of the corresponding functional module, and will not be repeated here.

[0091] When using the corresponding integrated unit Figure 3 This diagram illustrates the structure of a printed circuit board wiring and impedance control device provided by the present invention. Figure 3 As shown, the device includes: A communication unit / interface is used to acquire the basic parameters of the main control board to be wired and printed; the basic parameters include target impedance, line width adjustment parameters, power supply partition slot position, and process parameters of each partition; the partitions of the main control board to be wired and printed are divided according to signal function. The processing unit / processor is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference linewidth and the coupling spacing. The target linewidth adjustment area for each partition is determined based on the location of the power segmentation slot; High-speed differential signal routing is performed in each partition according to the preset differential routing constraints and the differential reference parameters, and the line width of the traces in the target line width adjustment area is increased according to the line width adjustment parameters to obtain the routing motherboard. Copper foil is laid inside the wiring motherboard, and the vias and copper foil inside the wiring motherboard are optimized to obtain the target printing main control board.

[0092] The processing unit can be a processor or controller, such as a Central Processing Unit (CPU), a general-purpose processor, a Digital Signal Processor (DSP), an Application-Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this invention. The processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. The communication module can be a transceiver, transceiver circuitry, or communication interface, etc. The storage module can be a memory.

[0093] like Figure 3As shown, the processor described above can be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of the program of the present invention. The communication interface described above can be one or more. The communication interface can use any transceiver-like device for communicating with other devices or communication networks.

[0094] like Figure 3 As shown, the terminal device described above may also include a communication line. The communication line may include a path for transmitting information between the components described above.

[0095] Optional, such as Figure 3 As shown, the terminal device may further include a memory. The memory stores computer execution instructions for implementing the present invention, and the execution is controlled by a processor. The processor executes the computer execution instructions stored in the memory, thereby implementing the method provided in the embodiments of the present invention.

[0096] like Figure 3 As shown, the memory can be read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions, random access memory (RAM) or other types of dynamic storage devices capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited to these. The memory can exist independently and be connected to the processor via communication lines. The memory can also be integrated with the processor.

[0097] Optionally, the computer execution instructions in the embodiments of the present invention may also be referred to as application code, and the embodiments of the present invention do not specifically limit this.

[0098] In a specific implementation, as one example, such as Figure 3 As shown, a processor may include one or more CPUs, such as Figure 3 CPU0 and CPU1 in the CPU.

[0099] In a specific implementation, as one example, such as Figure 3 As shown, the terminal device may include multiple processors, such as Figure 3 The processors in the system. Each of these processors can be a single-core processor or a multi-core processor.

[0100] On the one hand, a computer-readable storage medium is provided, which stores instructions that, when executed, implement the aforementioned method for wiring and impedance control of a printing main control board.

[0101] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present invention are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); or it can be a semiconductor medium, such as a solid-state drive (SSD).

[0102] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0103] Although the invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely exemplary descriptions of the invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if such modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include such modifications and modifications.

Claims

1. A method for wiring and impedance control of a printed circuit board, characterized in that, include: Obtain the basic parameters of the main control board to be wired and printed; The basic parameters include target impedance, linewidth adjustment parameters, power supply segmentation slot position, and process parameters for each zone. The partitions of the main control board to be wired and printed are divided according to signal functions; Based on the target impedance and the process parameters, impedance simulation software is used to determine the differential reference parameters for each partition; the differential reference parameters include the reference line width and coupling spacing. The target linewidth adjustment area for each partition is determined based on the location of the power segmentation slot. High-speed differential signal routing is performed in each partition according to the preset differential routing constraints and the differential reference parameters, and the line width of the traces in the target line width adjustment area is increased according to the line width adjustment parameters to obtain the routing motherboard. Copper foil is laid inside the wiring motherboard, and the vias and copper foil inside the wiring motherboard are optimized to obtain the target printing main control board.

2. The wiring and impedance control method for the main control board according to claim 1, characterized in that, The process involves performing high-speed differential signal routing in each partition according to preset differential routing constraints and differential reference parameters, and adjusting the line width within the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard, which includes: Based on the preset differential routing constraints and the differential reference parameters, each set of high-speed differential signals is arranged in pairs at equal intervals on the same layer of the main control board to be routed and printed. The trace width of the traces within the target trace width adjustment area of ​​each partition is increased according to the trace width adjustment parameters to obtain differential traces. When the differential traces reach a position requiring a layer change, a pair of differential layer change vias are arranged. The corners of the differential traces use a 45° chamfer or rounded transition. The safe distance between the differential traces and adjacent power traces and switching power traces is greater than or equal to three times the target differential trace width. Multiple parallel first grounding vias are set at the target location of the target differential trace; the target differential trace is a differential trace that passes through at least two power supply regions with different voltages; the target location is the projection of the power supply split slot on the top signal layer or the bottom signal layer; A serpentine compensation method is used to compensate for the shorter traces in the same group of differential traces to obtain the wiring motherboard.

3. The wiring and impedance control method for the main control board according to claim 2, characterized in that, The method of using serpentine compensation to compensate for shorter traces in the same group of differential traces includes: Calculate the difference in length between the same set of differential traces; Add a serpentine trace of length equal to the difference to the target area of ​​the shorter trace in the differential trace; Increase the line width of the arc-shaped raised section of the serpentine trace.

4. The wiring and impedance control method for the main control board according to claim 2, characterized in that, The process of laying copper foil within the wiring motherboard and optimizing the vias and copper foil within the wiring motherboard to obtain the target printing main control board includes: Copper foil is laid inside the wiring motherboard to obtain ground copper layer and power copper layer; A grounding via array is arranged around the differential switching via; the grounding via array includes a plurality of annular second grounding vias; the spacing between adjacent second grounding vias is less than or equal to 1 / 20 of the wavelength; the distance between the second grounding via and the differential switching via is less than or equal to 25 μm; The copper layer directly below the differential layer switching via is hollowed out according to the pad diameter of the differential layer switching via, forming a circular hollow area; the diameter of the circular hollow area is larger than the pad diameter; Back drilling is used to remove residual vias in differential layer-swapping vias with transmission rates exceeding the preset transmission rate, resulting in a preliminary optimized motherboard. Signal integrity simulation was performed on the preliminarily optimized motherboard to identify areas of impedance anomalies; Impedance correction is performed on the aforementioned impedance anomaly region to obtain the target printed main control board.

5. The wiring and impedance control method for the main control board according to claim 4, characterized in that, The impedance anomaly region includes regions with low impedance and regions with high impedance; the impedance correction of the impedance anomaly region to obtain the target printed main control board includes: The copper cladding in the ground layer directly below the differential traces located in the low impedance region is hollowed out to form a rectangular hollow area. Grounded copper foil is laid at both ends of the differential trace located in the region of high impedance to obtain the target printed main control board.

6. The wiring and impedance control method for the main control board according to claim 1, characterized in that, The step of determining the target linewidth adjustment area for each partition based on the position of the power segmentation slot includes: The power supply partition slot is expanded outward by a predetermined length to form an expanded area; The extended area is extended in the thickness direction of the main control board to be wired and printed and penetrates all the layers of the main control board to be wired and printed, forming the target linewidth adjustment area.

7. The wiring and impedance control method for the main control board according to claim 1, characterized in that, The differential reference parameters include a first reference parameter and a second reference parameter, both of which include a reference linewidth and a coupling spacing; the first reference parameter is the differential reference parameter corresponding to the surface microstrip line, and the second reference parameter is the differential reference parameter corresponding to the inner stripline line; the process parameters include at least the dielectric constant of the substrate, the dielectric thickness, and the copper foil thickness; the step of determining the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters includes: Determining the differential reference parameters for any partition: Import the target impedance and the process parameters of the current partition into the impedance simulation software; The differential reference parameters for matching the target impedance were obtained by performing simulation calculations using surface microstrip line model and stripline model respectively. Complete the determination of differential baseline parameters for all partitions.

8. A wiring and impedance control device for a printing main control board, characterized in that, include: The data acquisition module is used to acquire the basic parameters of the main control board to be wired and printed; The basic parameters include target impedance, linewidth adjustment parameters, power supply segmentation slot position, and process parameters for each zone. The partitions of the main control board to be wired and printed are divided according to signal functions; The differential reference parameter determination module is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference line width and coupling spacing; The target linewidth adjustment area determination module is used to determine the target linewidth adjustment area of ​​each partition based on the position of the power segmentation slot. The routing module is used to perform high-speed differential signal routing in each partition according to the preset differential routing constraints and the differential reference parameters, and to adjust the line width of the traces in the target line width adjustment area according to the line width adjustment parameters to obtain the routing motherboard. An optimization module is used to lay copper foil inside the wiring motherboard and optimize the vias and copper foil inside the wiring motherboard to obtain the target printing main control board.

9. A device for wiring and impedance control of a printing main control board, characterized in that, include: The communication unit / communication interface is used to obtain the basic parameters of the main control board to be wired and printed. The basic parameters include target impedance, linewidth adjustment parameters, power supply segmentation slot position, and process parameters for each zone. The partitions of the main control board to be wired and printed are divided according to signal functions; The processing unit / processor is used to determine the differential reference parameters of each partition using impedance simulation software based on the target impedance and the process parameters; the differential reference parameters include the reference linewidth and the coupling spacing. The target linewidth adjustment area for each partition is determined based on the location of the power segmentation slot. High-speed differential signal routing is performed in each partition according to the preset differential routing constraints and the differential reference parameters, and the line width of the traces in the target line width adjustment area is increased according to the line width adjustment parameters to obtain the routing motherboard. Copper foil is laid inside the wiring motherboard, and the vias and copper foil inside the wiring motherboard are optimized to obtain the target printing main control board.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed by a processor, implement the wiring and impedance control method for a printed circuit board as described in any one of claims 1-7.

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