Method and program for producing a chip layout weakness manual

Abstract

A method and an execution program for making a chip layout weakness manual, based on the simulation results of an OPC simulation calculation software, obtaining a weakness original file of a current layer pattern of a chip; using a clustering algorithm to process local coordinates in the weakness original file, classifying the weaknesses into at least two categories, and marking the positions of the weaknesses in the weakness pattern and intercepting at least two global maps and detail maps with different magnifications and marked with the weaknesses; using a coordinate conversion calculation method, obtaining global coordinates of the weaknesses of a single exposure grid according to the position coordinates of the chip in the single exposure grid and the local coordinates of the weaknesses in the weakness original file; and generating a weakness file manual of the current layer pattern of the chip. The present application can automatically complete the screenshot of single-point and multi-point measurement weaknesses and the making of the weakness manual, can replace the tedious manual review and making, effectively saves manpower, reduces the weakness analysis and verification period, and improves the research and development efficiency of new products.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a method and execution program for creating a chip layout weakness manual. Background Technology

[0002] As integrated circuit process nodes continue to shrink, the complexity and precision of semiconductor manufacturing processes are increasing exponentially. During wafer fabrication, due to limitations imposed by physicochemical mechanisms such as optical proximity effects, etching load effects, and chemical mechanical planarization, certain patterns in the layout design are highly susceptible to defects such as bridging, open circuits, and critical dimension deviations during actual manufacturing. These pattern structures, most prone to failure within a specific process window, are commonly referred to as weaknesses. Effectively and accurately identifying, measuring, and optimizing these weaknesses is crucial for improving lithography process quality and ensuring wafer yield.

[0003] In related technologies, the analysis and verification of weaknesses primarily rely on the experience of optical proximity correction engineers. Engineers need to manually review lithography simulation results or wafer defect detection data, identifying individual patterns with small process windows as weaknesses. Subsequently, engineers need to manually extract key information such as the design coordinates, physical dimensions, pattern orientation, and corresponding layout layer of these weaknesses, and manually compile this information into a weakness manual. This manual serves as a benchmark guide for subsequent automated measurement and alignment by wafer metrology equipment.

[0004] During the R&D and process implementation phases of new products, there are often thousands of weaknesses that need to be measured and verified. In the traditional weakness manual creation process, engineers need to manually locate weaknesses one by one in complex layout files, manually distinguishing which areas belong to adjacent areas requiring multi-point joint measurement and which belong to single-point measurement areas. Then, engineers need to manually perform tedious coordinate transformations and manually take screenshots of the layout, manually arrange the data, and enter it. This series of purely manual operations not only consumes a lot of time and manpower, but also the manual coordinate transformation and data entry are prone to human error, greatly increasing the cycle of weakness analysis and verification and reducing the efficiency of new product development. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a method and execution program for creating a chip layout weakness manual, so as to solve the problems in the related art where the weakness manual creation process is highly dependent on manual work, difficult to distinguish between multiple measurements, prone to errors in manual coordinate transformation, and inefficient in screenshotting and layout, resulting in long weakness analysis and verification cycles and low efficiency in new product development.

[0006] To achieve the above and other related objectives, this application provides a method for creating a chip layout weakness manual, comprising: Based on the simulation results of OPC simulation software, the original file of the weakness of the current layer of the chip is obtained. The original file of the weakness includes: the local coordinates of the weakness in the chip and the weakness pattern. Clustering algorithms are used to process the local coordinates in the original weakness file, and the weaknesses are classified into at least two categories: single-point measurement weaknesses and multi-point measurement weaknesses, and the positions of the weaknesses are marked in the weakness graph. Using a coordinate transformation calculation method, the global coordinates of the weak point in a single exposure grid are obtained based on the chip's position coordinates in a single exposure grid and the local coordinates of the weak point in the original weak point file. Generate a vulnerability file manual for the current layer pattern of the chip, the vulnerability file manual containing the global coordinates of the vulnerability and the pattern marked with the vulnerability.

[0007] In one alternative embodiment of this application, all the weakness patterns in the chip layer are set to the same size.

[0008] In one optional embodiment of this application, after marking the location of the weakness, at least two global and detail images marked with the weakness are captured at different magnifications.

[0009] In an optional embodiment of this application, the weakness manual further includes the target size value of the weakness.

[0010] In an optional embodiment of this application, the weakness manual further includes the measurement direction of the weakness.

[0011] In an optional embodiment of this application, the formula for the coordinate transformation calculation method is:

[0012]

[0013] in, Let X be the global coordinate value of the weakness of the single exposure grid in the X direction. Let be the global coordinate value of the weakness of the single exposure grid in the Y direction. These are the local coordinates of the weakness in the X direction in the original file of the weakness. These are the local coordinates of the weakness in the Y direction in the original file of the weakness. This represents the offset of the chip in the X direction of a single exposure grid. This represents the offset of the chip in the Y direction within a single exposure grid.

[0014] To achieve the above and other related objectives, this application also provides an executable program manufactured using the above method. The executable program runs on a hardware device within a preset system environment. The executable program and the OPC simulation software are installed within the same preset system environment. The executable program includes: The weakness file reading module can read the original weakness file of the current layer pattern of the chip in the OPC simulation calculation software. The original weakness file includes: the local coordinates of the chip where the weakness is located and the weakness pattern. The algorithm processing module uses a preset clustering algorithm module to classify the weakness into at least two categories based on the local coordinates in the original weakness file: single-point measurement weakness and multi-point measurement weakness. The module also marks the weakness in the weakness graph and extracts at least two global and detail images with different magnifications that are marked with the weakness. The coordinate transformation module obtains the global coordinates of the weak point of the single exposure grid based on the position coordinates of the chip in a single exposure grid and the local coordinates of the weak point; The manual generation module generates a weakness manual for the current layer of the chip's graphic weaknesses based on the results of the algorithm processing module and the coordinate transformation module.

[0015] This application discloses a method, execution program, device, and medium for creating a chip layout weakness manual, comprising: obtaining the original weakness file of the current layer pattern of the chip based on simulation results from OPC simulation software, wherein the original weakness file includes: local coordinates within the chip where the weakness is located and the weakness graphic; processing the local coordinates in the original weakness file using a clustering algorithm to classify the weakness into at least two categories: single-point measurement weakness and multi-point measurement weakness, and marking the position of the weakness in the weakness graphic; obtaining the global coordinates of the weakness in the single exposure grid using a coordinate transformation calculation method based on the position coordinates of the chip in a single exposure grid and the local coordinates of the weakness in the original weakness file; generating a weakness manual of the current layer pattern of the chip, wherein the weakness manual includes the global coordinates of the weakness and the graphic marked with the weakness. Using this application, screenshots of single-point measurement weaknesses and multi-point measurement weaknesses, as well as the creation of the weakness manual, can be automatically completed, replacing tedious manual review and creation, effectively saving manpower, reducing the weakness analysis and verification cycle, and improving the R&D efficiency of new products. Attached Figure Description

[0016] Figure 1 A flowchart illustrating a method for creating a chip layout weakness manual as provided in an exemplary embodiment of this application; Figure 2 A detailed flowchart illustrating a method for creating a chip layout weakness manual as provided in an exemplary embodiment of this application; Figure 3This is a schematic diagram of a global view of an exemplary implementation of this application; Figure 4 A schematic diagram showing details of an exemplary embodiment of this application; Figure 5 A structural block diagram of the executable program for a method of creating a chip layout weakness manual provided as an exemplary embodiment of this application. Detailed Implementation

[0017] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0018] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the illustrations only show the components related to this application and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0019] In the manufacturing process of semiconductor integrated circuits, as process nodes continue to shrink to the nanometer scale, the window for photolithography becomes extremely narrow. During complex process steps such as photolithography, etching, and chemical mechanical planarization, certain pattern structures in the design layout are highly susceptible to physical defects on the wafer, such as bridging, open circuits, and critical dimension deviations, due to the effects of optical proximity, three-dimensional masking, or etching load. These easily failing pattern structures are defined as weaknesses in semiconductor physics and photolithography. To accurately monitor and optimize these weaknesses, optical proximity correction engineers need to compile multi-dimensional information about weaknesses into a standardized weakness manual, providing a basis for subsequent analysis and optimization of weaknesses based on semiconductor wafer data measured according to the manual's contents.

[0020] However, in related technologies, the creation of weakness manuals is highly dependent on manual operation. Optical proximity correction engineers need to manually locate weaknesses one by one in complex layout files, manually distinguishing which areas belong to adjacent areas requiring multi-point joint measurement and which belong to single-point measurement areas. Next, engineers need to manually perform tedious coordinate transformations and manually take screenshots of the layout, manually arrange the data, and enter it. This series of purely manual operations not only consumes a lot of time and manpower, but also the manual coordinate transformation and data entry are prone to human error, greatly increasing the cycle of weakness analysis and verification and reducing the efficiency of new product development.

[0021] Based on this, a method for creating a chip layout weakness manual is provided. By introducing a density-based spatial clustering algorithm, the method automatically identifies weak groups that are spatially adjacent, have synergistic physical effects, and require multi-point joint measurement under the same physical field of view. The method automatically completes the creation of single-point and multi-point measurement screenshots and the weakness manual, replacing the tedious manual review and creation process. This effectively saves manpower, reduces the weakness analysis and verification cycle, and improves the R&D efficiency of new products.

[0022] To ensure the rigor, clarity, and consistency of the technical solution in this application, the core technical terms, technical names, and technical concepts involved in this application are first defined and explained in a centralized manner: A weak point typically refers to a specific pattern in a product that is most prone to problems. It is an individual pattern with a small lithography window that OPC (Optical Proximity Correction) engineers focus on inspecting.

[0023] Weakness source file: refers to an electronic data file that records weakness information, which is usually generated by optical proximity simulation software. The weakness source file contains at least the local coordinates of the chip where the weakness is located and the weakness graphic, and may also include other information such as the target size value and measurement direction.

[0024] DB SCAN clustering algorithm: refers to a density-based spatial clustering algorithm for applications with noise. This algorithm, by setting two core parameters—the neighborhood radius eps and the minimum number of samples required within the neighborhood radius min_samples—can discover clusters of arbitrary shapes, grouping closely adjacent, high-density points into one class, while effectively identifying and isolating noise points. In this application, this algorithm is used to automatically identify multiple spatially adjacent weak points.

[0025] Local coordinates: refer to the coordinate values ​​in a chip coordinate system (such as a two-dimensional Cartesian coordinate system) constructed with a specific reference point of a single chip (Die) as the origin, used to define the design position of each graphic element inside the chip.

[0026] Global coordinates: refers to the coordinate values ​​in a global coordinate system (such as a two-dimensional Cartesian coordinate system) constructed with the physical center of a single exposure grid as the origin. It is used to define the absolute physical position of each chip and its graphic elements within a single exposure grid.

[0027] Shot: refers to the rectangular exposure area covered on the wafer surface by a lithography machine in a complete exposure step.

[0028] Weakness Manual: A standardized technical document used to guide measurement equipment in the automatic measurement and alignment of weaknesses. The Weakness Manual includes at least the global coordinates of the weakness and a graphic indicating the weakness, and may also include other information such as the target size value of the weakness and the measurement direction.

[0029] Please see Figure 1 As shown, an exemplary embodiment of this application provides a method for manufacturing a chip layout weakness manual, the method comprising: Step S10: Based on the simulation results of the OPC simulation software, obtain the original file of the weakness of the current layer of the chip. The original file of the weakness includes: the local coordinates of the weakness in the chip and the weakness pattern. Step S20: Use a clustering algorithm to process the local coordinates in the original weakness file, classify the weakness into at least two categories: single-point measurement weakness and multi-point measurement weakness, and mark the position of the weakness in the weakness graph. Step S30: Using a coordinate transformation calculation method, the global coordinates of the weak point in the single exposure grid are obtained based on the position coordinates of the chip in the single exposure grid and the local coordinates of the weak point in the original weak point file. Step S40: Generate a vulnerability file manual for the current layer pattern of the chip. The vulnerability file manual includes the global coordinates of the vulnerability and the pattern marked with the vulnerability.

[0030] The following is combined with Figure 1 and Figure 2 The embodiments of this application will be described in further detail below.

[0031] First, step S10 is executed to obtain the original file of the weakness of the current layer of the chip based on the simulation results of the OPC simulation software. The original file of the weakness includes the local coordinates of the weakness within the chip and the weakness pattern.

[0032] During the new product development process, after the Recipe (process formula / manufacturing program) is delivered, OPC engineers can obtain the original file of the weakness of the current layer of the chip based on the simulation results of OPC simulation calculation software, such as Calibre Workbench. This file includes at least the local coordinates of the weakness within the chip and the weakness graph.

[0033] Complex chip designs typically involve dozens of different chip layers. Because the critical dimensions and weaknesses differ between layers, users can customize the layer attributes of screenshots, as well as the size and magnification of the captured global and detail images, according to their needs. Layer attributes include information such as the layers involved in the screenshot and their corresponding layer numbers. The dimensions of all the weakness graphics in a chip layer can be set to the same size or different sizes.

[0034] In an optional embodiment, the original weakness file also includes other information such as the measurement direction and target size value of the weakness. The measurement direction defines the specific measurement direction selected when measuring the weakness on the measurement device, such as horizontal, vertical, or a specific angle; the target size value defines the target CD (critical dimension) value that the design of this location is expected to achieve.

[0035] Then, step S20 is executed, in which a clustering algorithm is used to process the local coordinates in the original weakness file, classifying the weakness into at least two categories: single-point measurement weakness and multi-point measurement weakness, and marking the position of the weakness in the weakness graph.

[0036] In this application, the clustering algorithm is the DB SCAN clustering algorithm. The DB SCAN algorithm performs spatial clustering of the local coordinates of all weaknesses in the original weakness file to classify the weaknesses. The DB SCAN algorithm automatically groups closely spaced, multi-point joint measurements of adjacent weaknesses that are close together into the same multi-point measurement weakness category by finding high-density point groups in space, and assigns a unique number (e.g., 0, 1, 2, ...) to each multi-point measurement weakness category. For isolated weaknesses that are sparsely distributed in space and cannot be grouped with other points, the algorithm also treats them as independent single-point measurement weakness categories and assigns them a unique number. After classification, the system can save the classification results and corresponding numbers to a temporary database, providing a logical basis for subsequent automated screenshot control.

[0037] It should be noted that when using the DB SCAN clustering algorithm to classify and number the weaknesses in the original weakness file, the parameters of the clustering algorithm need to be set appropriately to adapt to the actual process nodes and measurement requirements. In this embodiment, by setting the value of the neighborhood radius eps, adjacent weaknesses that are within the neighborhood radius eps and can be jointly measured at multiple points can be grouped into the same category. In the subsequent automatic screenshot step, the system can capture these adjacent weaknesses into the same global or detail view window at once, greatly reducing the number of repeated screenshots and improving screenshot efficiency. At the same time, by setting the minimum number of samples to be included within the neighborhood radius min_samples to 1, it can be ensured that even a single point that is completely isolated in spatial distribution will be classified by the algorithm and assigned a unique number, and will not be filtered out as a noise point. This ensures that every weakness can be included in the automatic screenshot and manual production process, achieving zero missed detection of isolated single points and ensuring the completeness and accuracy of weakness analysis.

[0038] It should be noted that the neighborhood radius eps is not fixed, but is dynamically adjusted within a certain range according to the actual process node and measurement requirements, such as within the range of 500nm to 1200nm, for example, 800nm.

[0039] As semiconductor manufacturing processes continue to shrink, the critical distances and spatial distribution characteristics between weaknesses differ significantly from mature to advanced processes. By dynamically adjusting the neighborhood radius eps within a certain range, the algorithm's process adaptability is greatly improved. For example, at coarser process nodes, where weakness distribution is relatively sparse, the system can dynamically adjust the neighborhood radius eps to a larger value (e.g., 1200 mm) to expand the clustering range and group weaknesses within a larger spatial area into one class. However, at advanced nanoscale process nodes, the patterns are extremely dense, and even small distance changes can cause severe optical proximity effects. In this case, the system needs to dynamically adjust the neighborhood radius eps to a smaller value (e.g., 500 nm) to achieve finer classification. This dynamic adjustment mechanism ensures the versatility and flexibility of this method across multiple generations of semiconductor processes.

[0040] In this embodiment, after marking the location of the weakness in the weakness graph, at least two global and detail images marked with the weakness are captured at different magnifications. The global image has a smaller magnification than the detail image, and the layout area of ​​the global image includes the layout area of ​​the detail image. The global image has a larger coverage area and field of view, fully displaying the weakness and its surrounding large-scale layout environment, facilitating engineers and measurement equipment to locate the relative position of the weakness in the macroscopic layout and observe the surrounding graphic density and proximity effect. The detail image has a smaller coverage area and higher resolution, focusing on the weakness itself to clearly distinguish the specific geometric features and microstructures of the weakness, such as line width, line ends, and corners. By combining the large-coverage global image with the high-resolution detail image, the weakness manual can simultaneously provide the macroscopic environment and microscopic details, avoiding the problems of "seeing details clearly but not finding the location" or "finding the location but not seeing the details" caused by a single screenshot window.

[0041] In this embodiment, when marking the location of the weakness in the weakness diagram, a new marker layer can be added to the weakness diagram. Then, based on the coordinate information of each weakness, markers are added to all weaknesses on the marker layer, such as... Figure 3 and Figure 4 The black rectangular block marker in the text. It should be understood that the marker is not limited to... Figure 3 and Figure 4 The shape can be selected according to actual needs and user preferences.

[0042] Next, step S30 is executed, using a coordinate transformation calculation method to obtain the global coordinates of the weak point in the single exposure grid based on the position coordinates of the chip in the single exposure grid and the local coordinates of the weak point in the original weak point file.

[0043] In semiconductor manufacturing and metrology processes, the original weakness file typically uses a local coordinate system based on the chip, while actual measurement uses a global coordinate system based on a single exposure grid. To enable the measurement equipment to automatically locate the weakness on a single exposure grid according to the manual, the local coordinates need to be converted to global coordinates. Therefore, when generating the weakness file manual, a coordinate transformation calculation method is first used to obtain the global coordinates of the weakness on that single exposure grid based on the chip's position coordinates within the single exposure grid and the local coordinates of the weakness in the original weakness file.

[0044] An exposure slot (Shot) refers to the rectangular exposure area covered on the wafer surface by a lithography machine in a single exposure step. Since the size of the area exposed in a single lithography session (i.e., the exposure slot size) is fixed due to limitations imposed by the optical system, if the size of a single die is much smaller than the exposure slot, and only one die is placed within the slot, a significant amount of effective exposure area will be wasted. Therefore, to maximize the utilization of the area within the exposure slot, a layout strategy of integrating multiple chips within a single exposure slot is typically adopted. Specifically, when the die size is small, multiple identical chips can be regularly arranged within the exposure slot to achieve batch replication in a single exposure; additionally, multiple chips of different sizes from different design projects can be integrated and laid out within the same mask and exposure slot.

[0045] After clarifying the arrangement strategy of multiple chips within the exposure grid, the precise position of each chip within the grid becomes a key parameter that needs to be quantified and defined. The position coordinates of a chip within a single exposure grid refer to the chip's offset within the grid, including, for example, the offset in the X direction. offset in the Y direction This data can be obtained directly from the chip floorplan. Accurately obtaining these coordinates is a necessary prerequisite for subsequently converting the local coordinates of weaknesses within the chip into global coordinates of the exposure grid, thereby ensuring that the measurement equipment can accurately locate the target position.

[0046] The formula for coordinate transformation calculation is as follows:

[0047]

[0048] in, Let X be the global coordinate value of the weakness of the single exposure grid in the X direction. Let be the global coordinate value of the weakness of the single exposure grid in the Y direction. These are the local coordinates of the weakness in the X direction in the original file of the weakness. These are the local coordinates of the weakness in the Y direction in the original file of the weakness. This represents the offset of the chip in the X direction of a single exposure grid. This represents the offset of the chip in the Y direction within a single exposure grid.

[0049] Using the above formula, the system can automatically and quickly convert the local coordinates of weak points in the design space into the global coordinates of a single exposure grid, eliminating the input errors and calculation deviations that are very easy to occur when manually calculating and converting coordinates in the traditional way, and providing high-precision coordinate data for the automatic precision alignment and rapid scanning of measurement equipment.

[0050] Finally, step S40 is executed to generate a weakness file manual for the current layer pattern of the chip. The weakness file manual includes the global coordinates of the weaknesses and the pattern marked with the weaknesses.

[0051] When generating the chip's current layer graphic weakness file manual, the weakness graphic after adding the mark can be screenshotted according to the preset screenshot size and the weakness number to obtain the graphic marked with the weakness. Then, based on the global coordinates of the weakness obtained in step S30 and the graphic marked with the weakness, the weakness file manual is generated. The graphic marked with the weakness includes at least two global images and detail images marked with the weakness at different magnifications.

[0052] In one embodiment, the weakness document manual also includes other information such as the target size value of the weakness and / or the measurement direction of the weakness, which may be derived from the original weakness document. The measurement direction defines the specific measurement direction selected when measuring the weakness on a measurement device, such as horizontal, vertical, or a specific angle; the target size value defines the target CD (critical dimension) value that the design of this location is expected to achieve.

[0053] Figure 3 This is a schematic diagram of a global view of an exemplary embodiment of this application. Figure 4 This is a schematic diagram of a partial view of an exemplary embodiment of this application. Figure 3 and Figure 4As shown, the size ratio of the global map is smaller than that of the detail map, and the layout area of ​​the global map includes the layout area of ​​the detail map. The global map has a larger coverage and field of view, fully displaying the weakness and its surrounding large-scale graphic environment, making it easier for engineers and measurement equipment to locate the relative position of the weakness in the macro layout and observe the surrounding graphic density and proximity effect. The detail map, on the other hand, has a smaller coverage and higher resolution, focusing on the weakness itself to clearly distinguish the specific geometric features and microstructures of the weakness, such as line width, line ends, and corners. By combining the large-coverage global map with the high-resolution detail map, the weakness manual can provide both the macro environment and micro details simultaneously, avoiding the problems of "seeing details but not finding the location" or "finding the location but not seeing the details" caused by a single screenshot window. Figure 2 As shown in a specific example, when taking a screenshot, the layer to be screenshotted and the marked layer in the weakness graphic after adding the mark can be made visible, while other layers are made invisible to highlight the target content. At the same time, the screenshot record variable snapshot_record is initialized to an initial value (e.g., 0, which is configurable). Then, iterate through all the weakness numbers and determine whether the current weakness number is equal to the current value of the screenshot record variable `snapshot_record`: If so, then according to the preset screenshot size, a screenshot is taken of the area where the current weakness is located to obtain a global image and a detailed image of all weaknesses of the category to which the current weakness belongs, and the screenshot record variable is updated by accumulating, for example, by executing snapshot_record = snapshot_record + 1, the step size is configurable; If not, proceed to the next weakness and repeat the above judgment steps.

[0054] By making only the layers to be captured and the marker layers visible, the specific locations where key dimensions need to be measured can be clearly and intuitively marked in the captured global and detail images. At the same time, since the visual interference from non-defective areas and irrelevant layers is eliminated, the weakness features are more prominent, which greatly facilitates the subsequent manual review and measurement work.

[0055] Specifically, when taking a screenshot of the area where the current weakness is located according to the preset screenshot size, the system uses the local coordinates of the current weakness as the center and captures both the global image and the detail image according to the user-defined screenshot size. Since all adjacent weaknesses belonging to the same category have the same number, the system can capture all adjacent weaknesses of that category completely in the same global and detail images at once when taking a screenshot of the area where the current weakness is located. At the same time, with the help of the snapshot_record cumulative update mechanism, it can be ensured that all adjacent weaknesses of the same category are captured only once, thereby completely avoiding duplicate screenshots, effectively improving screenshot efficiency and saving storage space.

[0056] In summary, by using the cumulative update mechanism of the screenshot recording variable `snapshot_record`, combined with automated coordinate transformation and manual layout processes, the entire process of generating the original vulnerability file, layout file, and final standardized vulnerability manual is automated. This significantly shortens the vulnerability analysis and verification cycle and effectively improves the efficiency of new product development.

[0057] Based on the same concept, such as Figure 5 As shown, this application also provides an executable program 11 for the above-mentioned chip layout weakness manual manufacturing method. The executable program runs on a hardware device in a preset system environment. The executable program 11 and the OPC simulation calculation software are installed in the same preset system environment, such as the same high-performance server or the same cluster, which can produce significant technical effects.

[0058] On the one hand, this integrated deployment method enables the executable program to directly read and write data through the local file system or high-speed memory, avoiding the additional overhead caused by transmitting large-scale OPC simulation result data (such as vulnerability original files) across systems and networks, thereby improving data processing efficiency and the overall computing speed of the system. On the other hand, this solution realizes deep sharing and reuse of software stack and hardware resources, enabling the executable program to directly utilize the operating system, underlying function library, dependency package, and license resources already configured in the preset system environment. This not only effectively reduces the complexity of software deployment and maintenance costs in multi-system environments, but also avoids compatibility risks caused by environmental differences, significantly improving the integration and automation level of the R&D process.

[0059] The execution program 11 includes a vulnerability file reading module 111, an algorithm processing module 112, a coordinate transformation module 113, and a manual generation module 114.

[0060] The weakness file reading module 111 can read the original weakness file of the current layer pattern of the chip in the OPC simulation calculation software. The algorithm processing module 112 uses a preset clustering algorithm module to classify the weakness into at least two categories based on the local coordinates in the original weakness file: single-point measurement weakness and multi-point measurement weakness, and marks the position of the weakness in the weakness graph and extracts at least two global and detail images marked with the weakness at different magnifications. The coordinate transformation module 113 obtains the global coordinates of the weak point of the single exposure grid based on the position coordinates of the chip in a single exposure grid and the local coordinates of the weak point; The manual generation module 114 generates a weakness manual of the current layer graphic weakness of the chip based on the results of the algorithm processing module and the coordinate transformation module.

[0061] It should be noted that the execution program 11 provided in the above embodiments and the method for creating the chip layout weakness manual provided in the above embodiments belong to the same concept. The specific methods of execution of each module and unit have been described in detail in the method embodiments, and will not be repeated here. In practical applications, the execution program 11 provided in the above embodiments can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. This is not a limitation.

[0062] In summary, the chip layout weakness manual creation method, execution program, device, and medium of this application include: obtaining the original weakness file of the current layer pattern of the chip based on the simulation results of OPC simulation software, wherein the original weakness file contains: the local coordinates of the weakness within the chip and the weakness pattern; processing the local coordinates in the original weakness file using a clustering algorithm to classify the weakness into at least two categories: single-point measurement weakness and multi-point measurement weakness, and marking the position of the weakness in the weakness pattern; obtaining the global coordinates of the weakness in the single exposure grid using a coordinate transformation calculation method based on the position coordinates of the chip in a single exposure grid and the local coordinates of the weakness in the original weakness file; and generating a weakness manual of the current layer pattern of the chip, wherein the weakness manual contains the global coordinates of the weakness and the pattern marked with the weakness. By automatically completing the entire process of weakness classification (single-point measurement weakness, multi-point measurement weakness), coordinate transformation, screenshotting, and generation of weakness documentation manuals, no manual intervention is required. This not only eliminates human risks such as coordinate transformation errors introduced by manual operation, but also completely liberates engineers from the tedious and repetitive manual production work, allowing them to focus on subsequent weakness analysis and optimization work. This effectively saves labor costs, reduces the weakness analysis and verification cycle, and improves overall R&D efficiency.

[0063] This application innovatively uses the DB Scan clustering algorithm to classify weaknesses, automatically grouping spatially adjacent weaknesses suitable for multi-point measurement into the same category and assigning them a unique number. With the help of the snapshot_record cumulative update mechanism, it can be ensured that all adjacent weaknesses in the same category are captured only once, thereby avoiding the problem of duplicate screenshots, eliminating the additional review burden caused by redundant screenshots, effectively improving screenshot efficiency and saving storage space.

[0064] This application sets the minimum number of samples (min_samples) within the neighborhood radius of the DB Scan clustering algorithm to 1, ensuring that even spatially isolated weaknesses can be classified separately without being filtered as noise. This achieves zero missed detections of isolated single points, ensuring that each weakness is included in the automatic screenshot and manual production process, thus guaranteeing the completeness and accuracy of Weak Point analysis.

[0065] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

[0066] The above description of the embodiments shown in this application (including the content set forth in the abstract of the specification) is not intended to be an exhaustive enumeration or to limit this application to the precise forms disclosed herein. Although specific embodiments and examples of this application have been described herein for illustrative purposes only, various equivalent modifications are possible within the spirit and scope of this application, as will be recognized and understood by those skilled in the art. As indicated, these modifications can be made to this application in accordance with the above description of the embodiments described herein, and such modifications will be within the spirit and scope of this application.

[0067] Therefore, although this application has been described herein with reference to specific embodiments thereof, freedom of modification, various changes and substitutions are also within the scope of the above disclosure, and it should be understood that in some cases, certain features of this application may be adopted without departing from the scope and spirit of the application and without corresponding use of other features. Thus, many modifications can be made to adapt a particular environment or material to the substantive scope and spirit of this application. This application is not intended to be limited to the specific terminology used in the following claims and / or the specific embodiments disclosed as the best mode contemplated for carrying out this application, but this application will include any and all embodiments and equivalents falling within the scope of the appended claims. Therefore, the scope of this application will be determined only by the appended claims.

Claims

1. A method for fabricating a chip layout weakness manual, characterized in that, include: Based on the simulation results of OPC simulation software, the original file of the weakness of the current layer of the chip is obtained. The original file of the weakness includes: the local coordinates of the weakness within the chip and the weakness pattern. Clustering algorithms are used to process the local coordinates in the original weakness file, and the weaknesses are classified into at least two categories: single-point measurement weaknesses and multi-point measurement weaknesses, and the positions of the weaknesses are marked in the weakness graph. Using a coordinate transformation calculation method, the global coordinates of the weak point in a single exposure grid are obtained based on the chip's position coordinates in a single exposure grid and the local coordinates of the weak point in the original weak point file. Generate a vulnerability file manual for the current layer pattern of the chip, the vulnerability file manual containing the global coordinates of the vulnerability and the pattern marked with the vulnerability.

2. The manufacturing method according to claim 1, characterized in that, The clustering algorithm is the DB SCAN clustering algorithm.

3. The manufacturing method according to claim 2, characterized in that, All the weakness patterns in the chip layer are set to the same size.

4. The manufacturing method according to claim 1, characterized in that, After marking the location of the weakness, at least two global and detail images marked with the weakness are captured at different magnifications.

5. The manufacturing method according to claim 4, characterized in that, The weakness manual also includes target values ​​for the size of the weaknesses.

6. The manufacturing method according to claim 1, characterized in that, The weakness manual also includes the measurement direction of the weakness.

7. The manufacturing method according to claim 1, characterized in that, The formula for the coordinate transformation calculation method is as follows: in, Let X be the global coordinate value of the weakness of the single exposure grid in the X direction. Let be the global coordinate value of the weakness of the single exposure grid in the Y direction. These are the local coordinates of the weakness in the X direction in the original file of the weakness. These are the local coordinates of the weakness in the Y direction in the original file of the weakness. This represents the offset of the chip in the X direction of a single exposure grid. This represents the offset of the chip in the Y direction within a single exposure grid.

8. An executable program for the manufacturing method as described in claim 1, wherein the executable program runs on a hardware device in a preset system environment, characterized in that, The executable program and the OPC simulation software are installed in the same preset system environment. The executable program includes: The weakness file reading module can read the original weakness file of the current layer pattern of the chip in the OPC simulation calculation software; The algorithm processing module uses a preset clustering algorithm module to classify the weakness into at least two categories based on the local coordinates in the original weakness file: single-point measurement weakness and multi-point measurement weakness. The module also marks the position of the weakness in the weakness graph and extracts at least two global and detail images with different magnifications that are marked with the weakness. The coordinate transformation module obtains the global coordinates of the weak point of the single exposure grid based on the position coordinates of the chip in a single exposure grid and the local coordinates of the weak point; The manual generation module generates a weakness manual for the current layer of the chip's graphic weaknesses based on the results of the algorithm processing module and the coordinate transformation module.

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