A lightweight seq2seq inference deployment system and method for semiconductor batch process management

CN123014593APending Publication Date: 2026-10-30SHANGHAI GLORYSOFT CO LTD
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Patent Information

Application Number
CN202611343577.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-01
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0003]现有大参数量NLP模型(如BERT类、大语言模型)虽具备一定文本理解能力,但存在模型体积大、训练周期长、推理延迟高、部署算力成本高的问题,无法匹配产线批量处理的吞吐量要求;且外部API依赖会带来数据安全风险与稳定性问题

Benefits of technology

[0035]本发明的系统部署成本低,模型体积小,无需高额算力投入,可直接部署于企业现有标准服务器基础设施。

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Abstract

The application provides a lightweight Seq2Seq inference deployment system and method for semiconductor batch process management, which comprises a process flow generation and error detection inference module; the process flow generation and error detection inference module comprises a process generation submodule and an error detection submodule; wherein the process generation submodule outputs compliant process codes for input product information, design information and production constraints; the error detection submodule identifies missing processes, incorrect process codes, invalid sequences, parameter mismatches and other abnormalities deviating from the standard for input inventory or newly generated process codes. The system has low deployment cost, small model size, does not require high computing power investment, can be directly deployed on the existing standard server infrastructure of enterprises, has high processing efficiency (about 1 second per inference), supports batch scheduling, and can meet the production processing demand of tens of thousands of pieces per week.
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Description

Technical Field

[0001] This invention belongs to the field of intelligent manufacturing system technology, specifically relating to a lightweight process batch generation and testing deployment system for semiconductor enterprise ERP systems. Background Technology

[0002] Semiconductor manufacturing companies need to generate and verify tens of thousands of process flows every week, and have strict requirements on the system's processing throughput, response speed, and deployment cost.

[0003] While existing NLP models with large parameters (such as BERT-like models and large language models) have certain text understanding capabilities, they suffer from problems such as large model size, long training cycle, high inference latency, and high deployment computing cost, which cannot meet the throughput requirements of production line batch processing; and external API dependencies can bring data security risks and stability issues. Summary of the Invention

[0004] This invention aims to overcome the above-mentioned defects and achieve production-level deployment with low computing power cost, low latency, and high throughput while meeting the accuracy requirements of process generation and error detection. It provides a lightweight Seq2Seq inference deployment system and method for semiconductor batch process management, which is compatible with the existing ERP system architecture such as SAP.

[0005] This invention provides a lightweight Seq2Seq inference deployment system for semiconductor batch process management, characterized in that it includes a process flow generation and error detection inference module;

[0006] The process flow generation and error detection reasoning module includes a process generation submodule and an error detection submodule.

[0007] The process generation submodule outputs compliant process codes based on the input product information, design information, and production constraints.

[0008] The error detection submodule identifies missing processes, erroneous process codes, invalid sequences, parameter mismatches, and other deviations from the standard for input existing or newly generated process codes.

[0009] Furthermore, the lightweight Seq2Seq inference deployment system for semiconductor batch process management provided by the present invention is further characterized in that:

[0010] The process flow generation and error detection inference module is based on the Seq2Seq model.

[0011] Furthermore, the lightweight Seq2Seq inference deployment system for semiconductor batch process management provided by the present invention is further characterized in that:

[0012] The process flow generation and error detection inference module is integrated with the ERP system.

[0013] Furthermore, the lightweight Seq2Seq inference deployment system for semiconductor batch process management provided by the present invention is further characterized in that:

[0014] The process flow generation and error detection inference module supports batch process processing.

[0015] Furthermore, the lightweight Seq2Seq inference deployment system for semiconductor batch process management provided by the present invention is further characterized in that:

[0016] The architecture employs a four-layer structure, from bottom to top: data layer, NLP engine layer, integration layer, and application layer.

[0017] Among them, the lightweight industrial text domain adaptation module and the process flow generation and error detection reasoning module are deployed in the NLP engine layer;

[0018] A lightweight domain adaptation module for industrial text enables domain semantic normalization and feature enhancement.

[0019] The process flow generation and error detection reasoning module generates the process flow and compares the generated flow with the existing flow to realize the process generation task and error detection.

[0020] The data layer uniformly manages input source data and historical data, and performs uniform formatting on heterogeneous data;

[0021] The integration layer provides API interfaces to connect to the SAP system, supports scheduled background task scheduling, and enables batch process generation and verification.

[0022] The application layer provides a web-based interactive interface, supports process generation, verification, and manual review functions, and allows for role-based access control.

[0023] Furthermore, the present invention provides a lightweight Seq2Seq inference deployment method for semiconductor batch process management, characterized by comprising the following steps:

[0024] The process flow is generated based on Seq2Seq, and process anomalies are checked synchronously.

[0025] Furthermore, the lightweight Seq2Seq inference deployment method for semiconductor batch process management provided by the present invention is further characterized in that:

[0026] The process flow generation method is as follows: based on the input product information, design information and production constraints, and in accordance with semiconductor process rules, output a compliant and ordered sequence of process codes.

[0027] Furthermore, the lightweight Seq2Seq inference deployment method for semiconductor batch process management provided by the present invention is further characterized in that:

[0028] The error detection method is to identify anomalies that deviate from the standard, such as missing operations, incorrect operation codes, invalid sequences, and parameter mismatches, based on the input of existing or newly generated process flows.

[0029] Furthermore, the lightweight Seq2Seq inference deployment method for semiconductor batch process management provided by the present invention is further characterized in that:

[0030] The steps for error detection are as follows:

[0031] S1. Understanding process flow coding;

[0032] S2. Compare with preset / learned standard process rules, sequences, and constraints;

[0033] S3. Calculate the compliance probability for each process and each sequence segment. If the probability is lower than the threshold, it is judged as abnormal. Alternatively, directly compare the compliance of each process and each sequence segment. If it does not comply, it is judged as abnormal.

[0034] Functions and effects of this invention:

[0035] The system deployment cost of this invention is low, the model size is small, no high computing power investment is required, and it can be directly deployed on the existing standard server infrastructure of an enterprise.

[0036] The system of this invention has high processing efficiency, with a single inference time of about 1 second, and supports batch scheduling, which can meet the production processing needs of tens of thousands of records per week.

[0037] The system data of this invention is secure and controllable, and the model is deployed locally, eliminating the need to call external large model APIs and avoiding the risk of leakage of core production data.

[0038] The system of this invention is easy to implement and can be quickly connected to existing SAP systems through standardized APIs without changing the original production management processes of enterprises. Attached Figure Description

[0039] Figure 1 Model performance comparison chart: Comparison of BERTBase, Seq2Seq, and Seq2Seq with attention in terms of parameter count, training time, and inference time. Detailed Implementation

[0040] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] The overall system architecture of a lightweight industrial NLP process flow automatic generation and error detection system for semiconductor manufacturing provided in this embodiment is as follows:

[0042] This system adopts a four-layer architecture, from bottom to top: data layer, NLP engine layer, integration layer, and application layer.

[0043] Data Layer: Unifies the management of three types of input source data and historical data, including basic product information (product family, grade, performance indicators, stored in the enterprise's main product database), product design information (physical dimensions, electrical characteristics, layout, material composition), and production rules and constraints (quality standards, equipment capabilities, process logic); it also maintains historical process flow records, production logs, and quality records; and achieves unified format processing of heterogeneous data through data access and normalized pipelines.

[0044] NLP Engine Layer: This is the core processing layer of the system, containing a model inference module (based on Seq2Seq generation and classification).

[0045] Integration Layer: Provides standardized API interfaces for connecting to SAP systems, supports scheduled background task scheduling, and can batch execute process generation and error detection tasks, matching the processing volume of tens of thousands of records per week.

[0046] Application layer: Provides a web-based interactive interface, supports process generation, verification, and manual review functions, and configures role-based access control.

[0047] The aforementioned Seq2Seq-based process flow generation and error detection inference module belongs to the NLP engine layer. Using a lightweight Seq2Seq model as its inference core, it can directly interface with existing enterprise ERP systems to achieve automatic process flow generation and compliance verification, and supports batch process processing. Its included process generation and error detection submodules simultaneously support automatic process generation and existing process error detection, achieving closed-loop management of the entire process lifecycle. Specifically,

[0048] The process generation submodule, based on the input product information, design information, and production constraints, outputs a compliant, ordered sequence of process codes that satisfies all manufacturing constraints.

[0049] The implementation method can be as follows: retrieve the standard text processed by the domain adaptation module, and the model generates process code step by step according to semiconductor process rules.

[0050] For example: output the first process step first;

[0051] Then output the second result based on the first result;

[0052] This process continues until a complete process flow is generated;

[0053] Because the model has learned all the correct process sequences, constraints, and taboos during training, the generated sequences are naturally compliant.

[0054] The error detection submodule identifies deviations from standards, such as missing operations, incorrect operation codes, invalid sequences, and parameter mismatches, for input existing or newly generated process flows.

[0055] The implementation method can be as follows: After the model understands the process flow code, it compares it with the preset / learned standard process rules, sequence and constraints, calculates the compliance probability for each process and each sequence, and judges it as abnormal if it is lower than the threshold, or directly compares the compliance of each process and each sequence, and judges it as abnormal if it does not comply.

[0056] In this embodiment, during the early research and development phase, three architectures were compared: BERTBase, Seq2Seq, and Seq2Seq with attention mechanism. Seq2Seq was finally selected as the basic model because it can balance accuracy and deployment efficiency.

[0057] like Figure 1 As shown, the comparative experimental data are as follows:

[0058] Regarding the accuracy results: Seq2Seq achieved an overall accuracy of 91% for the "4" prefix process group and 88% for the "5" prefix group, which is significantly better than BERTBase (corresponding to 85% and 70% respectively); the single-step accuracy of Seq2Seq with attention mechanism is only 75%, and the additional complexity does not bring any benefit.

[0059] Regarding the lightweight results: The Seq2Seq model has approximately 4.1 million parameters, which is only 35% of the attention-based Seq2Seq and 4% of BERTBase. The training time is about 2 hours, and the inference time for a single process flow is about 1 second, which is far lower than the other two solutions.

[0060] The implementation scenarios for the above system are as follows:

[0061] Deployed at a semiconductor manufacturing plant, it interfaces with the plant's existing SAP system and is containerized and deployed on the plant's standard servers.

[0062] The system supports scheduled batch task execution and can handle the generation and verification of 20,000 to 80,000 process flows per week; the verification time for a single process flow is reduced from 30 minutes manually to less than 5 minutes; the overall process matching accuracy reaches 91%, meeting the requirements for production-level use.

Claims

1. A lightweight Seq2Seq inference deployment system for semiconductor batch process management, characterized in that: Includes a process flow generation and error detection inference module; The process flow generation and error detection reasoning module includes a process generation submodule and an error detection submodule; The process generation submodule outputs compliant process codes based on the input product information, design information, and production constraints. The error detection submodule identifies missing processes, erroneous process codes, invalid sequences, parameter mismatches, and other deviations from standards for the input existing or newly generated process codes.

2. The lightweight Seq2Seq inference deployment system for semiconductor batch process management as described in claim 1, characterized in that: The process flow generation and error detection reasoning module is based on the Seq2Seq model.

3. The lightweight Seq2Seq inference deployment system for semiconductor batch process management as described in claim 1, characterized in that: The process flow generation and error detection reasoning module is integrated with the ERP system.

4. The lightweight Seq2Seq inference deployment system for semiconductor batch process management as described in claim 1, characterized in that: The process flow generation and error detection inference module supports batch process processing.

5. A lightweight Seq2Seq inference deployment system for semiconductor batch process management as described in claim 1, characterized in that: The architecture employs a four-layer structure, from bottom to top: data layer, NLP engine layer, integration layer, and application layer. The NLP engine layer is equipped with an industrial text lightweight domain adaptation module and a process flow generation and error detection inference module. The lightweight domain adaptation module for industrial text enables domain semantic normalization and feature enhancement. The process flow generation and error detection reasoning module generates a process flow and compares the generated flow with an existing flow to realize the process generation task and error detection. The data layer uniformly manages input source data and historical data, and performs uniform formatting on heterogeneous data; The integration layer provides an API interface to connect to the SAP system, supports scheduled background task scheduling, and enables batch process generation and verification. The application layer provides a web-based interactive interface, supports process generation, verification, and manual review functions, and allows for the configuration of role-based access control.

6. A lightweight Seq2Seq inference deployment method for semiconductor batch process management, characterized in that, It includes the following steps: The process flow is generated based on Seq2Seq, and process anomalies are checked synchronously.

7. A lightweight Seq2Seq inference deployment method for semiconductor batch process management as described in claim 6, characterized in that: The process flow generation method is as follows: based on the input product information, design information and production constraints, and in accordance with semiconductor process rules, output a compliant and ordered sequence of process codes.

8. A lightweight Seq2Seq inference deployment method for semiconductor batch process management as described in claim 6, characterized in that: The error detection method is as follows: based on the input of existing or newly generated process flows, identify anomalies that deviate from the standard, such as missing processes, erroneous process codes, invalid sequences, and parameter mismatches.

9. A lightweight Seq2Seq inference deployment method for semiconductor batch process management as described in claim 6, characterized in that: The error detection steps are as follows: S1. Understanding process flow coding; S2. Compare with preset / learned standard process rules, sequences, and constraints; S3. Calculate the compliance probability for each process and each sequence segment. If the probability is lower than the threshold, it is judged as abnormal. Alternatively, directly compare the compliance of each process and each sequence segment. If it does not comply, it is judged as abnormal.