A method and device for measuring the size of knots in wood

Abstract

The application discloses a kind of wood knot size measurement method and device, it is related to forestry technical field.The method includes: host computer sends calibration instruction, completes calibration by FPGA driving camera acquisition calibration plate image;The wood to be measured is placed on operation platform, and host computer is based on the internal parameter matrix and distortion coefficient after calibration, the actual area corresponding to each pixel of imaging plane is calculated, and pixel address and area mapping relationship are written into FPGA;FPGA drives camera to collect wood image, identifies knot area by image processing algorithm, then according to the address of pixel occupied by knot area, the corresponding actual area is read and accumulated summation, and the actual size of knot is obtained.The application realizes the accurate measurement of any irregular knot contour by pixel-level area mapping, avoids the error caused by shape approximation, simultaneously, the multiplication and division operation is placed in host computer, effectively reduces the calculation resource consumption of FPGA, improves the measurement efficiency and accuracy.

Description

Technical Field

[0001] This application relates to the field of forestry technology, and in particular to a method and apparatus for measuring the size of wood knots. Background Technology

[0002] Knots are natural defects in wood that disrupt the continuity and aesthetics of the grain. Loose knots, in particular, are prone to falling off and forming cavities, severely damaging the wood fiber connections, reducing wood quality, and hindering processing and utilization. A large number and size of knots not only reduce the value of the wood but also reflect the health of the forest, making them an important indicator for forest cultivation research and wood processing engineering.

[0003] In existing technologies, the size of knots is calculated by treating the knot as a circle or ellipse, measuring the radius or major and minor axes manually, and approximating the size using the area formula for a circle (ellipse). However, knots in nature are not regular shapes, and the traditional measurement process introduces human calculation errors. The more irregular the shape of the knot, the greater the error introduced by the existing knot size calculation method. Summary of the Invention

[0004] Therefore, it is necessary to provide a method and apparatus for calculating the size of wood knots to address the aforementioned technical problems.

[0005] The present invention adopts the following technical solution: This invention provides a method for calculating the size of wood knots, applied to a wood knot size calculation system. The system includes: a host computer, an FPGA system, an industrial camera, and an operating platform. The host computer is connected to the FPGA system, the FPGA system is connected to the industrial camera, and the operating platform is horizontally positioned below the industrial camera. The system is characterized by including: The wood to be tested is placed on the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it is shooting the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. Write the actual area corresponding to the pixel address of each pixel in the imaging plane into the FPGA system; The FPGA system drives the calibrated industrial camera to acquire images of the wood to be tested, and uses image processing algorithms to identify the location and edges of knots in the images to obtain the knot regions in the images. Based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the images is determined, and the knot size of the wood to be tested is calculated.

[0006] Preferably, the calibration process for industrial cameras specifically includes: The host computer sends a calibration start command to the FPGA system, and the FPGA system controls the industrial camera to acquire images of the calibration board, which are then forwarded to the host computer via USB communication. Collect multiple sets of images of the chessboard calibration board from different positions and angles; The host computer uses the MATLAB camera calibration toolkit to solve for the intrinsic parameter matrix and distortion coefficients of the industrial camera based on multiple sets of chessboard calibration board images.

[0007] Preferably, the host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it photographs the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficients of the industrial camera. Specifically, this includes: The host computer obtains the vertical distance from the industrial camera to the center of the operating platform and the thickness of the wood to be measured placed on the operating platform, and determines the difference between the vertical distance from the industrial camera to the center of the operating platform and the thickness of the wood as the distance from the industrial camera to the imaging plane. Obtain the intrinsic parameter matrix, pixel size of the imaging plane, and distortion coefficient of the calibrated industrial camera; The host computer determines the camera scaling factor using the intrinsic parameter matrix and the distance from the industrial camera to the imaging plane; Based on the intrinsic parameter matrix and the pixel size of the imaging plane, determine the initial physical size of a single pixel in the imaging plane; Based on the distortion coefficient, the initial physical size of each pixel in the imaging plane is corrected to obtain the actual physical size of each pixel; and based on the actual physical size of each pixel, the actual area of ​​each pixel in the imaging plane is determined.

[0008] Preferably, the actual physical size of each pixel includes: a horizontal physical size and a vertical physical size; the actual area of ​​each pixel in the imaging plane is the product of the horizontal physical size of each pixel and the vertical physical size.

[0009] Preferably, the FPGA system identifies the location and edges of knots in the image of the wood to be tested using image processing technology to obtain the knot region in the image of the wood to be tested, specifically including: The FPGA system drives the camera to acquire images of the wood to be tested, performs color space conversion on the images of the wood to be tested, converts the RGB node image data into YCbCr node image data, and extracts the grayscale node image data from them; The grayscale nodal image data is subjected to bilateral filtering, and the filtered grayscale nodal image data is binarized to obtain a binarized nodal image. Sobel edge detection is performed on the binarized image to identify the edge pixels of the nodes; Morphological processing is performed on the nodule image after Sobel edge detection. The morphological processing includes erosion and dilation. Erosion removes isolated noise points, and dilation connects adjacent edges to obtain a complete closed nodule region.

[0010] Preferably, the actual area of ​​the knot region in the image of the wood to be tested is determined based on the actual area corresponding to the pixel address of the knot region in the imaging plane, thereby completing the knot size calculation of the wood to be tested. Specifically, this includes: The FPGA system uses a connected component identification algorithm to mark each independent connected component in the node region; Read the actual area corresponding to the pixel address of each pixel in each nodal region and sum them up to obtain the actual area of ​​the nodal region; When there are multiple knot regions in the image of the wood to be tested, the actual area of ​​each knot region is summed to obtain the total area of ​​knots in the image of the wood to be tested, thus completing the knot size measurement of the wood to be tested.

[0011] Preferably, after the FPGA system identifies the location and edge of knots in the image of the wood to be tested using image processing technology, the method further includes: The FPGA system determines the minimum and maximum pixel values ​​in the horizontal and vertical directions of each knot in the image coordinate system based on the knot position and knot edge in the image of the wood to be tested, thereby forming a rectangular box surrounding each knot region; Each knot's rectangle is marked in red and pixel-fused with the original image of the wood to be tested. The fused image is then displayed through an LCD driving module to obtain a knot display image. The actual area value of each knot region is superimposed on the rectangle in the knot display image, and the actual area of ​​all knot regions on the wood to be tested is superimposed on the lower right corner of the display image.

[0012] Preferably, after the fused image is displayed via the LCD driving module, the method further includes: The FPGA system detects control signals sent by the infrared remote controller in real time through an infrared receiver. When the FPGA system receives the result saving command from the infrared remote control, the FPGA system merges and encodes the nodule display image and the actual area of ​​all nodule regions superimposed on the nodule display image into a complete frame image, and writes it to the FPGA system's SD card for storage. After the image is saved, the driver will sound a buzzer for a preset duration to notify the user that the saving is complete.

[0013] This invention provides a device for measuring the size of wood knots, comprising: The pixel area mapping module is used to place the wood to be tested on the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it is shooting the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. The actual area corresponding to the pixel address of each pixel in the imaging plane is written into the FPGA system. The knot size calculation module is used by the FPGA system to drive the calibrated industrial camera to acquire images of the wood to be tested, and to identify the knot positions and edges in the wood images through image processing algorithms to obtain the knot regions in the wood images. Based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the wood images is determined, thus completing the knot size calculation of the wood to be tested.

[0014] The above-mentioned at least one technical solution adopted in this invention can achieve the following beneficial effects: In the wood knot size measurement method provided by this invention, the actual area of ​​each pixel in the imaging plane of the wood to be measured is calculated, and the actual area of ​​each pixel in the imaging plane of the wood to be measured is used as a tiny area unit. Then, the actual area corresponding to the pixel address of the pixel occupied by the knot region is accumulated and summed by the image recognition statistics of the FPGA module. This ensures that no matter how complex the shape of the knot is or how irregular the edge is, its size measurement can be strictly calculated based on the tiny area unit of the pixel occupied by the knot region and follow the true outline of the knot. This greatly reduces the knot measurement deviation caused by shape approximation.

[0015] Furthermore, since multiplication and division operations consume a significant amount of computing resources in the FPGA module during the actual calculation of nodal area, this invention addresses this issue by processing the multiplication and division operations during nodal measurement—that is, calculating the area of ​​each nodal image pixel—in the host computer and storing the calculation results in the FPGA module. When calculating nodal dimensions, the FPGA module only needs to sum the nodal regions identified by the image recognition algorithm built into the FPGA module, and then sum the actual areas corresponding to the pixel addresses in the identified nodal regions to obtain the nodal size measurement result. This method effectively reduces the multiplication and division operations in the FPGA, reduces the utilization of FPGA DSP resources, and greatly reduces the computational overhead of the FPGA. Attached Figure Description

[0016] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0017] Figure 1 A flowchart illustrating a method for calculating the size of wood knots provided by this invention; Figure 2 A structural diagram of a measurement system for a method of measuring the size of wood knots provided by the present invention; Figure 3 A schematic diagram of the FPGA software module for a method of measuring the size of wood knots provided by the present invention; Figure 4 A pixel-plane mapping diagram illustrating a method for measuring the size of wood knots provided by this invention; Figure 5 This is a schematic diagram of a wood knot size measuring device provided by the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments in the specification without creative effort are within the scope of protection of this application.

[0019] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0020] Figure 1 This is a flowchart illustrating a method for calculating the size of wood knots according to the present invention. Applied to a wood knot size calculation system, it includes: a host computer, an FPGA system, an industrial camera, and an operating platform. The host computer is connected to the FPGA system via USB communication. The FPGA system is connected to the industrial camera via a driver interface. The operating platform is horizontally positioned below the industrial camera at a certain distance. (See also...) Figure 2 Specifically, it includes the following steps: S101: Place the wood to be tested at the center of the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane of the wood to be tested based on the calibrated intrinsic parameter matrix of the industrial camera.

[0021] Optionally, the camera calibration process specifically includes: the host computer sending a calibration start command to the FPGA system; the FPGA system controlling the industrial camera to acquire images of the calibration board and forwarding them to the host computer via USB communication; acquiring multiple sets of checkerboard calibration board images at different positions and angles; and the host computer using the MATLAB camera calibration toolkit to solve for the intrinsic parameter matrix and distortion coefficients of the industrial camera based on the acquired checkerboard calibration board images.

[0022] Optionally, the host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when photographing the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. Specifically, this includes: the host computer obtaining the vertical distance from the industrial camera to the center of the operating platform and the thickness of the wood to be tested placed on the operating platform, and determining the difference between the vertical distance from the industrial camera to the center of the operating platform and the wood thickness as the distance from the industrial camera to the imaging plane; obtaining the calibrated intrinsic parameter matrix of the industrial camera, the pixel size of the imaging plane, and the distortion coefficient; determining the camera scaling factor through the intrinsic parameter matrix and the distance from the industrial camera to the imaging plane; determining the initial physical size of a single pixel in the imaging plane according to the intrinsic parameter matrix and the pixel size of the imaging plane; correcting the initial physical size calculated for each pixel in the imaging plane according to the distortion coefficient to obtain the actual physical size of each pixel; and determining the actual area of ​​each pixel in the imaging plane according to the actual physical size of each pixel.

[0023] The actual physical size of each pixel includes a horizontal physical size and a vertical physical size; the actual area of ​​each pixel in the imaging plane is the product of the horizontal physical size of each pixel and the vertical physical size.

[0024] S102: Write the actual area of ​​each pixel in the imaging plane into the FPGA system via USB communication.

[0025] S103: The FPGA system drives the calibrated industrial camera to acquire images of the wood to be tested, and identifies the location and edge of knots in the wood image through image processing algorithms to obtain the knot region in the wood image; based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the wood image is determined, and the knot size of the wood to be tested is calculated.

[0026] Optionally, the location and edges of knots in the wood image to be tested are identified using an image processing algorithm. Specifically, this includes: an FPGA system driving a camera to acquire an image of the wood to be tested; color space conversion of the wood image to convert RGB knot image data to YCbCr knot image data, and extracting grayscale knot image data; bilateral filtering of the grayscale knot image data, and binarization of the filtered grayscale knot image data to obtain a binarized knot image; Sobel edge detection of the binarized image to identify the edge pixels of the knots; and morphological processing of the knot image after Sobel edge detection, including erosion and dilation. Erosion removes isolated noise points, and dilation connects adjacent edges to obtain a completely closed knot region.

[0027] Optionally, the actual area of ​​the knot region in the image of the wood to be tested is determined based on the actual area corresponding to the pixel address of the pixel occupied by the knot region in the imaging plane, thereby completing the knot size calculation of the wood to be tested. Specifically, this includes: the FPGA system marks each independent knot connected component in the knot region through a connected component recognition algorithm; reading the actual area corresponding to the pixel address of each pixel in each knot connected component and accumulating them to obtain the actual area of ​​the knot region; when there are multiple knot regions in the image of the wood to be tested, the actual areas of each knot region are summed to obtain the total knot area in the image of the wood to be tested, thereby completing the knot size calculation of the wood to be tested.

[0028] Optionally, after the FPGA system identifies the knot positions and knot edges in the wood image under test using the Sobel image recognition algorithm, the method further includes: the FPGA system determines the minimum and maximum pixel values ​​of each knot in the horizontal and vertical directions in the image coordinate system based on the knot positions and knot edges in the wood image under test, thereby forming a rectangular frame surrounding each knot region; the rectangular frame of each knot is marked in red and pixel-fused with the original wood image under test, and the fused image is displayed through an LCD driving module to obtain a knot display image; the actual area value of each knot region is superimposed on the rectangular frame in the knot display image, and the actual area of ​​all knot regions on the current wood under test is superimposed on the lower right corner of the display image.

[0029] In addition, after the fused image is displayed through the LCD driver module, the process also includes: the FPGA system detecting the control signals sent by the infrared remote control in real time through the infrared receiver head; when the FPGA system receives the result saving instruction issued by the infrared remote control, the FPGA system merges and encodes the nodal display image and the actual area of ​​all nodal regions superimposed on the nodal display image into a complete frame image, and writes it to the FPGA system's SD card for storage; after the image storage is completed, the driver buzzer outputs a prompt tone of preset duration to notify the user that the saving is complete.

[0030] Specifically, to verify the effectiveness of the technical solution of the present invention, the present invention provides a specific embodiment.

[0031] Figure 2 This is a schematic diagram of a portable component size measurement system and method based on FPGA, according to an embodiment of this disclosure. The system comprises an industrial camera, a work platform, an embedded system, and a host computer. The industrial camera is an OV5640 camera, the work platform is a single black color, and the computer uses MATLAB to perform camera calibration.

[0032] Figure 3This is a schematic diagram of an embedded system (FPGA) in an embodiment of this disclosure. The dashed lines in the diagram represent the main functional modules implemented by the FPGA, and the area outside the dashed boxes represents peripherals. This embodiment is built on the Zhengdian Atom Da Vinci FPGA development board platform, with its FPGA chip being a Xilinx A7-200T. The required hardware modules include USB communication, camera interface, TF card interface, LCD interface and display screen, infrared receiver and converter, infrared remote control, buzzer, button and LED indicator module, DDR3 memory, etc.

[0033] The test system was set up according to... Figure 2 A test system was built, consisting of an industrial camera, embedded hardware, a host computer calibration program, and a workbench. The workbench and hardware system were fixed in place, and the distance between the camera and the imaging plane was recorded using the following formula:

[0034] ; in denoted as z, where z is the distance from the camera to the worktable, z is the distance from the camera to the imaging plane, and h is the thickness of the wood.

[0035] Step 2: Camera calibration using MATLAB scripts. First, the host computer sends a start calibration command, transferring the FPGA's image acquisition data to the host computer via USB. Next, the calibration board is placed on the workbench, and the host computer controls the acquisition of images of the calibration board from different angles. Finally, the MATLAB camera calibration toolkit is used to calibrate the camera's intrinsic parameters, obtaining the camera intrinsic parameter matrix, as shown below:

[0036] ; in This is the intrinsic parameter matrix. Horizontal focal length in pixels. The vertical focal length is in pixels. () represents the coordinates of the intersection of the optical axis and the imaging plane in the pixel coordinate system. This is the tilt parameter.

[0037] Further, see Figure 4 Input the distance between the camera and the imaging plane, and calculate the actual area corresponding to each pixel. The specific calculation formula is as follows: ; ; ; in, and dy The actual physical size corresponding to a single pixel. This represents the area in the real-world coordinate system corresponding to a single pixel.

[0038] The process of calculating the nodal area using the pixel area mapping method can be found in [link to documentation]. Figure 4 Each pixel in a camera can be mapped to a corresponding imaging region on the imaging plane, which is defined as the pixel's real-world mapping area, and its area can be denoted as... Assuming the camera is an ideal camera, when the camera intrinsic parameter matrix is ​​known... K Distance from camera to imaging plane z Then the solution can be found. Size.

[0039] However, all cameras exhibit distortion. When the distortion coefficient is known... k 1 、k 2 、k 3 、p 1 and p 2. This can be solved using MATLAB toolkits. The specific theoretical process is as follows: First, the solution can be obtained in the forward direction using the following formula, that is, through ideal coordinates ( , ) to obtain the distortion normalized size ( , ), ; Then, the coordinates are converted to distorted pixel coordinates using the intrinsic parameter matrix: ; The actual calculation process is the reverse of this process, that is, to find the ideal size through the distorted size: First, solve for the Jacobian matrix: ; in, ; Pixel area micro-element Mapped to actual area micro-element The mapping relationship can be obtained from the absolute value of the determinant of the Jacobian matrix: ; For a single pixel ( The actual physical area corresponding to this pixel is: ; The actual area corresponding to each pixel is calculated using MATLAB, and the obtained data is stored in DDR, where the pixel coordinates are the pixel addresses and the actual area is the stored data corresponding to the pixel addresses.

[0040] Meanwhile, the calculation method of the present invention can effectively reduce multiplication and division operations in FPGA, reduce the utilization of FPGA DSP resources, and greatly reduce FPGA overhead.

[0041] Furthermore, Write to the upper RAM of the FPGA via USB communication.

[0042] The third step is to place the wood on the workbench and wait for the FPGA to perform node calculations.

[0043] The fourth step involves nodule identification and area calculation within the image. First, the FPGA acquires image data and performs color space conversion. Next, the grayscale image undergoes bilateral filtering and binarization. Then, the binarized image is subjected to Sobel edge detection, supplemented by erosion and dilation morphological processing algorithms to identify nodule locations and edges. Finally, based on the number of pixels in the nodule region and their corresponding pixel addresses... , N Let (i,j) be the current node identifier and (i,j) be the current node pixel position. The actual area corresponding to the current pixel can be read by pixel address using an FPGA. Then, the actual areas corresponding to all pixels within the outline are summed to obtain the node area. Finally, the total area of ​​all node areas in the current wood is summed. The specific formula is as follows:

[0044] ; ; ; in, This represents the area of ​​the nodule in real-world coordinates. The total area of ​​this section n Here, k represents the current total number of nodes, and k is the current node flag. m This represents the current total number of wood knots.

[0045] The fifth step is result display and saving. When the FPGA identifies the location and edge of a knot, it saves the minimum and maximum pixels on the horizontal and vertical axes, forming a rectangular frame. The frame is highlighted in red and merged with the original image, driving the LCD display. Simultaneously, the knot area is displayed above the red frame, and the total area of ​​the current wood knots is displayed in the lower right corner of the image. Once the data is confirmed to be correct, it can be saved via an infrared remote control. Upon receiving a remote control signal, the currently displayed image frame is saved to an SD card for future data review.

[0046] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this invention.

[0047] The above describes a method for calculating the size of wood knots according to one or more embodiments of the present invention. Based on the same idea, the present invention also provides a corresponding device for calculating the size of wood knots, such as... Figure 5 As shown.

[0048] Figure 5 This is a schematic diagram of a wood knot size measuring device provided by the present invention. The device includes: The pixel area mapping module 501 places the wood to be tested on the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it is shooting the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. The actual area corresponding to the pixel address of each pixel in the imaging plane is written into the FPGA system. The knot size calculation module 502 is used by the FPGA system to drive the calibrated industrial camera to acquire images of the wood to be tested, and to identify the knot positions and knot edges in the wood images through image processing algorithms to obtain the knot regions in the wood images. Based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the wood images is determined, and the knot size of the wood to be tested is completed.

[0049] For specific limitations regarding the device for measuring the size of wood knots, please refer to the limitations of the method for measuring the size of wood knots mentioned above, which will not be repeated here. Each module in the aforementioned device for measuring the size of wood knots can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

Claims

1. A method for calculating the size of wood knots, applied to a wood knot size calculation system, the system comprising: The system comprises a host computer, an FPGA system, an industrial camera, and an operating platform. The host computer is connected to the FPGA system, the FPGA system is connected to the industrial camera, and the operating platform is horizontally positioned below the industrial camera. The system is characterized by including: The wood to be tested is placed on the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it is shooting the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. Write the actual area corresponding to the pixel address of each pixel in the imaging plane into the FPGA system; The FPGA system drives the calibrated industrial camera to acquire images of the wood to be tested, and uses image processing algorithms to identify the location and edges of knots in the images to obtain the knot regions in the images. Based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the images is determined, and the knot size of the wood to be tested is calculated.

2. The method for calculating the size of wood knots as described in claim 1, characterized in that, The calibration process for the industrial camera specifically includes: The host computer sends a calibration start command to the FPGA system, and the FPGA system controls the industrial camera to acquire images of the calibration board, which are then forwarded to the host computer via USB communication. Collect multiple sets of images of the chessboard calibration board from different positions and angles; The host computer uses the MATLAB camera calibration toolkit to solve for the intrinsic parameter matrix and distortion coefficients of the industrial camera based on multiple sets of chessboard calibration board images.

3. The method for calculating the size of wood knots as described in claim 1, characterized in that, The host computer, based on the calibrated intrinsic parameter matrix and distortion coefficients of the industrial camera, determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when photographing the wood to be tested. Specifically, this includes: The host computer obtains the vertical distance from the industrial camera to the center of the operating platform and the thickness of the wood to be measured placed on the operating platform, and determines the difference between the vertical distance from the industrial camera to the center of the operating platform and the thickness of the wood as the distance from the industrial camera to the imaging plane. Obtain the intrinsic parameter matrix, pixel size of the imaging plane, and distortion coefficient of the calibrated industrial camera; The host computer determines the camera scaling factor using the intrinsic parameter matrix and the distance from the industrial camera to the imaging plane; Based on the intrinsic parameter matrix and the pixel size of the imaging plane, determine the initial physical size of a single pixel in the imaging plane; Based on the distortion coefficient, the initial physical size of each pixel in the imaging plane is corrected to obtain the actual physical size of each pixel; and based on the actual physical size of each pixel, the actual area of ​​each pixel in the imaging plane is determined.

4. The method for calculating the size of wood knots as described in claim 3, characterized in that, The actual physical size of each pixel includes: horizontal physical size and vertical physical size; the actual area of ​​each pixel in the imaging plane is the product of the horizontal physical size of each pixel and the vertical physical size.

5. The method for calculating the size of wood knots as described in claim 1, characterized in that, The FPGA system uses image processing technology to identify the location and edges of knots in the image of the wood to be tested, thereby obtaining the knot region in the image of the wood to be tested, specifically including: The FPGA system drives the camera to acquire images of the wood to be tested, performs color space conversion on the images of the wood to be tested, converts the RGB node image data into YCbCr node image data, and extracts the grayscale node image data from them; The grayscale nodal image data is subjected to bilateral filtering, and the filtered grayscale nodal image data is binarized to obtain a binarized nodal image. Sobel edge detection is performed on the binarized image to identify the edge pixels of the nodes; Morphological processing is performed on the nodule image after Sobel edge detection. The morphological processing includes erosion and dilation. Erosion removes isolated noise points, and dilation connects adjacent edges to obtain a complete closed nodule region.

6. The method for calculating the size of wood knots as described in claim 1, characterized in that, The step of determining the actual area of ​​the knot region in the image of the wood to be tested based on the actual area corresponding to the pixel address of the knot region in the imaging plane, and completing the knot size measurement of the wood to be tested, specifically includes: The FPGA system uses a connected component identification algorithm to mark each independent connected component in the node region; Read the actual area corresponding to the pixel address of each pixel in each nodal region and sum them up to obtain the actual area of ​​the nodal region; When there are multiple knot regions in the image of the wood to be tested, the actual area of ​​each knot region is summed to obtain the total area of ​​knots in the image of the wood to be tested, thus completing the knot size measurement of the wood to be tested.

7. The method for calculating the size of wood knots as described in claim 1, characterized in that, After the FPGA system identifies the location and edge of knots in the image of the wood to be tested using image processing technology, it also includes: The FPGA system determines the minimum and maximum pixel values ​​in the horizontal and vertical directions of each knot in the image coordinate system based on the knot position and knot edge in the image of the wood to be tested, thereby forming a rectangular box surrounding each knot region; Each knot's rectangle is marked in red and pixel-fused with the original image of the wood to be tested. The fused image is then displayed through an LCD driving module to obtain a knot display image. The actual area value of each knot region is superimposed on the rectangle in the knot display image, and the actual area of ​​all knot regions on the wood to be tested is superimposed on the lower right corner of the display image.

8. The method for calculating the size of wood knots as described in claim 7, characterized in that, After the fused image is displayed via the LCD driver module, the following steps are also included: The FPGA system detects control signals sent by the infrared remote controller in real time through an infrared receiver. When the FPGA system receives the result saving command from the infrared remote control, the FPGA system merges and encodes the nodule display image and the actual area of ​​all nodule regions superimposed on the nodule display image into a complete frame image, and writes it to the FPGA system's SD card for storage. After the image is saved, the driver will sound a beep for a preset duration to notify the user that the saving is complete.

9. A device for measuring the size of wood knots, characterized in that, include: The pixel area mapping module is used to place the wood to be tested on the operating platform. The host computer determines the actual area corresponding to the pixel address of each pixel in the imaging plane formed by the industrial camera when it is shooting the wood to be tested, based on the calibrated intrinsic parameter matrix and distortion coefficient of the industrial camera. The actual area corresponding to the pixel address of each pixel in the imaging plane is written into the FPGA system. The knot size calculation module is used by the FPGA system to drive the calibrated industrial camera to acquire images of the wood to be tested, and to identify the knot positions and edges in the wood images through image processing algorithms to obtain the knot regions in the wood images. Based on the actual area corresponding to the pixel address of the knot region in the imaging plane, the actual area of ​​the knot region in the wood images is determined, thus completing the knot size calculation of the wood to be tested.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the method described in any one of claims 1 to 8.

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