A double-decoder-based circuit board occlusion anomaly detection method

Abstract

A circuit board occlusion removal anomaly detection method based on double decoders, the method comprising: first, adjusting the size of the occlusion-containing circuit board image to obtain an input circuit board image; second, extracting basic features to obtain an initial feature map, and generating first to fifth feature maps through five times of spatial size reduction and feature channel doubling operations; third, restoring the dimensions of the fifth feature map to generate fourth to first restored feature maps; fourth, fusing the restored feature maps with the corresponding feature maps to generate corresponding hybrid feature maps, restoring the dimensions of the first hybrid feature map and decoding to generate a preliminary occlusion removal image, while generating corresponding binary masks for the hybrid feature maps and the occlusion removal feature maps, and optimizing and weightedly fusing to obtain an accurate occlusion mask; and fifth, based on the accurate occlusion mask, weightedly fusing the preliminary occlusion removal image and the input circuit board image to generate a final occlusion removal image. Therefore, the design avoids gradual loss of image information during occlusion removal, and the image quality is good.

Description

Technical Field

[0001] This invention relates to a method for detecting circuit board occlusion anomalies, belonging to the field of visual anomaly detection, and particularly to a method for detecting circuit board occlusion anomalies based on a dual decoder. Background Technology

[0002] In visual anomaly detection during environmental testing of circuit boards in marine and electromechanical products, occlusion can render key features such as edges and textures invisible, making it difficult for detection algorithms to extract effective information. Furthermore, occlusion introduces interference such as shadows and reflections, increasing image noise and negatively impacting subsequent anomaly detection processing. Currently, image de-occlusion algorithms based on Generative Resistive Networks (GANs) are primarily used to remove occlusions on circuit boards. However, these algorithms rely on a single adversarial loss function and lack constraints on detailed features such as edges and textures. This leads to problems like blurred or missing detailed features, distorted structural information, and artifacts in the circuit board image during de-occlusion, resulting in gradual loss of image information and poor image quality.

[0003] Chinese patent application No. 202010199775.1, filed on June 23, 2020, discloses an image restoration method and a training method for an image restoration model. The method includes: acquiring a first target image to be restored; extracting target image features from the first target image; based on the target image features, acquiring target candidate region information and a target reference map, the target reference map carrying pattern information of the first target image; and restoring the first target image based on the target candidate region information and the target reference map to obtain a restored target image corresponding to the first target image. In the image restoration process, the consideration of image pattern information is added, providing a more comprehensive approach and improving the restoration effect, resulting in a more natural restored image. Although this patent can restore image occlusion using a generative resistance network, it still has the following drawbacks:

[0004] The design uses a single generative adversarial network, which cannot effectively preserve the key details of the circuit board, resulting in the gradual loss of image information during the de-occlusion process and poor image quality.

[0005] The information disclosed in this background section is intended only to enhance the understanding of the overall background of this patent application and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to overcome the defects and problems in the prior art where image information is gradually lost during the de-occlusion process, resulting in poor image quality. This invention provides a circuit board de-occlusion anomaly detection method based on dual decoders that avoids the gradual loss of image information and provides better image quality during the de-occlusion process.

[0007] To achieve the above objectives, the technical solution of the present invention is: a circuit board de-occlusion anomaly detection method based on dual decoders, the de-occlusion anomaly detection method comprising the following steps:

[0008] Step 1: Resize the image of the circuit board containing the obstruction to obtain an input circuit board image with equal length and width;

[0009] Step 2: First, perform basic feature extraction on the input circuit board image to obtain an initial feature map. Then, halve the spatial size of the initial feature map and double the number of feature channels to obtain the first feature map. Next, halve the spatial size of the first feature map and double the number of feature channels to obtain the second feature map. Then, halve the spatial size of the second feature map and double the number of feature channels to obtain the third feature map. Next, halve the spatial size of the third feature map and double the number of feature channels to obtain the fourth feature map. Finally, halve the spatial size of the fourth feature map and double the number of feature channels to obtain the fifth feature map.

[0010] Step 3: First, perform dimension recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map. Then, perform dimension recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map. Next, perform dimension recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map. Finally, perform dimension recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map.

[0011] Step 4: First, perform feature fusion on the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map, respectively, to generate the fourth mixed feature map, the third mixed feature map, the second mixed feature map, and the first mixed feature map. Then, perform dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image. Then, perform feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image. At the same time, perform feature transformation and binarization on the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map, respectively, to generate binary masks of different scales. Then, optimize the binary masks of different scales and perform weighted fusion to obtain the accurate occlusion mask.

[0012] Step 5: Based on the above accurate occlusion mask, the preliminary de-occlusion image and the input circuit board image are weighted and fused to generate the final de-occlusion image.

[0013] In the first step, adjusting the size of the image containing the obscured circuit board to obtain an input circuit board image with equal length and width means adjusting the image containing the obscured circuit board to a square input circuit board image of 512×512 pixels.

[0014] In the second step, the step of halving the spatial size of the initial feature map and doubling the number of feature channels to obtain the first feature map means: downsampling the initial feature map to halve its spatial size and double the number of feature channels to obtain the first feature map;

[0015] In the second step, the step of halving the spatial size of the first feature map and doubling the number of feature channels to obtain the second feature map means: downsampling the first feature map to halve its spatial size and double the number of feature channels to obtain the second feature map;

[0016] In the second step, the step of halving the spatial size of the second feature map and doubling the number of feature channels to obtain the third feature map means: downsampling the second feature map to halve its spatial size and double the number of feature channels to obtain the third feature map;

[0017] In the second step, the step of halving the spatial size of the third feature map and doubling the number of feature channels to obtain the fourth feature map means: downsampling the third feature map to halve its spatial size and double the number of feature channels to obtain the fourth feature map;

[0018] In the second step, the step of halving the spatial size of the fourth feature map and doubling the number of feature channels to obtain the fifth feature map means: downsampling the fourth feature map to halve its spatial size and double the number of feature channels to obtain the fifth feature map.

[0019] In the third step, the step of performing dimensional recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map, then performing dimensional recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map, then performing dimensional recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map, and then performing dimensional recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map, means: upsampling the fifth feature map to obtain a fourth recovered feature map with the same size as the fourth feature map, then upsampling the fourth recovered feature map to obtain a third recovered feature map with the same size as the third feature map, then upsampling the third recovered feature map to obtain a second recovered feature map with the same size as the second feature map, and finally upsampling the second recovered feature map to obtain a first recovered feature map with the same size as the first feature map.

[0020] In the fourth step, the feature fusion of the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map means: passing the fourth feature map, the third feature map, the second feature map, and the first feature map from the downsampling path to the upsampling path through skip connections, and concatenating them with the fourth restored feature map, the third restored feature map, the second restored feature map, and the first restored feature map respectively to achieve the fusion of features at different levels.

[0021] In the fourth step, performing dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image means: performing an upsampling operation on the first mixed feature map so that the spatial size of the first mixed feature map is the same as the spatial size of the input circuit board image, thereby obtaining the de-occlusion feature map;

[0022] In the fourth step, the step of performing feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image refers to: compressing the feature channels of the de-occlusion feature map to three channels, and performing feature mapping through an activation function to obtain a preliminary de-occlusion image.

[0023] In the fourth step, performing feature transformation and binarization on the fourth, third, second, first, and de-occlusion feature maps to generate binary masks of different scales means: first, using convolutional layers to perform feature transformation on the fourth, third, second, first, and de-occlusion feature maps respectively, extracting the edge and texture features of the occluded regions of each feature map, and obtaining the fourth, third, second, first, and input-scale occlusion feature maps corresponding to the scale of each feature map; then, using a thresholding method to binarize the fourth, third, second, first, and input-scale occlusion feature maps respectively, separating the occluded and unoccluded regions of each occlusion feature map, and generating the fourth, third, second, first, and input-scale masks.

[0024] In the fourth step, optimizing the binary masks at different scales means using a deep supervised hybrid loss function to optimize the fourth mask, the third mask, the second mask, the first mask, and the input scale mask respectively.

[0025] In the fourth step, the weighted fusion to obtain the accurate occlusion mask refers to: first, upsampling the optimized fourth mask, third mask, second mask, first mask, and input scale mask to the same size as the input circuit board image; then, using an attention mechanism or weighted averaging method to perform weighted fusion on the optimized fourth mask, third mask, second mask, first mask, and input scale mask to generate accurate occlusion masks covering occlusion areas of different sizes.

[0026] In the fifth step, the weighted fusion of the preliminary de-occluded image and the input circuit board image based on the aforementioned precise occlusion mask to generate the final de-occluded image means that: the pixel values ​​of the aforementioned precise occlusion mask are only 0 or 1. For positions in the precise occlusion mask where the pixel value is 1, it is determined to be an occluded area, and the final de-occluded image uses the pixel values ​​of the preliminary de-occluded image at that position to repair the occlusion; for positions in the precise occlusion mask where the pixel value is 0, it is determined to be an unoccluded area, and the final de-occluded image retains the original pixel values ​​of the input circuit board image at that position to maintain the circuit characteristics of the unoccluded area. The weighted fusion is implemented using an element-wise weighted method.

[0027] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0028] 1. This invention provides a circuit board de-occlusion anomaly detection method based on dual decoders, comprising: First, adjusting the size of the occluded circuit board image to obtain an input circuit board image; Second, extracting basic features from the input circuit board image to obtain an initial feature map, and performing multiple spatial size halving and feature channel number doubling operations on the initial feature map to generate first to fifth feature maps; Third, sequentially performing dimension restoration on the fifth feature map to generate fourth to first restored feature maps that match the dimensions of the fourth to first feature maps; Fourth, fusing the restored feature map with the corresponding feature map to generate a mixed feature map, restoring the dimensions of the first mixed feature map to generate a de-occlusion feature map, and decoding to generate a preliminary de-occlusion image; Simultaneously, processing each mixed feature map and the de-occlusion feature map to generate a binary mask of the corresponding scale, optimizing and weighting the fusion to obtain an accurate occlusion mask; Fifth, weightedly fusing the preliminary de-occlusion image and the input circuit board image based on the accurate occlusion mask to generate a final de-occlusion image; In application, first... The image of the occluded circuit board is resized to obtain an input circuit board image with equal length and width. Basic features are extracted from the input circuit board image to obtain an initial feature map. Then, the initial feature map is subjected to five operations of halving its spatial size and doubling its feature channel number, resulting in first to fifth feature maps. The fifth feature map is then subjected to dimensional restoration, resulting in fourth to first restored feature maps. These restored feature maps are then fused with the feature maps of their corresponding levels to generate fourth to first mixed feature maps. The first mixed feature map is then subjected to dimensional restoration to generate a de-occluded feature map. The de-occluded feature map is then subjected to feature decoding to obtain a preliminary de-occluded image. Simultaneously, the fourth to first mixed feature maps and the de-occluded feature map are subjected to feature transformation, binarization, loss function optimization, and weighted fusion to obtain an accurate occlusion mask. Finally, based on the accurate occlusion mask, the preliminary de-occluded image is weighted and fused with the input circuit board image to obtain the final de-occluded image. The advantages of this invention also include:

[0029] First, multi-size feature maps are generated by multiple downsampling and upsampling. Each downsampling halves the feature map space size and doubles the number of channels. After upsampling, the recovered feature map is fused with the corresponding layer feature map to simultaneously capture the global structure and local details of the circuit board, avoiding feature decay and solving the problem of blurred or missing details caused by insufficient single-scale feature extraction in traditional algorithms.

[0030] Secondly, a dual-decoder parallel architecture is adopted. One decoder focuses on generating an accurate binary occlusion mask, while the other decoder only repairs the occluded areas marked by the mask. The original circuit features of the non-occluded areas are directly preserved, which avoids the structural distortion caused by the misprocessing of the circuit edges in the non-occluded areas due to the confusion between occlusion detection and image restoration tasks in traditional single decoders.

[0031] Thirdly: Based on element-wise weighted fusion using precise occlusion masks, the occluded areas are repaired using pixels from the initial de-occluded image, while the unoccluded areas directly retain the pixels from the input circuit board image, preserving the original circuit features. This avoids artifacts caused by the alteration of unoccluded circuit features due to traditional GAN ​​global repair. Testing showed that the final de-occluded image achieved a peak signal-to-noise ratio (PSNR) of 32.72, a structural similarity (SSIM) of 0.951, and a fault detection accuracy of 93.22% for the circuit board.

[0032] Therefore, the present invention can not only remove occlusions and repair circuit board images, but also avoid the gradual loss of image information during the removal process, resulting in better image quality.

[0033] 2. In the circuit board de-occlusion anomaly detection method based on dual decoders of this invention, a deep supervised hybrid loss function is used to optimize the fourth mask, the third mask, the second mask, the first mask, and the input scale mask respectively. Then, an attention mechanism or a weighted average method is used to perform weighted fusion of the optimized fourth mask, the third mask, the second mask, the first mask, and the input scale mask to generate accurate occlusion masks covering occlusion regions of different sizes. In application, the deep supervised hybrid loss function leverages the synergistic advantages of multiple losses to optimize pixel classification, region overlap, boundary fitting, and other dimensions. The invention employs a masking method to avoid issues like voids and rough edges caused by single loss functions. This method achieves a good balance between classification accuracy, region integrity, and edge smoothness in the generated mask. Next, the optimized masks of different sizes are upsampled to the input circuit board image size. Then, using an attention mechanism or weighted averaging, the masks at each scale are weighted and fused based on their confidence levels for occlusions of different sizes, generating a precise occlusion mask. This enables accurate localization of occlusion regions of varying scales, from tiny solder joints to large labels, solving the problem of poor adaptability of traditional single loss functions to complex occlusion scenarios and improving versatility. Therefore, this invention not only avoids gradual loss of image information and maintains good image quality during the occlusion removal process but also improves the versatility of occlusion removal processing.

[0034] 3. In the circuit board de-occlusion anomaly detection method based on dual decoders of the present invention, the pixel values ​​of the precise occlusion mask are only 0 or 1. For positions with a pixel value of 1 in the precise occlusion mask, it is determined to be an occlusion area. The final de-occlusion image uses the pixel values ​​of the preliminary de-occlusion image at these positions to repair the occlusion. For positions with a pixel value of 0 in the precise occlusion mask, it is determined to be an unocclusion area. The final de-occlusion image retains the original pixel values ​​of the input circuit board image at these positions to maintain the circuit characteristics of the unocclusion area. The weighted fusion is implemented using an element-wise weighted method. In application, the dual decoders generate independently. The occlusion mask and the initial de-occluded image are fused element-wise to achieve occlusion region repair and preservation of original pixels in the unoccluded areas. The precise occlusion mask can accurately locate the occlusion boundary, performing pixel-level repair only on the occluded area, avoiding blurring of circuit edges in the unoccluded area due to misprocessing. Compared to the initial de-occluded image's structural similarity (SSIM) of 0.922, the final de-occluded image's SSIM after mask-guided fusion is improved to 0.951, thus ensuring lossless preservation of original pixels in the unoccluded area, effectively reducing feature tampering, and improving the accuracy of de-occlusion repair. Therefore, this invention not only improves the versatility of de-occlusion processing but also enhances its accuracy. Attached Figure Description

[0035] Figure 1 This is a diagram of the occlusion removal model of the present invention. Detailed Implementation

[0036] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0037] See Figure 1 A method for detecting circuit board de-occlusion anomalies based on dual decoders, the method comprising the following steps:

[0038] Step 1: Resize the image of the circuit board containing the obstruction to obtain an input circuit board image with equal length and width;

[0039] Step 2: First, perform basic feature extraction on the input circuit board image to obtain an initial feature map. Then, halve the spatial size of the initial feature map and double the number of feature channels to obtain the first feature map. Next, halve the spatial size of the first feature map and double the number of feature channels to obtain the second feature map. Then, halve the spatial size of the second feature map and double the number of feature channels to obtain the third feature map. Next, halve the spatial size of the third feature map and double the number of feature channels to obtain the fourth feature map. Finally, halve the spatial size of the fourth feature map and double the number of feature channels to obtain the fifth feature map.

[0040] Step 3: First, perform dimension recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map. Then, perform dimension recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map. Next, perform dimension recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map. Finally, perform dimension recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map.

[0041] Step 4: First, perform feature fusion on the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map, respectively, to generate the fourth mixed feature map, the third mixed feature map, the second mixed feature map, and the first mixed feature map. Then, perform dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image. Then, perform feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image. At the same time, perform feature transformation and binarization on the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map, respectively, to generate binary masks of different scales. Then, optimize the binary masks of different scales and perform weighted fusion to obtain the accurate occlusion mask.

[0042] Step 5: Based on the above accurate occlusion mask, the preliminary de-occlusion image and the input circuit board image are weighted and fused to generate the final de-occlusion image.

[0043] In the first step, adjusting the size of the image containing the obscured circuit board to obtain an input circuit board image with equal length and width means adjusting the image containing the obscured circuit board to a square input circuit board image of 512×512 pixels.

[0044] In the second step, the step of halving the spatial size of the initial feature map and doubling the number of feature channels to obtain the first feature map means: downsampling the initial feature map to halve its spatial size and double the number of feature channels to obtain the first feature map;

[0045] In the second step, the step of halving the spatial size of the first feature map and doubling the number of feature channels to obtain the second feature map means: downsampling the first feature map to halve its spatial size and double the number of feature channels to obtain the second feature map;

[0046] In the second step, the step of halving the spatial size of the second feature map and doubling the number of feature channels to obtain the third feature map means: downsampling the second feature map to halve its spatial size and double the number of feature channels to obtain the third feature map;

[0047] In the second step, the step of halving the spatial size of the third feature map and doubling the number of feature channels to obtain the fourth feature map means: downsampling the third feature map to halve its spatial size and double the number of feature channels to obtain the fourth feature map;

[0048] In the second step, the step of halving the spatial size of the fourth feature map and doubling the number of feature channels to obtain the fifth feature map means: downsampling the fourth feature map to halve its spatial size and double the number of feature channels to obtain the fifth feature map.

[0049] In the third step, the step of performing dimensional recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map, then performing dimensional recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map, then performing dimensional recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map, and then performing dimensional recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map, means: upsampling the fifth feature map to obtain a fourth recovered feature map with the same size as the fourth feature map, then upsampling the fourth recovered feature map to obtain a third recovered feature map with the same size as the third feature map, then upsampling the third recovered feature map to obtain a second recovered feature map with the same size as the second feature map, and finally upsampling the second recovered feature map to obtain a first recovered feature map with the same size as the first feature map.

[0050] In the fourth step, the feature fusion of the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map means: passing the fourth feature map, the third feature map, the second feature map, and the first feature map from the downsampling path to the upsampling path through skip connections, and concatenating them with the fourth restored feature map, the third restored feature map, the second restored feature map, and the first restored feature map respectively to achieve the fusion of features at different levels.

[0051] In the fourth step, performing dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image means: performing an upsampling operation on the first mixed feature map so that the spatial size of the first mixed feature map is the same as the spatial size of the input circuit board image, thereby obtaining the de-occlusion feature map;

[0052] In the fourth step, the step of performing feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image refers to: compressing the feature channels of the de-occlusion feature map to three channels, and performing feature mapping through an activation function to obtain a preliminary de-occlusion image.

[0053] In the fourth step, performing feature transformation and binarization on the fourth, third, second, first, and de-occlusion feature maps to generate binary masks of different scales means: first, using convolutional layers to perform feature transformation on the fourth, third, second, first, and de-occlusion feature maps respectively, extracting the edge and texture features of the occluded regions of each feature map, and obtaining the fourth, third, second, first, and input-scale occlusion feature maps corresponding to the scale of each feature map; then, using a thresholding method to binarize the fourth, third, second, first, and input-scale occlusion feature maps respectively, separating the occluded and unoccluded regions of each occlusion feature map, and generating the fourth, third, second, first, and input-scale masks.

[0054] In the fourth step, optimizing the binary masks at different scales means using a deep supervised hybrid loss function to optimize the fourth mask, the third mask, the second mask, the first mask, and the input scale mask respectively.

[0055] In the fourth step, the weighted fusion to obtain the accurate occlusion mask refers to: first, upsampling the optimized fourth mask, third mask, second mask, first mask, and input scale mask to the same size as the input circuit board image; then, using an attention mechanism or weighted averaging method to perform weighted fusion on the optimized fourth mask, third mask, second mask, first mask, and input scale mask to generate accurate occlusion masks covering occlusion areas of different sizes.

[0056] In the fifth step, the weighted fusion of the preliminary de-occluded image and the input circuit board image based on the aforementioned precise occlusion mask to generate the final de-occluded image means that: the pixel values ​​of the aforementioned precise occlusion mask are only 0 or 1. For positions in the precise occlusion mask where the pixel value is 1, it is determined to be an occluded area, and the final de-occluded image uses the pixel values ​​of the preliminary de-occluded image at that position to repair the occlusion; for positions in the precise occlusion mask where the pixel value is 0, it is determined to be an unoccluded area, and the final de-occluded image retains the original pixel values ​​of the input circuit board image at that position to maintain the circuit characteristics of the unoccluded area. The weighted fusion is implemented using an element-wise weighted method.

[0057] The following are supplementary descriptions of the present invention:

[0058] This invention relates to a circuit board visual inspection system, which includes a detection camera, a light source, and a graphics processor. The graphics processor includes hardware and a visual inspection model and algorithm.

[0059] Preferably, the visual detection model in the graphics processor of this invention adopts an improved Unet network architecture based on a Y-shaped structure. The improved Unet network architecture includes one encoder and two parallel decoders, with the two parallel decoders respectively outputting preliminary de-occlusion images (e.g., ...). Figure 1 (Image branch) and precise occlusion mask (such as) Figure 1 (middle mask branch); wherein, the initial demasking image is the reconstructed unmasked image, and the precise masking mask is the guessed masking binary mask.

[0060] In the preferred fourth step of this invention, the following steps involve fusing the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map to generate a fourth mixed feature map, a third mixed feature map, a second mixed feature map, and a first mixed feature map, respectively. Then, the first mixed feature map is subjected to dimension restoration to generate a de-occlusion feature map with the same size as the input image. Finally, the de-occlusion feature map is subjected to feature decoding to generate a preliminary de-occlusion image. This process is implemented by a decoder in the improved Unet network architecture, specifically by the image branch.

[0061] In the preferred embodiment of the present invention, in the fourth step, the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the demasking feature map are respectively subjected to feature transformation and binarization processing to generate binary masks of different scales. Then, the binary masks of different scales are optimized and weighted fused to obtain an accurate masking mask. This is implemented by another decoder in the improved Unet network architecture, specifically by the mask branch.

[0062] Example 1:

[0063] See Figure 1 A method for detecting circuit board de-occlusion anomalies based on dual decoders, the method comprising the following steps:

[0064] Step 1: Resize the image of the circuit board containing the obstruction to obtain an input circuit board image with equal length and width;

[0065] Step 2: First, perform basic feature extraction on the input circuit board image to obtain an initial feature map. Then, halve the spatial size of the initial feature map and double the number of feature channels to obtain the first feature map. Next, halve the spatial size of the first feature map and double the number of feature channels to obtain the second feature map. Then, halve the spatial size of the second feature map and double the number of feature channels to obtain the third feature map. Next, halve the spatial size of the third feature map and double the number of feature channels to obtain the fourth feature map. Finally, halve the spatial size of the fourth feature map and double the number of feature channels to obtain the fifth feature map.

[0066] Step 3: First, perform dimension recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map. Then, perform dimension recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map. Next, perform dimension recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map. Finally, perform dimension recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map.

[0067] Step 4: First, perform feature fusion on the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map, respectively, to generate the fourth mixed feature map, the third mixed feature map, the second mixed feature map, and the first mixed feature map. Then, perform dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image. Then, perform feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image. At the same time, perform feature transformation and binarization on the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map, respectively, to generate binary masks of different scales. Then, optimize the binary masks of different scales and perform weighted fusion to obtain the accurate occlusion mask.

[0068] Step 5: Based on the above accurate occlusion mask, the preliminary de-occlusion image and the input circuit board image are weighted and fused to generate the final de-occlusion image.

[0069] Example 2:

[0070] The basic content is the same as in Example 1, except that: in the first step, adjusting the size of the image of the circuit board containing the obstruction to obtain an input circuit board image with equal length and width means adjusting the image of the circuit board containing the obstruction to a square input circuit board image of 512×512 pixels.

[0071] In application, the image of the occluded circuit board is adjusted to a 512×512 pixel square input circuit board image to ensure that the feature maps generated by the downsampling operation maintain the same aspect ratio, which facilitates the fusion with the feature maps of the corresponding level during subsequent upsampling. In addition, during the size adjustment process, the core area of ​​the circuit board can be focused by centering or edge filling, and a bicubic interpolation algorithm is used to reduce artifacts during scaling, while preserving fine structures such as solder joints and fine lines. This lays the foundation for subsequent feature extraction and parallel processing by dual decoders, and improves the accuracy and stability of occlusion detection.

[0072] Example 3:

[0073] The basic content is the same as in Example 1, except that: in the second step, halving the spatial size of the initial feature map and doubling the number of feature channels to obtain the first feature map means: downsampling the initial feature map to halve its spatial size and double the number of feature channels to obtain the first feature map; in the second step, halving the spatial size of the first feature map and doubling the number of feature channels to obtain the second feature map means: downsampling the first feature map to halve its spatial size and double the number of feature channels to obtain the second feature map; in the second step, halving the spatial size of the second feature map and doubling the number of feature channels to obtain the second feature map. The third feature map refers to: downsampling the second feature map, halving its spatial size and doubling its number of feature channels to obtain the third feature map; in the second step, halving the spatial size of the third feature map and doubling its number of feature channels to obtain the fourth feature map refers to: downsampling the third feature map, halving its spatial size and doubling its number of feature channels to obtain the fourth feature map; in the second step, halving the spatial size of the fourth feature map and doubling its number of feature channels to obtain the fifth feature map refers to: downsampling the fourth feature map, halving its spatial size and doubling its number of feature channels to obtain the fifth feature map.

[0074] In application, basic feature extraction is first performed on the input circuit board image to obtain an initial feature map. Then, the initial feature map is subjected to five downsampling operations in sequence. Each downsampling operation halves the spatial size of the input feature map and doubles the number of feature channels, generating the first, second, third, fourth, and fifth feature maps in sequence. During the downsampling process, doubling the number of feature channels effectively enhances the ability to express features such as circuit texture and edges. Through multi-scale feature extraction, the global layout of the circuit board and local details such as solder joints and lines are captured simultaneously, avoiding the loss of details caused by single-scale feature extraction. This provides rich feature dimensions for subsequent upsampling and fusion with the corresponding level feature map, ensuring the accuracy of occluded area localization and image restoration. In addition, downsampling can be achieved through convolutional downsampling or pooling downsampling.

[0075] Specifically, for an input circuit board image with dimensions of 512×512×3 (length×width×feature channels), the initial feature map is first obtained through basic feature extraction by the RSU5 module. Then, the RSU5 module performs downsampling operations to generate a first feature map of 256×256×32. The first feature map is then subjected to downsampling operations by the RSU4, RSU3, RSU2, and RSU1 modules to generate a second feature map of 128×128×64, a third feature map of 64×64×128, a fourth feature map of 32×32×256, and a fifth feature map of 16×16×512, respectively. The downsampling operation adopts a convolutional downsampling method, using a convolutional layer with a stride of 2 and the number of convolutional kernels being twice the number of input channels, thereby halving the size and doubling the number of channels. The basic feature extraction uses 16 3×3 convolutional kernels to generate the initial feature map.

[0076] Example 4:

[0077] The basic content is the same as in Example 1, except that in the third step, the step of performing dimension recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map, then performing dimension recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map, then performing dimension recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map, and then performing dimension recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map means: upsampling the fifth feature map to obtain a fourth recovered feature map with the same size as the fourth feature map, then upsampling the fourth recovered feature map to obtain a third recovered feature map with the same size as the third feature map, then upsampling the third recovered feature map to obtain a second recovered feature map with the same size as the second feature map, and finally upsampling the second recovered feature map to obtain a first recovered feature map with the same size as the first feature map.

[0078] In application, the fifth feature map is upsampled four times in sequence. Each upsampling operation doubles the spatial size of the input feature map, generating the fourth, third, second, and first restored feature maps in sequence. Upsampling can be performed using bilinear interpolation, transposed convolution, or a combination of both (such as transposed convolution combined with a convolutional layer) to double the size of the feature map step by step.

[0079] Specifically, the 16×16×512 (length×width×feature channel) fifth feature map is upsampled by the RSU1 module to obtain a 32×32×512 fourth restored feature map (matching the 32×32×256 fourth feature map). Then, it is sequentially upsampled by the RSU2, RSU3, and RSU4 modules to output a 64×64×256 third restored feature map (matching the 64×64×128 third feature map), a 128×128×128 second restored feature map (matching the 128×128×64 second feature map), and a 256×256×32 first restored feature map (matching the 256×256×32 first feature map). The upsampling operation uses a transposed convolution operation with a 4×4 kernel size and a stride of 2 to double the feature map size. Simultaneously, 32 3×3 convolutional layers are then applied for further feature extraction and optimization.

[0080] Example 5:

[0081] The basic content is the same as in Example 1, except that in the fourth step, the feature fusion of the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map means that the fourth feature map, the third feature map, the second feature map, and the first feature map are passed from the downsampling path to the upsampling path through skip connections, and then concatenated with the fourth restored feature map, the third restored feature map, the second restored feature map, and the first restored feature map respectively to achieve the fusion of features at different levels.

[0082] In application, the fourth, third, second, and first feature maps in the downsampling path are passed to the upsampling path through a skip connection mechanism, and then channel-by-channel splicing and fusion are performed with the recovered feature maps of the corresponding levels of the decoder to achieve multi-scale feature fusion.

[0083] Specifically, the fourth recovered feature map is spliced ​​and fused with the fourth feature map along the channel to generate the fourth hybrid feature map. This merges low-level local details (such as solder joint edges) with high-level semantic features (such as solder joint integrity judgment), making the detailed representation of small occlusion areas more accurate. The third recovered feature map is spliced ​​and fused with the third feature map along the channel to generate the third hybrid feature map. This combines medium-scale circuit layout features with upsampled and recovered semantic information to enhance the structural understanding of the circuit path and improve the consistency of repairing complex circuit occlusions. The second recovered feature map is spliced ​​and fused with the second feature map along the channel to generate the second hybrid feature map. This merges global module partition features with upsampled and recovered structural information, and optimizes the boundary positioning of occlusion areas through global context constraints to reduce false detections. The first recovered feature map is spliced ​​and fused with the first feature map along the channel to generate the first hybrid feature map. This preserves pixel-level details such as circuit texture in the initial feature map and global semantics from upsampled recovery, providing the dual decoder with multi-dimensional feature inputs including pixel details, structural layout, and semantic understanding. This fusion method preserves the integrity of features at each level of the encoder through channel splicing, avoiding the loss of details during the upsampling process.

[0084] Example 6:

[0085] The basic content is the same as in Example 1, except that: in the fourth step, performing dimensional recovery on the first mixed feature map to generate a de-occluded feature map with the same size as the input image means: performing an upsampling operation on the first mixed feature map so that the spatial size of the first mixed feature map is the same as the spatial size of the input circuit board image, thus obtaining a de-occluded feature map; in the fourth step, performing feature decoding on the de-occluded feature map to generate a preliminary de-occluded image means: compressing the feature channels of the de-occluded feature map to three channels, and performing feature mapping through an activation function to obtain a preliminary de-occluded image.

[0086] In application, the first hybrid feature map is upsampled using transposed convolution to generate a de-occluded feature map with the same spatial size as the input image. Then, the feature channels are compressed to 3 using 1×1 convolution (3 kernels), and the feature values ​​are normalized to the [0, 1] interval and linearly mapped to pixel values ​​of [0, 255] by the Sigmoid activation function, completing the conversion from feature space to RGB image and generating a preliminary de-occluded image. While preserving multi-scale features, size restoration and channel compression are achieved, ensuring the integrity of details in the repair of occluded areas.

[0087] Example 7:

[0088] The basic content is the same as in Example 1, except that in the fourth step, the feature transformation and binarization of the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map to generate binary masks of different scales refers to: firstly, using convolutional layers to perform feature transformation on the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map, extracting the edge and texture features of the occluded areas of each feature map, and obtaining the fourth occlusion feature map, the third occlusion feature map, the second occlusion feature map, the first occlusion feature map, and the input scale occlusion feature map corresponding to the scale of each feature map; then, using a thresholding method to perform binarization on the fourth occlusion feature map, the third occlusion feature map, the second occlusion feature map, the first occlusion feature map, and the input scale occlusion feature map, separating the occluded areas from the unoccluded areas of each occlusion feature map, and generating the fourth mask, the third mask, the second mask, the first mask, and the input scale mask.

[0089] When applying it, the decoder responsible for occlusion detection in the RSU module is first used. Figure 1 The convolutional layer (middle mask branch) performs feature transformation on the fourth, third, second, first, and de-occluded feature maps respectively, extracting the edge and texture features of the occluded regions of each feature map; then, the global thresholding method is used to binarize the transformed feature maps pixel by pixel, marking regions with feature values ​​higher than the threshold as occluded (value 1), and the rest as unoccluded (value 0), generating binary masks corresponding to different feature map scales.

[0090] Example 8:

[0091] The basic content is the same as in Example 1, except that in the fourth step, optimizing the binary masks of different scales means using a deep supervised hybrid loss function to optimize the fourth mask, the third mask, the second mask, the first mask, and the input scale mask respectively.

[0092] In application, a deep supervised hybrid loss function is used to optimize each binary mask. Specifically, the hybrid loss function includes a weighted sum of binary cross-entropy loss, Dice loss, and cross-union ratio loss. By minimizing the loss between the predicted mask and the baseline ground truth, optimized occlusion masks at different sizes are generated. The binary cross-entropy loss is used to constrain the classification accuracy of each pixel in the mask, ensuring clear binarized boundaries between occluded and unoccluded regions. The Dice loss is used to improve the overlap rate between the predicted mask and the real occluded region, effectively solving the problem of missed detection of small-sized occlusions (such as tiny solder joints). The cross-union ratio loss is used to optimize the fit of the occlusion boundary, making the repaired line edges smooth and natural, avoiding the jagged distortion common in traditional algorithms. The ternary hybrid loss function is used to enhance the optimization accuracy of the occlusion mask, generating optimized occlusion masks at different sizes.

[0093] Example 9:

[0094] The basic content is the same as in Example 1, except that in the fourth step, the weighted fusion to obtain the accurate occlusion mask means: first, upsampling the optimized fourth mask, third mask, second mask, first mask, and input scale mask to the same size as the input circuit board image; then, using an attention mechanism or weighted average method, weighted fusion is performed on the optimized fourth mask, third mask, second mask, first mask, and input scale mask to generate accurate occlusion masks covering occlusion areas of different sizes.

[0095] In application, the optimized fourth, third, second, first, and input scale masks are first uniformly upsampled to the size of the input circuit board image to ensure spatial dimension consistency. Then, weights are dynamically assigned based on the detection capabilities of each mask for occlusions of different sizes. For example, small-scale masks are more sensitive to the detection of micro solder joint occlusions, while large-scale masks are better at locating module-level occlusion regions. The contribution of each scale mask is adaptively calculated through an attention mechanism, and high-confidence local details are weighted and fused with global structural information to generate accurate occlusion masks covering occlusion regions of different sizes. In addition, the specific implementation of upsampling can be bilinear interpolation.

[0096] Example 10:

[0097] The basic content is the same as in Example 1, except that in the fifth step, the weighted fusion of the preliminary de-occluded image and the input circuit board image based on the above-mentioned precise occlusion mask to generate the final de-occluded image means that: the pixel value of the above-mentioned precise occlusion mask is only 0 or 1. For the position of the pixel value of 1 in the precise occlusion mask, it is determined to be an occluded area, and the final de-occluded image uses the pixel value of the preliminary de-occlusion image at this position to repair the occlusion; for the position of the pixel value of 0 in the precise occlusion mask, it is determined to be an unoccluded area, and the final de-occluded image retains the original pixel value of the input circuit board image at this position to maintain the circuit characteristics of the unoccluded area. The weighted fusion is implemented by weighting element by element.

[0098] In application, tests showed that the initial de-occlusion image had a peak signal-to-noise ratio (PSNR) of 28.11, a structural similarity (SSIM) of 0.922, and a fault detection accuracy of 85.28% for the circuit board. Then, based on the aforementioned precise occlusion mask, according to the formula... Perform element-wise weighted fusion; where, This indicates the final demasking of the image. A binary occlusion mask with a value of only 0 or 1 (1 represents an occluded area, and 0 represents an unoccluded area). To initially remove the occlusion from the image, To input a circuit board image, This indicates element-wise multiplication;

[0099] For the obstructed area ( When the value is 1, the pixel values ​​of the initial de-occluded image are directly used to repair the occluded circuit features (such as solder-covered lines). For the unoccluded areas ( When the value is 0, the pixel values ​​of the input circuit board image are retained, and the original features such as circuit texture and solder joint shape in the non-occluded area are maintained. Then, the final de-occluded image is obtained. The peak signal-to-noise ratio (PSNR) of the final de-occluded image is 32.72, the structural similarity (SSIM) is 0.951, and the fault detection accuracy of the circuit board is 93.22%, which is a significant improvement compared to the initial de-occluded image.

[0100] The above description is only a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. Any equivalent modifications or changes made by those skilled in the art based on the content disclosed in the present invention should be included within the scope of protection set forth in the claims.

Claims

1. A method for detecting circuit board de-occlusion anomalies based on dual decoders, characterized in that: The de-occlusion anomaly detection method includes the following steps: Step 1: Resize the image of the circuit board containing the obstruction to obtain an input circuit board image with equal length and width; Step 2: First, perform basic feature extraction on the input circuit board image to obtain an initial feature map. Then, halve the spatial size of the initial feature map and double the number of feature channels to obtain the first feature map. Next, halve the spatial size of the first feature map and double the number of feature channels to obtain the second feature map. Then, halve the spatial size of the second feature map and double the number of feature channels to obtain the third feature map. Next, halve the spatial size of the third feature map and double the number of feature channels to obtain the fourth feature map. Finally, halve the spatial size of the fourth feature map and double the number of feature channels to obtain the fifth feature map. Step 3: First, perform dimension recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map. Then, perform dimension recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map. Next, perform dimension recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map. Finally, perform dimension recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map. Step 4: First, perform feature fusion on the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map, respectively, to generate the fourth mixed feature map, the third mixed feature map, the second mixed feature map, and the first mixed feature map. Then, perform dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image. Then, perform feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image. At the same time, perform feature transformation and binarization on the fourth mixed feature map, the third mixed feature map, the second mixed feature map, the first mixed feature map, and the de-occlusion feature map, respectively, to generate binary masks of different scales. Then, optimize the binary masks of different scales and perform weighted fusion to obtain the accurate occlusion mask. Step 5: Based on the above accurate occlusion mask, the preliminary de-occlusion image and the input circuit board image are weighted and fused to generate the final de-occlusion image.

2. The circuit board de-occlusion anomaly detection method based on dual decoders according to claim 1, characterized in that: In the first step, adjusting the size of the image containing the obscured circuit board to obtain an input circuit board image with equal length and width means adjusting the image containing the obscured circuit board to a square input circuit board image of 512×512 pixels.

3. A circuit board de-occlusion anomaly detection method based on dual decoders according to claim 1 or 2, characterized in that: In the second step, the step of halving the spatial size of the initial feature map and doubling the number of feature channels to obtain the first feature map means: downsampling the initial feature map to halve its spatial size and double the number of feature channels to obtain the first feature map; In the second step, the step of halving the spatial size of the first feature map and doubling the number of feature channels to obtain the second feature map means: downsampling the first feature map to halve its spatial size and double the number of feature channels to obtain the second feature map; In the second step, the step of halving the spatial size of the second feature map and doubling the number of feature channels to obtain the third feature map means: downsampling the second feature map to halve its spatial size and double the number of feature channels to obtain the third feature map; In the second step, the step of halving the spatial size of the third feature map and doubling the number of feature channels to obtain the fourth feature map means: downsampling the third feature map to halve its spatial size and double the number of feature channels to obtain the fourth feature map; In the second step, the step of halving the spatial size of the fourth feature map and doubling the number of feature channels to obtain the fifth feature map means: downsampling the fourth feature map to halve its spatial size and double the number of feature channels to obtain the fifth feature map.

4. The circuit board de-occlusion anomaly detection method based on dual decoders according to claim 3, characterized in that: In the third step, the step of performing dimensional recovery on the fifth feature map to generate a fourth recovered feature map that matches the spatial dimension of the fourth feature map, then performing dimensional recovery on the fourth recovered feature map to generate a third recovered feature map that matches the spatial dimension of the third feature map, then performing dimensional recovery on the third recovered feature map to generate a second recovered feature map that matches the spatial dimension of the second feature map, and then performing dimensional recovery on the second recovered feature map to generate a first recovered feature map that matches the spatial dimension of the first feature map, means: upsampling the fifth feature map to obtain a fourth recovered feature map with the same size as the fourth feature map, then upsampling the fourth recovered feature map to obtain a third recovered feature map with the same size as the third feature map, then upsampling the third recovered feature map to obtain a second recovered feature map with the same size as the second feature map, and finally upsampling the second recovered feature map to obtain a first recovered feature map with the same size as the first feature map.

5. The circuit board de-occlusion anomaly detection method based on dual decoders according to claim 4, characterized in that: In the fourth step, the feature fusion of the fourth restored feature map with the fourth feature map, the third restored feature map with the third feature map, the second restored feature map with the second feature map, and the first restored feature map with the first feature map means: passing the fourth feature map, the third feature map, the second feature map, and the first feature map from the downsampling path to the upsampling path through skip connections, and concatenating them with the fourth restored feature map, the third restored feature map, the second restored feature map, and the first restored feature map respectively to achieve the fusion of features at different levels.

6. A circuit board de-occlusion anomaly detection method based on dual decoders according to claim 1 or 2, characterized in that: In the fourth step, performing dimension restoration on the first mixed feature map to generate a de-occlusion feature map with the same size as the input image means: performing an upsampling operation on the first mixed feature map so that the spatial size of the first mixed feature map is the same as the spatial size of the input circuit board image, thereby obtaining the de-occlusion feature map; In the fourth step, the step of performing feature decoding on the de-occlusion feature map to generate a preliminary de-occlusion image refers to: compressing the feature channels of the de-occlusion feature map to three channels, and performing feature mapping through an activation function to obtain a preliminary de-occlusion image.

7. A circuit board de-occlusion anomaly detection method based on dual decoders according to claim 1 or 2, characterized in that: In the fourth step, performing feature transformation and binarization on the fourth, third, second, first, and de-occlusion feature maps to generate binary masks of different scales means: first, using convolutional layers to perform feature transformation on the fourth, third, second, first, and de-occlusion feature maps respectively, extracting the edge and texture features of the occluded regions of each feature map, and obtaining the fourth, third, second, first, and input-scale occlusion feature maps corresponding to the scale of each feature map; then, using a thresholding method to binarize the fourth, third, second, first, and input-scale occlusion feature maps respectively, separating the occluded and unoccluded regions of each occlusion feature map, and generating the fourth, third, second, first, and input-scale masks.

8. The circuit board de-occlusion anomaly detection method based on dual decoders according to claim 7, characterized in that: In the fourth step, optimizing the binary masks at different scales means using a deep supervised hybrid loss function to optimize the fourth mask, the third mask, the second mask, the first mask, and the input scale mask respectively.

9. The circuit board de-occlusion anomaly detection method based on dual decoders according to claim 8, characterized in that: In the fourth step, the weighted fusion to obtain the accurate occlusion mask refers to: first, upsampling the optimized fourth mask, third mask, second mask, first mask, and input scale mask to the same size as the input circuit board image; then, using an attention mechanism or weighted averaging method to perform weighted fusion on the optimized fourth mask, third mask, second mask, first mask, and input scale mask to generate accurate occlusion masks covering occlusion areas of different sizes.

10. A circuit board de-occlusion anomaly detection method based on dual decoders according to claim 1 or 2, characterized in that: In the fifth step, the step of weightedly fusing the preliminary de-occlusion image with the input circuit board image based on the above-mentioned precise occlusion mask to generate the final de-occlusion image means that the pixel value of the above-mentioned precise occlusion mask is only 0 or 1. For the position where the pixel value of the precise occlusion mask is 1, it is determined to be an occlusion area. The final de-occlusion image uses the pixel value of the preliminary de-occlusion image at this position to repair the occlusion. For positions with a pixel value of 0 in the precise occlusion mask, they are determined to be non-occluded areas. Finally, the de-occluded image retains the original pixel value of the input circuit board image at these positions to maintain the circuit characteristics of the non-occluded areas. The weighted fusion is implemented using an element-wise weighting method.

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