A method for reducing COF temperature, digital control circuit and display driving system

Abstract

The application discloses a method for reducing COF temperature, a digital control circuit and a display driving system. On the basis of reserving a traditional adjacent column transverse charge sharing hardware channel, a longitudinal inter-row staged touch mechanism is additionally arranged. A previous row of pixel voltages is cached in an internal register of a driving IC. Voltage differences between a current row and the previous row are compared pixel by pixel. A preset jump threshold is set based on a Vcom voltage. Only when the voltage jump amplitude exceeds the preset jump threshold, a longitudinal charge sharing operation of the pixel position is triggered. If the jump amplitude is less than or equal to the preset jump threshold, the longitudinal charge sharing signal is shielded, and redundant charging and discharging actions are avoided. The application cooperatively suppresses invalid power consumption through a transverse and longitudinal double channel. Compared with a traditional global synchronous charge sharing scheme, the COF temperature can be additionally reduced by 10-15 DEG C. Meanwhile, the instantaneous peak current is reduced, the panel whole machine reliability and heat dissipation specifications are improved, and the display screen is adapted to high resolution and high refresh rate.

Description

Technical Field

[0001] This invention belongs to the field of display driving technology, specifically relating to a method for reducing COF temperature, a digital control circuit, and a display driving system. Background Technology

[0002] With high-resolution, large-size, and high-refresh-rate displays becoming mainstream, the research and development of large-size, high-refresh-rate panels is increasingly important. However, the dynamic power consumption and heat generation issues of driver chips are becoming increasingly serious. Especially under high-quality image driving methods such as dot inversion, the data line voltage fluctuates frequently and significantly, leading to a surge in power consumption and chip temperature rise, which seriously affects the overall reliability of the panel and limits performance improvement. Therefore, solving the temperature rise problem of driver chips is a key point in developing high-refresh-rate, high-quality images.

[0003] In existing technologies, a common solution to reduce COF temperature is to enable charge sharing. Charge sharing is the process of redistributing charge among multiple capacitors. After enabling charge sharing, pixel voltages with unequal charges between two adjacent columns are shorted in advance to reach the pixel voltage balance value (Vcom voltage). Then, according to the target pixel voltage value of each row, the charge is distributed to achieve the required voltage value, thereby reducing the excessive power consumption caused by the positive and negative switching of pixel voltage.

[0004] However, existing technologies typically use only one register to control the charge-sharing function switch, i.e., global unified control. When this function is enabled, whether there are large positive-to-negative voltage jumps or small same-positive / same-negative voltage transitions between pixel voltages, the basic operation of charge sharing will be followed: the voltage will first be shorted to reach the equilibrium value before being distributed to the target voltage. This global synchronous control rule will generate unnecessary charging and discharging actions during same-positive / same-negative voltage transitions, resulting in a limited range of COF temperature reduction, which cannot meet high-specification heat dissipation requirements. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a method for reducing COF temperature, a digital control circuit, and a display driving system. The technical problem to be solved by this invention is achieved through the following technical solution: In a first aspect, the present invention provides a method for reducing COF temperature, applied in the charge sharing control process of a driver IC, comprising: The control driver IC collects the output voltage of each pixel in the current row in real time. Read the output voltage corresponding to the same pixel in the previous row, and compare the voltage difference between the output voltages of the same pixel in the upper and lower rows for each pixel to obtain the voltage jump amplitude corresponding to each pixel. When the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity, and the timing logic is controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel to reduce the charging and discharging power consumption caused by polarity reversal; when the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity, and the timing logic is controlled to block the trigger signal of vertical inter-row charge sharing corresponding to the current pixel.

[0006] In one embodiment of the present invention, the output voltage corresponding to the same pixel in the previous row is stored in a storage register set inside the driver IC for reading during use.

[0007] In one embodiment of the present invention, the storage register is also used to store the switching state of the charge sharing switch between each pair of adjacent pixels. The switching state is controlled by an independent register group inside the driver IC. The sharing switch between each pair of adjacent polarities is set and controlled by different registers, and the charge sharing between adjacent polarities can be independently controlled.

[0008] In one embodiment of the present invention, the preset jump threshold is the Vcom reference pressure difference.

[0009] In one embodiment of the present invention, the preset jump threshold is stored in a threshold configuration register, which has open read and write permissions. It is used to adjust the preset jump threshold in real time according to the panel refresh rate, COF real-time temperature or heat dissipation specifications during normal display operation of the whole machine, so as to dynamically balance the panel display power consumption and COF temperature rise performance.

[0010] Secondly, the present invention provides a digital control circuit for reducing COF temperature, comprising: The row voltage buffer register is used to buffer the output voltage corresponding to all pixels in the previous row of the current frame; The pixel voltage detection module is connected to the row voltage buffer register and is used to collect the output voltage of each pixel in the current row in real time. The voltage difference comparison circuit is connected to the row voltage buffer register and the pixel voltage detection module respectively. It is used to read the output voltage of each pixel in the current row and the output voltage of the same pixel in the previous row, and perform voltage difference comparison calculation on the same pixel in the upper and lower rows to obtain the voltage jump amplitude corresponding to each pixel. The threshold configuration register group is used to store the preset jump threshold based on the Vcom reference pressure difference as the basis for determining the jump amplitude; The timing logic control circuit is connected to the voltage difference comparison circuit and the threshold configuration register group, respectively. When the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity, and the timing logic is controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel point to reduce the charging and discharging power consumption caused by polarity reversal; when the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity, and the timing logic is controlled to shield the trigger signal of vertical inter-row charge sharing corresponding to the current pixel point.

[0011] In one embodiment of the present invention, the timing logic control circuit is also connected to a horizontal charge sharing switch group, which is used to control adjacent column data lines to be shorted to Vcom to achieve horizontal charge balance; while performing hierarchical control on the vertical inter-row charge sharing, the timing logic control circuit keeps the original control logic of the horizontal charge sharing switch group unchanged.

[0012] Thirdly, the present invention provides a display driving system, comprising: a driving IC and a COF flexible circuit board; the driving IC is equipped with a digital control circuit for reducing COF temperature as described in the second aspect, the driving IC reverses the panel through the connection point of the COF flexible circuit board, and the digital control circuit performs row-by-row pixel voltage detection and comparison and vertical charge sharing hierarchical control logic inside the driving IC.

[0013] The beneficial effects of this invention are: The solution provided by this invention triggers inter-line charge balancing only for screen areas with cross-polarity or voltage difference exceeding a preset threshold, shielding unnecessary charging and discharging actions caused by small voltage switching of the same polarity, reducing ineffective charging and discharging power consumption. Compared with the traditional global synchronous charge sharing solution, the overall COF temperature can be reduced by an additional 10-15℃. This invention abandons the control logic of full-channel synchronous conduction, with only a few data lines initiating balancing operations within the same refresh cycle, significantly reducing the instantaneous high current impact caused by synchronous switching, reducing power supply noise, lowering the risk of long-term aging and failure of the driver IC, and optimizing power integrity. Furthermore, the threshold configuration register and the register group corresponding to the charge sharing switch are both open to external read and write permissions, and can be adjusted online according to screen content, real-time COF temperature, and screen refresh rate specifications, compatible with multiple panel models for iterative use. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of existing charge-sharing technologies; Figure 2 This is a schematic diagram of the steps of a method for reducing COF temperature provided in an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the principle of a method for reducing COF temperature provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the charge sharing simulation experiment data for a method to reduce COF temperature provided in an embodiment of the present invention. Detailed Implementation

[0015] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0016] Schematic diagram of existing charge sharing technology, such as Figure 1 As shown, the current cooling methods used in the industry typically employ a single register to control the charge sharing function. Therefore, when this function is enabled, regardless of whether there are large positive / negative voltage jumps or small same-positive / same-negative voltage transitions between pixel voltages, the basic charge sharing process will be followed: the voltages are first short-circuited to reach an equilibrium value before being distributed to the target voltage. Figure 1 As shown, such a rule will produce unnecessary actions when the voltage changes from positive to negative, thus limiting the range of COF temperature reduction.

[0017] To address the problem that current charge sharing technologies employ global unified control and cannot independently control the short-circuit switches of each group of signal lines, embodiments of this invention provide a method for reducing COF temperature, a digital control circuit, and a display driving system.

[0018] Below, we will first introduce a method for reducing COF temperature provided by an embodiment of the present invention.

[0019] like Figure 2 As shown in the figure, a method for reducing COF temperature provided by an embodiment of the present invention may include the following steps: S1 controls the driver IC to collect the output voltage of each pixel in the current row in real time; S2, read the output voltage corresponding to the same pixel in the previous row, compare the voltage difference between the output voltages of the same pixel in the upper and lower rows for each pixel, and obtain the voltage jump amplitude corresponding to each pixel. S3, when the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity, and the timing logic is controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel to reduce the charging and discharging power consumption caused by polarity reversal; when the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity, and the timing logic is controlled to shield the trigger signal of vertical inter-row charge sharing corresponding to the current pixel.

[0020] The core idea of ​​this invention is to add hierarchical control logic for vertical inter-row charge sharing while retaining the traditional hardware path for horizontal charge sharing between adjacent columns. In traditional solutions, the driver IC controls the opening and closing of all charge sharing switches through only one register. This results in the same action of first shorting to Vcom and then allocating the charge, regardless of whether there is a large positive-to-negative jump or a small change in the same polarity, causing a large amount of ineffective power consumption.

[0021] The output voltage corresponding to the same pixel in the previous row is stored in the memory register set inside the driver IC for reading during use.

[0022] In this embodiment of the invention, a dedicated storage register is added inside the driver IC to completely cache the output voltage corresponding to all pixels in the previous row. When the driver IC is working, it detects and collects the output voltage of each pixel in the current row in real time, reads the output voltage of the same pixel in the previous row stored in the register, and performs a comparison calculation of the voltage difference between the upper and lower rows point by point.

[0023] The storage register is also used to store the on / off state of the charge sharing switch between each pair of adjacent pixels. The on / off state is controlled by an independent register group inside the driver IC. The sharing switch between each pair of adjacent polarities is set and controlled by different registers, which can independently control whether charge sharing needs to be enabled between adjacent polarities.

[0024] The preset jump threshold can be the Vcom reference pressure difference.

[0025] The preset jump threshold is stored in the threshold configuration register, which has open read and write permissions. It is used to adjust the preset jump threshold in real time according to the panel refresh rate, COF real-time temperature or heat dissipation specifications during normal display operation of the whole machine, so as to dynamically balance the panel display power consumption and COF temperature rise performance.

[0026] Secondly, corresponding to the above method embodiments, this invention also provides a digital control circuit for reducing COF temperature, which may include: The row voltage buffer register is used to buffer the output voltage corresponding to all pixels in the previous row of the current frame; The pixel voltage detection module is connected to the row voltage buffer register and is used to collect the output voltage of each pixel in the current row in real time. The voltage difference comparison circuit is connected to the row voltage buffer register and the pixel voltage detection module respectively. It is used to read the output voltage of each pixel in the current row and the output voltage of the same pixel in the previous row. It performs voltage difference comparison calculation on the same pixel in the upper and lower rows for each pixel to obtain the voltage jump amplitude corresponding to each pixel. The threshold configuration register group is used to store the preset jump threshold based on the Vcom reference pressure difference as the basis for determining the jump amplitude; The timing logic control circuit is connected to the voltage difference comparison circuit and the threshold configuration register group, respectively. When the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity. The timing logic is then controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel to reduce the charging and discharging power consumption caused by polarity reversal. When the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity. The timing logic is then controlled to shield the trigger signal of vertical inter-row charge sharing corresponding to the current pixel.

[0027] This invention, while retaining the basic architecture of traditional charge-sharing circuits, proposes a polarity-sequential control strategy to precisely manage charge-sharing triggering actions, thereby reducing ineffective power consumption and lowering the operating temperature of the COF (Chip-on-Foil) circuit. Details are as follows: Building upon traditional charge sharing, the control method for the charge sharing switch between each pixel in the same data line column is changed from unified control to individual control. Each pair of adjacent polarities has its share switch set and controlled by a different register, allowing independent control over whether charge sharing is needed between adjacent polarities. This prevents even pixels of the same polarity from shifting their voltage values ​​towards the equilibrium value, avoiding excessive power consumption in the driver IC due to abnormal voltage fluctuations, and better reducing the temperature of the COF (Chip-on-Flush) circuit. Figure 3 As shown.

[0028] The sequential logic control circuit is also connected to the horizontal charge sharing switch group, which is used to control the adjacent column data lines to be shorted to Vcom to achieve horizontal charge balance. While performing hierarchical control of vertical inter-row charge sharing, the sequential logic control circuit keeps the original control logic of the horizontal charge sharing switch group unchanged.

[0029] This solution retains the original hardware of shorting adjacent data lines to Vcom for lateral charge balancing. It only addresses the commonly overlooked issue of charge sharing between pixels in the vertical direction of a single data line: the driver IC has a dedicated storage register to fully cache the output voltage of all pixels in the previous row, using the voltage difference at Vcom as the threshold for voltage jump. During operation, the driver IC continuously monitors and collects the output voltage of each pixel in the current row, reads the output voltage of the same pixel in the previous row stored in the register, and performs a point-by-point comparison of the voltage difference between the upper and lower rows. When the calculated voltage jump amplitude exceeds the preset jump threshold in the register, the timing logic initiates the vertical inter-row charge sharing process for the current pixel, relying on charge rebalancing to reduce the charging and discharging power consumption caused by large polarity flips. If the voltage jump amplitude between the two rows of pixels is less than or equal to the preset jump threshold, it indicates only a small voltage change of the same polarity. In this case, the trigger signal for vertical charge sharing is directly blocked, skipping the voltage balancing charging and discharging operation to avoid meaningless additional power consumption and increased COF temperature. The threshold configuration register and the configuration register corresponding to the charge sharing switch have open read and write permissions. During normal display operation, the whole machine can also manually adjust the judgment criteria and switch status at any time according to different needs such as panel refresh rate, COF real-time temperature, and customer heat dissipation specifications, so as to flexibly balance the panel display power consumption and COF temperature rise performance.

[0030] The schematic diagram of the charge sharing method simulation experiment data provided in the embodiments of the present invention is as follows: Figure 4 As shown, Figure 4 This paper compares experimental data of the COF temperature reduction method provided in this embodiment of the invention with data from mainstream cooling methods. The waveform comparison shows that the charge-sharing method proposed in this embodiment only performs the action of short-circuiting the voltages at both ends to reach an equilibrium value and then the target pixel voltage when there is a large jump in pixel voltage (such as a transition between positive and negative voltages). This eliminates the short-circuiting action that occurs when there are small jumps in pixel voltages of the same polarity. Therefore, after the experiment, the COF temperature can be reduced by approximately 10-15°C compared to mainstream cooling methods.

[0031] Thirdly, embodiments of the present invention also provide a display driving system, which may include: a driver IC and a COF flexible circuit board; the driver IC is equipped with a digital control circuit as described in the second aspect to reduce the temperature of the COF, the driver IC flips the panel through the connection point of the COF flexible circuit board, and the digital control circuit performs row-by-row pixel voltage detection and comparison and vertical charge sharing hierarchical control logic inside the driver IC.

[0032] The flip panel supports refresh rates of 60Hz and above.

[0033] The innovation of this invention lies in: A differentiated charge sharing management approach based on horizontal and vertical layers is proposed: Existing industry optimization methods only focus on charge sharing control of adjacent horizontal data lines, generally ignoring the superimposed heat generated by vertical inter-row pixel switching; The embodiments of this invention do not modify the mature horizontal equalization hardware, but add vertical pixel voltage graded screening logic, and suppress invalid power consumption through the synergy of horizontal and vertical dual channels, forming an unexpected low temperature rise effect, breaking through the inherent R&D thinking of single-dimensional optimization in the industry.

[0034] A pure digital hierarchical triggering architecture based on row cache voltage comparison: A dedicated register is added in the driver IC to cache the voltage of the previous row of pixels. With the help of a customizable threshold register, the inter-row voltage difference comparison is completed pixel by pixel. The vertical charge sharing is enabled on demand by relying solely on digital timing logic. There is no need to add a new analog switch array. This overcomes the technical barriers of high cost and long cycle of traditional hardware modification and achieves partitioned selective triggering in a lightweight manner.

[0035] A dynamic energy efficiency mechanism that allows for online adaptive adjustment of voltage threshold and switching state: In this embodiment of the invention, the vertical jump judgment threshold and the charge sharing switch between every two adjacent pixels are set to have open external read and write permissions. The charge sharing triggering conditions can be dynamically adjusted according to the real-time operating conditions of the whole machine, so as to achieve a dynamic balance between power consumption, temperature rise and image quality. This is different from the traditional fixed single global switch control method that cannot be finely adjusted.

[0036] The embodiments of the present invention have the following technical effects: Reduce ineffective charging and discharging power consumption and significantly lower COF operating temperature: The original hardware path for horizontal charge sharing between adjacent columns is fully preserved, and voltage amplitude is graded and controlled only for the two vertical rows of pixels on a single data line; inter-row charge balancing is triggered only for screen areas with cross-polarity and voltage difference exceeding the Vcom threshold, shielding unnecessary charging and discharging actions caused by small voltage switching of the same polarity. Compared with the traditional global synchronous charge sharing solution, the overall COF temperature can be reduced by an additional 10~15℃, solving the pain point of insufficient heat dissipation specifications for high refresh rate and large-size panels; Reduce instantaneous peak current and optimize power integrity: Abandon the control logic of full-channel synchronous conduction, and rely on row-by-row pixel voltage detection and comparison to achieve charge sharing and time-based triggering. Only a small number of data lines start equalization operation within the same refresh cycle, which greatly reduces the instantaneous large current impact caused by synchronous switching, reduces power supply noise, reduces the risk of driver IC aging failure after long-term operation, and improves the overall reliability of the panel. The software is flexible and configurable, adapting to dynamic adjustments in multiple scenarios: The driver IC has a built-in manually rewritable differential pressure threshold register and a switch register for charge sharing between every two rows of adjacent pixels. During the operation of the whole machine, the voltage judgment standard can be adjusted online according to the screen content, real-time COF temperature, and screen refresh rate specifications. It can freely switch between the traditional global mode and the hierarchical filtering mode of this invention, flexibly balancing display quality, chip power consumption and heat dissipation indicators, and is compatible with multiple panel models for iterative use.

[0037] It should be noted that, in the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0038] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0039] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A method for reducing COF temperature, applied in the charge sharing control process of a driver IC, characterized in that, include: The control driver IC collects the output voltage of each pixel in the current row in real time. Read the output voltage corresponding to the same pixel in the previous row, and compare the voltage difference between the output voltages of the same pixel in the upper and lower rows for each pixel to obtain the voltage jump amplitude corresponding to each pixel. When the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity, and the timing logic is controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel to reduce the charging and discharging power consumption caused by polarity reversal; when the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity, and the timing logic is controlled to block the trigger signal of vertical inter-row charge sharing corresponding to the current pixel.

2. The method for reducing COF temperature according to claim 1, characterized in that, The output voltage corresponding to the same pixel in the previous row is stored in the memory register set inside the driver IC for reading during use.

3. The method for reducing COF temperature according to claim 2, characterized in that, The storage register is also used to store the switching state of the charge sharing switch between each pair of adjacent pixels. The switching state is controlled by an independent register group inside the driver IC. The sharing switch between each pair of adjacent polarities is set and controlled by different registers, which can independently control whether charge sharing needs to be enabled between two adjacent polarities.

4. The method for reducing COF temperature according to claim 1, characterized in that, The preset jump threshold is the Vcom reference pressure difference.

5. The method for reducing COF temperature according to claim 1, characterized in that, The preset jump threshold is stored in a threshold configuration register, which has open read and write permissions. It is used to adjust the preset jump threshold in real time according to the panel refresh rate, COF real-time temperature or heat dissipation specifications during normal display operation of the whole machine, so as to dynamically balance the panel display power consumption and COF temperature rise performance.

6. A digital control circuit for reducing COF temperature, characterized in that, include: The row voltage buffer register is used to buffer the output voltage corresponding to all pixels in the previous row of the current frame; The pixel voltage detection module is connected to the row voltage buffer register and is used to collect the output voltage of each pixel in the current row in real time. The voltage difference comparison circuit is connected to the row voltage buffer register and the pixel voltage detection module respectively. It is used to read the output voltage of each pixel in the current row and the output voltage of the same pixel in the previous row, and perform voltage difference comparison calculation on the same pixel in the upper and lower rows to obtain the voltage jump amplitude corresponding to each pixel. The threshold configuration register group is used to store the preset jump threshold based on the Vcom reference pressure difference as the basis for determining the jump amplitude; The timing logic control circuit is connected to the voltage difference comparison circuit and the threshold configuration register group, respectively. When the voltage jump amplitude is greater than the preset jump threshold, it is determined to be a large jump across polarity, and the timing logic is controlled to generate a trigger signal to enable vertical inter-row charge sharing of the current pixel point to reduce the charging and discharging power consumption caused by polarity reversal; when the voltage jump amplitude is less than or equal to the preset jump threshold, it is determined to be a small change of the same polarity, and the timing logic is controlled to shield the trigger signal of vertical inter-row charge sharing corresponding to the current pixel point.

7. The digital control circuit for reducing COF temperature according to claim 6, characterized in that, The timing logic control circuit is also connected to a horizontal charge sharing switch group, which is used to control adjacent column data lines to be shorted to Vcom to achieve horizontal charge balance; while performing hierarchical control on the vertical inter-row charge sharing, the timing logic control circuit keeps the original control logic of the horizontal charge sharing switch group unchanged.

8. A display driving system, characterized in that, include: A driver IC and a COF flexible circuit board; the driver IC is equipped with a digital control circuit for reducing COF temperature as described in claims 6-7, the driver IC reverses the panel through the connection point of the COF flexible circuit board, and the digital control circuit performs row-by-row pixel voltage detection and comparison and vertical charge sharing hierarchical control logic inside the driver IC.

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