A compensation circuit, a display panel and a compensation method

CN123016876APending Publication Date: 2026-10-30HKC CORP LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202611474089.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-21
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0005]本申请提供一种补偿电路、显示面板及补偿方法,解决了如何防止显示面板显示异常的问题

Benefits of technology

本申请中通过设置电压采集模块和补偿模块,电压采集模块接收初始公共电极电压和实际公共电极电压,补偿模块根据初始公共电极电压和实际公共电极电压确定公共电极电压的变化误差值、累积误差值和误差变化率,采集模块基于变化误差、累计误差值和误差变化率对初始公共电极电压进行补偿,考量了当前时刻的公共电极电压的变化差值、误差的累计和误差的变化趋势的影响,从多个不同维度对初始公共电极电压进行补偿,使电压采集模块输出到第二公共电极线的目标供电电压更加准确,从而使施加到像素电容上的电压差更加准确,避免了显示的异常。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN123016876A_ABST
    Figure CN123016876A_ABST
Patent Text Reader

Abstract

The application belongs to the technical field of display, and particularly relates to a compensation circuit, a display panel and a compensation method. The compensation circuit comprises: a voltage collection module connected with an output end of an initial common electrode voltage and a first common electrode line, configured to receive the initial common electrode voltage and collect an actual common electrode voltage of the first common electrode line; and a compensation module connected with the voltage collection module, configured to determine a change error value, a cumulative error value and an error change rate of the common electrode voltage according to the initial common electrode voltage and the actual common electrode voltage; wherein the voltage collection module is further connected with a second common electrode line and is further configured to compensate the initial common electrode voltage based on the change error value, the cumulative error value and the error change rate to obtain a target common electrode voltage, and output the target common electrode voltage to the second common electrode line; and the application can prevent display abnormality of the display panel.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure belongs to the field of display technology, specifically relating to a compensation circuit, a display panel, and a compensation method. Background Technology

[0002] In related technologies, the scan signal in the display panel is the switching signal of the driving transistor. When the scan signal controls the driving transistor to turn on, the pixel data signal on the data line is sent to the pixel capacitor, and the voltage of the pixel capacitor will be maintained for one frame. One end of the pixel capacitor is connected to the data line through the driving transistor, and the other end is connected to the common electrode line. The voltage of the pixel capacitor is determined by the voltage difference between the data line and the common electrode line.

[0003] Because the common electrode line covers the entire display panel, due to the presence of parasitic capacitance, when each row of pixels is turned on, the voltage on each data line will couple to the common electrode line, causing the potential of the common electrode line to change, which will lead to display abnormalities.

[0004] Therefore, how to prevent display panel malfunctions is an urgent problem to be solved. Summary of the Invention

[0005] This application provides a compensation circuit, a display panel, and a compensation method, which solves the problem of how to prevent abnormal display on the display panel.

[0006] In a first aspect, this application provides a compensation circuit applied to a display panel, the display panel including a common electrode, the common electrode including at least a first common electrode line and a second common electrode line distributed in the display area, the first common electrode line and the second common electrode line being electrically connected and arranged at a preset distance, the compensation circuit including: a voltage acquisition module, connected to the output terminal of an initial common electrode voltage and the first common electrode line respectively, configured to: receive the initial common electrode voltage and acquire the actual common electrode voltage of the first common electrode line; a compensation module, connected to the voltage acquisition module, configured to: determine the change error value, cumulative error value and error change rate of the common electrode voltage based on the initial common electrode voltage and the actual common electrode voltage; wherein, the voltage acquisition module is also connected to the second common electrode line and is further configured to: compensate the initial common electrode voltage based on the change error value, the cumulative error value and the error change rate to obtain a target common electrode voltage; and output the target common electrode voltage to the second common electrode line.

[0007] Optionally, the compensation circuit further includes a switch control module, which is connected to the voltage acquisition module and the external control module respectively, and is configured to adjust the compensation range value of the voltage acquisition module according to the target power supply voltage output by the external control module; wherein the target power supply voltage is determined by the external control module based on the sub-pixel gray levels of the nth row and the (n+1)th row.

[0008] Optionally, the voltage acquisition module includes an amplifier and a first resistor; the non-inverting input of the amplifier is connected to the output of the initial common electrode voltage, the inverting input of the amplifier is connected to the first common electrode line through the first resistor, and the output of the amplifier is connected to the second common electrode line.

[0009] Optionally, the compensation module includes: a first capacitor, a second resistor, and a second capacitor; a first terminal of the first capacitor is connected to the voltage acquisition module, and a second terminal of the first capacitor is connected to both the voltage acquisition module and the first terminal of the second resistor; a second terminal of the second resistor is connected to the first terminal of the second capacitor; and a second terminal of the second capacitor is connected to the voltage acquisition module.

[0010] Optionally, the switch control module includes: a first transistor, a second transistor, a third transistor, and a fourth transistor; the control terminal of the first transistor is connected to the external control module, the first terminal of the first transistor is connected to the external control module, and the second terminal of the first transistor is connected to the positive power supply terminal of the voltage acquisition module; the control terminal of the second transistor is connected to the external control module, the first terminal of the second transistor is connected to the external control module, and the second terminal of the second transistor is connected to the positive power supply terminal of the voltage acquisition module; the control terminal of the third transistor is connected to the external control module, the first terminal of the third transistor is connected to the external control module, and the second terminal of the third transistor is connected to the negative power supply terminal of the voltage acquisition module; the control terminal of the fourth transistor is connected to the external control module, the first terminal of the fourth transistor is connected to the external control module, and the second terminal of the fourth transistor is connected to the negative power supply terminal of the voltage acquisition module.

[0011] Secondly, this application provides a display panel, the display panel comprising: a timing controller configured to: determine a target power supply voltage based on the grayscale of sub-pixels in row n and row n+1, and output a timing flip signal; wherein the target power supply voltage includes a first target power supply voltage and a second target power supply voltage; a source driver having multiple signal channels connected to the timing controller, configured to: output the first target power supply voltage and the second target power supply voltage in two adjacent signal channels; wherein the polarities of the first target power supply voltage and the second target power supply voltage are opposite; and a level converter connected to the timing controller, configured to: generate a switching control signal based on the timing flip signal output by the timing controller. The common electrode includes at least a first common electrode line and a second common electrode line distributed in the display area, the first common electrode line and the second common electrode line being electrically connected and arranged at a preset distance; the compensation circuit according to any one of the first aspects, the compensation circuit including a voltage acquisition module, a compensation module and a switch control module; the voltage acquisition module being connected to the first common electrode line, the second common electrode line and the compensation module respectively; the control module being connected to the level converter and the source driver respectively, and being configured to: output the first target supply voltage and the second target supply voltage to the positive power supply terminal and the negative power supply terminal of the voltage acquisition module respectively according to the switch control signal.

[0012] Thirdly, this application provides a compensation method applied to a timing controller in the display panel described in the second aspect. The compensation method includes: determining the common electrode coupling degree based on the gray levels of the sub-pixels in the nth and n+1th rows; compensating the initial power supply voltage based on the common electrode coupling degree to obtain a target power supply voltage; wherein the target power supply voltage is used to adjust the compensation range value of the voltage acquisition module.

[0013] Optionally, each row of sub-pixel gray levels includes positive gray levels and negative gray levels. The step of determining the common electrode coupling degree based on the sub-pixel gray levels of the nth row and the (n+1)th row includes: obtaining a first coupling degree based on the sum of the positive gray levels of the nth row, the sum of the negative gray levels of the nth row, the coupling coefficient, and the number of sub-pixels in each row; obtaining a second coupling degree based on the sum of the positive gray levels of the (n+1)th row, the sum of the negative gray levels of the (n+1)th row, the coupling coefficient, and the number of sub-pixels in each row; and obtaining the common electrode coupling degree based on the first coupling degree and the second coupling degree.

[0014] Optionally, the initial supply voltage includes a first initial supply voltage and a second initial supply voltage, and the target supply voltage includes a first target supply voltage and a second target supply voltage. The step of compensating the initial supply voltage based on the common electrode coupling degree to obtain the target supply voltage includes: when the common electrode coupling degree is less than a first preset coupling threshold and the switch control signal in the current scan frame is a first switch sub-signal, obtaining the first target supply voltage based on the common electrode coupling degree and the coupling coefficient; and using the second initial supply voltage as the second target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage; or, when the common electrode coupling degree is less than a second preset coupling threshold and the switch control signal in the current scan frame is a second switch sub-signal, obtaining the second target supply voltage based on the common electrode coupling degree and the coupling coefficient; and using the first initial supply voltage as the first target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.

[0015] Optionally, the initial supply voltage includes a first initial supply voltage and a second initial supply voltage, and the target supply voltage includes a first target supply voltage and a second target supply voltage. The step of compensating the initial supply voltage based on the common electrode coupling degree to obtain the target supply voltage includes: when the common electrode coupling degree is greater than a second preset coupling threshold and the switch control signal in the current scan frame is a first switch sub-signal, obtaining the second target supply voltage based on the common electrode coupling degree and the coupling coefficient; and using the first initial supply voltage as the first target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage; or, when the common electrode coupling degree is greater than the second preset coupling threshold and the switch control signal in the current scan frame is a second switch sub-signal, obtaining the first target supply voltage based on the common electrode coupling degree and the coupling coefficient; and using the second initial supply voltage as the second target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.

[0016] The technical solution provided in this application has at least the following beneficial effects: In this application, a voltage acquisition module and a compensation module are set up. The voltage acquisition module receives the initial common electrode voltage and the actual common electrode voltage. The compensation module determines the change error value, cumulative error value, and error change rate of the common electrode voltage based on the initial common electrode voltage and the actual common electrode voltage. The acquisition module compensates for the initial common electrode voltage based on the change error, cumulative error value, and error change rate. It takes into account the influence of the change difference of the common electrode voltage at the current moment, the accumulation of error, and the trend of error change, and compensates for the initial common electrode voltage from multiple different dimensions. This makes the target power supply voltage output by the voltage acquisition module to the second common electrode line more accurate, thereby making the voltage difference applied to the pixel capacitor more accurate and avoiding display abnormalities. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0018] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of this application is shown.

[0019] Figure 2 A schematic diagram of a compensation circuit provided in an embodiment of this application is shown.

[0020] Figure 3 A circuit diagram of a compensation circuit provided in an embodiment of this application is shown.

[0021] Figure 4 The diagram shows waveforms of an initial common electrode voltage and a target common electrode voltage provided in an embodiment of this application.

[0022] Figure 5 A flowchart illustrating a compensation method provided in an embodiment of this application is shown.

[0023] Figure 6 A flowchart illustrating another compensation method provided in an embodiment of this application is shown.

[0024] Explanation of reference numerals in the attached figures: 100. Compensation circuit; 110. Voltage acquisition module; 120. Compensation module; 130. Switch control module; 200. External control module; 210. Timing controller; 220. Source driver; 230. Level converter.

[0025] OP, Amplifier; R1, First Resistor; R2, Second Resistor; C1, First Capacitor; C2, Second Capacitor; T1, First Transistor; T2, Second Transistor; T3, Third Transistor; T4, Fourth Transistor; A, Display Area; A1, First Common Electrode Line; A2, Second Common Electrode Line; B, Non-Display Area; Vfb, Actual Common Electrode Voltage; Vcom_i, Initial Common Electrode Voltage; Vcomo, Target Common Electrode Voltage; FS, Switch Control Signal; V_DO+, Positive Power Supply Terminal of Amplifier; V_DO-, Negative Power Supply Terminal of Amplifier; DIC3 Ch965, 965ch of the 3rd Source Driver; DIC3 Ch966, 966ch of the 3rd Source Driver. Detailed Implementation

[0026] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0027] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0028] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0029] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of this application is shown below. Please refer to [link / reference]. Figure 1 As shown, the display panel includes a common electrode, which includes at least a first common electrode line A1 and a second common electrode line A2 distributed in the display area A. The first common electrode line A1 and the second common electrode line A2 are electrically connected and arranged at a predetermined distance. The first common electrode line A1 and the second common electrode line A2 are connected to a first terminal of a pixel capacitor, and the second terminal of the pixel capacitor is connected to a driving transistor. When the driving transistor is turned on, a voltage difference will be generated between the data line and the first common electrode line A1 or the second common electrode line A2.

[0030] It should be noted that the positions of the first common electrode line A1 and the second common electrode line A2 can be any position in the display area A, as long as they are spaced at a preset distance, so that when the actual common electrode voltage Vfb of the first common electrode line A1 is collected, the error of the common electrode voltage can be reflected. For example, the first common electrode line A1 can be located in the middle of the display area A, and the second common electrode line A2 can be located on both sides of the display area A. By collecting the actual common electrode voltage Vfb of the first common electrode line A1 at the far end of the second common electrode line A2, the initial common electrode voltage Vcom_i can be compensated.

[0031] Figure 2 A schematic diagram of a compensation circuit provided in an embodiment of this application is shown below. Please refer to [link / reference]. Figure 1 and Figure 2 As shown, the compensation circuit 100 is applied to Figure 1 The compensation circuit 100 is located in the non-display area B of the display panel. The compensation circuit 100 includes a voltage acquisition module 110 and a compensation module 120. The voltage acquisition module 110 is connected to the output terminal of the initial common electrode voltage Vcom_i and the first common electrode line A1. The compensation module 120 is connected to the voltage acquisition module 110. The voltage acquisition module 110 is also connected to the second common electrode line A2.

[0032] In some embodiments, the voltage acquisition module 110 is configured to receive the initial common electrode voltage Vcom_i and acquire the actual common electrode voltage Vfb of the first common electrode line A1.

[0033] For example, the output terminal of the initial common electrode voltage Vcom_i can be a panel power management chip (PowerIC). By setting the voltage acquisition module 110 to be connected to the output terminal of the initial common electrode voltage Vcom_i, the initial common electrode voltage Vcom_i can be received. By setting the voltage acquisition module 110 to be connected to the first common electrode line A1, the actual common electrode voltage Vfb on the first common electrode line A1 can be acquired.

[0034] In some embodiments, the compensation module 120 is configured to determine the change error value, cumulative error value, and error change rate of the common electrode voltage based on the initial common electrode voltage Vcom_i and the actual common electrode voltage Vfb.

[0035] For example, by connecting the compensation module 120 to the voltage acquisition module 110, the change error value, cumulative error value, and error change rate of the common electrode voltage can be calculated based on the initial common electrode voltage Vcom_i and the actual common electrode voltage Vfb. The change error value can reflect the difference between the initial common electrode voltage Vcom_i and the actual common electrode voltage Vfb at the current moment; the cumulative error value can accumulate the change error value over a period of time (which can be a scan frame signal), which can eliminate the steady-state error of the compensation circuit 100; the error change rate can reflect the changing trend of the change error value. By determining the error change rate, compensation can be performed in advance to suppress the changing trend of the change error.

[0036] In some embodiments, the voltage acquisition module 110 is further configured to: compensate the initial common electrode voltage Vcom_i based on the change error value, the cumulative error value and the error change rate to obtain the target common electrode voltage Vcomo; and output the target common electrode voltage Vcomo to the second common electrode line A2.

[0037] For example, the initial common electrode voltage Vcom_i is compensated based on the variation error, cumulative error value, and error change rate. This takes into account the influence of the variation difference of the common electrode voltage at the current moment, the accumulation of error, and the trend of error change. The initial common electrode voltage is compensated from multiple different dimensions, making the target common electrode voltage Vcomo output to the second common electrode line A2 more accurate. This makes the voltage difference applied to the pixel capacitor more accurate and avoids display abnormalities.

[0038] In some embodiments, please refer to Figure 1 and 2 As shown, the compensation circuit 100 also includes a switch control module 130, which is connected to the voltage acquisition module 110 and the external control module 200 respectively, and is configured to adjust the compensation range value of the voltage acquisition module 110 according to the target power supply voltage output by the external control module 200; wherein, the target power supply voltage is determined by the external control module 200 based on the gray levels of the sub-pixels in the nth row and the (n+1)th row.

[0039] For example, the external control module 200 includes: a timing controller (Tcon IC) 210, a source driver 220 ( Figure 1(Shown via River 3) and level converter 230. Because the voltage acquisition module 110 is limited by thrust (i.e., slew rate) and the compensation circuit 100 requires response time, when calculating and compensating for the target common electrode voltage Vcomo corresponding to the nth row of sub-pixels in the display panel, the scanning signal may have already scanned the sub-pixels of the next row. The external module determines the target supply voltage based on the grayscale of the sub-pixels in the nth and (n+1)th rows. When the switch control module 130 is turned on, the target supply voltage output by the external control module 200 will be output to the voltage acquisition module 110. The target supply voltage will affect the compensation range value of the voltage acquisition module 110, and will affect the magnitude of the output target common electrode voltage Vcomo. This allows the second common electrode line A2 corresponding to the nth row of sub-pixels to quickly rise to the target common electrode voltage Vcomo, thereby ensuring that the second common electrode line A2 corresponding to the (n+1)th row of sub-pixels can receive the compensated target common electrode voltage Vcomo.

[0040] Figure 3 A circuit diagram of a compensation circuit provided in an embodiment of this application is shown below. Please refer to [link / reference]. Figure 3 As shown, the voltage acquisition module 110 includes: an amplifier OP and a first resistor R1; the non-inverting input terminal of the amplifier OP is connected to the output terminal of the initial common electrode voltage Vcom_i, the inverting input terminal of the amplifier OP is connected to the first common electrode line A1 through the first resistor R1, and the output terminal of the amplifier OP is connected to the second common electrode line A2.

[0041] In some embodiments, the compensation module 120 includes: a first capacitor C1, a second resistor R2, and a second capacitor C2; the first terminal of the first capacitor C1 is connected to the voltage acquisition module 110, and the second terminal of the first capacitor C1 is connected to the voltage acquisition module 110 and the first terminal of the second resistor R2; the second terminal of the second resistor R2 is connected to the first terminal of the second capacitor C2; and the second terminal of the second capacitor C2 is connected to the voltage acquisition module 110.

[0042] For example, based on the working principle of the voltage acquisition module 110 and the compensation module 120, the target common electrode voltage corresponding to scanning the nth row of sub-pixels. The following calculation formula can be used to express this:

[0043] in, The initial common electrode voltage is represented by T, and T represents the time to scan the nth row of sub-pixels. This represents the change in the actual common electrode voltage over time t.

[0044] proportional term coefficient The following calculation formula can be used to express this:

[0045] Integral term coefficient The following calculation formula can be used to express this:

[0046] Differential coefficients The following calculation formula can be used to express this:

[0047] The proportional term coefficient can be adjusted by setting the values ​​of the first resistor R1, the second resistor R2, the first capacitor C1, and the second capacitor C2. coefficient of integral term and differential coefficients This allows for adjustment of the compensation level, thereby regulating the magnitude of the target common electrode voltage Vcomo.

[0048] In some embodiments, the proportional term coefficient provides feedback on the change error value; the larger the change error value, the larger the feedback amount of the proportional term. The integral term coefficient provides feedback on the cumulative error value; the larger the cumulative error value, the larger the feedback amount of the integral term, accelerating the response at the end of the response. If the cumulative error value decreases, the feedback amount of the integral term decreases. As long as the integral term exists, the change error value will continue to accumulate. The derivative term coefficient provides feedback on the error change rate; the larger the error change rate, the larger the feedback amount of the derivative term. If the derivative term detects a drastic change trend in the actual common electrode voltage Vfb, it will increase the feedback to suppress the drastic change trend in advance; otherwise, it will decrease the feedback amount to ensure the stability of the target common electrode voltage Vcomo.

[0049] Specifically, the initial common electrode voltage Vcom_i can be 6V, the first resistor R1 can be 3KΩ, the second resistor R2 can be 1KΩ, the first capacitor C1 can be 10nF, the second capacitor C2 can be 10nF, and the target common electrode voltage Vcomo can be 0V~12V.

[0050] Figure 4 The diagram shows waveforms of an initial common electrode voltage and a target common electrode voltage provided in an embodiment of this application. Figure 4 The first waveform (top image) represents the initial common electrode voltage Vcom_i, and the second waveform (bottom image) represents the target common electrode voltage Vcomo. Please refer to [link / reference]. Figure 4As shown, the initial common electrode voltage Vcom_i, 0~30us: is a strict sinusoidal signal with a random oscillation between 0V and 12V, with an oscillation period of 10us and the largest rate of change at the zero crossing point; 30us~40us: the initial common electrode voltage Vcom_i decreases to 5V at a rate of 0.1V / us; 40us~52us: is a spike square wave jumping between 2V and 10V, with a period of 3us, steep edges, and an extremely high rate of change.

[0051] Please see Figure 4 As shown, the target common electrode voltage Vcomo, in the range of 0~30us: the change of the sine wave at the zero crossing point triggers the differential and proportional terms. The target common electrode voltage Vcomo instantaneously exceeds the limit and is clipped to periodically saturate and oscillate between 0V and 12V, with the average clock around 6V; 30us~40us: the initial common electrode voltage slowly decreases from 6V to 5V, the voltage change is very slow, the differential has almost no effect, the target common electrode voltage Vcomo slowly rises from 7V to 7.433V, and remains between 0~12V throughout without being clipped; 40us~52us: at each level transition instant, the target common electrode voltage Vcomo instantaneously reaches the saturation peak of 0V or 12V, leaves the edge after the transition, and returns to the plateau level.

[0052] In some embodiments, please refer to Figure 3 As shown, the switch control module 130 includes: a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4; the control terminal of the first transistor T1 is connected to the external control module 200, the first terminal of the first transistor T1 is connected to the external control module 200, and the second terminal of the first transistor T1 is connected to the positive power supply terminal V_DO+ of the voltage acquisition module 110; the control terminal of the second transistor T2 is connected to the external control module 200, the first terminal of the second transistor T2 is connected to the external control module 200, and the second terminal of the second transistor T2 is connected to the positive power supply terminal V_DO+ of the voltage acquisition module 110; the control terminal of the third transistor T3 is connected to the external control module 200, the first terminal of the third transistor T3 is connected to the external control module 200, and the second terminal of the third transistor T3 is connected to the negative power supply terminal V_DO- of the voltage acquisition module 110; the control terminal of the fourth transistor T4 is connected to the external control module 200, the first terminal of the fourth transistor T4 is connected to the external control module 200, and the second terminal of the fourth transistor T4 is connected to the negative power supply terminal V_DO- of the voltage acquisition module 110.

[0053] For example, the external control module 200 outputs a target supply voltage, which includes a first target supply voltage and a second target supply voltage. The first and second target supply voltages have opposite polarities, and a timing reversal signal is generated after each scan frame, causing the voltage polarities of the first and second target supply voltages to reverse. When the first target supply voltage is positive and the second target supply voltage is negative, the external control module 200 generates a switch control signal FS according to the timing reversal signal. When the switch control signal FS is a first switch sub-signal and the first switch sub-signal is a high-level signal, the first transistor T1 and the third transistor T3 will be turned on, and the second transistor T2 and the fourth transistor T4 will be turned off. The positive power supply terminal V_DO+ of the voltage acquisition module 110 receives the first target supply voltage. The negative power supply terminal V_DO- of the voltage acquisition module 110 receives the second target power supply voltage. When the first target power supply voltage is negative and the second target power supply voltage is positive, the external control module 200 generates a switch control signal FS according to the timing flip signal. When the switch control signal FS is the second switch sub-signal and the second switch sub-signal is a low-level signal, the first transistor T1 and the third transistor T3 will be turned off, and the second transistor T2 and the fourth transistor T4 will be turned on. The positive power supply terminal V_DO+ of the voltage acquisition module 110 receives the second target power supply voltage, and the negative power supply terminal V_DO- of the voltage acquisition module 110 receives the first target power supply voltage, thereby realizing that the positive power supply terminal V_DO+ of the voltage acquisition module 110 continuously receives a positive voltage, and the negative power supply terminal V_DO- of the voltage acquisition module 110 continuously receives the second target power supply voltage. The first transistor T1 and the third transistor T3 can be N-type, and the second transistor T2 and the fourth transistor T4 can be P-type.

[0054] In some embodiments, please refer to Figure 1 and Figure 3 As shown, this application provides a display panel, which includes: a timing controller 210, a source driver 220, a level converter 230, a common electrode, and a compensation circuit 100. The source driver 220 is connected to the timing controller 210, and the level converter 230 is connected to the timing controller 210. The common electrode includes a first common electrode line A1 and a second common electrode line A2 distributed in the display area A. The first common electrode line A1 and the second common electrode line A2 are electrically connected and arranged at a preset distance. The switch control module 130 is connected to the source driver 220 and the level converter 230 respectively. The compensation circuit 100 includes a voltage acquisition module 110, a compensation module 120, and a switch control module 130. The voltage acquisition module 110 is connected to the first common electrode line A1, the second common electrode line A2, and the compensation module 120. The switch control module 130 is connected to the source driver 220 and the level converter 230 respectively.

[0055] In some embodiments, the timing controller 210 is configured to: determine a target power supply voltage based on the grayscale of the sub-pixels in the nth row and the (n+1)th row, and output a timing flip signal; wherein the target power supply voltage includes a first target power supply voltage and a second target power supply voltage.

[0056] For example, since the amplifier OP in the voltage acquisition module 110 is limited by the thrust (i.e., slew rate) and the compensation circuit 100 itself requires response time, when the target common electrode voltage Vcomo corresponding to the nth row sub-pixel in the display panel is calculated and compensated, the target common electrode voltage Vcomo is still rising, and the scanning signal may have already scanned the sub-pixel of the next row; and the grayscale of the sub-pixel in the (n+1)th row is coupled upwards significantly, and with the addition of the nth row, the target common electrode voltage corresponding to the sub-pixel in the (n+1)th row will have a larger deviation. Based on the grayscale of the sub-pixels in rows n and n+1, the timing controller 210 can determine the common electrode coupling degree of the sub-pixels in rows n and n+1, and can anticipate the occurrence of this situation. When compensating for row n, the initial common electrode voltage Vcom_i is adjusted to obtain the target common electrode voltage Vcomo. Then, the grayscale of the sub-pixels in row n+1 will not significantly compensate the corresponding target common electrode voltage Vcomo upward. Moreover, the target common electrode voltage Vcomo corresponding to the sub-pixels in row n will end before the scanning of the sub-pixels in row n+1 is completed, which accelerates the response time of the compensation circuit 100 and avoids the amplification of errors.

[0057] In some embodiments, the source driver 220 (Driver IC) has multiple signal channels and is configured to output a first target supply voltage and a second target supply voltage in two adjacent signal channels (DIC3 Ch965 and DIC3 Ch966); wherein the polarities of the first target supply voltage and the second target supply voltage are opposite.

[0058] For example, the timing controller 210 uses multiple source drivers 220 ( Figure 1 (Seen via Drivers 1 to 6) are connected to sub-pixels in the display panel. Each source driver 220 has multiple signal channels, the specific number of which can be adjusted by the timing controller 210. For example, the source drivers 220 can have the following specifications: 720ch, 726ch, 960ch, 966ch. The data output of each signal channel is controlled by the timing controller 210 to achieve FHD (Full High Definition) resolution (1920p). Taking a 1080p 120Hz refresh rate display panel as an example, there are 1920 pixels in one row, that is, each row has 5760 (1920) pixels. 3) For each sub-pixel, the display panel uses six source drivers 220, each requiring 960 channels. The third source driver controller (Driver IC3) can be configured with 966 channels. Channels 961 through 966 are not connected to the display panel. The timing controller 210 outputs processing data so that channels 961, 962, 963, and 964 have no output. Channels 965 and 966 are connected to the discharger bias electrode. The channels of the source drivers 220 are paired, and the polarities of the first and second target supply voltages output are always opposite. The polarities of the first and second target supply voltages are reversed once per frame. For example, in the first scan frame, if channel 965 outputs a positive first target supply voltage and channel 966 outputs a negative second target supply voltage, then in the second scan frame, channel 965 outputs a negative first target supply voltage and channel 966 outputs a positive second target supply voltage.

[0059] In some embodiments, the level converter 230 is configured to generate a switching control signal based on a timing flip signal output by the timing controller 210.

[0060] For example, the first target power supply voltage and the second target power supply voltage are flipped once per scan frame. The high level is the Vgh voltage of the display panel, and the low level is the Vgl voltage of the display panel. When the level converter 230 receives the timing flip signal sent by the timing controller 210, it generates a switch control signal FS.

[0061] In some embodiments, the switch control module 130 is configured to output the first target supply voltage and the second target supply voltage to the positive power supply terminal V_DO+ and the negative power supply terminal V_DO- of the voltage acquisition module 110 respectively, according to the switch control signal.

[0062] For example, the switch control signal controls the on / off state of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 of the switch control module 130. When the switch control signal FS is the first switch sub-signal, i.e., when it is high, the first transistor T1 and the third transistor T3 are turned on, and the second transistor T2 and the fourth transistor T4 are turned off. Then, the first target power supply voltage output by 965ch is connected to the positive power supply terminal V_DO+ of the amplifier OP, and the second target power supply voltage output by 966ch is connected to the negative power supply terminal V_DO- of the amplifier OP. After the first switch sub-signal is kept high for one frame, it switches to the second switch sub-signal. When the second switch sub-signal is low, the first target power supply voltage output by 965ch is connected to the negative power supply terminal V_DO- of the amplifier OP, and the second target power supply voltage output by 966ch is connected to the positive power supply terminal V_DO+ of the amplifier OP. The switch control signal FS ensures that the polarity of the power supply terminal connected to the amplifier OP is correct and will not burn out.

[0063] Figure 5 A flowchart illustrating a compensation method provided in an embodiment of this application is shown below. Please refer to [link / reference]. Figure 5 As shown, the compensation method provided in this application is applied to the timing controller in the display panel. The compensation method includes the following steps S310~S320, which are described in detail below.

[0064] S310. Determine the common electrode coupling degree based on the gray levels of the sub-pixels in the nth and n+1th rows.

[0065] For example, the initial common electrode voltage is determined by determining the common electrode coupling degree.

[0066] S320. The initial power supply voltage is compensated according to the coupling degree of the common electrode to obtain the target power supply voltage; wherein, the target power supply voltage is used to adjust the compensation range value of the voltage acquisition module.

[0067] For example, the compensation method can be determined by the common electrode coupling degree. The initial common electrode voltage is compensated based on the common electrode coupling degree to adjust the compensation range of the voltage acquisition module, thereby adjusting the magnitude of the target common electrode voltage output by the voltage acquisition module. For instance, if the initial supply voltage is 255 grayscale voltage, the maximum corresponding target common electrode voltage output is 225 grayscale voltage. After compensating the initial supply voltage, the target supply voltage becomes 150 grayscale voltage, and the maximum corresponding target common electrode voltage output is also 150 grayscale voltage.

[0068] In some embodiments, each row of sub-pixel grayscale includes positive grayscale and negative grayscale. Figure 6 A flowchart illustrating another compensation method provided in an embodiment of this application is shown. Please refer to [link / reference]. Figure 6 As shown, Figure 5S310 in the text includes the following S311~S313, which are described in detail below.

[0069] S311. The first coupling degree is obtained based on the sum of the positive gray levels in the nth row, the sum of the negative gray levels in the nth row, the coupling coefficient, and the number of sub-pixels in each row.

[0070] For example, the first degree of coupling The following formula can be used to calculate:

[0071] Where Q represents the coupling coefficient, which can be 10000. Its function is to amplify the first coupling degree to improve the recognition accuracy of the timing controller. This represents the positive gray level of the i-th sub-pixel in the n-th row; This represents the negative grayscale of the j-th sub-pixel in the n-th row; M represents the number of sub-pixels in the n-th row, specifically 5760; and when M is 5760... .

[0072] S312. The second coupling degree is obtained based on the sum of the positive gray levels in the (n+1)th row, the sum of the negative gray levels in the (n+1)th row, the coupling coefficient, and the number of sub-pixels in each row.

[0073] For example, the second degree of coupling The following formula can be used to calculate:

[0074] Where Q represents the coupling coefficient, which can be 10000. Its function is to amplify the second coupling degree to improve the recognition accuracy of the timing controller. This represents the positive gray level of the i-th sub-pixel in the (n+1)-th row; This represents the negative grayscale of the j-th sub-pixel in the (n+1)-th row; M represents the number of sub-pixels in the (n+1)-th row, specifically 5760; and when M is 5760, ... 0.

[0075] S313. Based on the first coupling degree and the second coupling degree, the coupling degree of the common electrode is obtained.

[0076] For example, common electrode coupling The following calculation formula can be used to express this:

[0077] Where X represents the first degree of coupling, Y represents the second degree of coupling, and when M is 5760, 0.

[0078] In some embodiments, the initial supply voltage includes a first initial supply voltage and a second initial supply voltage, and the target supply voltage includes a first target supply voltage and a second target supply voltage.

[0079] In some embodiments, Figure 5 S120 includes the following S1211: When the coupling degree of the common electrode is less than the first preset coupling threshold and the switch control signal in the current scan frame is the first switch sub-signal, the first target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the second initial supply voltage is used as the second target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage.

[0080] For example, the first preset coupling threshold can be -637500. When the common electrode coupling degree is less than the first preset coupling threshold, it indicates that there are many negative gray levels in the sub-pixels of the nth and n+1th rows, and a positive voltage needs to be added to compensate for the initial power supply voltage. The second initial power supply voltage remains unchanged, that is, the second initial common electrode voltage is used as the second target power supply voltage to reduce the coupling degree. When the switch control signal is the first switch sub-signal, the first target power supply voltage is a positive voltage, and the second target power supply voltage is a negative voltage. The gray level G1 corresponding to the first target power supply voltage can be represented by the following calculation formula:

[0081] Where Z represents the common electrode coupling degree, Q represents the coupling degree coefficient, and 【】 represents the rounding symbol.

[0082] For example, by reducing the first initial supply voltage to a first target supply voltage, where the first target supply voltage is less than the first initial supply voltage, the amplifier will quickly reach the first target supply voltage for the nth row of sub-pixels, improving the response speed. For the (n+1)th row of sub-pixels, the amplifier will have time to compensate for the initial common electrode voltage so that the (n+1)th row of sub-pixels can receive the target common electrode voltage, thereby ensuring the compensation effect.

[0083] In some embodiments, Figure 5 S120 includes the following S1211: When the coupling degree of the common electrode is less than the first preset coupling threshold and the switch control signal in the current scan frame is the second switch sub-signal, the second target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the first initial supply voltage is used as the first target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.

[0084] For example, when the switch control signal is the second switch sub-signal, the second target supply voltage is a positive voltage, the first target supply voltage is a negative voltage, and the gray level G2 corresponding to the second target supply voltage can be expressed by the following calculation formula:

[0085] Where Z represents the common electrode coupling degree, Q represents the coupling degree coefficient, and 【】 represents the rounding symbol.

[0086] For example, by reducing the second initial supply voltage to the second target supply voltage, which is lower than the second initial supply voltage, the amplifier will quickly reach the second target supply voltage for the nth row of sub-pixels, improving the response speed. For the (n+1)th row of sub-pixels, the amplifier will have time to compensate for the initial common electrode voltage so that the (n+1)th row of sub-pixels can receive the target common electrode voltage, thereby ensuring the compensation effect.

[0087] In some embodiments, Figure 5 S120 includes the following S1221: When the coupling degree of the common electrode is greater than the second preset coupling threshold and the switch control signal in the current scan frame is the first switch sub-signal, the second target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the first initial supply voltage is used as the first target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage.

[0088] For example, the second preset coupling threshold can be 637500. When the common electrode coupling degree is greater than the second preset coupling threshold, it indicates that there are many positive gray levels in the sub-pixels of the nth and n+1th rows. It is necessary to input an additional negative voltage to compensate for the initial power supply voltage. The first initial power supply voltage remains unchanged, that is, the first initial common electrode voltage is used as the first target power supply voltage to reduce the coupling degree. When the switch control signal is the first switch sub-signal, the first target power supply voltage is a positive voltage, and the second target power supply voltage is a negative voltage. The gray level G2 corresponding to the second target power supply voltage can be expressed by the following calculation formula:

[0089] Where Z represents the common electrode coupling degree, Q represents the coupling degree coefficient, and 【】 represents the rounding symbol.

[0090] For example, the second initial supply voltage is increased to the second target supply voltage, which is greater than the second initial supply voltage. For the nth row of sub-pixels, the amplifier will quickly reach the second target supply voltage, improving the response speed. For the (n+1)th row of sub-pixels, the amplifier will have time to compensate for the initial common electrode voltage so that the (n+1)th row of sub-pixels can receive the target common electrode voltage, thereby ensuring the compensation effect.

[0091] In some embodiments, Figure 5 S120 includes the following S1222: When the coupling degree of the common electrode is greater than the second preset coupling threshold and the switch control signal in the current scan frame is the second switch sub-signal, the first target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the second initial supply voltage is used as the second target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.

[0092] For example, when the switch control signal is the second switch sub-signal, the first target supply voltage is a negative voltage, the second target supply voltage is a positive voltage, and the grayscale G1 corresponding to the first target supply voltage can be represented by the following calculation formula:

[0093] Where Z represents the common electrode coupling degree, Q represents the coupling degree coefficient, and 【】 represents the rounding symbol.

[0094] For example, by increasing the first initial supply voltage to a first target supply voltage, where the first target supply voltage is greater than the first initial supply voltage, the amplifier will quickly reach the first target supply voltage for the nth row of sub-pixels, improving the response speed. For the (n+1)th row of sub-pixels, the amplifier will have time to compensate for the initial common electrode voltage so that the (n+1)th row of sub-pixels can receive the target common electrode voltage, thereby ensuring the compensation effect.

[0095] In some embodiments, when the common electrode coupling degree is greater than or equal to a first preset coupling threshold and less than or equal to a second preset coupling threshold, the first initial power supply voltage is used as the first target power supply voltage, and the second initial power supply voltage is used as the second target power supply voltage.

[0096] For example, when the common electrode coupling degree is greater than or equal to the first preset coupling threshold and less than or equal to the second preset coupling threshold, it indicates that the compensation degree is small. The target common electrode voltages corresponding to the nth row sub-pixel and the (n+1)th row sub-pixel can be output, and there is no need to adjust the compensation range value of the amplifier, that is, there is no need to compensate for the first initial power supply voltage and the second initial power supply voltage.

[0097] It should be noted that the gray level of the sub-pixel corresponding to the first initial power supply voltage is 255 (+) or 255 (-), and the gray level of the sub-pixel corresponding to the second initial power supply voltage is 255 (+) or 255 (-).

[0098] Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0099] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0100] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A compensation circuit, characterized in that, The device is applied to a display panel, the display panel including a common electrode, the common electrode including at least a first common electrode line and a second common electrode line distributed in the display area, the first common electrode line and the second common electrode line being electrically connected and arranged at a predetermined distance, the compensation circuit including: The voltage acquisition module is connected to the output terminal of the initial common electrode voltage and the first common electrode line respectively, and is configured to: receive the initial common electrode voltage and acquire the actual common electrode voltage of the first common electrode line; The compensation module, connected to the voltage acquisition module, is configured to: determine the change error value, cumulative error value, and error change rate of the common electrode voltage based on the initial common electrode voltage and the actual common electrode voltage; The voltage acquisition module is also connected to the second common electrode line and is configured to: compensate the initial common electrode voltage based on the change error value, the cumulative error value and the error change rate to obtain the target common electrode voltage; and output the target common electrode voltage to the second common electrode line.

2. The compensation circuit according to claim 1, characterized in that, The compensation circuit further includes: A switch control module, connected to both the voltage acquisition module and the external control module, is configured to adjust the compensation range value of the voltage acquisition module according to the target power supply voltage output by the external control module; wherein the target power supply voltage is determined by the external control module based on the gray levels of the sub-pixels in the nth and n+1th rows.

3. The compensation circuit according to claim 1, characterized in that, The voltage acquisition module includes: an amplifier and a first resistor; The non-inverting input of the amplifier is connected to the output of the initial common electrode voltage, the inverting input of the amplifier is connected to the first common electrode line through the first resistor, and the output of the amplifier is connected to the second common electrode line.

4. The compensation circuit according to claim 1, characterized in that, The compensation module includes: a first capacitor, a second resistor, and a second capacitor; The first terminal of the first capacitor is connected to the voltage acquisition module, and the second terminal of the first capacitor is connected to both the voltage acquisition module and the first terminal of the second resistor. The second terminal of the second resistor is connected to the first terminal of the second capacitor; The second terminal of the second capacitor is connected to the voltage acquisition module.

5. The compensation circuit according to claim 2, characterized in that, The switch control module includes: a first transistor, a second transistor, a third transistor, and a fourth transistor; The control terminal of the first transistor is connected to the external control module, the first terminal of the first transistor is connected to the external control module, and the second terminal of the first transistor is connected to the positive power supply terminal of the voltage acquisition module. The control terminal of the second transistor is connected to the external control module, the first terminal of the second transistor is connected to the external control module, and the second terminal of the second transistor is connected to the positive power supply terminal of the voltage acquisition module. The control terminal of the third transistor is connected to the external control module, the first terminal of the third transistor is connected to the external control module, and the second terminal of the third transistor is connected to the negative power supply terminal of the voltage acquisition module. The control terminal of the fourth transistor is connected to the external control module, the first terminal of the fourth transistor is connected to the external control module, and the second terminal of the fourth transistor is connected to the negative power supply terminal of the voltage acquisition module.

6. A display panel, characterized in that, The display panel includes: The timing controller is configured to: determine the target power supply voltage based on the grayscale of the sub-pixels in the nth and (n+1)th rows, and output a timing flip signal; wherein the target power supply voltage includes a first target power supply voltage and a second target power supply voltage; A source driver, having multiple signal channels, is connected to the timing controller and configured to output a first target supply voltage and a second target supply voltage on two adjacent signal channels; wherein the polarities of the first target supply voltage and the second target supply voltage are opposite. A level converter, connected to the timing controller, is configured to generate a switching control signal based on a timing flip signal output by the timing controller. A common electrode, the common electrode including at least a first common electrode line and a second common electrode line distributed in the display area, the first common electrode line and the second common electrode line being electrically connected and arranged at a preset distance; The compensation circuit according to any one of claims 2-5 includes a voltage acquisition module, a compensation module, and a switch control module; The voltage acquisition module is connected to the first common electrode line, the second common electrode line and the compensation module respectively; The switch control module is connected to the level converter and the source driver respectively, and is configured to output the first target supply voltage and the second target supply voltage to the positive power supply terminal and the negative power supply terminal of the voltage acquisition module respectively according to the switch control signal.

7. A compensation method, characterized in that, The timing controller applied in the display panel of claim 6, the compensation method includes: The coupling degree of the common electrode is determined based on the gray levels of the sub-pixels in the nth and (n+1)th rows. The initial power supply voltage is compensated based on the coupling degree of the common electrode to obtain the target power supply voltage; wherein, the target power supply voltage is used to adjust the compensation range value of the voltage acquisition module.

8. The compensation method according to claim 7, characterized in that, Each row of sub-pixel grayscale includes positive and negative grayscale. The determination of the common electrode coupling degree based on the sub-pixel grayscale of the nth and (n+1)th rows includes: The first coupling degree is obtained based on the sum of the positive gray levels in the nth row, the sum of the negative gray levels in the nth row, the coupling coefficient, and the number of sub-pixels in each row. The second coupling degree is obtained based on the sum of the positive gray levels in the (n+1)th row, the sum of the negative gray levels in the (n+1)th row, the coupling coefficient, and the number of sub-pixels in each row. Based on the first coupling degree and the second coupling degree, the common electrode coupling degree is obtained.

9. The compensation method according to claim 7, characterized in that, The initial supply voltage includes a first initial supply voltage and a second initial supply voltage, and the target supply voltage includes a first target supply voltage and a second target supply voltage. The step of compensating the initial supply voltage based on the common electrode coupling to obtain the target supply voltage includes: When the coupling degree of the common electrode is less than the first preset coupling threshold and the switch control signal in the current scan frame is the first switch sub-signal, the first target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the second initial supply voltage is used as the second target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage; Alternatively, when the coupling degree of the common electrode is less than the second preset coupling threshold and the switch control signal in the current scan frame is the second switch sub-signal, the second target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the first initial supply voltage is used as the first target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.

10. The compensation method according to claim 7, characterized in that, The initial supply voltage includes a first initial supply voltage and a second initial supply voltage, and the target supply voltage includes a first target supply voltage and a second target supply voltage. The step of compensating the initial supply voltage based on the common electrode coupling to obtain the target supply voltage includes: When the coupling degree of the common electrode is greater than the second preset coupling threshold and the switch control signal in the current scan frame is the first switch sub-signal, the second target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the first initial supply voltage is used as the first target supply voltage; wherein, when the switch control signal is the first switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the first target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the second target supply voltage; Alternatively, when the coupling degree of the common electrode is greater than the second preset coupling threshold and the switch control signal in the current scan frame is the second switch sub-signal, the first target supply voltage is obtained according to the coupling degree of the common electrode and the coupling coefficient; and the second initial supply voltage is used as the second target supply voltage; wherein, when the switch control signal is the second switch sub-signal, the positive power supply terminal of the voltage acquisition module receives the second target supply voltage, and the negative power supply terminal of the voltage acquisition module receives the first target supply voltage.