Light emitting display device

Abstract

A light emitting display device according to one or more embodiments of the present disclosure can include a light emitting device; and a pixel driving circuit connected to the light emitting device and configured to drive the light emitting device. The pixel driving circuit can include a control node circuit unit including a control node having a voltage set based on a data voltage and a slope voltage; a PWM circuit unit including a control transistor configured to adjust a light emitting time of the light emitting device according to the voltage of the control node; and a driving circuit unit including a driving transistor configured to be turned on by the control transistor and to control a current flowing through the light emitting device.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit and priority of Korean Patent Application No. 10-2025-0057300, filed in Korea on April 30, 2025, the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] This disclosure relates to light-emitting display devices. Background Technology

[0004] With the development of the information society, the demand for display devices for displaying images is increasing in various forms. Therefore, display devices such as liquid crystal displays (LCDs), organic light-emitting diode displays (OLEDs), micro light-emitting diode (μLED) displays, and quantum dot displays (QDs) are becoming increasingly popular.

[0005] To represent grayscale, typical light-emitting display devices use PAM (Pulse Amplitude Modulation) to adjust the amount of current flowing through the light-emitting device, PWM (Pulse Width Modulation) to fix the current value and adjust the light emission time, or a driving method that combines PAM and PWM.

[0006] Among light-emitting display devices, miniature light-emitting diode (LED) display devices are used to display images by using ultra-small miniature LEDs that emit red, green, and blue light as sub-pixels. Miniature LED display devices offer the advantages of low power consumption, miniaturization, and weight reduction through miniaturized structures and low power consumption characteristics.

[0007] However, because miniature light-emitting diodes have the characteristic that the emission wavelength changes according to the current, wavelength shift occurs when grayscale is represented by the PAM driving method, and therefore there is a problem of screen distortion caused by color changes during pixel driving processing. Summary of the Invention

[0008] Miniature LED display devices may include compensation circuits using PWM driving methods to prevent screen distortion caused by color changes. However, such compensation circuits have complex circuit configurations for adjusting the emission time and fixing the current value, resulting in increased component dimensions and a greater number of control signals.

[0009] One or more embodiments of this disclosure can provide a light-emitting display device that can achieve PWM drive through stable control of the control node via data voltage, without the need for complex control circuitry.

[0010] One or more embodiments of this disclosure can provide a light-emitting display device that can reduce the parameter size of circuit elements and the number of control signals by configuring a simplified PWM drive circuit.

[0011] One or more embodiments of this disclosure can provide a light-emitting display device that enables real-time brightness control via PWM drive without separate external circuitry by including a photosensitive device in each sub-pixel capable of adjusting the voltage of a control node according to the intensity of external light.

[0012] Additional advantages and features of this disclosure will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon review of the following description, or may be learned from practice of this disclosure. The purposes and other advantages of this disclosure may be realized and obtained from the written description of this disclosure and the structures particularly pointed out in the claims and drawings.

[0013] A light-emitting display device according to one or more embodiments of the present disclosure may include: a light-emitting device; and a pixel driving circuit connected to and configured to drive the light-emitting device. The pixel driving circuit may include: a control node circuit unit including a control node having a voltage set based on a data voltage and a ramp voltage; a PWM circuit unit including a control transistor configured to adjust the emission time of the light-emitting device according to the voltage of the control node; and a driving circuit unit including a driving transistor configured to be turned on by the control transistor and control the current flowing through the light-emitting device.

[0014] The following description and accompanying drawings include specific details of various embodiments according to this disclosure.

[0015] According to one or more embodiments of this disclosure, a light-emitting display device can be provided that can achieve PWM drive through stable control of the control node via data voltage, without the need for complex control circuitry.

[0016] According to one or more embodiments of this disclosure, a light-emitting display device can be provided that can reduce the parameter size of circuit elements and the number of control signals by configuring a simplified PWM drive circuit.

[0017] According to one or more embodiments of the present disclosure, a light-emitting display device can be provided that enables PWM drive for real-time brightness control without separate external circuitry by including a photosensitive device in each sub-pixel capable of adjusting the voltage of a control node according to the intensity of external light.

[0018] The light-emitting display device according to one or more embodiments of this disclosure can achieve optimized PWM drive by stable control of the control node through data voltage without complex control circuits or separate external circuits, thereby achieving low-power drive by reducing power consumption and reducing the parameter size of circuit elements and the number of control signals, thereby achieving environmental / social / governance (ESG) by reducing production energy consumption.

[0019] The effects of this disclosure are not limited to those described above, but other effects not described herein will be clearly understood by those skilled in the art based on the following description.

[0020] The details of this disclosure described in the technical problem, technical solution and advantageous effect do not specify the essential features of the claims, and therefore the scope of the claims is not limited by the details described in the detailed description of this disclosure. Attached Figure Description

[0021] The accompanying drawings, which are included to provide a further understanding of this disclosure, are incorporated in and constitute a part of this disclosure. The drawings illustrate various aspects and implementations of this disclosure and, together with the description, serve to illustrate the principles and examples of this disclosure.

[0022] Figure 1 An embodiment of a light-emitting display device according to the present disclosure is shown.

[0023] Figure 2 This is a circuit diagram showing the pixel driving circuit of a light-emitting display device according to an embodiment of the present disclosure.

[0024] Figure 3 The driving timing of a pixel driving circuit according to an embodiment of the present disclosure is shown.

[0025] Figure 4 The pixel driving circuit according to an embodiment of the present disclosure is shown in Figure 3 The operation status during the first time period is shown in the figure.

[0026] Figure 5 A pixel driving circuit according to an embodiment of the present disclosure is shown. Figure 3 The operating status during the second time period is shown in the figure.

[0027] Figure 6 The pixel structure of a light-emitting display device according to another embodiment of the present disclosure is shown.

[0028] Figure 7 This is a circuit diagram illustrating a pixel driving circuit of a light-emitting display device according to another embodiment of the present disclosure.

[0029] Figure 8 The driving timing of a pixel driving circuit according to another embodiment of the present disclosure is shown.

[0030] Figure 9 A pixel driving circuit according to another embodiment of the present disclosure is shown in Figure 8 The operation status during the first time period is shown in the figure.

[0031] Figure 10 A pixel driving circuit according to another embodiment of the present disclosure is shown in Figure 8 The operating status during the second time period is shown in the figure.

[0032] Figure 11 A plurality of sub-pixels in a light-emitting display device according to another embodiment of the present disclosure are shown.

[0033] Figure 12 This is another embodiment of the present disclosure. Figure 11 The cross-sectional view taken from line I-I'.

[0034] Throughout the accompanying drawings and detailed embodiments, unless otherwise described, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and / or convenience, the dimensions, lengths, and thicknesses of layers, regions, and elements, and their depictions, may be exaggerated. Detailed Implementation

[0035] The advantages and features of this disclosure, and its implementation methods, are illustrated by means of embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are exemplary, and are provided so that this disclosure may be detailed and complete to aid those skilled in the art in understanding the inventive concept, without limiting the scope of protection of this disclosure.

[0036] The shapes (e.g., length, width, height, thickness, position, radius, diameter, and area), dimensions, ratios, angles, numbers, etc., disclosed herein, including those shown in the accompanying drawings, are merely examples, and therefore, this disclosure is not limited to the details shown. Any implementation described herein as an "example" is not necessarily to be construed as preferred or superior to other implementations. However, note that the relative dimensions of the components shown in the accompanying drawings are part of this disclosure.

[0037] When terms such as “comprising,” “having,” “including,” “containing,” “constituting,” “made of,” “formed from,” etc., are used with respect to one or more elements, one or more additional elements may be added unless a term such as “only” is used. The terminology used in this disclosure is for describing exemplary embodiments only and is not intended to limit the scope of this disclosure. Unless the context clearly indicates otherwise, singular terms may include plural forms.

[0038] When interpreting components, even if the error region is not explicitly described, the component is interpreted as including the error region.

[0039] When describing positional relationships, for example, when the positional order is described as "on," "above," "below," "under," and "immediately following," it may include cases where there is no contact between them, unless "exactly" or "directly" is used.

[0040] In the accompanying drawings, if it is mentioned that the first element is "above" the second element, it does not mean that the first element is actually located above the second element. The upper and lower parts of the object of interest can change depending on the orientation of the object. Therefore, in the accompanying drawings or in actual construction, the case where the first element is "above" the second element includes the case where the first element is "below" the second element and the case where the first element is "above" the second element.

[0041] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” and “before,” discontinuous cases may be included unless “immediately after” or “directly” is used.

[0042] It will be understood that although the terms “first,” “second,” etc., may be used in this document to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0043] In describing elements of this disclosure, the terms “first,” “second,” “A,” “B,” “(a),” “(b),” etc., may be used. These terms are intended to identify corresponding elements from other elements, and are not used to define the nature, basis, order, or number of elements.

[0044] Unless otherwise stated, when describing a component as “connected,” “coupled,” “attached,” or “adhered” to another component, a component may not only be directly connected, coupled, attached, or adhered to another component, but may also be indirectly connected, coupled, attached, or adhered to another component when one or more intermediate components are placed between components or inserted between components.

[0045] For example, the phrase "A connected to B" includes both direct connection (without intermediate parts or elements) and indirect connection (with one or more intermediate parts or elements between A and B). In other words, "A connected to B" includes both direct physical or electrical coupling and indirect coupling through one or more intermediate parts. Unless otherwise explicitly stated, these terms do not require direct physical or electrical contact. The term "coupling" and the other terms listed above should be interpreted in the same manner.

[0046] Unless otherwise stated, the description of a component as "in contact" or "overlapping" with another component means that the component can not only directly contact or overlap with another component, but also indirectly contact or overlap with another component when one or more intermediate components are placed or inserted between the components.

[0047] The term "at least one" should be understood to include any and all combinations of one or more of the associated enumerated items. For example, "at least one of the first element, the second element, and the third element" can include all combinations of two or more elements selected from the first element, the second element, and the third element, as well as each of the first element, the second element, and the third element.

[0048] Features of the various embodiments of this disclosure may be coupled or combined with each other in part or in whole, may be technically interconnected, and may interoperate, link, or drive each other in various ways. Embodiments of this disclosure may be implemented or performed independently of each other, or may be implemented or performed together in a mutually dependent or related relationship. In one or more aspects, components of each apparatus according to the various embodiments of this disclosure are operatively coupled and configured.

[0049] In the following description, various exemplary embodiments of the present disclosure are described in detail with reference to the accompanying drawings. Reference numerals for each element in the drawings may be used to represent the same element in other drawings, and unless otherwise stated, the same reference numerals may refer to the same element. Identical or similar elements may be represented by the same reference numerals, even if they are depicted in different drawings. Furthermore, for ease of description, the scale, dimensions, size, and thickness of each element shown in the drawings may differ from the actual scale, dimensions, size, and thickness, and therefore, embodiments of the present disclosure are not limited to the scale, dimensions, size, and thickness shown in the drawings.

[0050] Figure 1 An embodiment of a light-emitting display device according to the present disclosure is shown.

[0051] In the following text, the X-axis represents the direction parallel to the scan line (or gate line), the Y-axis represents the direction parallel to the data line, and the Z-axis represents the height direction of the light-emitting display device.

[0052] The light-emitting display device according to the embodiments of this disclosure can be a miniature light-emitting diode display device. For example, the light-emitting display device can also be an organic light-emitting display, a liquid crystal display, a quantum dot light-emitting display, or an electrophoretic display, but the embodiments of this disclosure are not limited thereto.

[0053] Reference Figure 1 According to embodiments of the present disclosure, a light-emitting display device may include a display panel 110, a scan driver 120 (or a gate driver), a data driver 130, a timing controller 160, and a power circuit 170.

[0054] The display panel 110 may include a display area DA and a non-display area NDA disposed outside the display area DA. The display panel 110 may display images through pixels P disposed in the display area DA. Each pixel P may include multiple sub-pixels SP1, SP2, and SP3. Each pixel P may include multiple sub-pixels SP1, SP2, and SP3 formed by three miniature light-emitting diodes that emit red, green, and blue monochromatic light respectively.

[0055] Multiple data lines DL and multiple scan lines SL (or gate lines) can be arranged in the display area DA of the display panel 110. The data lines DL and scan lines SL can be arranged to intersect each other. Multiple sub-pixels SP1, SP2, and SP3 can be arranged in the area where the data lines DL and scan lines SL intersect each other.

[0056] Each of sub-pixels SP1, SP2, and SP3 can be connected to a data line DL and a scan line SL, and can emit light via a drive signal supplied from scan driver 120 and data driver 130. For example, each of sub-pixels SP1, SP2, and SP3 can be a miniature light-emitting diode with a size of 10 μm to 100 μm. The miniature light-emitting diode can be formed by repeatedly growing a thin film of inorganic material on a sapphire substrate or a silicon substrate, and then separating the sapphire substrate or silicon substrate by a shearing process.

[0057] The scan driver 120 can receive a scan control signal GCS from the timing controller 160. The scan driver 120 can supply a scan signal or a light emission control signal to the scan line SL using the scan control signal GCS. For example, the scan driver 120 can be manufactured as a driver chip, mounted on a flexible film, and attached to a non-display area NDA outside one or both sides of the display area DA by a tape auto-bonding (TAB) method.

[0058] Data driver 130 can receive digital video data DATA and data control signal DCS from timing controller 160. Data driver 130 can convert digital video data DATA into analog positive or negative data voltage using data control signal DCS, and supply the analog positive or negative data voltage to data line DL.

[0059] The timing controller 160 receives digital video data DATA and timing signals from the host system. The timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock. The vertical sync signal defines a frame interval. The horizontal sync signal defines a horizontal interval required to supply data voltage to the pixels of a horizontal line on the display panel 110. The data enable signal defines the interval for which valid input data is received. The dot clock is a signal that repeats at predetermined short intervals.

[0060] The timing controller 160 can generate a data control signal DCS for controlling the operating timing of the data driver 130 and a scan control signal GCS for controlling the operating timing of the scan driver 120 based on the timing signals. The timing controller 160 can output the scan control signal GCS to the scan driver 120 and output digital video data DATA and the data control signal DCS to the data driver 130.

[0061] The power circuit 170 can generate and supply multiple drive voltages required for the operation of all circuit configurations of the display device using the input voltage. The power circuit 170 can generate a high-level drive voltage EVDD (or a first drive voltage), a low-level drive voltage EVSS (or a second drive voltage), and an initialization voltage (or a reference voltage), and supply the generated voltages to the display panel 110. The power circuit 170 can also generate and supply various drive voltages required for the operation of the gate driver 120, the data driver 130, and the timing controller 160.

[0062] Figure 2 This is a circuit diagram showing the pixel driving circuit of a light-emitting display device according to an embodiment of the present disclosure.

[0063] Reference Figure 2 Each pixel P may include multiple sub-pixels SP1, SP2, and SP3 constituting a unit pixel, and each of the sub-pixels SP1, SP2, and SP3 may include a light-emitting device ED and a pixel driving circuit 200 for driving the light-emitting device ED. For example, the light-emitting device ED may include a miniature light-emitting diode. The pixel driving circuit 200 can maintain the current applied to the light-emitting device ED at a fixed current value, and can be implemented using a PWM (pulse width modulation) method that represents grayscale by adjusting the emission time.

[0064] The pixel driving circuit 200 according to embodiments of this disclosure may include at least two coupling capacitors and a plurality of P-type transistors. For example, the pixel driving circuit 200 may be configured as a 9T2C structure including nine transistors and two capacitors. As another example, the pixel driving circuit 200 may be configured as an 11T2C structure including eleven transistors and two capacitors, but embodiments of this disclosure are not limited thereto.

[0065] The pixel driving circuit 200 may include a control node circuit unit 210, a PWM circuit unit 220, and a driving circuit unit 230.

[0066] The control node circuit unit 210 may include a control node NC, which has a voltage set based on the data voltage VDATA and the ramp voltage Vs. The control node circuit unit 210 may include a first transistor T1 and a first coupling capacitor C1. The control node NC may be disposed between the first transistor T1 and the first coupling capacitor C1.

[0067] The first transistor T1 can be connected between the input terminal of the data voltage VDATA and the control node NC. The first transistor T1 can be turned on by the scan signal SCAN to supply the data voltage VDATA to the control node NC.

[0068] A first coupling capacitor C1 can be connected between the input terminal of the ramp voltage Vs and the control node NC. The first coupling capacitor C1 can supply the ramp voltage Vs to the control node NC through a coupling effect. For example, the ramp voltage Vs can be an analog voltage signal with a slope, and the first coupling capacitor C1 can transmit changes in the ramp voltage Vs to the control node NC to gradually change or stabilize the voltage of the control node NC. The slope of the ramp voltage Vs can be based on the swing width of the data voltage VDATA. The swing width of the data voltage VDATA can be the range between the maximum and minimum values ​​of the data voltage VDATA, which represents the grayscale of the light-emitting device. Furthermore, the ramp voltage Vs can be maintained at a constant high voltage when the first transistor T1 is turned on, and can decrease at a constant slope when the first transistor T1 is turned off.

[0069] The control node NC can have a voltage level set based on the data voltage VDATA transmitted through the first transistor T1 and the ramp voltage Vs transmitted through the first coupling capacitor C1. The voltage level of the control node NC can be supplied to the PWM circuit unit 220 and can be used to control the emission time of the light-emitting device.

[0070] The PWM circuit unit 220 may include a control transistor Tc, which adjusts the emission time of the light-emitting device ED according to the voltage of the control node NC. The PWM circuit unit 220 may also include one or more transistors connected to the control transistor Tc. The PWM circuit unit 220 may include a second transistor T2 connected between the control node NC and the gate electrode of the control transistor Tc. Additionally, the PWM circuit unit 220 may include a third transistor T3 connected between node A and node B of the drive circuit unit 230, with node A located between the control transistor Tc and the second transistor T2. The control transistor Tc may be connected between node B and the input terminal of the first low-potential drive voltage EVSS1.

[0071] The second transistor T2 can be connected between control node NC and node A. The second transistor T2 can be turned on by a light-emitting signal EM, which is different from the scan signal SCAN, to transmit the voltage of control node NC to node A. For example, the scan signal SCAN and the light-emitting signal EM can be opposite signals. For example, when the scan signal SCAN has a high voltage, the light-emitting signal EM can have a low voltage and turn on the second transistor T2. For example, the second transistor T2 can be configured as a dual transistor.

[0072] The third transistor T3 can be connected between node A and node B of the drive circuit unit 230. For example, node B can be an input node through which the voltage of control node NC is applied to the drive circuit unit 230. The third transistor T3 can be turned on by the scan signal SCAN to electrically connect node A and node B.

[0073] The control transistor Tc may have a gate electrode connected to node A, a source electrode connected to node B, and a drain electrode connected to the input terminal of the first low-potential driving voltage EVSS1. The control transistor Tc can be turned on according to the voltage of the control node NC to supply the first low-potential driving voltage EVSS1 to the drive circuit unit 230. The control transistor Tc can be turned on or off according to the voltage of the control node NC to supply the first low-potential driving voltage EVSS1 to the drive circuit unit 230 or to block the first low-potential driving voltage EVSS1, thereby controlling the driving current supplied to the light-emitting device ED through the drive circuit unit 230. Therefore, the control transistor Tc can adjust the light-emitting time of the light-emitting device ED.

[0074] The driving circuit unit 230 may include a driving transistor Td controlled by the PWM circuit unit 220 to control the current flowing through the light-emitting device ED. For example, the driving transistor Td may be turned on according to the voltage supplied by the control transistor Tc to control the current flowing through the light-emitting device ED. The driving circuit unit 230 may also include one or more transistors and a coupling capacitor connected to the driving transistor Td. The driving circuit unit 230 may include a second coupling capacitor C2 connected between node B and node C, which serves as the gate node of the driving transistor Td. In addition, the driving circuit unit 230 may include a fourth transistor T4 connected between node C and node D, which serves as the drain node of the driving transistor Td. The driving transistor Td may be connected between the input terminal of the high-potential driving voltage EVDD and the light-emitting device ED.

[0075] The second coupling capacitor C2 can be connected between node B and node C. The second coupling capacitor C2 can supply the voltage supplied from the PWM circuit unit 220 to node C through the coupling effect.

[0076] The fourth transistor T4 can be connected between node C and node D. The fourth transistor T4 can be turned on by the scan signal SCAN to electrically connect node C and node D. For example, the fourth transistor T4 can compensate for the threshold voltage of the driving transistor Td by reflecting the threshold voltage of the driving transistor Td to node C.

[0077] The driving circuit unit 230 may further include multiple transistors T5, T6, and T7 for initialization of the driving circuit unit 230 and driving of the light-emitting device ED. The driving circuit unit 230 may include a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7.

[0078] The fifth transistor T5 can be connected between node B and the input terminal of the initialization voltage Vinit. The fifth transistor T5 can be turned on by the scan signal SCAN to supply the initialization voltage Vinit to node B. The fifth transistor T5 can use the initialization voltage Vinit to initialize node B.

[0079] The sixth transistor T6 can be connected between the input terminal of the first low-level drive voltage EVSS1 and node E, which is connected to one end of the light-emitting device ED. The sixth transistor T6 can be turned on by the scan signal SCAN to supply the first low-level drive voltage EVSS1 to node E. The sixth transistor T6 can initialize node E using the first low-level drive voltage EVSS1.

[0080] The seventh transistor T7 can be connected between node D and node E. The seventh transistor T7 can be turned on by the light-emitting signal EM to electrically connect node D and node E.

[0081] The light-emitting device ED can be connected between node E and the input terminal of the second low-level driving voltage EVSS2. The second low-level driving voltage EVSS2 can be the same as or different from the first low-level driving voltage EVSS1. For example, the first low-level driving voltage EVSS1 can be lower than the second low-level driving voltage EVSS2, but the embodiments of this disclosure are not limited thereto.

[0082] Figure 3 The driving timing of a pixel driving circuit according to an embodiment of the present disclosure is shown. Figure 4 A pixel driving circuit according to an embodiment of the present disclosure is shown. Figure 3 The operation status during the first time period is shown in the figure. Figure 5 A pixel driving circuit according to an embodiment of the present disclosure is shown. Figure 3 The operating status during the second time period is shown in the figure.

[0083] Reference Figures 3 to 5 The pixel driving circuit 200 according to the embodiments of the present disclosure can be driven according to a first time period P1 and a second time period P2.

[0084] The pixel driving circuit 200 can receive driving voltages (e.g., high-potential driving voltage EVDD, first low-potential driving voltage EVSS1, second low-potential driving voltage EVSS2, data voltage VDATA, initialization voltage Vinit, and ramp voltage Vs) and control signals (e.g., scan signal SCAN and light emission signal EM).

[0085] The scan signal SCAN can be a signal used to control the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6. The light emission signal EM can be a signal used to control the second transistor T2 and the seventh transistor T7. The scan signal SCAN and the light emission signal EM can be supplied from the scan driver 120. For example, the scan signal SCAN and the light emission signal EM can have a gate on-voltage or a gate off-voltage that is maintained for a predetermined period of time. For example, the gate on-voltage can be a low voltage that turns the transistor on, and the gate off-voltage can be a high voltage that turns the transistor off. The scan signal SCAN and the light emission signal EM can have different timing sequences. For example, the scan signal SCAN and the light emission signal EM can be opposite signals.

[0086] The data voltage VDATA can be a voltage supplied to the gate electrode of the driving transistor Td to cause the light-emitting device ED to emit light with a predetermined brightness, and can have a voltage value used to represent the change in grayscale of the light-emitting device ED. The data voltage VDATA can vary within a range between a minimum and a maximum value used to represent the grayscale of the light-emitting device ED.

[0087] The ramp voltage Vs can be an analog voltage signal with a slope, and the slope of the ramp voltage Vs can be based on the swing width of the data voltage VDATA. When the scan signal SCAN is at the gate on voltage, the ramp voltage Vs can be maintained at a constant high voltage, and when the scan signal SCAN is at the gate off voltage, the ramp voltage Vs can decrease at a constant slope.

[0088] The first time period P1 can be an initialization period for initializing the pixel driving circuit 200. During the first time period P1, the scan signal SCAN can have a gate on voltage, and the light emission signal EM can have a gate off voltage. For example, the scan signal SCAN can have a low voltage level during the first time period P1, and the light emission signal EM can have a high voltage level during the first time period P1. Additionally, the ramp voltage Vs can be maintained at a constant high voltage during the first time period P1.

[0089] The second time period P2 can be the emission period for causing the light-emitting device ED to emit light. During the second time period P2, the scan signal SCAN can have a gate turn-off voltage, and the emission signal EM can have a gate turn-on voltage. For example, the scan signal SCAN can have a high voltage level during the second time period P2, and the emission signal EM can have a low voltage level during the second time period P2. Additionally, the ramp voltage Vs can be a voltage that decreases at a constant slope during the second time period P2.

[0090] Reference Figure 3 and Figure 4 During the first time period P1, the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned on by the scan signal SCAN with an applied gate turn-on voltage, and the second transistor T2 and the seventh transistor T7 can be turned off by the light emission signal EM with an applied gate turn-off voltage. Additionally, during the first time period P1, the data voltage VDATA and the ramp voltage Vs can be applied as voltages with the same voltage level.

[0091] During the first time period P1, the control node NC of the control node circuit unit 210 can be initialized by the data voltage VDATA and the ramp voltage Vs. For example, the first coupling capacitor C1 can be initialized by the data voltage VDATA and the ramp voltage Vs supplied at the same voltage level.

[0092] During the first time period P1, node A of the PWM circuit unit 220 can be initialized by the initialization voltage Vinit. For example, when the second transistor T2 and the control transistor Tc are turned off, node A can be electrically floated and can be initialized by the initialization voltage Vinit supplied by the third transistor T3 and the fifth transistor T5 when they are in the on state.

[0093] During the first time period P1, node B of the drive circuit unit 230 can be initialized by the initialization voltage Vinit supplied by the fifth transistor T5 which is in conduction, and node C of the drive circuit unit 230 can store the threshold voltage of the drive transistor Td reflected in node C when the fourth transistor T4 is turned on. Additionally, node E can be initialized by the first low-potential drive voltage EVSS1 supplied by the sixth transistor T6.

[0094] Reference Figure 3 and Figure 5In the second time period P2, the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned off by a scan signal SCAN applied simultaneously with the switch from gate on voltage to gate off voltage, and the second transistor T2 and the seventh transistor T7 can be turned on by a light emission signal EM applied simultaneously with the switch from gate off voltage to gate on voltage. Additionally, in the second time period P2, the ramp voltage Vs can be applied as a voltage decreasing at a constant slope, and the first coupling capacitor C1 can transmit the change in the ramp voltage Vs to the control node NC, allowing the data voltage VDATA at the control node NC to gradually change.

[0095] During the second time period P2, the control node NC of the control node circuit unit 210 can have a voltage level in which the data voltage VDATA gradually changes according to the slope of the ramp voltage Vs.

[0096] During the second time period P2, the second transistor T2 of the PWM circuit unit 220 can be turned on to transfer the voltage of the control node NC to the gate electrode of the control transistor Tc, and the control transistor Tc can be turned on or off according to the voltage of the control node NC to control the emission time of the light-emitting device ED. For example, the control transistor Tc can be turned on or off according to the voltage of the control node NC to supply the first low-potential drive voltage EVSS1 to node B or block the first low-potential drive voltage EVSS1 to node B.

[0097] During the second time period P2, the second coupling capacitor C2 of the driving circuit unit 230 can supply the first low-potential driving voltage EVSS1 transmitted through the control transistor Tc to node C through the coupling effect. The driving transistor Td can be turned on by the voltage of node C, which reflects the threshold voltage of the driving transistor Td, to control the driving current flowing through the light-emitting device ED. The seventh transistor T7 can be turned on during the second time period P2 to transfer the driving current generated through the driving transistor Td to the light-emitting device ED. The light-emitting device ED can emit light through the supplied driving current.

[0098] Figure 6 The pixel structure of a light-emitting display device according to another embodiment of the present disclosure is shown.

[0099] Reference Figure 6According to another embodiment of this disclosure, the light-emitting display device can be a stretchable display device capable of displaying images even when bent or stretched. For example, the light-emitting display device can not only be flexible but also stretchable, allowing the user to bend or stretch it, and the shape of the light-emitting display device can be freely changed according to the user's manipulation. For example, when the user holds and pulls the end of the light-emitting display device, the device can be stretched or stretched in the direction of the pull. Alternatively, when the user places the light-emitting display device on a non-flat outer surface, the device can be configured to bend according to the shape of the outer surface. Furthermore, when the external force applied by the user is removed, the light-emitting display device can return to its original shape.

[0100] Reference Figure 6 According to another embodiment of the present disclosure, the light-emitting display device may include a rigid region RA in which a pixel P including a plurality of sub-pixels SP1, SP2 and SP3 is disposed, a soft region SA in which a connecting line CL connecting the pixel P is disposed, and a transmissive region TA disposed between the rigid region RA and the soft region SA.

[0101] The rigid region RA may have a plurality of sub-pixels SP1, SP2, and SP3 disposed therein, and each of the sub-pixels SP1, SP2, and SP3 may include a light-emitting device ED as a display device and a pixel driving circuit 200 for driving the light-emitting device ED. For example, the plurality of sub-pixels SP1, SP2, and SP3 may be configured with three miniature light-emitting diodes that emit red, green, and blue monochromatic light respectively, but embodiments of the present disclosure are not limited thereto. The rigid region RA may include a plurality of rigid regions RA spaced apart from each other in a first direction (or X-axis direction) and a second direction (or Y-axis direction).

[0102] A soft region SA can be disposed between adjacent rigid regions RA. The soft region SA may include a first soft region SA1 and a second soft region SA2. A first connecting line CL1 is disposed in the first soft region SA1, connecting pixels P adjacent to each other in a first direction within the rigid region RA. A second connecting line CL2 is disposed in the second soft region SA2, connecting pixels P adjacent to each other in a second direction within the rigid region RA. The soft region SA can be a portion that can be stretched or bent by external force, and can be formed of a material with greater flexibility than the rigid region RA.

[0103] The transmissive region TA can be a region other than the rigid region RA and the soft region SA. The transmissive region TA can be positioned relative to the rigid region RA between a first soft region SA1 positioned in a first direction and a second soft region SA2 positioned in a second direction. For example, the transmissive region TA can be surrounded by adjacent rigid regions RA and soft regions SA. The transmissive region TA can allow external light to pass through it. For example, the transmissive region TA can allow external light incident from the front of the light-emitting display device to pass through to the back of the light-emitting display device, or it can allow external light incident from the back of the light-emitting display device to pass through to the front of the light-emitting display device. The transmissive region TA can be a portion that can be stretched or bent by external force, and can be formed of a material with greater flexibility than the rigid region RA.

[0104] In another embodiment of the present disclosure, when a light-emitting display device is stretched or bent by an external force, the distance between pixels P disposed in the rigid region RA may increase, and the amount of external light passing through the transmission region TA may change as the area of ​​the transmission region TA increases. Therefore, the overall brightness uniformity and visibility of the light-emitting display device may deteriorate. Therefore, the light-emitting display device according to another embodiment of the present disclosure may further include a brightness control unit capable of controlling the brightness of each sub-pixel in real time in response to changes in external light.

[0105] Figure 7 This is a circuit diagram illustrating a pixel driving circuit of a light-emitting display device according to another embodiment of the present disclosure. Figure 8 The driving timing of a pixel driving circuit according to another embodiment of the present disclosure is shown. Figure 9 A pixel driving circuit according to another embodiment of the present disclosure is shown in Figure 8 The operation status during the first time period is shown in the figure. Figure 10 A pixel driving circuit according to another embodiment of the present disclosure is shown in Figure 8 The operating status during the second time period is shown in the figure. Figures 7 to 10 Another embodiment is shown, in which a brightness control unit is added to a reference. Figures 1 to 5 The pixel driving circuit of the described light-emitting display device. (Refer to...) Figures 7 to 10 In the following description, except for the added brightness control unit, the same reference numerals are used for the same parts, and repeated descriptions are omitted or briefly described.

[0106] Reference Figure 7 According to another embodiment of this disclosure, the pixel driving circuit 200 may further include a brightness control unit PD. The brightness control unit PD may be configured to control the brightness of each sub-pixel in real time in response to changes in external light.

[0107] The brightness control unit PD can be a photosensitive device that changes the voltage of the control node NC according to the intensity of external light. For example, the photosensitive device can be a phototransistor or photodiode, which can sense the intensity of external light and adjust the amount of voltage or current according to the sensed intensity of external light.

[0108] A brightness control unit PD can be disposed in the PWM circuit unit 220. The brightness control unit PD can be connected between the common node of the two transistors constituting the second transistor T2 and the input terminal of the first low-potential drive voltage EVSS1. The brightness control unit PD can provide a leakage path between the common node of the second transistor T2 and the input terminal of the first low-potential drive voltage EVSS1. For example, the brightness control unit PD can shunt the voltage or current applied from the control node NC of the control node circuit unit 210 to the input terminal of the first low-potential drive voltage EVSS1. The brightness control unit PD can control the magnitude of the shunt voltage or current according to the intensity of the external light. For example, the photosensitive device of the brightness control unit PD can sense external light applied to at least one of the front and back surfaces of the light-emitting display device.

[0109] The brightness control unit PD may have a gate electrode connected to the input terminal of the gate bias voltage G_Bias, a source electrode connected to the common node of the second transistor T2, and a drain electrode connected to the input terminal of the first low-level drive voltage EVSS1. When the intensity of external light is greater than or equal to a predetermined level, the brightness control unit PD may be turned on to electrically connect the common node of the second transistor T2 and the input terminal of the first low-level drive voltage EVSS1. In addition, the brightness control unit PD may control the amount of voltage or current shunt from the common node of the second transistor T2 to the input terminal of the first low-level drive voltage EVSS1 according to the intensity of external light.

[0110] Reference Figure 8 and Figure 9 During the first time period P1, the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned on by the scan signal SCAN, which is applied as the gate turn-on voltage, and the second transistor T2 and the seventh transistor T7 can be turned off by the light emission signal EM, which is applied as the gate turn-off voltage. Additionally, during the first time period P1, the data voltage VDATA and the ramp voltage Vs can be applied as voltages with the same voltage level.

[0111] During the first time period P1, the brightness control unit PD of the PWM circuit unit 220 can be turned off because the gate bias voltage G_Bias can be applied as the gate turn-off voltage. Additionally, the brightness control unit PD can be electrically floated when the second transistor T2 and the control transistor Tc are turned off.

[0112] Reference Figure 8 and Figure 10 In the second time period P2, the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned off by a scan signal SCAN applied simultaneously with the switch from gate on voltage to gate off voltage, and the second transistor T2 and the seventh transistor T7 can be turned on by a light emission signal EM applied simultaneously with the switch from gate off voltage to gate on voltage. Additionally, in the second time period P2, the ramp voltage Vs can be applied as a voltage decreasing at a constant slope, and the first coupling capacitor C1 can transmit the change in the ramp voltage Vs to the control node NC, allowing the data voltage VDATA at the control node NC to gradually change.

[0113] During the second time period P2, the control node NC of the control node circuit unit 210 can have a voltage level in which the data voltage VDATA gradually changes according to the slope of the ramp voltage Vs.

[0114] During the second time period P2, the second transistor T2 of the PWM circuit unit 220 can be turned on to transfer the voltage of the control node NC to the gate electrode of the control transistor Tc, and the control transistor Tc can be turned on or off according to the voltage of the control node NC to control the emission time of the light-emitting device ED. For example, the control transistor Tc can be turned on or off according to the voltage of the control node NC to supply the first low-potential drive voltage EVSS1 to node B or block the first low-potential drive voltage EVSS1 to node B.

[0115] During the second time period P2, the brightness control unit PD can sense the intensity of external light because the gate bias voltage G_Bias can be applied as the gate turn-on voltage. The brightness control unit PD can sense the intensity of external light and electrically connect the common node of the second transistor T2 and the input terminal of the first low-potential drive voltage EVSS1 based on the sensed intensity. For example, when the intensity of external light is greater than or equal to a predetermined level, the brightness control unit PD can electrically connect the common node of the second transistor T2 and the input terminal of the first low-potential drive voltage EVSS1. The brightness control unit PD can control the amount of voltage or current shunt from the common node of the second transistor T2 to the input terminal of the first low-potential drive voltage EVSS1 based on the intensity of external light.

[0116] Reference Figure 8The brightness control unit PD can control the voltage or current of the common node of the second transistor T2 based on the intensity of the external light. For example, the external light can be classified into a first external light L1, a second external light L2, a third external light L3, and a fourth external light L4 based on the light intensity. The first external light L1 can have a greater light intensity than the second external light L2, the second external light L2 can have a greater light intensity than the third external light L3, and the third external light L3 can have a greater light intensity than the fourth external light L4. The fourth external light L4 can correspond to a dark state. When the first external light L1 is sensed, the brightness control unit PD can quickly reduce the voltage L1_V of the common node of the second transistor T2 to a level equal to or lower than the threshold voltage TC_Vth of the control transistor TC, thereby advancing the timing of the control transistor TC's turn-on. When the second external light L2 is sensed, the brightness control unit PD can adjust the common voltage L2_V of the second transistor T2, such that the timing of the control transistor Tc's turn-on is delayed compared to when the first external light L1 is sensed. When a third external light L3 is sensed, the brightness control unit PD can adjust the common voltage L3_V of the second transistor T2, such that the timing of the control transistor Tc turning on is delayed compared to when the first external light L1 or the second external light L2 is sensed. When a fourth external light L4 is sensed, the brightness control unit PD can block the leakage path between the common node of the second transistor T2 and the input terminal of the first low-potential drive voltage EVSS1, and the timing of the control transistor Tc turning on can be delayed compared to when the first external light to the third external light L1, L2, or L3 is sensed. Therefore, a light-emitting display device according to another embodiment of the present disclosure can control the brightness of each sub-pixel in real time in response to changes in external light via the brightness control unit PD.

[0117] Figure 11 A plurality of sub-pixels in a light-emitting display device according to another embodiment of the present disclosure are shown. Figure 12 This is another embodiment of the present disclosure. Figure 11 The cross-sectional view taken from line I-I'.

[0118] Reference Figure 11 and Figure 12 According to another embodiment of the present disclosure, the light-emitting display device may be a micro light-emitting diode display device, and each pixel P may include a plurality of sub-pixels SP1, SP2 and SP3, wherein the plurality of sub-pixels SP1, SP2 and SP3 are configured with three micro light-emitting diodes that respectively emit red, green and blue monochromatic light.

[0119] Each of the sub-pixels SP1, SP2, and SP3 may include a circuit region CA1, CA2, or CA3, wherein a pixel driving circuit 200 for driving a light-emitting device ED, which is a miniature light-emitting diode, is disposed. The circuit regions CA1, CA2, and CA3 may overlap with the light-emitting device ED.

[0120] According to another embodiment of this disclosure, a light-emitting display device may include a brightness control unit PD in circuit regions CA1, CA2, and CA3 in which a pixel driving circuit 200 is disposed. For example, the brightness control unit PD may be disposed in the central portion of circuit regions CA1, CA2, and CA3. Alternatively, the brightness control unit PD may be disposed in a portion of circuit regions CA1, CA2, and CA3 that does not overlap with the light-emitting device ED. For example, the light-emitting display device may be a retractable display device, and each of the sub-pixels SP1, SP2, and SP3 may be disposed in a rigid region RA.

[0121] The brightness control unit PD can be a photosensitive device that can sense the intensity of external light for each of the sub-pixels SP1, SP2 and SP3 in response to changes in external light and adjust the amount of voltage or current according to the sensed intensity of external light.

[0122] The photosensitive device of the brightness control unit PD can sense external light applied to at least one of the front and back surfaces of the light-emitting display device. For example, the photosensitive device of the brightness control unit PD may include an active layer ACT, which may be exposed in at least one direction of the front and back surfaces of the light-emitting device ED, such that photosensitive channels P_CH1 and P_CH2 capable of sensing external light can be formed.

[0123] The photosensitive device of the brightness control unit PD may include at least one first gate electrode GE1 disposed below the active layer ACT, at least one second gate electrode GE2 disposed above the active layer ACT and not overlapping with at least one first gate electrode GE1, at least one source electrode SE electrically connected to the active layer ACT, and at least one drain electrode DE electrically connected to the active layer ACT.

[0124] Reference Figure 11At least one first gate electrode GE1 may extend in a first direction (or the X-axis direction) and may be configured to intersect with a plurality of sub-pixels SP1, SP2, and SP3. At least one second gate electrode GE2 may extend parallel to at least one first gate electrode GE1 in the first direction and may be configured to intersect with the plurality of sub-pixels SP1, SP2, and SP3. The active layer ACT may extend in a second direction (or the Y-axis direction) intersecting the first direction and may be configured to overlap with at least one first gate electrode GE1 and at least one second gate electrode GE2. At least one source electrode SE may be connected to one side of the active layer ACT, and at least one drain electrode DE may be connected to the other side of the active layer ACT.

[0125] At least one of the first gate electrode GE1 and at least one second gate electrode GE2 may include multiple portions overlapping the active layer ACT. For example, at least one first gate electrode GE1 or at least one second gate electrode GE2 may include a portion extending in a first direction and a portion that branches off from a portion extending in the first direction in a second direction and bends and extends again in the first direction.

[0126] Reference Figure 12 A light-emitting display device according to another embodiment of the present disclosure may include a substrate 111, a buffer layer BUF, at least one first gate electrode GE1, a first gate insulating layer GI1, an active layer ACT, a second gate insulating layer GI2, at least one second gate electrode GE2, a first planarization layer PLN1, at least one source electrode SE, at least one drain electrode DE, and a second planarization layer PLN2. For example, a brightness control unit PD may be formed with at least one first gate electrode GE1, an active layer ACT, at least one second gate electrode GE2, at least one source electrode SE, and at least one drain electrode DE.

[0127] The substrate 111 can be a substrate for supporting and protecting various components of a light-emitting display device, and can be formed of a transparent insulating material. The substrate 111 can be formed of an insulating material that can be bent or stretched as a flexible substrate. For example, the substrate 111 may include an elastomer, such as silicone rubber including polydimethylsiloxane PDMS, polyurethane PU, or polytetrafluoroethylene PTFE, but the embodiments of this disclosure are not limited thereto.

[0128] A buffer layer BUF can be provided on the substrate 111. The buffer layer BUF can prevent the diffusion of impurity ions or the penetration of moisture from the outside, and can be formed as a single layer or multiple layers including inorganic insulating materials, but the embodiments of the present disclosure are not limited thereto.

[0129] At least one first gate electrode GE1 can be disposed on the buffer layer BUF, and a first gate insulating layer GI1 can be disposed on the buffer layer BUF to cover at least one first gate electrode GE1. At least one first gate electrode GE1 can be disposed below the active layer ACT.

[0130] An active layer ACT may be disposed on a first gate insulating layer GI1. The active layer ACT may comprise a semiconductor material based on at least one oxide semiconductor selected from IGZO indium gallium zinc oxide, IZO indium zinc oxide, IGTO indium gallium tin oxide, and IGO indium gallium oxide, but embodiments of this disclosure are not limited thereto. Furthermore, the first gate insulating layer GI1 may insulate at least one first gate electrode GE1 from the active layer ACT, and may be formed as a single layer or multiple layers comprising inorganic insulating material, but embodiments of this disclosure are not limited thereto.

[0131] A second gate insulating layer GI2 can be disposed on the active layer ACT. The second gate insulating layer GI2 can be disposed on the first gate insulating layer GI1 to cover the active layer ACT.

[0132] At least one second gate electrode GE2 may be disposed on the second gate insulating layer GI2. The second gate insulating layer GI2 can insulate the active layer ACT from the at least one second gate electrode GE2, and can be formed as a single layer or multiple layers including inorganic insulating material, but the embodiments of the present disclosure are not limited thereto. The at least one second gate electrode GE2 may be disposed above the active layer ACT without overlapping with at least one first gate electrode GE1.

[0133] A first planarization layer PLN1 may be disposed on at least one second gate electrode GE2. The first planarization layer PLN1 may be disposed on a second gate insulating layer GI2 to cover at least one second gate electrode GE2. At least one source electrode SE and at least one drain electrode DE may be electrically connected to the active layer ACT through contact holes penetrating the first planarization layer PLN1 and the second gate insulating layer GI2. A second planarization layer PLN2 may be disposed on at least one source electrode SE and at least one drain electrode DE. The second planarization layer PLN2 may be disposed on the first planarization layer PLN1 to cover at least one source electrode SE and at least one drain electrode DE. The first planarization layer PLN1 and the second planarization layer PLN2 may be formed of the same or different organic insulating materials, and may include organic materials such as epoxy resin, phenolic resin, polyamide resin or polyimide resin, but embodiments of the present disclosure are not limited thereto.

[0134] In another embodiment of this disclosure, at least one first gate electrode GE1 and at least one second gate electrode GE2 may be configured not to overlap with each other in the portion overlapping with the active layer ACT, and the active layer ACT may be exposed in two directions of the light-emitting display device, thereby forming photosensitive channels P_CH1 and P_CH2 capable of sensing external light.

[0135] The active layer ACT may not overlap with at least one second gate electrode GE2 in the upward direction of the substrate 111, and may be exposed from at least one second gate electrode GE2. A first photosensitive channel P_CH1 may be formed in the portion of the substrate 111 that overlaps with at least one first gate electrode GE1 in the downward direction. For example, positive external light FL incident from the front side of the substrate 111 can pass through the first planarization layer PLN1, the second planarization layer PLN2, and the second gate insulating layer GI2, and can be incident on the first photosensitive channel P_CH1 of the active layer ACT. A first electron-hole pair EHP1 can be generated in the first photosensitive channel P_CH1 where the positive external light FL is incident. The first electron-hole pair EHP1 can increase or decrease depending on the intensity of the positive external light FL.

[0136] In the first photosensitive channel P_CH1, a first electron-hole pair EHP1 can be generated by the incident positive external light FL and can interact with the electric field generated by the gate bias voltage applied to the first gate electrode GE1, causing electrons and holes to separate and move between the source electrode SE and the drain electrode DE, thereby controlling the current flow in the first photosensitive channel P_CH1. Therefore, according to another embodiment of the present disclosure, the brightness control unit PD can control the brightness corresponding to the positive external light FL in real time by adjusting the magnitude of the voltage or current through the brightness control unit PD according to the change in the intensity of the positive external light FL.

[0137] The active layer ACT may not overlap with at least one first gate electrode GE1 in the lower direction of the substrate 111, and may be exposed from at least one first gate electrode GE1. A second photosensitive channel P_CH2 may be formed in the portion of the substrate 111 that overlaps with at least one second gate electrode GE2 in the upper direction of the substrate 111. For example, backlight RL incident from the back side of the substrate 111 may pass through the substrate 111, the buffer layer BUF, and the first gate insulating layer GI1, and may be incident on the second photosensitive channel P_CH2 of the active layer ACT. A second electron-hole pair EHP2 may be generated in the second photosensitive channel P_CH2 where the backlight RL is incident. The second electron-hole pair EHP2 may increase or decrease depending on the intensity of the backlight RL.

[0138] In the second photosensitive channel P_CH2, a second electron-hole pair EHP2 can be generated by the incident external backlight RL and can interact with the electric field generated by the gate bias voltage applied to the second gate electrode GE2, causing electrons and holes to separate and move between the source electrode SE and the drain electrode DE, thereby controlling the current flow in the second photosensitive channel P_CH2. Therefore, according to another embodiment of this disclosure, the brightness control unit PD can control the brightness corresponding to the external backlight RL in real time by adjusting the magnitude of the voltage or current passing through the brightness control unit PD according to the change in the intensity of the external backlight RL.

[0139] According to another embodiment of this disclosure, at least one first gate electrode GE1 and at least one second gate electrode GE2 may have the same width or different widths. For example, in a brightness control unit PD, the photosensitivity of the positive external light FL and the back external light RL can be selectively adjusted based on the ratio between the width L1 of the first gate electrode GE1 and the width L2 of the second gate electrode GE2.

[0140] The following describes a light-emitting display device according to one or more embodiments of the present disclosure.

[0141] A light-emitting display device according to one or more embodiments of the present disclosure may include: a light-emitting device; and a pixel driving circuit connected to and configured to drive the light-emitting device. The pixel driving circuit may include: a control node circuit unit including a control node having a voltage set based on a data voltage and a ramp voltage; a PWM circuit unit including a control transistor configured to adjust the emission time of the light-emitting device according to the voltage of the control node; and a driving circuit unit including a driving transistor configured to be turned on by the control transistor and control the current flowing through the light-emitting device.

[0142] According to one or more embodiments of this disclosure, the light-emitting device may include a miniature light-emitting diode.

[0143] According to one or more embodiments of this disclosure, the ramp voltage can be an analog voltage signal with a slope.

[0144] According to one or more embodiments of this disclosure, the slope of the ramp voltage can be based on the swing width of the data voltage, which is the range between the maximum and minimum values ​​of the grayscale expression of the light-emitting device.

[0145] According to one or more embodiments of this disclosure, the pixel driving circuit may include at least two coupling capacitors and a plurality of P-type transistors.

[0146] According to one or more embodiments of this disclosure, the pixel driving circuit may further include a photosensitive device configured to change the voltage of the control node according to the intensity of external light.

[0147] According to one or more embodiments of this disclosure, the control node circuit unit may further include: a first transistor connected between the input terminal of the data voltage and the control node; and a first coupling capacitor connected between the input terminal of the ramp voltage and the control node.

[0148] According to one or more embodiments of this disclosure, the PWM circuit unit may further include: a second transistor connected between the control node and the gate electrode of the control transistor; and a third transistor connected between node A between the control transistor and the second transistor and node B of the drive circuit unit, and the control transistor may be connected between node B and the input terminal of the first low-potential drive voltage.

[0149] According to one or more embodiments of this disclosure, the second transistor may be configured as a dual transistor.

[0150] According to one or more embodiments of this disclosure, the driving circuit unit may further include: a second coupling capacitor connected between node B and node C, which serves as the gate node of the driving transistor; and a fourth transistor connected between node C and node D, which serves as the drain node of the driving transistor; and the driving transistor may be connected between the input terminal of the high-potential driving voltage and the light-emitting device.

[0151] According to one or more embodiments of this disclosure, the driving circuit unit may further include: a fifth transistor connected between node B and the input terminal of the initialization voltage; a sixth transistor connected between the input terminal of the first low-potential driving voltage and node E connected to one end of the light-emitting device; and a seventh transistor connected between node D and node E.

[0152] According to one or more embodiments of this disclosure, the other end of the light-emitting device may be connected to an input terminal of a second low-potential driving voltage, which may be the same as or different from the first low-potential driving voltage.

[0153] According to one or more embodiments of this disclosure, the first low-potential drive voltage may be lower than the second low-potential drive voltage.

[0154] According to one or more embodiments of this disclosure, the first transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor may be controlled by the same scan signal, and the second transistor and the seventh transistor may be controlled by a light emission signal different from the scan signal.

[0155] According to one or more embodiments of the present disclosure, the light-emitting display device may further include a brightness control unit connected between the common node of the two transistors constituting the second transistor and the input terminal of the first low-potential drive voltage.

[0156] According to one or more embodiments of this disclosure, the brightness control unit may provide a leakage path between a common node and an input terminal of a first low-potential drive voltage.

[0157] According to one or more embodiments of this disclosure, the brightness control unit may include a photosensitive device configured to control the amount of leakage path based on the intensity of external light.

[0158] According to one or more embodiments of the present disclosure, a photosensitive device may include an active layer in which a photosensitive channel is formed that is exposed in at least one of the front and back sides of the light-emitting device.

[0159] According to one or more embodiments of the present disclosure, the photosensitive device may further include: at least one first gate electrode disposed below the active layer; at least one second gate electrode disposed above the active layer and not overlapping with the at least one first gate electrode; at least one source electrode electrically connected to the active layer; and at least one drain electrode electrically connected to the active layer.

[0160] According to one or more embodiments of this disclosure, at least one first gate electrode and at least one second gate electrode may have the same width or different widths, and the photosensitive device may be configured such that the photosensitivity of the front and back sides of the light-emitting device can be selectively adjusted according to the ratio of the width of at least one first gate electrode to the width of at least one second gate electrode.

[0161] According to one or more embodiments of this disclosure, the pixel driving circuit can be configured to operate during an initialization period and an emission period; during the initialization period, a first transistor is turned on, and a data voltage and a ramp voltage are applied at the same voltage level to initialize a first coupling capacitor; and during the emission period, the first transistor is turned off, and the ramp voltage decreases at a constant slope, such that the first coupling capacitor transmits the change in ramp voltage to the control node so that the voltage of the control node gradually changes.

[0162] The features, structures, and effects described above in this disclosure are included in at least one embodiment of this disclosure, but are not limited to one embodiment. Furthermore, those skilled in the art can implement the features, structures, and effects described in at least one embodiment of this disclosure through combinations or modifications of other embodiments. Therefore, any content associated with combinations and modifications should be interpreted as being within the scope of this disclosure.

[0163] It will be apparent to those skilled in the art that various modifications and variations can be made to this disclosure without departing from its spirit or scope. Therefore, this disclosure is intended to cover any modifications and variations thereof that fall within the scope of the appended claims and their equivalents.

[0164] The various implementation methods described above can be combined to provide other implementation methods.

[0165] Based on the detailed description above, these and other changes can be made to the embodiments. Generally, the terminology used in the following claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full scope of equivalents conferred by those claims. Therefore, the claims are not limited by this disclosure.

Claims

1. A light-emitting display device, comprising: Light-emitting devices; as well as A pixel driving circuit, connected to and configured to drive the light-emitting device. The pixel driving circuit includes: A control node circuit unit, the control node circuit unit including a control node having a voltage set based on data voltage and ramp voltage; A PWM circuit unit, the PWM circuit unit including a control transistor configured to adjust the emission time of the light-emitting device according to the voltage of the control node; and A driving circuit unit, the driving circuit unit including a driving transistor configured to be turned on by the control transistor and to control the current flowing through the light-emitting device.

2. The light-emitting display device according to claim 1, wherein, The light-emitting device includes a miniature light-emitting diode.

3. The light-emitting display device according to claim 1, wherein, The ramp voltage is an analog voltage signal with a slope.

4. The light-emitting display device according to claim 3, wherein, The slope of the ramp voltage is based on the swing width of the data voltage, which is the range between the maximum and minimum values ​​of the grayscale expression of the light-emitting device.

5. The light-emitting display device according to claim 1, wherein, The pixel driving circuit includes at least two coupling capacitors and multiple P-type transistors.

6. The light-emitting display device according to claim 1, wherein, The pixel driving circuit also includes a photosensitive device configured to change the voltage of the control node according to the intensity of external light.

7. The light-emitting display device according to claim 1, wherein, The control node circuit unit also includes: A first transistor, the first transistor being connected between the input terminal of the data voltage and the control node; and A first coupling capacitor is connected between the input terminal of the ramp voltage and the control node.

8. The light-emitting display device according to claim 7, wherein, The PWM circuit unit further includes: A second transistor, the second transistor being connected between the control node and the gate electrode of the control transistor; and A third transistor is connected between node A, which is between the control transistor and the second transistor, and node B, of the drive circuit unit. The control transistor is connected between the B node and the input terminal of the first low-potential drive voltage.

9. The light-emitting display device according to claim 8, wherein, The second transistor is configured as a dual transistor.

10. The light-emitting display device according to claim 8, wherein, The driving circuit unit further includes: A second coupling capacitor is connected between node B and node C, which serves as the gate node of the driving transistor; and A fourth transistor is connected between the C node and the D node, which serves as the drain node of the driving transistor; and The driving transistor is connected between the input terminal of the high-potential driving voltage and the light-emitting device.

11. The light-emitting display device according to claim 10, wherein, The driving circuit unit further includes: The fifth transistor is connected between the B node and the input terminal of the initialization voltage; A sixth transistor, the sixth transistor being connected between the input terminal of the first low-potential drive voltage and the E node connected to one end of the light-emitting device; and A seventh transistor is connected between the D node and the E node.

12. The light-emitting display device according to claim 11, wherein, The other end of the light-emitting device is connected to the input terminal of a second low-potential driving voltage, which may be the same as or different from the first low-potential driving voltage.

13. The light-emitting display device according to claim 12, wherein, The first low-potential driving voltage is lower than the second low-potential driving voltage.

14. The light-emitting display device according to claim 11, wherein, The first transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are controlled by the same scan signal, and The second transistor and the seventh transistor are controlled by a light-emitting signal that is different from the scanning signal.

15. The light-emitting display device according to claim 9, further comprising: A brightness control unit is connected between the common node of the dual transistors constituting the second transistor and the input terminal of the first low-potential drive voltage.

16. The light-emitting display device according to claim 15, wherein, The brightness control unit provides a leakage path between the common node and the input terminal of the first low-potential drive voltage.

17. The light-emitting display device according to claim 16, wherein, The brightness control unit includes a photosensitive device configured to control the amount of the leakage path based on the intensity of external light.

18. The light-emitting display device according to claim 17, wherein, The photosensitive device includes an active layer in which a photosensitive channel is formed, exposed in at least one of the front and back sides of the light-emitting device.

19. The light-emitting display device according to claim 18, wherein, The photosensitive device further includes: At least one first gate electrode is disposed below the active layer; At least one second gate electrode disposed above the active layer and not overlapping with the at least one first gate electrode; At least one source electrode electrically connected to the active layer; and At least one drain electrode is electrically connected to the active layer.

20. The light-emitting display device according to claim 19, wherein, The at least one first gate electrode and the at least one second gate electrode have the same width or different widths, and The photosensitive device is configured such that the photosensitivity of the front and back sides of the light-emitting device can be selectively adjusted according to the ratio of the width of the at least one first gate electrode to the width of the at least one second gate electrode.

21. The light-emitting display device according to claim 7, wherein, The pixel driving circuit is configured to operate during the initialization period and the emission period. During the initialization period, the first transistor is turned on, and the data voltage and the ramp voltage are applied at the same voltage level to initialize the first coupling capacitor. During the light-emitting period, the first transistor is turned off, and the ramp voltage decreases at a constant slope, causing the first coupling capacitor to transmit the change in the ramp voltage to the control node, thereby gradually changing the voltage of the control node.

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