Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel comprises a pixel circuit and a light-emitting element, and the pixel circuit and the light-emitting element are electrically connected. A display area of the display panel comprises a first area and a second area. The duty cycle of a light-emitting control signal accessed by the pixel circuit in the first area is a first duty cycle, the duty cycle of the light-emitting control signal accessed by the pixel circuit in the second area is a second duty cycle, the first duty cycle is greater than the second duty cycle, and the greater the duty cycle is, the longer the light-emitting time of the light-emitting element is. The display panel and the display device provided by the application can improve the display performance of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display devices.

[0003] However, the display performance of current OLED display products needs to be improved. Summary of the Invention

[0004] This application provides a display panel and a display device that can improve the display performance of the display panel.

[0005] In a first aspect, embodiments of this application provide a display panel, including: a pixel circuit and a light-emitting element, the pixel circuit and the light-emitting element being electrically connected; the display area of ​​the display panel includes a first area and a second area, the duty cycle of the light-emitting control signal connected to the pixel circuit in the first area is a first duty cycle, the duty cycle of the light-emitting control signal connected to the pixel circuit in the second area is a second duty cycle, the first duty cycle is greater than the second duty cycle, and the larger the duty cycle, the longer the light-emitting time of the light-emitting element.

[0006] In one possible implementation of the first aspect, the duty cycle of the light emission control signal connected to each pixel circuit in the first region is the same.

[0007] In one possible implementation of the first aspect, the multiple pixel circuits in the first region are arranged from the first pixel circuit row to the nth pixel circuit row, and the duty cycle of the light emission control signal connected to the first pixel circuit row to the nth pixel circuit row first increases and then decreases, where n is greater than 2.

[0008] In one possible implementation of the first aspect, when n is odd, the duty cycle of the light emission control signal connected to the (n+1) / 2th pixel circuit row in the first region is the largest.

[0009] In one possible implementation of the first aspect, the duty cycle of the light emission control signal accessed in the first pixel circuit row is b, and the duty cycle of the light emission control signal accessed in the (n+1) / 2 pixel circuit row is c1.

[0010] The duty cycle of the light-emitting control signal connected to the i-th pixel circuit row in the first region is:

[0011] The duty cycle of the light emission control signal connected to the j-th pixel circuit row in the first region is:

[0012] In one possible implementation of the first aspect, when n is even, the duty cycle of the light emission control signal connected to the n / 2th pixel circuit row in the first region is the largest.

[0013] In one possible implementation of the first aspect, the duty cycle of the light emission control signal accessed in the first pixel circuit row is b, and the duty cycle of the light emission control signal accessed in the n / 2 pixel circuit row is c2.

[0014] The duty cycle of the light emission control signal accessed in the k-th pixel circuit row of the first zone is:

[0015] The duty cycle of the light-emitting control signal connected to the m-th pixel circuit row in the first area is:

[0016] In one possible implementation of the first aspect, the duty cycle of the light emission control signal connected to each pixel circuit in the second region is the same.

[0017] In one possible implementation of the first aspect, the pixel circuit is connected to a first scan signal, which is used to control whether the first electrode of the light-emitting element is reset.

[0018] The amplitude of the first scan signal connected to the pixel circuit in the first area is greater than the amplitude of the first scan signal connected to the pixel circuit in the second area. The amplitude of the first scan signal is the difference between the high level and the low level of the first scan signal.

[0019] Secondly, embodiments of this application provide a display device, including a display panel as described in any one of the embodiments of the first aspect.

[0020] In this embodiment, the duty cycle of the light emission control signal connected to the pixel circuit in the first area is greater than the duty cycle of the light emission control signal connected to the pixel circuit in the second area. In this way, the light emission time of the light-emitting element in the first area can be extended, thereby compensating for the brightness of the first area and improving the problem of the first area being too dark, thereby improving the screen splitting problem of the display panel.

[0021] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0022] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0023] Figure 1 This diagram illustrates a split-screen display panel.

[0024] Figure 2 This illustration shows a structural schematic diagram of a display panel provided in an embodiment of this application;

[0025] Figure 3 This illustration shows a schematic diagram of a pixel circuit provided in an embodiment of this application;

[0026] Figure 4 This diagram illustrates a timing sequence of the light emission control signal provided in an embodiment of this application.

[0027] Figure 5 This illustration shows a structural diagram of the first region provided in an embodiment of this application;

[0028] Figure 6 This illustration shows another structural diagram of the first region provided in an embodiment of this application;

[0029] Figure 7 This illustration shows yet another structural diagram of the first region provided in an embodiment of this application;

[0030] Figure 8 This is a schematic diagram of a display device provided in an embodiment of this application. Detailed Implementation

[0031] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0032] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0033] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0034] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0035] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0036] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0037] OLED display devices have many advantages such as self-illumination and high contrast, making them a promising display device with broad application prospects.

[0038] Traditional OLED products use Low Temperature Poly-Silicon (LTPS) technology. However, LTPS technology is limited by the relatively large leakage current of TFT devices, making flickering easily observable in low-frequency applications. Low Temperature Polycrystalline Oxide (LTPO) technology emerged to address this issue. LTPO combines the high mobility of LTPS with the low leakage current characteristics of oxides, enabling both high-frequency and low-frequency applications, thus gaining market favor.

[0039] Currently popular LTPO products mostly use a 7T1C (7 transistors and 1 capacitor) structure for pixel circuits. However, in low-frequency applications, the 7T1C pixel circuit drives the transistors to be in a biased state for a long time, causing its output characteristics to deviate. In low-frequency applications, it is more likely to have a brightness difference between the hold frame and the write frame, resulting in low-frequency flickering.

[0040] To address the inherent limitations of the 7T1C pixel circuit, the 8T1C pixel circuit was developed. The 8T1C pixel circuit adds a transistor to perform a high-frequency reset of the source or drain of the driving transistor, thus improving low-frequency flicker. For example, the scan signal SP2 controls the writing of the bias adjustment signal to the source or drain of the driving transistor, and also controls the writing of the initialization signal to the anode of the light-emitting element. The scan signal SP2 is a high-frequency signal. When the pulse timing of the scan signal SP2 enters the porch phase, it is equivalent to the scan driving process reaching the first region 201 of the invalid display area 102. The invalid display area 102 is actually a non-existent region (hypothetical region), which does not include pixel circuits or light-emitting elements. Within the same display phase, the scan driving process of the valid display area 101 reaches regions 202 and 203. A row of pixel circuits in region 202 and a row of pixel circuits in region 203 respond to the pulses in their respective input scan signals SP, initializing the first electrode (e.g., the anode) of the light-emitting element.

[0041] Understandably, when the pulse timing of scan signal SP2 enters a blank phase, the number of pixel rows simultaneously driven by the gate drive circuit that generates scan signal SP2 decreases, leading to a reduction in the load on the signal terminal of the initialization signal. This results in the anode of the light-emitting element being initialized more fully, resulting in a darker area (dark band), causing frequency division. Taking scan signal SP2 including 3 pulses as an example (i.e., scan signal SP2 includes 3 valid pulses within one frame; when scan signal SP2 is a valid pulse, the transistor controlled by scan signal SP2 is turned on), this will lead to the following... Figure 1 The three-screen problem shown will result in two dark band areas.

[0042] To address the technical problem of split-screen display (i.e., some areas of the display panel are too dark), this application provides a display panel and a display device. The following will describe various embodiments of the display panel and display device in conjunction with the accompanying drawings.

[0043] Figure 2 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 3 This diagram illustrates a structural schematic of a pixel circuit provided in an embodiment of this application. Figure 4 This diagram illustrates a timing sequence of the light emission control signal provided in an embodiment of this application. Figures 2 to 4 As shown, the display panel 100 provided in this embodiment includes a pixel circuit 10 and a light-emitting element 20, wherein the pixel circuit 10 is electrically connected to the light-emitting element 20. The pixel circuit 10 is used to drive the light-emitting element 20 to emit light.

[0044] The display panel includes a first area A1 and a second area A2. For example, there are multiple first areas A1 and multiple second areas A2, and the first areas A1 and the second areas A2 are arranged alternately in the column direction Y. It should be noted that... Figure 2 The illustration shows two units of zone A1 and three units of zone A2; however, this is not intended to limit the scope of this application. The number of units of zone A1 and zone A2 can be designed according to actual needs.

[0045] Both region A1 and region A2 include pixel circuits and light-emitting elements. For example... Figure 3 As shown, the pixel circuit 10 is connected to a light emission control signal EM. The light emission control signal EM is used to control whether the light emission element 20 connected to the pixel circuit 10 emits light. The larger the duty cycle of the light emission control signal EM, the longer the light emission time of the light emission element. The duty cycle of the light emission control signal EM can be the percentage of time that the light emission control signal is at the on level within one frame.

[0046] The duty cycle of the light emission control signal connected to the pixel circuit in the first zone A1 is the first duty cycle, and the duty cycle of the light emission control signal connected to the pixel circuit in the second zone A2 is the second duty cycle. The first duty cycle is greater than the second duty cycle.

[0047] Figure 4 Taking the low-level conduction level of the light emission control signal EM as an example, the duty cycle of the light emission control signal EM is the proportion of the low level within one frame. The longer the low level time, the larger the duty cycle of the light emission control signal EM, and the longer the light emission time of the light-emitting element. For example, the low-level duration of the light emission control signal EM connected to the pixel circuit in the first area A1 within one frame is t1, and the low-level duration of the light emission control signal EM connected to the pixel circuit in the second area A2 within one frame is t2, where t1 > t2.

[0048] The first zone A1 corresponds to Figure 1 The dark band region refers to the area where the brightness of the first region A1 is darker when the duty cycle of the light emission control signal connected to the first region A1 and the second region A2 is the same.

[0049] In this embodiment, the duty cycle of the light emission control signal connected to the pixel circuit in the first area is greater than the duty cycle of the light emission control signal connected to the pixel circuit in the second area. In this way, the light emission duration of the light-emitting element in the first area can be extended, thereby compensating for the brightness of the first area and improving the problem of the first area being too dark, thereby improving the split-screen problem of the display panel.

[0050] As an example, the structure of the pixel circuit in this application includes, but is not limited to, the following: Figure 3 The circuit structure shown is shown. Figure 3 The pixel circuit 10 is illustrated by including the first transistor T1 to the eighth transistor T8 and the storage capacitor Cst. The third transistor T3 and the fourth transistor T4 are N-type transistors, and the other transistors are P-type transistors.

[0051] The first transistor T1 is a driving transistor used to generate driving current.

[0052] The first terminal of the second transistor T2 is connected to the data line Data, and the second terminal of the second transistor T2 is connected to the first terminal of the first transistor T1. The gate of the second transistor T2 is connected to the scan signal SP1. The second transistor T2 is used to write the data signal of the data line Data to the first terminal of the first transistor T1.

[0053] The first terminal of the third transistor T3 is connected to the second terminal of the first transistor T1, and the second terminal of the third transistor T3 is connected to the gate of the first transistor T1. The gate of the third transistor T3 is connected to the scan signal SN2. The third transistor T3 is used to compensate for the threshold voltage of the first transistor T1.

[0054] The first terminal of the fourth transistor T4 is connected to the first initialization signal line Vref1, the second terminal of the fourth transistor T4 is connected to the first terminal of the third transistor T3, and the gate of the fourth transistor T4 is connected to the scan signal SN1. The fourth transistor T4 is used to reset the gate of the first transistor T1.

[0055] The first terminal of the fifth transistor T5 is connected to the first power line ELVDD, the second terminal of the fifth transistor T5 is connected to the first terminal of the first transistor T1, and the gate of the fifth transistor T5 is connected to the light emission control signal EM.

[0056] The first terminal of the sixth transistor T6 is connected to the second terminal of the first transistor T1, and the second terminal of the sixth transistor T6 is connected to the first terminal of the light-emitting element 20. The gate of the sixth transistor T6 is connected to the light-emitting control signal EM. Under the control of the light-emitting control signal EM, the fifth transistor T5 and the sixth transistor T6 control whether the light-emitting element 20 emits light. When the light-emitting control signal EM is at the on level, the fifth transistor T5 and the sixth transistor T6 are turned on, and the light-emitting element 20 emits light. Within one frame, the larger the duty cycle of the light-emitting control signal EM, the longer the light-emitting time of the light-emitting element 20.

[0057] The first terminal of the seventh transistor T7 is connected to the second initialization signal line Vref2, the second terminal of the seventh transistor T7 is connected to the first terminal of the light-emitting element 20, and the gate of the seventh transistor T7 is connected to the first scan signal SP2. The seventh transistor T7 is used to reset the first terminal of the light-emitting element 20.

[0058] The first terminal of the eighth transistor T8 is connected to the bias signal line DVH, the second terminal of the eighth transistor T8 is connected to the first stage of the first transistor T1, and the gate of the eighth transistor T8 is connected to the first scan signal SP2. The eighth transistor T8 is used to adjust the bias state of the first transistor T1.

[0059] Understandably, the first scan signal SP2 is used to control whether the first electrode of the light-emitting element 20 is reset. For example, when the first scan signal SP2 is low, the seventh transistor T7 is turned on, and the signal on the second initialization signal line Vref2 is transmitted to the first electrode of the light-emitting element 20, thereby resetting the first electrode of the light-emitting element 20.

[0060] The first scan signal SP2 is a high-frequency signal, meaning that it comprises multiple pulses within one frame. When the pulse timing of the first scan signal SP2 enters the blank phase (porch phase), the scanning drive process of the display area proceeds to the first area A1. The positions of the first area A1 and the second area A2 in the display area can be determined based on the amplitude of the first scan signal SP2.

[0061] The amplitude of the first scan signal SP2 connected to the pixel circuit in the first region A1 is greater than the amplitude of the first scan signal SP2 connected to the pixel circuit in the second region A2. The amplitude of the first scan signal SP2 is the difference between the high level and the low level of the first scan signal SP2.

[0062] Understandably, the number of rows of pixel circuits in the first area A1 is less than the number of rows of pixel circuits in the second area A2. That is, the load corresponding to the first scan signal SP2 when it scans the first area A1 is less than the load corresponding to the first scan signal SP2 when it scans the second area A2. Therefore, the amplitude of the first scan signal SP2 connected to the pixel circuits in the first area A1 will be larger. By monitoring the voltage of the first scan signal SP2, the amplitude of the first scan signal SP2 can be obtained, thereby determining the position of the display areas where the first area A1 and the second area A2 are located.

[0063] When the number of pulses in the first scan signal SP2 changes within a frame, the number of first area A1s changes accordingly, and the position of the display area containing first area A1 also changes. For example, when the number of pulses in the first scan signal SP2 within a frame is 2, the number of first area A1s is 1. As another example, when the number of pulses in the first scan signal SP2 within a frame is 3, the number of first area A1s is 2. And as yet another example, when the number of pulses in the first scan signal SP2 within a frame is 4, the number of first area A1s is 3.

[0064] In some embodiments, the duty cycle of the light emission control signal EM connected to each pixel circuit in the first region A1 is the same.

[0065] In this example, the light-emitting elements connected to each pixel circuit in the first region have the same emission duration within a frame. For each pixel circuit in the first region, only one emission control signal with a duty cycle needs to be provided, which simplifies the driving timing.

[0066] In some embodiments, the duty cycle of the light emission control signal EM connected to each pixel circuit in the second region A2 is the same.

[0067] In this example, the light-emitting elements connected to each pixel circuit in the second region have the same emission duration within a frame. For each pixel circuit in the second region, only a different duty cycle emission control signal needs to be provided, making the driving timing relatively simple.

[0068] For example, the display panel includes a first light-emitting driving circuit and a second light-emitting driving circuit (not shown in the figure). The first light-emitting driving circuit includes multiple cascaded first shift registers, which are electrically connected to the pixel circuit of a first area. The first shift registers are used to provide light-emitting control signals to the pixel circuit of the first area. The second light-emitting driving circuit includes multiple cascaded second shift registers, which are electrically connected to the pixel circuit of a second area. The second shift registers are used to provide light-emitting control signals to the pixel circuit of the second area. The duty cycle of the light-emitting control signal output by the first shift register is greater than the duty cycle of the light-emitting control signal output by the second shift register.

[0069] The above example illustrates a design where the duty cycle of the light emission control signals connected to each pixel circuit in the first region is uniform. In other examples, the duty cycle of the light emission control signals connected to different pixel circuits in the first region can also be designed differently. The following describes some methods for designing different duty cycles of the light emission control signals connected to different pixel circuits in the first region.

[0070] In some embodiments, such as Figure 5 As shown, the multiple pixel circuits 10 in the first region A1 are arranged from the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n. The duty cycle of the light emission control signal connected to the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n first increases and then decreases, and b is greater than 2.

[0071] Each pixel circuit row includes multiple pixel circuits 10 arranged along the row direction X, and the multiple pixel circuit rows are arranged along the column direction Y. The duty cycle of the light emission control signal connected to each pixel circuit in the same pixel circuit row is the same. During the display process, the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n are driven by quasi-row scanning.

[0072] For example, in the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n, the duty cycle of the light emission control signal connected to any one of the second pixel circuit rows 10a_2 to the (n-1)th pixel circuit rows 10a_n-1 is the largest.

[0073] For example, when n is greater than 3, the duty cycle of the light emission control signal connected to the 3rd pixel circuit row is the largest. That is to say, the duty cycle of the light emission control signal connected to the 1st to the 3rd pixel circuit row shows an increasing trend, while the duty cycle of the light emission control signal connected to the 3rd to the nth pixel circuit row shows a decreasing trend.

[0074] For example, when n is greater than 5, the duty cycle of the light emission control signal connected to the 5th pixel circuit row is the largest. That is to say, the duty cycle of the light emission control signal connected to the 1st to the 5th pixel circuit row shows an increasing trend, while the duty cycle of the light emission control signal connected to the 5th to the nth pixel circuit row shows a decreasing trend.

[0075] In this embodiment, the duty cycle of the light emission control signal connected to the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n first increases and then decreases. Correspondingly, within one frame, the light emission duration of the light emission elements in the first row to the nth row connected to the first pixel circuit row 10a_1 to the nth pixel circuit row 10a_n first increases and then decreases. This can compensate for the problem that the light emission brightness of the light emission elements in the first row to the nth row first decreases and then increases, thereby enabling flexible adjustment of the brightness of the light emission elements in different rows in the first area according to the requirements.

[0076] For example, the total number n of pixel circuit rows in the first region can be either odd or even.

[0077] The inventors discovered through research that, in the column direction Y, the brightness of the light-emitting element located in the middle region of the first zone is lower.

[0078] In some embodiments, when n is an odd number, the duty cycle of the light emission control signal connected to the (n+1) / 2th pixel circuit row in the first region A1 is the largest.

[0079] For example, when n is 3, the duty cycle of the light emission control signal connected to the second pixel circuit row in the first region A1 is the largest.

[0080] For example, when n is 5, the duty cycle of the light emission control signal connected to the third pixel circuit row in the first region A1 is the largest.

[0081] For example, when n is 9, the duty cycle of the light emission control signal connected to the 5th pixel circuit row in the first region A1 is the largest. n can also be other odd values, which will not be listed here.

[0082] In other words, when n is odd, the duty cycle of the light emission control signal connected to the middle pixel circuit row in the first region A1 is the largest. Correspondingly, within one frame, the light emission duration of the light emission element connected to the middle pixel circuit row in the first region A1 is the largest, which can compensate for the problem that the light emission brightness of the light emission element connected to the middle pixel circuit row in the first region A1 is the lowest.

[0083] When n is an odd number, the duty cycle of the light emission control signal connected to each pixel circuit row in the first region A1 can be designed as follows.

[0084] In some embodiments, such as Figure 6 As shown, n is an odd number. The duty cycle of the light emission control signal EM connected to the first pixel circuit row 10a_1 in the first region A1 is b, and the duty cycle of the light emission control signal connected to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2 in the first region A1 is c1; the duty cycle of the light emission control signal EM connected to the i-th pixel circuit row 10a_i in the first region A1 is... The duty cycle of the light emission control signal connected to the j-th pixel circuit row 10a_j in the first region A1 is:

[0085] For example, if n is 5, then the (n+1) / 2th pixel circuit row is the 3rd pixel circuit row, the ith pixel circuit row is the 2nd pixel circuit row, and the jth pixel circuit row is the 4th pixel circuit row. As another example, if n is 7, then the (n+1) / 2th pixel circuit row is the 4th pixel circuit row, the ith pixel circuit row can be either the 2nd or 3rd pixel circuit row, and the jth pixel circuit row can be either the 5th or 6th pixel circuit row. n can also be other odd values, which will not be listed here.

[0086] In this embodiment, the duty cycle of the light emission control signal EM connected to the i-th pixel circuit row 10a_i in the first region A1 is: In this way, within one frame, the duty cycle of the light-emitting control signals connected to the first pixel circuit row 10a_1 to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2 increases linearly, and the light-emitting duration of the light-emitting elements connected to the first pixel circuit row 10a_1 to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2 increases linearly, thus enabling relatively smooth compensation for the brightness of the light-emitting elements connected to the first pixel circuit row 10a_1 to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2. Similarly, the duty cycle of the light-emitting control signal connected to the jth pixel circuit row 10a_j is... In this way, within one frame, the duty cycle of the light emission control signal connected to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2 to the nth pixel circuit row 10a_n decreases linearly, and the light emission duration of the light emission element connected to the (n+1) / 2th pixel circuit row 10a_(n+1) / 2 to the nth pixel circuit row 10a_n decreases linearly, thereby enabling relatively smooth compensation of the brightness of the light emission element connected to the (n+1) / 2th pixel circuit row 10a_(m+1) / 2 to the nth pixel circuit row 10a_n.

[0087] In other embodiments, when n is an even number, the duty cycle of the light emission control signal connected to the n / 2th pixel circuit row in the first region is the largest.

[0088] For example, when n is 4, the duty cycle of the light emission control signal connected to the second pixel circuit row in the first region A1 is the largest.

[0089] For example, when n is 6, the duty cycle of the light emission control signal connected to the third pixel circuit row in the first region A1 is the largest.

[0090] For example, when n is 8, the duty cycle of the light emission control signal connected to the 5th pixel circuit row in the first region A1 is the largest. n can also be other even values, which will not be listed here.

[0091] In other words, when n is even, the duty cycle of the light emission control signal connected to the n / 2th pixel circuit row in the first region A1 is the largest. Correspondingly, within one frame, the light emission duration of the light emission element connected to the n / 2th pixel circuit row in the first region A1 is the largest, which can compensate for the problem that the light emission brightness of the light emission element connected to the n / 2th pixel circuit row in the first region A1 is the lowest.

[0092] For example, when n is even, the duty cycle of the light emission control signal connected to the n / 2th pixel circuit row and the (n / 2)+1th pixel circuit row in the first region is the same. That is, when n is even, the duty cycle of the light emission control signal connected to the two middle pixel circuit rows in the first region is the same and the maximum.

[0093] In some embodiments, such as Figure 7 As shown, when n is even, the duty cycle of the light-emitting control signal connected to the first pixel circuit row 10a_1 is b, and the duty cycle of the light-emitting control signal connected to the n / 2 pixel circuit row 10a_n / 2 is c2; the duty cycle of the light-emitting control signal connected to the k-th pixel circuit row 10a_k in the first area is... The duty cycle of the light emission control signal connected to the m-th pixel circuit in the first region, in row 10a_m, is:

[0094] For example, if n is 6, then the 2nd pixel circuit row is the 3rd pixel circuit row, the kth pixel circuit row is the 2nd pixel circuit row, and the mth pixel circuit row is either the 4th or 5th pixel circuit row. As another example, if n is 8, then the 2nd pixel circuit row is the 4th pixel circuit row, the kth pixel circuit row can be either the 2nd or 3rd pixel circuit row, and the mth pixel circuit row can be either the 5th, 6th, or 7th pixel circuit row. n can also be other even values, which will not be listed here.

[0095] In this embodiment, the duty cycle of the light emission control signal EM connected to the k-th pixel circuit row 10a_k in the first region A1 is: In this way, within one frame, the duty cycle of the light-emitting control signals connected to the first pixel circuit row 10a_1 to the n / 2nd pixel circuit row 10a_n / 2 increases linearly, and the light-emitting duration of the light-emitting elements connected to the first pixel circuit row 10a_1 to the n / 2nd pixel circuit row 10a_n / 2 also increases linearly. This allows for relatively smooth compensation of the brightness of the light-emitting elements connected to the first pixel circuit row 10a_1 to the n / 2nd pixel circuit row 10a_n / 2. Similarly, the duty cycle of the light-emitting control signal connected to the mth pixel circuit row 10a_m is... In this way, within one frame, the duty cycle of the light emission control signal connected to the n / 2 pixel circuit row 10a_n / 2 to the n pixel circuit row 10a_n decreases linearly, and the light emission duration of the light emission element connected to the n / 2 pixel circuit row 10a_n / 2 to the n pixel circuit row 10a_n decreases linearly, thereby enabling relatively smooth compensation of the brightness of the light emission element connected to the n / 2 pixel circuit row 10a_n / 2 to the n pixel circuit row 10a_n.

[0096] This application also provides a display device, including the display panel provided in this application. Please refer to... Figure 8 , Figure 8 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 8 The provided display device 100 includes the display panel 100 provided in any of the above embodiments of this application. Figure 8 This embodiment uses a mobile phone as an example to illustrate the display device 1000. It is understood that the display device provided in this application embodiment can be other display devices with display functions, such as wearable products, computers, televisions, and in-vehicle display devices; this application does not impose specific limitations on these. The display device provided in this application embodiment has the beneficial effects of the display panel provided in this application embodiment. For details, please refer to the specific descriptions of the display panel in the above embodiments; these will not be repeated here.

[0097] It should be noted that for N-type transistors, the on-level is high and the off-level is low. That is, when the gate potential of an N-type transistor is high, its first and second terminals are connected; when the gate potential is low, its first and second terminals are off. For P-type transistors, the on-level is low and the off-level is high. That is, when the gate potential of a P-type transistor is low, its first and second terminals are connected; when the gate potential is high, its first and second terminals are off. In specific implementations, the gate of each transistor is used as its control electrode. Furthermore, depending on the signal and type of the gate of each transistor, its first terminal can be used as the source and its second terminal as the drain, or vice versa; no distinction is made here. Additionally, the on-level and off-level in this embodiment are general terms; the on-level refers to any level that enables the transistor to conduct, and the off-level refers to any level that enables the transistor to turn off / become off.

[0098] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, It includes a pixel circuit and a light-emitting element, wherein the pixel circuit and the light-emitting element are electrically connected; The display panel includes a first area and a second area. The duty cycle of the light emission control signal connected to the pixel circuit in the first area is a first duty cycle, and the duty cycle of the light emission control signal connected to the pixel circuit in the second area is a second duty cycle. The first duty cycle is greater than the second duty cycle. The larger the duty cycle, the longer the light emission time of the light-emitting element.

2. The display panel according to claim 1, characterized in that, The duty cycle of the light emission control signal connected to each pixel circuit in the first region is the same.

3. The display panel according to claim 1, characterized in that, The multiple pixel circuits in the first area are arranged from the first pixel circuit row to the nth pixel circuit row. The duty cycle of the light emission control signal connected to the first pixel circuit row to the nth pixel circuit row first increases and then decreases, and n is greater than 2.

4. The display panel according to claim 3, characterized in that, When n is odd, the duty cycle of the light emission control signal connected to the (n+1) / 2th pixel circuit row in the first area is the largest.

5. The display panel according to claim 4, characterized in that, The duty cycle of the light emission control signal accessed in the first pixel circuit row is b, and the duty cycle of the light emission control signal accessed in the (n+1) / 2 pixel circuit row is c1. The duty cycle of the light emission control signal connected to the i-th pixel circuit row in the first region is: The duty cycle of the light emission control signal connected to the j-th pixel circuit row in the first area is:

6. The display panel according to claim 3, characterized in that, When n is an even number, the duty cycle of the light emission control signal connected to the n / 2th pixel circuit row in the first area is the largest.

7. The display panel according to claim 6, characterized in that, The duty cycle of the light emission control signal accessed in the first pixel circuit row is b, and the duty cycle of the light emission control signal accessed in the n / 2 pixel circuit row is c2. The duty cycle of the light emission control signal connected to the k-th pixel circuit row in the first area is: The duty cycle of the light emission control signal connected to the circuit row of the m-th pixel in the first region is c2- 8. The display panel according to claim 1, characterized in that, The duty cycle of the light emission control signal connected to each pixel circuit in the second region is the same.

9. The display panel according to claim 1, characterized in that, The pixel circuit is connected to a first scanning signal, which is used to control whether the first electrode of the light-emitting element is reset. The amplitude of the first scan signal connected to the pixel circuit in the first region is greater than the amplitude of the first scan signal connected to the pixel circuit in the second region. The amplitude of the first scan signal is the difference between the high level and the low level of the first scan signal.

10. A display device, characterized in that, Includes the display panel according to any one of claims 1-9.

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