Pixel circuit, driving method thereof and display panel
Patent Information
- Application Number
- CN202510550411.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2026-10-30
AI Technical Summary
[0004]本发明提供了一种像素电路及其驱动方法和显示面板,以缓解斜亮线的问题,提高显示面板的显示效果
[0025]本发明实施例提供的像素电路,包括驱动模块、发光模块、发光控制模块和耦合消除模块,通过在初始化阶段和数据写入及阈值补偿阶段响应发光控制信号,将第二电平信号耦合至发光模块的第一端,以拉低发光模块第一端的电位;在发光阶段响应发光控制信号,将第一电平信号耦合至发光模块的第一端,以拉高发光模块第一端的电位,可以使得发光模块的第一端产生与发光控制信号相反的电位变化,抵消耦合干扰,可以维持第一电极的电位的稳定性,以缓解斜亮线的问题,提高显示面板的显示效果。
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Figure CN123016900A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and in particular to a pixel circuit, its driving method, and a display panel. Background Technology
[0002] With the development of display technology, users have increasingly higher requirements for display quality.
[0003] However, existing display panels have the problem of slanted bright lines, which seriously affects the display effect of the display panel. Summary of the Invention
[0004] This invention provides a pixel circuit, its driving method, and a display panel to alleviate the problem of slanted bright lines and improve the display effect of the display panel.
[0005] In a first aspect, embodiments of the present invention provide a pixel circuit, comprising: a driving module, a light-emitting module, a light-emitting control module, and a coupling elimination module; the light-emitting control module, the driving module, and the light-emitting module are connected between a first power supply and a second power supply; the light-emitting control module is used to control the light-emitting module to emit light according to the driving current output by the driving module based on a light-emitting control signal; the control terminal of the coupling elimination module is connected to the light-emitting control signal, the first input terminal of the coupling elimination module is connected to a first level signal, the second input terminal of the coupling elimination module is connected to a second level signal, and the output terminal of the coupling elimination module is connected to the first terminal of the light-emitting module; the coupling elimination module is used to respond to the light-emitting control signal during the initialization phase and the data writing and threshold compensation phase by coupling the second level signal to the first terminal of the light-emitting module to lower the potential of the first terminal of the light-emitting module; and during the light-emitting phase by responding to the light-emitting control signal by coupling the first level signal to the first terminal of the light-emitting module to raise the potential of the first terminal of the light-emitting module.
[0006] Optionally, the coupling elimination module includes a coupling unit, a first switching unit, and a second switching unit. The control terminal of the first switching unit is connected to a light-emitting control signal, the first terminal of the first switching unit is connected to a second-level signal, and the second terminal of the first switching unit is connected to the first terminal of the coupling unit. The first switching unit is used to respond to the light-emitting control signal and transmit the second-level signal to the first terminal of the coupling unit. The control terminal of the second switching unit is connected to the light-emitting control signal, the first terminal of the second switching unit is connected to a first-level signal, and the second terminal of the second switching unit is connected to the first terminal of the coupling unit. The second switching unit is used to respond to the light-emitting control signal and transmit the first-level signal to the first terminal of the coupling unit. The second terminal of the coupling unit is connected to the first terminal of the light-emitting module and is used to couple the potential of the first terminal of the coupling unit to the first terminal of the light-emitting module.
[0007] Optionally, the first switching unit includes a first transistor, and the second switching unit includes a second transistor. The gate of the first transistor serves as the control terminal of the first switching unit, the first electrode of the first transistor serves as the first terminal of the first switching unit, and the second electrode of the first transistor serves as the second terminal of the first switching unit. The gate of the second transistor serves as the control terminal of the second switching unit, the first electrode of the second transistor serves as the second terminal of the second switching unit, and the second electrode of the second transistor serves as the second terminal of the second switching unit. The first transistor and the second transistor have different channel types.
[0008] Optionally, the first transistor is an N-channel transistor and the second transistor is a P-channel transistor.
[0009] Optionally, the coupling unit includes a coupling capacitor, with the first end of the coupling capacitor serving as the first end of the coupling unit and the second end of the coupling capacitor serving as the second end of the coupling unit.
[0010] Optionally, the pixel circuit further includes a threshold compensation module; the first end of the threshold compensation module is connected to the first end of the driving module, and the second end of the threshold compensation module is connected to the control end of the driving module. The threshold compensation module is used to perform threshold compensation on the driving module according to the first scan signal.
[0011] Optionally, the threshold compensation module includes a third transistor, which is a dual-gate transistor. The third transistor includes a first sub-transistor and a second sub-transistor. The first terminal of the first sub-transistor is connected to the second terminal of the driving module, the second terminal of the first sub-transistor is connected to the first terminal of the second sub-transistor, the first terminal of the second sub-transistor is connected to the control terminal of the driving module, and the gate of the second sub-transistor is connected to the first scan signal.
[0012] Optionally, the pixel circuit further includes a storage module; a first end of the storage module is connected to a first power supply, and a second end of the storage module is connected to the control terminal of the drive module for storing the voltage of the control terminal of the drive module.
[0013] Optionally, the storage module includes a storage capacitor, with the first end of the storage capacitor serving as the first end of the storage module and the second end of the storage capacitor serving as the second end of the storage module.
[0014] Optionally, the light-emitting control module includes a first light-emitting control module and a second light-emitting control module; the first light-emitting control module is connected between the first power supply and the second end of the driving module, the second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module, the second end of the light-emitting module is connected to the second power supply, and the control terminals of the first and second light-emitting control modules are connected to light-emitting control signals.
[0015] Optionally, the first light-emitting control module includes a fourth transistor, the gate of which is connected to a light-emitting control signal, the first terminal of which is connected to a first power supply, and the second terminal of which is connected to the first terminal of the driving module; the second light-emitting control module includes a fifth transistor, the gate of which is connected to a light-emitting control signal, the first terminal of which is connected to the second terminal of the driving module, and the second terminal of which is connected to the first terminal of the light-emitting module.
[0016] Optionally, the pixel circuit further includes a data writing module; the control terminal of the data writing module is connected to the first scan signal, the first terminal of the data writing module is connected to the data voltage, and the second terminal of the data writing module is connected to the first terminal of the drive module.
[0017] Optionally, the pixel circuit further includes a first initialization module, the control terminal of the first initialization module is connected to the second scanning signal, the first terminal of the first initialization module is connected to the first initialization signal, and the second terminal of the first initialization module is connected to the control terminal of the driving module.
[0018] Optionally, the pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to a third scanning signal, the first terminal of the second initialization module is connected to a second initialization signal, and the second terminal of the second initialization module is connected to the first terminal of the light-emitting module.
[0019] Optionally, the data writing module includes a sixth transistor, the gate of the sixth transistor serving as the control terminal of the data writing module, the first electrode of the sixth transistor serving as the first terminal of the data writing module, and the second electrode of the sixth transistor serving as the second terminal of the data writing module.
[0020] Optionally, the first initialization module includes a seventh transistor, which is a dual-gate transistor and includes a third sub-transistor and a fourth sub-transistor; the first terminal of the third sub-transistor is connected to the control terminal of the driving module, the second terminal of the third sub-transistor is connected to the first terminal of the fourth sub-transistor, the first terminal of the fourth sub-transistor is connected to the first initialization signal, and the gate of the fourth sub-transistor is connected to the second scan signal.
[0021] Optionally, the second initialization module includes an eighth transistor, the gate of the eighth transistor serving as the control terminal of the second initialization module, the first terminal of the eighth transistor serving as the first terminal of the second initialization module, and the second terminal of the eighth transistor serving as the second terminal of the second initialization module.
[0022] Secondly, embodiments of the present invention provide a driving method for a pixel circuit. The pixel circuit includes a driving module, a light-emitting module, a light-emitting control module, and a coupling elimination module. The light-emitting control module, the driving module, and the light-emitting module are connected between a first power supply and a second power supply. The light-emitting control module is used to control the light-emitting module to emit light according to the driving current output by the driving module based on a light-emitting control signal. The control terminal of the coupling elimination module is connected to the light-emitting control signal, and the first terminal of the coupling elimination module is connected to a first level signal and a second level signal. The second terminal of the coupling elimination module is connected to the first terminal of the light-emitting module. The driving method includes: in the initialization phase and the data writing and threshold compensation phase, the coupling elimination module responds to the light-emitting control signal and transmits the second level signal to the first terminal of the light-emitting module to lower the potential of the first terminal of the light-emitting module; in the light-emitting phase, the coupling elimination module responds to the light-emitting control signal and transmits the first level signal to the first terminal of the light-emitting module to raise the potential of the first terminal of the light-emitting module.
[0023] Thirdly, embodiments of the present invention provide a display panel, comprising: a substrate; a driving circuit layer disposed on the substrate, the driving circuit layer including a plurality of pixel circuits provided in any embodiment of the present invention located in a display area and arranged in an array; the driving circuit layer including a conductive layer and an electrode layer stacked on the substrate; the conductive layer including a light emission control signal line and a first wiring, the light emission control signal line extending along a first direction and connected to the pixel circuit; the first wiring extending along a second direction and connected to the light emission control signal line; the electrode layer including a first electrode of a light emission module, the orthographic projection of the first electrode on the substrate at least partially overlapping the orthographic projection of the first wiring on the substrate.
[0024] Optionally, the display panel further includes a bezel surrounding the display area; the bezel includes a top bezel, a bottom bezel, a side bezel, and at least one non-right-angle corner, the top and bottom bezels extending along a second direction, and the side bezels extending along a first direction; the display panel further includes a gate driving circuit for driving pixel circuits, the gate driving circuit including a light emission control circuit and a scanning circuit, the light emission control circuit being disposed on the top and side bezels, and the scanning circuit being disposed on the side bezels and the non-right-angle corner; the light emission control circuit located on the side bezel is connected to at least one row of pixel circuits via a light emission control signal line; the light emission control driving circuit located on the top bezel is connected to the light emission control signal line via a first wiring.
[0025] The pixel circuit provided in this embodiment of the invention includes a driving module, a light-emitting module, a light-emitting control module, and a coupling elimination module. By responding to the light-emitting control signal during the initialization phase and the data writing and threshold compensation phases, a second-level signal is coupled to the first end of the light-emitting module to lower its potential. During the light-emitting phase, in response to the light-emitting control signal, a first-level signal is coupled to the first end of the light-emitting module to raise its potential. This allows the first end of the light-emitting module to generate a potential change opposite to the light-emitting control signal, thus canceling coupling interference and maintaining the stability of the potential of the first electrode. This alleviates the problem of slanted bright lines and improves the display effect of the display panel.
[0026] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;
[0029] Figure 2 This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention;
[0030] Figure 3 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;
[0031] Figure 4 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention;
[0032] Figure 5 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
[0033] Figure 6 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
[0034] Figure 7 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
[0035] Figure 8 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
[0036] Figure 9 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention;
[0037] Figure 10 This is a flowchart of a pixel circuit driving method provided in an embodiment of the present invention. Detailed Implementation
[0038] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0039] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.
[0040] As mentioned in the background section, existing display panels are prone to displaying slanted bright lines. After careful research, the inventors discovered that the cause of this technical problem is:
[0041] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 2 This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. Figure 1 and Figure 2 As shown, the display panel includes a display area AA and a border NAA surrounding the display area; the border NAA includes a top border, a bottom border, a side border and at least one non-right-angle corner, the top border and the bottom border extend along a second direction Y, and the side border extends along a first direction X.
[0042] The display panel also includes a substrate 100; a driving circuit layer 200 disposed on the substrate 100, the driving circuit layer 200 including a plurality of pixel circuits located in the display area AA and arranged in an array; the driving circuit layer 200 includes a conductive layer 201 and an electrode layer 202 stacked on the substrate 100. The conductive layer 201 includes a light emission control signal line ES and a first wiring LS. The electrode layer 202 includes a first electrode A1 of the light emission module.
[0043] To achieve a narrow bezel design, the light-emitting control circuit 10 is typically placed on the top and side bezels, while the scanning circuit 20 is placed on the side bezels and non-right-angle corners. The light-emitting control signal is transmitted to the horizontal light-emitting control signal line ES of the display area AA using the first wiring LS, ensuring that the orthographic projection of the first electrode A1 of the light-emitting module on the substrate 100 at least partially overlaps with the orthographic projection of the first wiring LS on the substrate 100. When the potential on the first wiring LS changes, due to the parasitic capacitance between the first wiring LS and the first electrode A1, the potential of the first electrode A1 is abnormally pulled up or down through capacitive coupling when the potential of the light-emitting control signal on the first wiring LS changes. This results in potential differences in the first electrode A1 at different locations in the display area AA, forming uneven, diagonally bright lines.
[0044] In view of the inventors' above-mentioned research findings, in order to solve the problems of the prior art, embodiments of the present invention provide a pixel circuit and its driving method, as well as a display panel. The pixel circuit provided by the embodiments of the present invention will be described below first.
[0045] Figure 3 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention. Figure 3 As shown, the pixel circuit includes a driving module 110, a light-emitting module 120, a light-emitting control module 130, and a coupling elimination module 140.
[0046] The light-emitting control module 130, the driving module 110, and the light-emitting module 120 are connected between the first power supply ELVDD and the second power supply ELVSS. The light-emitting control module 130 is used to control the light-emitting module 120 to emit light according to the driving current output by the driving module 110 based on the light-emitting control signal EM.
[0047] The control terminal of the coupling cancellation module 140 is connected to the light emission control signal EM, the first input terminal of the coupling cancellation module 140 is connected to the first level signal PVGH, the second input terminal of the coupling cancellation module 140 is connected to the second level signal PVGL, and the output terminal of the coupling cancellation module 140 is connected to the first terminal of the light emission module 120. The coupling cancellation module 140 is used to respond to the light emission control signal EM in the initialization phase P1 and the data writing and threshold compensation phase P2, and couple the second level signal PVGL to the first terminal of the light emission module 120 to lower the potential of the first terminal of the light emission module 120; in the light emission phase P3, it responds to the light emission control signal EM and couples the first level signal PVGH to the first terminal of the light emission module 120 to raise the potential of the first terminal of the light emission module 120.
[0048] Specifically, the light-emitting module 120 includes a light-emitting element D1, which can be an organic light-emitting diode (OLED). The first electrode A1 (e.g., anode) of the OLED serves as the first terminal of the light-emitting module 120, and the second electrode (e.g., cathode) of the OLED serves as the second terminal of the light-emitting module 120. The light-emitting module 120 emits light according to the driving current output by the driving module 110, wherein the driving current can be the driving current output by the driving module 110 based on the voltage at its control terminal and second terminal.
[0049] The first level signal PVGH and the second level signal PVGL have opposite potentials. For example, when the first level signal PVGH is a high level signal, the second level signal PVGL is a low level signal, or when the first level signal PVGH is a low level signal, the second level signal PVGL is a high level signal. In this embodiment and in the embodiments below, the first level signal PVGH is a high level signal and the second level signal PVGL is a low level signal, which are used as examples for illustrative purposes.
[0050] When the light emission control signal EM changes, the coupling cancellation module 140 couples either the first level signal PVGH or the second level signal PVGL to the first electrode A1 of the light emission module 140, generating a potential change opposite to that of the light emission control signal EM, thus canceling coupling interference and maintaining the stability of the potential of the first electrode A1. For example, when the first wiring LS transmits the high-level signal of the light emission control signal EM into the light emission control signal line ES of the display area AA, the parasitic capacitance between the first wiring LS and the first electrode A1 causes an abnormal increase in the potential of the first electrode A1. The coupling cancellation module 140 synchronously responds to the light emission control signal EM by coupling the second level signal PVGL (low-level signal) to the first electrode A1 of the light emission module 140, pulling down the potential of the first electrode A1 of the light emission module 140, thereby achieving potential compensation. When the first wiring LS transmits the low-level signal of the light emission control signal EM into the light emission control signal line ES of the display area AA, the parasitic capacitance between the first wiring LS and the first electrode A1 causes the potential of the first electrode A1 to drop abnormally. The coupling cancellation module 140 synchronously responds to the light emission control signal EM and couples the first level signal PVGH (high level signal) to the first electrode of the light emission module 140, thereby raising the potential of the first electrode A1 of the light emission module 140 and achieving potential compensation.
[0051] Figure 4 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention. Figure 4 The timing diagram shown can be applied to Figure 3 Pixel circuit, reference Figure 3 and Figure 4The working stages of the pixel circuit include initialization stage P1, data writing and threshold compensation stage P2, and light emission stage P3.
[0052] During the initialization phase P1 and the data writing and threshold compensation phase P2, the light emission control signal EM transitions from a low level to a high level, and the light emission control module 130 is turned off. The coupling cancellation module 140 responds to the light emission control signal EM by coupling the second-level signal PVGL to the first terminal of the light emission module 140, thereby pulling down the potential of the first terminal of the light emission module 140.
[0053] During the light-emitting phase P3, the light-emitting control signal EM transitions from a high level to a low level, turning on the light-emitting control module 130. The light-emitting control module 130 transmits the first power supply ELVDD to the second terminal of the driver module 110, and the driver module 110 outputs a drive current to drive the light-emitting module 120 to emit light. The coupling cancellation module 140, in response to the light-emitting control signal EM, couples the first level signal PVGH to the second terminal of the light-emitting module 140 to pull up the potential of the first terminal of the light-emitting module 140.
[0054] In summary, when the light emission control signal EM changes, the coupling cancellation module 140 pulls the potential of the first electrode of the light emission module 120 in the opposite direction, so that the potential of the first electrode A1 is not affected by the change in the potential of the light emission control signal EM. The process is as follows: Figure 4 As shown in the figure. EMB represents the drive signal output by the coupling cancellation module 140.
[0055] The pixel circuit provided in this embodiment of the invention includes a driving module, a light-emitting module, a light-emitting control module, and a coupling elimination module. By responding to the light-emitting control signal during the initialization phase and the data writing and threshold compensation phases, a second-level signal is coupled to the first end of the light-emitting module to lower its potential. During the light-emitting phase, in response to the light-emitting control signal, a first-level signal is coupled to the first end of the light-emitting module to raise its potential. This allows the first end of the light-emitting module to generate a potential change opposite to the light-emitting control signal, thus canceling coupling interference and maintaining the stability of the potential of the first electrode. This alleviates the problem of slanted bright lines and improves the display effect of the display panel.
[0056] Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. For example... Figure 5 As shown, optionally, the coupling elimination module 140 includes a coupling unit 1400, a first switching unit 1401, and a second switching unit 1402.
[0057] The control terminal of the first switching unit 1401 is connected to the light emission control signal EM, the first terminal of the first switching unit 1401 is connected to the second level signal PVGL, and the second terminal of the first switching unit 1401 is connected to the first terminal of the coupling unit 1400. The first switching unit 1401 is used to respond to the light emission control signal EM and transmit the second level signal PVGL to the first terminal of the coupling unit 1400.
[0058] The control terminal of the second switching unit 1402 is connected to the light emission control signal EM, the first terminal of the second switching unit 1402 is connected to the first level signal PVGH, the second terminal of the second switching unit 1402 is connected to the first terminal of the coupling unit 1400, and the second switching unit 1402 is used to respond to the light emission control signal EM and transmit the first level signal PVGH to the first terminal of the coupling unit.
[0059] The second end of the coupling unit 1400 is connected to the first end of the light-emitting module 120, and is used to couple the potential of the first end of the coupling unit 1400 to the first end of the light-emitting module 120.
[0060] Specifically, when the light emission control signal EM changes from a high level to a low level, the first switching unit 1401 is turned off (e.g., the NMOS transistor is turned off when it is at a low level), and the second switching unit 1402 is turned on (e.g., the PMOS transistor is turned on when it is at a low level), transmitting the first level signal PVGH to the first terminal of the coupling unit 1400.
[0061] When the light emission control signal EM changes from low level to high level, the first switching unit 1401 is turned on (e.g., the NMOS transistor is turned on when it is high level), and the second switching unit 1402 is turned off (e.g., the PMOS transistor is turned off when it is high level), and the second level signal PVGL is transmitted to the first terminal of the coupling unit 1400.
[0062] The coupling unit 1400, through capacitive coupling and dynamic voltage injection, generates a potential change opposite to parasitic interference after the light-emitting control signal EM transitions, eliminating the display unevenness problem caused by wiring capacitance in narrow bezel designs. This design significantly improves the visual consistency of the display panel without increasing process complexity.
[0063] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. For example... Figure 6 As shown, optionally, the first switching unit 1401 includes a first transistor T1, the second switching unit 1402 includes a second transistor T2, the gate of the first transistor T1 serves as the control terminal of the first switching unit 1401, the first electrode of the first transistor T1 serves as the first terminal of the first switching unit 1401, and the second electrode of the first transistor T1 serves as the second terminal of the first switching unit 1401.
[0064] The gate of the second transistor T2 serves as the control terminal of the second switching unit 1402, the first terminal of the second transistor T2 serves as the second terminal of the second switching unit 1402, and the second terminal of the second transistor T2 serves as the second terminal of the second switching unit 1402. The first transistor T1 and the second transistor T2 have different channel types.
[0065] Optionally, the coupling unit 1400 includes a coupling capacitor C1, with the first end of the coupling capacitor C1 serving as the first end of the coupling unit 1400 and the second end of the coupling capacitor C1 serving as the second end of the coupling unit 1400.
[0066] Specifically, when the light-emitting control signal EM transitions from a low level to a high level, the first transistor T1 turns on and the second transistor T2 turns off. The first transistor T1 transmits the second-level signal PVGL (low-level signal) to the first terminal of the coupling capacitor C1. The coupling capacitor C1 transmits the voltage transition to the first electrode of the light-emitting module 120 through capacitive coupling, offsetting the potential rise of the first electrode caused by parasitic capacitance. When the light-emitting control signal EM transitions from a high level to a low level, the first transistor T1 turns off and the second transistor T2 turns on. The second transistor T2 transmits the first-level signal PVGH (high-level signal) to the first terminal of the coupling capacitor C1. The coupling capacitor C1 transmits the voltage transition to the first electrode of the light-emitting module 120 through capacitive coupling, offsetting the potential drop of the first electrode caused by parasitic capacitance.
[0067] Optionally, the first transistor T1 is an N-channel transistor, and the second transistor T2 is a P-channel transistor. The conduction conditions of the N-channel transistor and the P-channel transistor are complementary, ensuring that only one switch is turned on when the light emission control signal EM changes (the first transistor T1 is turned on on the rising edge, and the second transistor T2 is turned on on the falling edge), thus avoiding the short circuit risk caused by the simultaneous conduction of the first level signal PVGH and the second level signal PVGL.
[0068] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. For example... Figure 7 As shown, optionally, the pixel circuit further includes a threshold compensation module 150. The first end of the threshold compensation module 150 is connected to the first end of the driving module 110, and the second end of the threshold compensation module 150 is connected to the control end of the driving module 110. The threshold compensation module 150 is used to perform threshold compensation on the driving module 110 according to the first scan signal S1.
[0069] Optionally, the pixel circuit also includes a storage module 160, with a first end connected to a first power supply ELVDD and a second end connected to the control terminal of the drive module 110 for storing the voltage of the control terminal of the drive module 110.
[0070] Optionally, the light-emitting control module 130 includes a first light-emitting control module 1301 and a second light-emitting control module 1302. The first light-emitting control module 1301 is connected between the first power supply ELVDD and the second terminal of the driver module 110, and the second light-emitting control module 1302 is connected between the first terminal of the driver module 110 and the first terminal of the light-emitting module 120. The second terminal of the light-emitting module 120 is connected to the second power supply ELVSS, and the control terminals of the first light-emitting control module 1301 and the second light-emitting control module 1302 are connected to the light-emitting control signal EM.
[0071] Optionally, the pixel circuit also includes a data writing module 170, the control terminal of the data writing module 170 is connected to the first scan signal S1, the first terminal of the data writing module 170 is connected to the data voltage VdaTa, and the second terminal of the data writing module 170 is connected to the first terminal of the drive module 110.
[0072] Optionally, the pixel circuit further includes a first initialization module 180, the control terminal of the first initialization module 180 is connected to the second scan signal S2, the first terminal of the first initialization module 180 is connected to the first initialization signal Vref1, and the second terminal of the first initialization module 180 is connected to the control terminal of the drive module 110.
[0073] Optionally, the pixel circuit further includes a second initialization module 190, the control terminal of the second initialization module 190 is connected to a third scanning signal S3, the first terminal of the second initialization module 190 is connected to a second initialization signal Vref2, and the second terminal of the second initialization module 190 is connected to the first terminal of the light-emitting module 120.
[0074] Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. For example... Figure 8 As shown, optionally, the pixel circuit includes a driving module 110, an emissive module 120, an emissive control module 130, and a coupling elimination module 140.
[0075] Optionally, the coupling elimination module 140 includes a coupling unit 1400, a first switching unit 1401, and a second switching unit 1402. The coupling unit 1400 includes a coupling capacitor C1, the first switching unit 1401 includes a first transistor T1, and the second switching unit 1402 includes a second transistor T2.
[0076] Optionally, the threshold compensation module 150 includes a third transistor T3, which is a dual-gate transistor and includes a first sub-transistor T31 and a second sub-transistor T2.
[0077] The first terminal of the first sub-transistor T31 is connected to the second terminal of the driving module 110, the second terminal of the first sub-transistor T31 is connected to the first terminal of the second sub-transistor T32, the first terminal of the second sub-transistor T32 is connected to the control terminal of the driving module 110, and the gate of the second sub-transistor T32 is connected to the first scan signal S1. By setting the third transistor T3 as a dual-gate transistor, the leakage current of the third transistor T3 can be reduced after the third transistor T3 is turned off, so as to maintain the stability of the voltage at the control terminal of the driving module 110.
[0078] Optionally, continue to refer to Figure 8 The storage module 160 includes a storage capacitor Cst, with the first end of the storage capacitor Cst serving as the first end of the storage module 160 and the second end of the storage capacitor Cst serving as the second end of the storage module 160.
[0079] Optionally, continue to refer to Figure 8 The first light-emitting control module 1301 includes a fourth transistor T4. The gate of the fourth transistor T4 is connected to the light-emitting control signal EM. The first terminal of the fourth transistor T4 is connected to the first power supply ELVDD. The second terminal of the fourth transistor T4 is connected to the first terminal of the driving module 110.
[0080] The second light-emitting control module 1302 includes a fifth transistor T5, the gate of the fifth transistor T5 is connected to the light-emitting control signal EM, the first terminal of the fifth transistor T5 is connected to the second terminal of the driving module 110, and the second terminal of the fifth transistor T2 is connected to the first terminal of the light-emitting module 120.
[0081] Optionally, continue to refer to Figure 8 The data writing module 170 includes a sixth transistor T6. The gate of the sixth transistor T6 serves as the control terminal of the data writing module 170, the first electrode of the sixth transistor T6 serves as the first terminal of the data writing module 170, and the second electrode of the sixth transistor T6 serves as the second terminal of the data writing module 170.
[0082] Optionally, continue to refer to Figure 8 The first initialization module 180 includes a seventh transistor T7, which is a dual-gate transistor. The seventh transistor T7 includes a third sub-transistor T71 and a fourth sub-transistor T72. The first terminal of the third sub-transistor T71 is connected to the control terminal of the driving module 110, the second terminal of the third sub-transistor T71 is connected to the first terminal of the fourth sub-transistor T72, the first terminal of the fourth sub-transistor T72 is connected to the first initialization signal Vref1, and the gate of the fourth sub-transistor T72 is connected to the second scan signal S2.
[0083] Optionally, continue to refer to Figure 8The second initialization module 190 includes an eighth transistor T8. The gate of the eighth transistor T8 serves as the control terminal of the second initialization module 190, the first electrode of the eighth transistor T8 serves as the first terminal of the second initialization module 190, and the second electrode of the eighth transistor T8 serves as the second terminal of the second initialization module 190.
[0084] Optionally, the driving module 110 includes a driving transistor DTFT, the gate of the driving transistor DTFT serves as the control terminal of the driving module 110, the first electrode of the driving transistor DTFT serves as the first terminal of the driving module 110, and the second electrode of the driving transistor DTFT serves as the second terminal of the driving module 110.
[0085] In this configuration, the first electrode is one of the source and the drain, and the second electrode is the other of the source and the drain. For example, if the first electrode is the source, the second electrode is the drain; or if the first electrode is the drain, the second electrode is the source.
[0086] The first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, and the driving transistor DTFT can be either P-type or N-type transistors; this embodiment does not impose a specific limitation. The example described uses P-type transistors as an illustration.
[0087] Figure 9 This is another driving timing diagram of a pixel circuit provided in an embodiment of the present invention. Figure 9 The driving timing shown can be applied to the driver. Figure 7 and Figure 8 The pixel circuit shown is working. The following will combine... Figure 8 and Figure 9 The working principle of the pixel circuit provided in the embodiments of the present invention will be explained. Exemplarily, the operation of the pixel circuit within a display frame includes at least an initialization phase P1, a data writing and threshold compensation phase P2, and a light emission phase P3. After the (n-1)th display frame ends, the nth display frame begins. n is an integer greater than or equal to 2.
[0088] During the initialization phase P1 of the nth display frame, the first scan signal S1, the third scan signal S3, and the light emission control signal EM are at high levels, while the second scan signal S2 is at a low level. The first initialization module 180 and the first switching unit 1401 are turned on, while the second initialization module 190, the data writing module 170, the first light emission control module 1301, the second light emission control module 1302, the threshold compensation module 150, and the second switching unit 1402 are turned off. That is, the first transistor T1 and the seventh transistor T7 are turned on, while the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the eighth transistor T8 are turned off. The first initialization voltage Vref1 is written to the gate of the driving transistor DTFT through the seventh transistor T7, resetting the gate voltage of the driving transistor DTFT to the first initialization voltage Vref1 and controlling the driving transistor DTFT to turn on. The first transistor T1 is turned on, transmitting the second level signal PVGL (low level signal) to the first terminal of the coupling capacitor C1. The coupling capacitor C1 transmits the voltage jump to the first electrode of the light-emitting module 120 through capacitive coupling, thus offsetting the potential rise of the first electrode caused by parasitic capacitance.
[0089] During the data writing and threshold compensation stage P2 of the nth display frame, the first scan signal S1 and the third scan signal S3 are at low levels, the second scan signal S2 is at a high level, and the light emission control signal EM is at a high level. The threshold compensation module 150, the data writing module 170, and the second initialization module 190 are turned on, while the first initialization module 180, the first light emission control module 1301, the second light emission control module 1302, and the second switching unit 1402 are turned off. That is, the first transistor T1, the third transistor T3, the sixth transistor T6, and the eighth transistor T8 are turned on, while the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off. The data voltage Vdata is sequentially written to the gate of the driving transistor DTFT through the sixth transistor T6, the driving transistor DTFT, and the third transistor T3, so that the gate voltage of the driving transistor DTFT is related to both the data voltage Vdata and the threshold voltage of the driving transistor DTFT. At the same time, the gate voltage of the driving transistor DTFT is stored through the storage capacitor Cst. The second initialization voltage Vref2 is written to the first terminal (e.g., anode) of the light-emitting element D1 through the eighth transistor T8, eliminating residual charge from the previous frame. The first transistor T1 is turned on, transmitting the second level signal PVGL (low level signal) to the first terminal of the coupling capacitor C1. The coupling capacitor C1 transmits the voltage jump to the first electrode of the light-emitting module 120 through capacitive coupling, offsetting the potential rise of the first electrode caused by parasitic capacitance.
[0090] During the light-emitting phase P3 of the nth display frame, the first scan signal S1, the second scan signal S2, and the third scan signal S3 are at high levels, while the light-emitting control signal EM is at a low level. The driving module 110, the first light-emitting control module 1301, the second light-emitting control module 1302, and the second switching unit 1402 are turned on, while the first switching unit 1401, the threshold compensation module 150, the data writing module 170, the first initialization module 180, and the second initialization module 190 are turned off. That is, the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the driving transistor DTFT are turned on, while the first transistor T1, the third transistor T3, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 are turned off. The driving transistor DTFT generates a driving current based on its gate voltage, thereby driving the light-emitting element D1 to emit light at a corresponding brightness. During the light-emitting phase P3, since the gate voltage of the driving transistor DTFT is related to both the data voltage Vdata and the threshold voltage of the driving transistor DTFT, it helps to compensate for the influence of the threshold voltage of the driving transistor DTFT on the driving current, thereby improving the display uniformity during the light-emitting phase. The second transistor T2 is turned on, transmitting the first level signal PVGH (high level signal) to the first terminal of the coupling capacitor C1. The coupling capacitor C1 transmits the voltage jump to the first electrode of the light-emitting module 120 through capacitive coupling, thus offsetting the potential drop of the first electrode caused by parasitic capacitance.
[0091] Based on the same inventive concept, embodiments of the present invention also provide a driving method for a pixel circuit, applicable to the pixel circuit provided in any embodiment of the present invention. Figure 10 This is a flowchart of a pixel circuit driving method provided in an embodiment of the present invention. Figure 10 As shown, the driving method of this pixel circuit includes:
[0092] S201. During the initialization phase and the data writing and threshold compensation phase, the coupling elimination module responds to the light emission control signal and transmits the second level signal to the first end of the light emission module to pull down the potential of the first end of the light emission module.
[0093] Continue to refer to Figure 3 and Figure 4 During the initialization phase P1 and the data writing and threshold compensation phase P2, the light emission control signal EM transitions from a low level to a high level, and the light emission control module 130 is turned off. The coupling cancellation module 140 responds to the light emission control signal EM by coupling the second-level signal PVGL to the first terminal of the light emission module 140, thereby pulling down the potential of the first terminal of the light emission module 140.
[0094] S202. During the light-emitting stage, the coupling elimination module responds to the light-emitting control signal and transmits the first level signal to the first end of the light-emitting module to raise the potential of the first end of the light-emitting module.
[0095] Continue to refer to Figure 3 and Figure 4 During the light-emitting phase P3, the light-emitting control signal EM transitions from a high level to a low level, turning on the light-emitting control module 130. The light-emitting control module 130 transmits the first power supply ELVDD to the second terminal of the driver module 110, and the driver module 110 outputs a drive current to drive the light-emitting module 120 to emit light. The coupling cancellation module 140, in response to the light-emitting control signal EM, couples the first level signal PVGH to the second terminal of the light-emitting module 140 to raise the potential of the first terminal of the light-emitting module 140.
[0096] This invention also provides a display panel, which will be discussed further below. Figure 1 and Figure 2 The display panel includes: a substrate 100; a driving circuit layer 200 disposed on the substrate 100, the driving circuit layer 200 including a plurality of pixel circuits provided in any embodiment of the present invention located in the display area and arranged in an array; the driving circuit layer 200 includes a conductive layer 201 and an electrode layer 202 stacked on the substrate 100; the conductive layer 201 includes a light emission control signal line ES and a first wiring LS, the light emission control line ES extending along a first direction X and connected to the pixel circuit; the first wiring LS extending along a second direction Y and connected to the light emission control signal line ES; the electrode layer 202 includes a first electrode A1 of the light emission module, the orthographic projection of the first electrode A1 on the substrate 100 at least partially overlapping the orthographic projection of the first wiring LS on the substrate 100.
[0097] Continue to refer to Figure 1 Optionally, the display panel also includes a border NAA that surrounds the display area;
[0098] The border NAA includes a top border, a bottom border, a side border, and at least one non-right-angle corner. The top border and the bottom border extend along a second direction Y, and the side border extends along a first direction X.
[0099] The display panel also includes a gate driving circuit for driving pixel circuits. The gate driving circuit includes a light emission control circuit and a scanning circuit. The light emission control circuit 10 is disposed on the top bezel and side bezel, and the scanning circuit 20 is disposed on the side bezel and non-right-angle corner. The light emission control circuit 10 located on the side bezel is connected to at least one row of pixel circuits via a light emission control signal line ES. The light emission control driving circuit 10 located on the top bezel is connected to the light emission control signal line ES via a first wiring LS.
[0100] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A pixel circuit, characterized in that, include: The module consists of a driver module, a light-emitting module, a light-emitting control module, and a coupling elimination module. The light-emitting control module, the driving module, and the light-emitting module are connected between the first power supply and the second power supply. The light-emitting control module is used to control the light-emitting module to emit light according to the driving current output by the driving module according to the light-emitting control signal. The control terminal of the coupling cancellation module is connected to the light emission control signal, the first input terminal of the coupling cancellation module is connected to the first level signal, the second input terminal of the coupling cancellation module is connected to the second level signal, and the output terminal of the coupling cancellation module is connected to the first terminal of the light emission module. The coupling cancellation module is used to respond to the light emission control signal during the initialization phase and the data writing and threshold compensation phase by coupling the second level signal to the first terminal of the light emission module to pull down the potential of the first terminal of the light emission module. In response to the light emission control signal during the light emission phase, the first level signal is coupled to the first terminal of the light emission module to raise the potential of the first terminal of the light emission module.
2. The pixel circuit according to claim 1, characterized in that, The coupling elimination module includes a coupling unit, a first switching unit, and a second switching unit; The control terminal of the first switching unit is connected to the light emission control signal, the first terminal of the first switching unit is connected to the second level signal, and the second terminal of the first switching unit is connected to the first terminal of the coupling unit. The first switching unit is used to respond to the light emission control signal and transmit the second level signal to the first terminal of the coupling unit. The control terminal of the second switching unit is connected to the light emission control signal, the first terminal of the second switching unit is connected to the first level signal, and the second terminal of the second switching unit is connected to the first terminal of the coupling unit. The second switching unit is used to respond to the light emission control signal and transmit the first level signal to the first terminal of the coupling unit. The second end of the coupling unit is connected to the first end of the light-emitting module, and is used to couple the potential of the first end of the coupling unit to the first end of the light-emitting module.
3. The pixel circuit according to claim 2, characterized in that, The first switching unit includes a first transistor, and the second switching unit includes a second transistor. The gate of the first transistor serves as the control terminal of the first switching unit, the first electrode of the first transistor serves as the first terminal of the first switching unit, and the second electrode of the first transistor serves as the second terminal of the first switching unit. The gate of the second transistor serves as the control terminal of the second switching unit, the first terminal of the second transistor serves as the second terminal of the second switching unit, and the second terminal of the second transistor serves as the second terminal of the second switching unit. The first transistor and the second transistor have different channel types; Preferably, the first transistor is an N-channel transistor, and the second transistor is a P-channel transistor.
4. The pixel circuit according to claim 2, characterized in that, The coupling unit includes a coupling capacitor, with the first end of the coupling capacitor serving as the first end of the coupling unit and the second end of the coupling capacitor serving as the second end of the coupling unit.
5. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes a threshold compensation module; The first end of the threshold compensation module is connected to the first end of the drive module, and the second end of the threshold compensation module is connected to the control end of the drive module. The threshold compensation module is used to perform threshold compensation on the drive module according to the first scan signal. Preferably, the threshold compensation module includes a third transistor, which is a dual-gate transistor, and the third transistor includes a first sub-transistor and a second sub-transistor; The first terminal of the first sub-transistor is connected to the second terminal of the driving module, the second terminal of the first sub-transistor is connected to the first terminal of the second sub-transistor, the first terminal of the second sub-transistor is connected to the control terminal of the driving module, and the gate of the second sub-transistor is connected to the first scan signal; Preferably, the pixel circuit further includes a storage module; The first end of the storage module is connected to the first power supply, and the second end of the storage module is connected to the control end of the drive module for storing the voltage of the control end of the drive module; Preferably, the storage module includes a storage capacitor, with a first end of the storage capacitor serving as the first end of the storage module and a second end of the storage capacitor serving as the second end of the storage module.
6. The pixel circuit according to claim 1, characterized in that, The light-emitting control module includes a first light-emitting control module and a second light-emitting control module; The first light-emitting control module is connected between the first power supply and the second end of the driving module, the second light-emitting control module is connected between the first end of the driving module and the first end of the light-emitting module, the second end of the light-emitting module is connected to the second power supply, and the control terminals of the first light-emitting control module and the second light-emitting module are connected to the light-emitting control signal. Preferably, the first light-emitting control module includes a fourth transistor, the gate of the fourth transistor is connected to the light-emitting control signal, the first terminal of the fourth transistor is connected to the first power supply, and the second terminal of the fourth transistor is connected to the first terminal of the driving module; The second light-emitting control module includes a fifth transistor, the gate of which is connected to the light-emitting control signal, the first terminal of which is connected to the second terminal of the driving module, and the second terminal of which is connected to the first terminal of the light-emitting module.
7. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes a data writing module; The control terminal of the data writing module is connected to the first scan signal, the first terminal of the data writing module is connected to the data voltage, and the second terminal of the data writing module is connected to the first terminal of the driving module. Preferably, the pixel circuit further includes a first initialization module, the control terminal of the first initialization module is connected to a second scan signal, the first terminal of the first initialization module is connected to a first initialization signal, and the second terminal of the first initialization module is connected to the control terminal of the driving module. Preferably, the pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to a third scanning signal, the first terminal of the second initialization module is connected to a second initialization signal, and the second terminal of the second initialization module is connected to the first terminal of the light-emitting module; Preferably, the data writing module includes a sixth transistor, the gate of the sixth transistor serves as the control terminal of the data writing module, the first electrode of the sixth transistor serves as the first terminal of the data writing module, and the second electrode of the sixth transistor serves as the second terminal of the data writing module. Preferably, the first initialization module includes a seventh transistor, which is a dual-gate transistor, and the seventh transistor includes a third sub-transistor and a fourth sub-transistor; The first terminal of the third sub-transistor is connected to the control terminal of the driving module, the second terminal of the third sub-transistor is connected to the first terminal of the fourth sub-transistor, the first terminal of the fourth sub-transistor is connected to the first initialization signal, and the gate of the fourth sub-transistor is connected to the second scan signal. Preferably, the second initialization module includes an eighth transistor, the gate of the eighth transistor serves as the control terminal of the second initialization module, the first terminal of the eighth transistor serves as the first terminal of the second initialization module, and the second terminal of the eighth transistor serves as the second terminal of the second initialization module.
8. A driving method for a pixel circuit, characterized in that, The pixel circuit includes a driving module, a light-emitting module, a light-emitting control module, and a coupling elimination module; The light-emitting control module, the driving module, and the light-emitting module are connected between the first power supply and the second power supply. The light-emitting control module is used to control the light-emitting module to emit light according to the driving current output by the driving module according to the light-emitting control signal. The control terminal of the coupling cancellation module is connected to the light emission control signal, the first terminal of the coupling cancellation module is connected to a first level signal and a second level signal, and the second terminal of the coupling cancellation module is connected to the first terminal of the light emission module; The driving method includes: During the initialization phase and the data writing and threshold compensation phase, the coupling elimination module responds to the light emission control signal and transmits the second level signal to the first terminal of the light emission module to pull down the potential of the first terminal of the light emission module; During the light emission stage, the coupling cancellation module responds to the light emission control signal by transmitting the first level signal to the first terminal of the light emission module to raise the potential of the first terminal of the light emission module.
9. A display panel, characterized in that, include: Substrate; A driving circuit layer disposed on the substrate, the driving circuit layer including a plurality of pixel circuits as described in any one of claims 1-7 located in the display area and arranged in an array; the driving circuit layer including a conductive layer and an electrode layer stacked on the substrate; The conductive layer includes a light-emitting control signal line and a first wiring. The light-emitting control signal line extends along a first direction and is connected to the pixel circuit. The first wiring extends along a second direction and is connected to the light-emitting control signal line. The electrode layer includes a first electrode of the light-emitting module, wherein the orthographic projection of the first electrode on the substrate at least partially overlaps with the orthographic projection of the first wiring on the substrate.
10. The display panel according to claim 9, characterized in that, It also includes a border surrounding the display area; The border includes a top border, a bottom border, a side border, and at least one non-right-angle corner. The top border and the bottom border extend along the second direction, and the side border extends along the first direction. The display panel further includes a gate driving circuit for driving the pixel circuit. The gate driving circuit includes a light emission control circuit and a scanning circuit. The light emission control circuit is disposed on the upper frame and the side frame, and the scanning circuit is disposed on the side frame and the non-right-angle corner. The light-emitting control circuit located on the side frame is connected to at least one row of pixel circuits via the light-emitting control signal line; The light-emitting control driving circuit located on the upper frame is connected to the light-emitting control signal line through the first wiring.
