Display panel, driving method thereof, and display device
Patent Information
- Application Number
- CN202510550696.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2026-10-30
AI Technical Summary
[0003]但目前的OLED显示面板的使用性能有待提升
[0071]本发明实施例的技术方案,在所有发光颜色的子像素中,至少两种不同发光颜色的子像素对应的像素电路连接的电源线不同,不同电源线传输的电源电压不同,从而使得至少两种不同发光颜色的子像素对应的像素电路接入不同的电源电压。例如开口率最小的子像素对应的像素电路连接的电源线,与其余子像素对应的像素电路连接的电源线不同。对于连接不同电源线的像素电路,像素电路对应的子像素的开口率越小,像素电路接入的电源电压越小,使得开口率最小的子像素对应的像素电路接入的电源电压最小,进而使得开口率最小的子像素对应的像素电路需要接入的黑态数据电压可以较小,从而降低显示面板的黑态数据电压。如此,使得显示面板的数据线无需传输较大的电压,从而降低显示面板的功耗,有利于提升显示面板的使用性能。
Smart Images

Figure CN123016902A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and in particular to a display panel and its driving method, and a display device. Background Technology
[0002] With the rapid development of display technology, organic light-emitting display (OLED) products are being used more and more widely.
[0003] However, the performance of current OLED display panels needs improvement. Summary of the Invention
[0004] This invention provides a display panel and its driving method and display device to improve the performance of the display panel.
[0005] According to one aspect of the present invention, a display panel is provided, the display panel comprising: at least two sub-pixels of different luminous colors and at least two pixel circuits;
[0006] The pixel circuit is connected to a power line and a data line respectively. The power line is used to provide power voltage to the pixel circuit, and the data line is used to provide data voltage to the pixel circuit.
[0007] The pixel circuit is connected to the sub-pixel, and the pixel circuit is used to generate a driving current according to the data voltage to drive the corresponding sub-pixel to emit light;
[0008] Among them, the aperture ratios of the sub-pixels with different emission colors are different. Among all the sub-pixels with different emission colors, the power supply lines connected to the pixel circuits corresponding to at least two different emission colors are different, so that the pixel circuits corresponding to the at least two different emission colors are connected to different power supply voltages. Among them, for pixel circuits connected to different power supply lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power supply voltage connected to the pixel circuit.
[0009] Optionally, the display panel includes at least a first light-emitting color sub-pixel and a second light-emitting color sub-pixel, wherein the aperture ratio of the first light-emitting color sub-pixel is greater than the aperture ratio of the second light-emitting color sub-pixel; the power line includes a first power line and a second power line.
[0010] The pixel circuit corresponding to the sub-pixel of the first emitting color is connected to the first power line; the first power line is used to provide a first power supply voltage to the pixel circuit corresponding to the sub-pixel of the first emitting color.
[0011] The pixel circuit corresponding to the sub-pixel of the second emitting color is connected to the second power line; the second power line is used to provide a second power supply voltage to the pixel circuit corresponding to the sub-pixel of the second emitting color.
[0012] The first power supply voltage is greater than the second power supply voltage;
[0013] Preferably, the first emitting color sub-pixel is a red sub-pixel or a blue sub-pixel, and the second emitting color sub-pixel is a green sub-pixel.
[0014] Optionally, the display panel further includes sub-pixels of a third emitting color;
[0015] The aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the second emitting color; the aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the first emitting color.
[0016] The pixel circuit corresponding to the sub-pixel of the third emitting color is connected to the first power line; the first power line is used to provide a first power supply voltage to the pixel circuit corresponding to the sub-pixel of the third emitting color.
[0017] Preferably, the first luminous color sub-pixel is a red sub-pixel, the third luminous color sub-pixel is a blue sub-pixel, and the second luminous color sub-pixel is a green sub-pixel.
[0018] Optionally, the display panel further includes sub-pixels of a third emitting color;
[0019] The aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the second emitting color; the aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the first emitting color.
[0020] The power line also includes a third power line;
[0021] The pixel circuit corresponding to the sub-pixel of the third emitting color is connected to the third power line; the third power line is used to provide a third power voltage to the pixel circuit corresponding to the sub-pixel of the third emitting color.
[0022] Wherein, the third power supply voltage is greater than the first power supply voltage, and the first power supply voltage is greater than the second power supply voltage;
[0023] Preferably, the first luminous color sub-pixel is a red sub-pixel, the third luminous color sub-pixel is a blue sub-pixel, and the second luminous color sub-pixel is a green sub-pixel.
[0024] Optionally, the pixel circuit includes:
[0025] A driving module, which is connected to the sub-pixel, is used to generate a driving current;
[0026] A data writing module is connected between the data line and the driving module. The control terminal of the data writing module is connected to the first scan line. The data writing module is used to transmit the data voltage on the data line to the driving module in response to the effective level of the first scan signal on the first scan line. The transistor type in the data writing module is the same as the transistor type in the driving module. The effective level of the first scan signal is less than the ineffective level of the first scan signal.
[0027] A threshold compensation module is connected between the second end of the driving module and the control end of the driving module. The control end of the threshold compensation module is connected to the second scan line. The threshold compensation module is used to perform threshold compensation on the driving module in response to the second scan signal on the second scan line.
[0028] Preferably, the driving module includes a driving transistor, and the threshold compensation module includes a threshold compensation transistor;
[0029] The display panel also includes a substrate;
[0030] The first scan line is located on one side of the substrate;
[0031] The control electrode of the driving transistor is connected to the second electrode of the threshold compensation transistor via a connecting line, the connecting line being located on the side of the first scan line away from the substrate; the orthographic projection of the connecting line onto the substrate overlaps with the orthographic projection of the first scan line onto the substrate to form a first capacitor;
[0032] Preferably, the capacitance of the first capacitor is less than 4 fenfa;
[0033] Preferably, the capacitance of the first capacitor is greater than or equal to 1 fenfarad and less than 4 fenfarads;
[0034] Preferably, the capacitance of the first capacitor is greater than or equal to 2 fenfarats and less than 4 fenfarats.
[0035] Optionally, the first end of the data writing module is connected to the data line, and the second end of the data writing module is connected to the first end of the driver module;
[0036] Preferably, the data writing module is used to transmit the data voltage on the data line to the control terminal of the drive module during the data writing and threshold compensation stages;
[0037] The threshold compensation module is used to perform threshold compensation on the driving module during the data writing and threshold compensation phases.
[0038] Preferably, the pixel circuit further includes:
[0039] A first reset module is connected between a first reset signal line and a first terminal of the threshold compensation module. The control terminal of the first reset module is connected to a third scan line. The first reset module is used to transmit the first reset voltage on the first reset signal line to the control terminal of the drive module through the threshold compensation module during the first reset phase.
[0040] Preferably, the pixel circuit further includes:
[0041] A light-emitting control module is provided, wherein the light-emitting control module is connected to the driving module between the power line and the first end of the sub-pixel, the control terminal of the light-emitting control module is connected to the light-emitting control line, and the light-emitting control module is used to control whether the driving module generates a driving current.
[0042] Preferably, the light-emitting control module is used to control the driving module to generate a driving current during the light-emitting stage;
[0043] Preferably, the pixel circuit further includes:
[0044] The second reset module is connected between the second reset signal line and the first end of the sub-pixel. The control terminal of the second reset module is connected to the fourth scan line. The second reset module is used to respond to the fourth scan signal on the fourth scan line and transmit the second reset voltage on the second reset signal line to the first end of the sub-pixel.
[0045] Preferably, the second reset module is used to transmit the second reset voltage on the second reset signal line to the first end of the sub-pixel during the second reset phase;
[0046] Preferably, the pixel circuit further includes:
[0047] A storage module is connected between the control terminal of the drive module and the power line;
[0048] Preferably, the pixel circuit further includes:
[0049] The third reset module is connected between the third reset signal line and the second terminal of the drive module. The control terminal of the third reset module is connected to the fourth scan line. The third reset module is used to respond to the fourth scan signal on the fourth scan line and transmit the third reset voltage on the third reset signal line to the second terminal of the drive module.
[0050] Preferably, during the second reset phase, the third reset module transmits the third reset voltage on the third reset signal line to the second terminal of the drive module;
[0051] Preferably, the first reset phase is located before the data writing and threshold compensation phases;
[0052] The second reset phase is located between the data writing and threshold compensation phase and the light emission phase.
[0053] Optionally, the driving module includes a driving transistor;
[0054] The data writing module includes a data writing transistor, the control electrode of which is connected to the first scan line, the first electrode of which is connected to the data line, and the second electrode of which is connected to the first electrode of the driving transistor.
[0055] Preferably, the threshold compensation module includes a threshold compensation transistor, the first terminal of the threshold compensation transistor is connected to the second terminal of the driving transistor, the second terminal of the threshold compensation transistor is connected to the control terminal of the driving transistor, and the control terminal of the threshold compensation transistor is connected to the second scan line;
[0056] Preferably, the first reset module includes a first reset transistor, the first terminal of the first reset transistor is connected to the first reset signal line, the second terminal of the first reset transistor is connected to the first terminal of the threshold compensation transistor, and the first reset transistor is connected to the third scan line;
[0057] Preferably, the light emission control module includes a first light emission control transistor and a second light emission control transistor. The first terminal of the first light emission control transistor is connected to a power supply line, and the second terminal of the first light emission control transistor is connected to the first terminal of the driving transistor. The first terminal of the second light emission control transistor is connected to the second terminal of the driving transistor, and the second terminal of the second light emission control transistor is connected to the first end of the corresponding sub-pixel. The control terminals of the first and second light emission control transistors are connected to the light emission control line.
[0058] Preferably, the second reset module includes a second reset transistor, the first terminal of the second reset transistor is connected to the second reset signal line, the second terminal of the second reset transistor is connected to the first end of the sub-pixel, and the control terminal of the second reset transistor is connected to the fourth scan line;
[0059] Preferably, the storage module includes a storage capacitor connected between the power line and the control electrode of the driving transistor;
[0060] Preferably, the third reset module includes a third reset transistor, the first terminal of the third reset transistor is connected to the third reset signal line, the second terminal of the third reset transistor is connected to the second terminal of the driving transistor, and the control terminal of the third reset transistor is connected to the fourth scan line;
[0061] Preferably, both the threshold compensation transistor and the first reset transistor are N-type transistors.
[0062] According to another aspect of the present invention, a driving method for a display panel is provided, the display panel comprising: at least two sub-pixels of different emitting colors and at least two pixel circuits; the pixel circuits are respectively connected to power lines and data lines, and the pixel circuits are connected to the sub-pixels; the aperture ratios of the sub-pixels of different emitting colors are different; the power lines connected to the pixel circuits corresponding to the at least two sub-pixels of different emitting colors are different.
[0063] The driving method for the display panel includes:
[0064] Power voltage is transmitted to each pixel circuit through the power line; wherein, the pixel circuits corresponding to at least two different light-emitting colors are connected to different power voltages; for pixel circuits connected to different power lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power voltage connected to the pixel circuit.
[0065] Data voltage is transmitted to each pixel circuit via the data line.
[0066] Optionally, before transmitting the power supply voltage to each of the pixel circuits via the power line, the method further includes:
[0067] An initial power supply voltage is transmitted to each pixel circuit via the power line; wherein, the pixel circuits corresponding to at least two different light-emitting colors of sub-pixels are connected to different initial power supply voltages;
[0068] Based on the initial black state data voltage, the data voltage is transmitted to each pixel circuit through the data line;
[0069] The external device acquires the actual data voltage of the pixel circuit corresponding to each emitting color sub-pixel under the same grayscale, and adjusts the initial power supply voltage and the initial black state data voltage according to the deviation value between the actual data voltages of the pixel circuits corresponding to sub-pixels of different emitting colors, and then acquires the power supply voltage corresponding to each emitting color sub-pixel.
[0070] According to another aspect of the present invention, a display device is provided, the display device comprising the display panel described in any embodiment of the present invention.
[0071] In this invention, the pixel circuits of at least two different emitting color sub-pixels are connected to different power lines, and these different power lines transmit different power voltages. This allows the pixel circuits of at least two different emitting color sub-pixels to be connected to different power voltages. For example, the power line connected to the pixel circuit of the sub-pixel with the smallest aperture ratio is different from the power lines connected to the pixel circuits of the other sub-pixels. For pixel circuits connected to different power lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power voltage connected to the pixel circuit. This results in the pixel circuit of the sub-pixel with the smallest aperture ratio receiving the smallest power voltage, thus reducing the black-state data voltage required for the pixel circuit of the sub-pixel with the smallest aperture ratio, thereby lowering the black-state data voltage of the display panel. This eliminates the need for the display panel's data lines to transmit large voltages, reducing the power consumption of the display panel and improving its performance.
[0072] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0073] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0074] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;
[0075] Figure 2 This is a schematic diagram of another display panel provided in an embodiment of the present invention;
[0076] Figure 3 This is a schematic diagram of another display panel provided in an embodiment of the present invention;
[0077] Figure 4 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;
[0078] Figure 5 This is a schematic diagram of the layout structure of a display panel provided in an embodiment of the present invention;
[0079] Figure 6 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
[0080] Figure 7 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention;
[0081] Figure 8 This is a flowchart of a driving method for a display panel provided in an embodiment of the present invention;
[0082] Figure 9 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation
[0083] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0084] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0085] As mentioned in the background section, existing OLED display products suffer from performance limitations. The inventors have discovered that this issue arises because OLED display products include a display panel, which comprises sub-pixels and pixel circuits. The pixel circuits are connected to the sub-pixels and drive them to emit light. In related technologies, the display panel may include green, red, and blue sub-pixels, with the green sub-pixels having the smallest aperture ratio. A higher aperture ratio allows the sub-pixel to display black more deeply and whiter light more clearly. A lower aperture ratio requires less driving current when displaying black; that is, when displaying black, the pixel circuit corresponding to the sub-pixel with the lower aperture ratio requires a higher black-state data voltage. Therefore, when displaying black, the pixel circuit corresponding to the green sub-pixel requires a higher black-state data voltage than the pixel circuits corresponding to other colors of sub-pixels. The black state data voltage of the display panel is determined by the maximum value among the black state data voltages required by the pixel circuits corresponding to all sub-pixels. This results in a higher black state data voltage for the display panel, leading to higher power consumption, which affects the battery life and results in poor performance of the display panel.
[0086] To address the aforementioned technical problems, embodiments of the present invention provide a display panel. Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, for reference. Figure 1 The display panel includes: at least two sub-pixels of different luminous colors 110 and at least two pixel circuits 120;
[0087] The pixel circuit 120 is connected to the power line VDD and the data line Data respectively. The power line VDD is used to provide power voltage to the pixel circuit 120, and the data line Data is used to provide data voltage to the pixel circuit 120.
[0088] The pixel circuit 120 is connected to the sub-pixel 110. The pixel circuit 120 is used to generate a driving current according to the data voltage to drive the corresponding sub-pixel 110 to emit light.
[0089] Among them, the aperture ratios of sub-pixels 110 with different emission colors are different. Among all the sub-pixels 110 with different emission colors, the power supply lines VDD connected to the pixel circuits 120 corresponding to at least two different emission colors are different, so that the pixel circuits 120 corresponding to at least two different emission colors are connected to different power supply voltages. Among them, for the pixel circuits 120 connected to different power supply lines VDD, the smaller the aperture ratio of the sub-pixel 110 corresponding to the pixel circuit 120, the smaller the power supply voltage connected to the pixel circuit 120.
[0090] The sub-pixel 110 includes an organic light-emitting diode (OLED). The display panel includes at least two different light-emitting colors of sub-pixels 110, such as red, green, and blue sub-pixels. Alternatively, the display panel includes red, green, blue, and yellow sub-pixels. Or, the display panel includes red, green, blue, and white sub-pixels, etc. This embodiment is not limited to these categories.
[0091] The pixel circuit 120 can be a 2T1C pixel circuit or a variation thereof, or a 7T1C pixel circuit or a variation thereof; no limitation is made here. The power line VDD can provide a power voltage to the pixel circuit 120, which can be positive or negative. The pixel circuit 120 can be connected to the first terminal of the sub-pixel 110. When the power line VDD provides a positive voltage to the pixel circuit 120, the second terminal of the sub-pixel 110 is connected to a negative voltage; when the power line VDD provides a negative voltage to the pixel circuit 120, the second terminal of the sub-pixel 110 is connected to a positive voltage. This allows the power line VDD, the pixel circuit 120, and the sub-pixel 110 to form a circuit, enabling the pixel circuit 120 to drive the sub-pixel 110 to emit light.
[0092] Specifically, among all the sub-pixels 110 of different emitting colors, at least two sub-pixels 110 of different emitting colors have different power lines VDD connected to their corresponding pixel circuits 120. These different power lines VDD transmit different power voltages, thus allowing the pixel circuits 120 of at least two sub-pixels 110 of different emitting colors to be connected to different power voltages. For example, the power line connected to the pixel circuit 120 of the sub-pixel 110 with the smallest aperture ratio is different from the power lines connected to the pixel circuits 120 of the other sub-pixels 110. The power lines connected to the pixel circuits 120 of the other sub-pixels 110 can be the same, or all the power lines connected to the pixel circuits 120 of the other sub-pixels 110 can be different, or at least two sub-pixels 110 of different emitting colors have different power lines VDD connected to their corresponding pixel circuits 120; this is not limited here. The power line VDD can include a first power line VDD1 and a second power line VDD2. Figure 1 The diagram shows a display panel with three types of sub-pixels 110 that emit light in three different colors. The pixel circuit 120 corresponding to one type of sub-pixel 110 is connected to the second power line VDD2, while the pixel circuits 120 corresponding to the other two types of sub-pixels 110 are connected to the first power line VDD1. However, this is not a limitation.
[0093] For pixel circuits 120 connected to different power lines VDD, the smaller the aperture ratio of the sub-pixel 110 corresponding to pixel circuit 120, the smaller the power supply voltage connected to pixel circuit 120. This allows the pixel circuit 120 corresponding to the sub-pixel 110 with a smaller aperture ratio to have a smaller power supply voltage connected to it. For example, the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio has the smallest power supply voltage connected to it. Pixel circuit 120 includes driving transistors. For example, the gate of the driving transistor is connected to a data voltage, and the source of the driving transistor is connected to a power supply voltage. Therefore, the voltage connected to the source of the driving transistor in the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio is the smallest. While ensuring that the gate-source voltage difference of the driving transistor remains unchanged, the data voltage corresponding to the gate of the driving transistor in the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio can be smaller. Thus, when displaying a black screen, the black state data voltage that the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio needs to connect to can be smaller. The black-state data voltage of the display panel is determined based on the black-state data voltage with the highest demand, specifically the black-state data voltage corresponding to the sub-pixel 110 with the smallest aperture ratio. This allows the black-state data voltage of the display panel to be relatively small, thus reducing its overall power consumption. Consequently, the data lines of the display panel do not need to transmit large voltages, thereby reducing the power consumption of the display panel and improving its performance. Furthermore, it reduces the black-state data voltage generated by the power circuitry in the display device, further lowering the power consumption of the display device. Moreover, a lower black-state data voltage means that the power consumption of the driver chip in the display device is also lower when generating data voltages for other gray levels based on the black-state data voltage, further reducing the overall power consumption of the display device.
[0094] Here, the black state data voltage is the data voltage corresponding to displaying a black screen. One display panel corresponds to one black state data voltage, meaning that when displaying a black screen, all pixel circuits obtain the same black state data voltage.
[0095] In this embodiment, the pixel circuits of at least two different emitting color sub-pixels are connected to different power lines, and these different power lines transmit different power voltages. This allows the pixel circuits of at least two different emitting color sub-pixels to access different power voltages. For example, the power line connected to the pixel circuit of the sub-pixel with the smallest aperture ratio is different from the power lines connected to the pixel circuits of the other sub-pixels. For pixel circuits connected to different power lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power voltage accessed by the pixel circuit. This results in the pixel circuit of the sub-pixel with the smallest aperture ratio receiving the smallest power voltage, thus reducing the black-state data voltage required for the pixel circuit of the sub-pixel with the smallest aperture ratio, thereby lowering the black-state data voltage of the display panel. This eliminates the need for the display panel's data lines to transmit large voltages, reducing the power consumption of the display panel and improving its performance.
[0096] Based on the above technical solutions, Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Optionally, refer to... Figure 2 The display panel includes at least a first light-emitting color sub-pixel 111 and a second light-emitting color sub-pixel 112, the aperture ratio of the first light-emitting color sub-pixel 111 is greater than the aperture ratio of the second light-emitting color sub-pixel 112; the power line VDD includes a first power line VDD1 and a second power line VDD2.
[0097] The pixel circuit 120 corresponding to the sub-pixel 111 of the first emitting color is connected to the first power line VDD1; the first power line VDD1 is used to provide a first power supply voltage to the pixel circuit 120 corresponding to the sub-pixel 111 of the first emitting color.
[0098] The pixel circuit 120 corresponding to the sub-pixel 112 of the second emitting color is connected to the second power line VDD2; the second power line VDD2 is used to provide a second power supply voltage to the pixel circuit 120 corresponding to the sub-pixel 112 of the second emitting color.
[0099] The first power supply voltage is greater than the second power supply voltage.
[0100] Thus, the aperture ratio of the sub-pixel 111 of the first emitting color is greater than that of the sub-pixel 112 of the second emitting color, and the first power supply voltage connected to the pixel circuit 120 corresponding to the sub-pixel 111 of the first emitting color is greater than the second power supply voltage connected to the pixel circuit 120 corresponding to the sub-pixel 112 of the second emitting color. This results in a lower power supply voltage connected to the pixel circuit 120 corresponding to the sub-pixel 110 with the smaller aperture ratio, and consequently, a lower black-state data voltage required by the pixel circuit 120 corresponding to the sub-pixel 110 with the smaller aperture ratio. This helps to reduce the black-state data voltage of the display panel, thereby reducing the power consumption of the display panel.
[0101] Optionally, the sub-pixel 111 of the first emitting color is a red sub-pixel or a blue sub-pixel, and the sub-pixel 112 of the second emitting color is a green sub-pixel.
[0102] Specifically, the green sub-pixel has the smallest aperture ratio, which means the power line connected to the pixel circuit 120 corresponding to the sub-pixel with the smallest aperture ratio is different from the power lines connected to the pixel circuits 120 corresponding to the other sub-pixels 110. This results in the smallest power supply voltage being supplied to the pixel circuit 120 corresponding to the sub-pixel with the smallest aperture ratio. Consequently, the black-state data voltage required for the pixel circuit 120 corresponding to the sub-pixel with the smallest aperture ratio can be smaller, thus reducing the black-state data voltage of the display panel. This reduces the need for the display panel's data lines to transmit larger voltages, thereby reducing the display panel's power consumption and improving its performance.
[0103] Based on the above technical solution, the following describes the power lines connecting the pixel circuits corresponding to the sub-pixels that may also be included in the display panel, but this is not intended to limit this application.
[0104] In one implementation, continue to refer to Figure 1 The display panel also includes a sub-pixel 113 of a third luminous color;
[0105] The aperture ratio of the sub-pixel 113 of the third emission color is greater than the aperture ratio of the sub-pixel 112 of the second emission color; the aperture ratio of the sub-pixel 113 of the third emission color is greater than the aperture ratio of the sub-pixel 111 of the first emission color.
[0106] The pixel circuit 120 corresponding to the sub-pixel 113 of the third emitting color is connected to the first power line VDD1; the first power line is used to provide a first power supply voltage to the pixel circuit 120 corresponding to the sub-pixel 113 of the third emitting color.
[0107] Specifically, the aperture ratio of the sub-pixel 113 of the third emitting color is greater than that of the sub-pixel 111 of the first emitting color, and the aperture ratio of the sub-pixel 111 of the first emitting color is greater than that of the sub-pixel 112 of the second emitting color. That is, the aperture ratio of the sub-pixel 112 of the second emitting color is the smallest. The pixel circuit 120 corresponding to the sub-pixel 113 of the third emitting color and the pixel circuit 120 corresponding to the sub-pixel 111 of the first emitting color are both connected to the first power line VDD1, so that the power line connected to the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio is different from the power lines connected to the pixel circuits 120 corresponding to the other sub-pixels 110. This results in the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio receiving the smallest power supply voltage, and the black state data voltage required for the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio can be smaller, thus reducing the black state data voltage of the display panel. This eliminates the need for the display panel's data lines to transmit large voltages, thereby reducing the display panel's power consumption and improving its performance.
[0108] Optionally, the first emission color sub-pixel 111 is a red sub-pixel, the third emission color sub-pixel 113 is a blue sub-pixel, and the second emission color sub-pixel 112 is a green sub-pixel.
[0109] Specifically, the green sub-pixel has the smallest aperture ratio, which makes the power supply voltage connected to the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio the smallest. The black state data voltage that the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio needs to be connected can be smaller, so the black state data voltage of the display panel can be smaller, thereby reducing the black state data voltage of the display panel.
[0110] For example, Table 1 is a schematic table of power supply voltages corresponding to sub-pixels of different emission colors. As shown in Table 1, V1 is the data voltage corresponding to grayscale 1. In related technologies, all sub-pixels have the same power supply voltage. At grayscale 1, the data voltage corresponding to the green sub-pixel is larger. In the technical solution of this embodiment, the power supply voltage corresponding to the green sub-pixel is different from that of the other sub-pixels. At grayscale 1, the data voltage corresponding to the green sub-pixel is smaller, so that the voltage transmitted on the data line is not too large, thereby reducing the power consumption of the display panel.
[0111] Table 1. Power supply voltage diagram for sub-pixels of different emission colors.
[0112]
[0113] In another implementation, Figure 3 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Optionally, refer to... Figure 3The display panel also includes a sub-pixel 113 of a third luminous color;
[0114] The aperture ratio of the sub-pixel 113 of the third emission color is greater than the aperture ratio of the sub-pixel 112 of the second emission color; the aperture ratio of the sub-pixel 113 of the third emission color is greater than the aperture ratio of the sub-pixel 111 of the first emission color.
[0115] The power line VDD also includes a third power line VDD3;
[0116] The pixel circuit 120 corresponding to the sub-pixel 113 of the third emitting color is connected to the third power line VDD3; the third power line VDD3 is used to provide a third power supply voltage to the pixel circuit 120 corresponding to the sub-pixel 113 of the third emitting color.
[0117] Among them, the third power supply voltage is greater than the first power supply voltage, and the first power supply voltage is greater than the second power supply voltage.
[0118] In this way, the pixel circuits 120 corresponding to sub-pixels 110 of different emitting colors are connected to different power lines, meaning that the pixel circuits 120 corresponding to sub-pixels 110 of different emitting colors are all connected to different power supply voltages. Furthermore, the smaller the aperture ratio of a sub-pixel, the smaller the power supply voltage connected to the corresponding pixel circuit 120. This ensures that the pixel circuit 120 corresponding to the sub-pixel with the smallest aperture ratio has the smallest power supply voltage, requiring a smaller black-state data voltage. Consequently, the black-state data voltage of the display panel can be reduced. Moreover, the smaller the aperture ratio of a sub-pixel, the smaller the power supply voltage connected to the corresponding pixel circuit 120. This matching of power supply voltage and sub-pixel aperture ratio ensures that the data voltage connected to the pixel circuits 120 corresponding to sub-pixels of different emitting colors does not differ significantly at the same grayscale. This avoids large brightness differences between sub-pixels of different emitting colors at the same grayscale caused by process deviations, thereby reducing color shift issues and improving the display panel's display effect, further enhancing its performance.
[0119] Optionally, the first emitting color sub-pixel 111 is a red sub-pixel, the third emitting color sub-pixel 113 is a blue sub-pixel, and the second emitting color sub-pixel 112 is a green sub-pixel. This minimizes the power supply voltage connected to the pixel circuit 120 corresponding to the sub-pixel 110 (the second emitting color sub-pixel 112) with the smallest aperture ratio. Consequently, the black-state data voltage required for the pixel circuit 120 corresponding to the sub-pixel 110 with the smallest aperture ratio can be reduced, thus lowering the black-state data voltage of the display panel.
[0120] It should be noted that, Figures 1 to 3This only illustrates the contents of the display panel and does not limit the arrangement of subpixels.
[0121] Based on the above technical solutions, the possible structure of the pixel circuit 120 will be described below, but this is not intended to limit the scope of this application.
[0122] Figure 4 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention. Optionally, refer to... Figure 4 The pixel circuit 120 includes:
[0123] Driving module 121 is connected to sub-pixel 110 and is used to generate driving current.
[0124] A data writing module 122 is connected between the data line Data and the driver module 121. The control terminal of the data writing module 122 is connected to the first scan line S1. The data writing module 122 is used to transmit the data voltage on the data line Data to the driver module 121 in response to the effective level of the first scan signal on the first scan line S1. The transistors in the data writing module 122 are of the same type as those in the driver module 121. The effective level of the first scan signal is less than the ineffective level of the first scan signal.
[0125] The threshold compensation module 123 is connected between the second end of the drive module 121 and the control end of the drive module 121. The control end of the threshold compensation module 123 is connected to the second scan line S2. The threshold compensation module 123 is used to perform threshold compensation on the drive module 121 in response to the second scan signal on the second scan line S2.
[0126] Specifically, when the first scan signal on the first scan line S1 is at an effective level, the control data writing module 122 is turned on, and the second scan signal on the second scan line S2 controls the threshold compensation module 123 to be turned on. When the driving module 121 is turned on, the data writing module 122 transmits the data voltage on the data line Data through the driving module 121 and the threshold compensation module 123 to the control terminal of the driving module 121. This causes the voltage of the driving module 121 to become a voltage related to the data voltage and the threshold voltage of the transistor in the driving module 121, thus realizing data writing and threshold compensation. This allows the driving module 121 to generate a driving current based on the compensated data voltage, ensuring that fluctuations in the threshold voltage of the transistor in the driving module 121 do not affect the driving current generated by the driving module 121, thereby improving the stability of the driving current and enabling the sub-pixel 110 to emit light stably.
[0127] Specifically, the effective level of the first scan signal is lower than the invalid level of the first scan signal; that is, the effective level of the first scan signal is low, and the invalid level of the first scan signal is high. When the first scan signal is low, the data writing module 122 is turned on; when the first scan signal is high, the data writing module 122 is turned off.
[0128] Figure 5 This is a schematic diagram of the layout structure of a display panel provided in an embodiment of the present invention. Optionally, refer to... Figure 5 The driving module 121 includes a driving transistor T1, the data writing module 122 includes a data writing transistor T2, and the threshold compensation module 123 includes a threshold compensation transistor T3.
[0129] The display panel also includes a substrate 101;
[0130] The first scan line S1 is located on one side of the substrate 101;
[0131] The control electrode T11 of the driving transistor T1 is connected to the second electrode of the threshold compensation transistor T3 via the connecting line L1. The connecting line L1 is located on the side of the first scan line S1 away from the substrate 101. The orthographic projection of the connecting line L1 onto the substrate 101 overlaps with the orthographic projection of the first scan line S1 onto the substrate 101 to form a first capacitor C0. The first capacitor C0 is a parasitic capacitance.
[0132] The display panel further includes a first active layer 102 and a second active layer 103 located on a first side of the substrate 101. The portion where the first scan line S1 overlaps with the first active layer 102 forms the gate (control electrode) of the data writing transistor T2, and the portion where the second scan line S2 overlaps with the second active layer 103 forms the gate (control electrode) of the threshold compensation transistor T3. The second scan line S2 includes a first sub-line S21 and a second sub-line S22. The portion where the first sub-line S21 overlaps with the second active layer 103 forms the first gate of the threshold compensation transistor T3, and the portion where the second sub-line S22 overlaps with the second active layer 103 forms the second gate of the threshold compensation transistor T3, making the threshold compensation transistor T3 a dual-gate transistor, which can reduce the leakage current of the control electrode of the driving transistor T1.
[0133] Specifically, the orthogonal projection of the connecting line L1 onto the substrate 101 overlaps with the orthogonal projection of the first scan line S1 onto the substrate 101 to form a first capacitor C0. That is, the first capacitor C0 is connected between the first scan line S1 and the connecting line L1, and the first capacitor C0 is connected between the first scan line S1 and the control electrode of the driving transistor T1.
[0134] Thus, after the data is written, the first scan signal changes from low level to high level, the voltage at one end of the first capacitor C0 connected to the first scan line S1 increases, and the voltage at the other end of the first capacitor C0 also increases. This can raise the voltage of the control electrode (gate) of the driving transistor T1, thereby compensating for the control electrode voltage of the driving transistor T1. This reduces the need for a large data voltage and helps reduce the power consumption of the display panel.
[0135] Optionally, the capacitance of the first capacitor C0 is less than 4 fenfarats. This avoids the first capacitor C0 having an excessively large capacitance, preventing it from coupling a large voltage to the connection line L1 when the first scan signal changes, which would cause the voltage rise of the control electrode (gate) of the driving transistor T1 to be too high and affect the driving current generated by the driving transistor T1.
[0136] Optionally, the capacitance of the first capacitor C0 is greater than or equal to 1 finfarad and less than 4 finfarads. This ensures that the capacitance of the first capacitor C0 is neither too small nor too large, allowing the voltage of the control electrode (gate) of the driving transistor T1 to be increased without affecting the driving current. This reduces the need for a large data voltage and helps reduce the power consumption of the display panel.
[0137] Optionally, the capacitance of the first capacitor C0 is greater than or equal to 2 fenfarads and less than 4 fenfarads. This increases the capacitance of the first capacitor C0, making it larger and thus further reducing the data voltage and power consumption of the display panel. Specifically, the capacitance of the first capacitor C0 can be increased by increasing the overlap area between the orthographic projection of the connecting line L1 on the substrate 101 and the orthographic projection of the first scan line S1 on the substrate 101. For example, the overlap area can be increased by increasing the width of the connecting line L1 and / or the first scan line S1 on the substrate 101.
[0138] Optionally, continue to refer to Figure 4 The first end of the data writing module 122 is connected to the data line Data, and the second end of the data writing module 122 is connected to the first end of the drive module 121. In this way, when the data writing module 122 is turned on, it transmits the data voltage on the data line Data to the first end of the drive module 121, and then through the drive module 121 and the threshold compensation module 123 to the control end of the drive module 121.
[0139] Optionally, the data writing module 122 is used to transmit the data voltage on the data line Data to the control terminal of the drive module 121 during the data writing and threshold compensation stages.
[0140] The threshold compensation module 123 is used to perform threshold compensation on the driver module 121 during the data writing and threshold compensation stages.
[0141] Specifically, during the data writing and threshold compensation stages, the driving module 121 is turned on, the first scan signal on the first scan line S1 controls the data writing module 122 to turn on, and the second scan signal on the second scan line S2 controls the threshold compensation module 123 to turn on. The data writing module 122 transmits the data voltage on the data line Data to the first terminal of the driving module 121. The data voltage charges the control terminal of the driving module 121 through the driving module 121 and the threshold compensation module 123, making the voltage of the driving module 121 related to the data voltage and the threshold voltage of the transistor in the driving module 121, thus realizing data writing and threshold compensation. This allows the driving module 121 to generate a driving current based on the compensated data voltage, ensuring that fluctuations in the threshold voltage of the transistor in the driving module 121 do not affect the driving current generated by the driving module 121, thereby improving the stability of the driving current and enabling the sub-pixel 110 to emit light stably.
[0142] Optionally, continue to refer to Figure 4 The pixel circuit 120 also includes:
[0143] The first reset module 124 is connected between the first reset signal line Vref1 and the first terminal of the threshold compensation module 123. The control terminal of the first reset module 124 is connected to the third scan line S3. The first reset module 124 is used to transmit the first reset voltage on the first reset signal line Vref1 through the threshold compensation module 123 to the control terminal of the drive module 121 during the first reset phase.
[0144] Specifically, in the first reset phase, the third scan signal on the third scan line S3 controls the first reset module 124 to turn on, and the second scan signal on the second scan line S2 controls the threshold compensation module 123 to turn on. The first reset module 124 transmits the first reset voltage on the first reset signal line Vref1 through the threshold compensation module 123 to the control terminal of the drive module 121 to reset the control terminal of the drive module 121, thereby clearing the residual charge on the control terminal of the drive module 121.
[0145] Optionally, continue to refer to Figure 4 The pixel circuit 120 also includes:
[0146] The light emission control module 125 is connected to the driving module 121 between the power line VDD and the first end of the sub-pixel 110. The control terminal of the light emission control module 125 is connected to the light emission control line EM. The light emission control module 125 is used to control whether the driving module 121 generates a driving current.
[0147] In this embodiment, the second end of sub-pixel 110 is connected to the fourth power supply VSS. Sub-pixel 110 includes an organic light-emitting diode (OLED). The first end of sub-pixel 110 can be the anode of the OLED, and the second end of sub-pixel 110 can be the cathode of the OLED; or, the first end of sub-pixel 110 can be the cathode of the OLED, and the second end of sub-pixel 110 can be the anode of the OLED. This embodiment does not impose any limitations.
[0148] Specifically, when the light emission control signal on the light emission control line EM controls the light emission control module 125 to be turned on, the power supply line VDD, the light emission control module 125, the driving module 121, the sub-pixel 110 and the fourth power supply VSS form a current loop, thereby causing the driving module 121 to generate a driving current and drive the sub-pixel 110 to emit light.
[0149] Optionally, the light-emitting control module 125 is used to control the driving module 121 to generate a driving current during the light-emitting phase. This causes the driving module 121 to generate a driving current during the light-emitting phase, driving the sub-pixel 110 to emit light.
[0150] Optionally, continue to refer to Figure 4 The pixel circuit 120 also includes:
[0151] The second reset module 126 is connected between the second reset signal line Vref2 and the first end of the sub-pixel 110. The control terminal of the second reset module 126 is connected to the fourth scan line S4. The second reset module 126 is used to respond to the fourth scan signal on the fourth scan line S4 and transmit the second reset voltage on the second reset signal line Vref2 to the first end of the sub-pixel 110.
[0152] Specifically, when the fourth scan signal on the fourth scan line S4 controls the second reset module 126 to be turned on, the second reset module 126 transmits the second reset voltage on the second reset signal line Vref2 to the first end of the sub-pixel 110 to reset the first end of the sub-pixel 110, so as to avoid the residual charge at the first end of the sub-pixel 110 from affecting the light emission brightness of the sub-pixel 110.
[0153] Optionally, the second reset module 126 is used to transmit the second reset voltage on the second reset signal line Vref2 to the first end of the sub-pixel 110 during the second reset phase. Thus, during the second reset phase, the second reset module 126 resets the first end of the sub-pixel 110.
[0154] Optionally, continue to refer to Figure 4 The pixel circuit 120 also includes:
[0155] Storage module 127 is connected between the control terminal of drive module 121 and power line VDD.
[0156] Specifically, the first end of the storage module 127 is connected to the power line VDD, that is, the first end of the storage module 127 has a fixed voltage and the voltage stored in the storage module 127 remains unchanged, thereby keeping the voltage at the second end of the storage module 127 unchanged, thereby maintaining the voltage at the control end of the drive module 121, so that the drive module 121 can stably generate drive current.
[0157] Optionally, continue to refer to Figure 4 The pixel circuit 120 also includes:
[0158] The third reset module 128 is connected between the third reset signal line Vref3 and the second terminal of the drive module 121. The control terminal of the third reset module 128 is connected to the fourth scan line S4. The third reset module 128 is used to respond to the fourth scan signal on the fourth scan line S4 and transmit the third reset voltage on the third reset signal line Vref3 to the second terminal of the drive module 121.
[0159] Specifically, when the fourth scan signal on the fourth scan line S4 controls the third reset module 128 to be turned on, the third reset module 128 transmits the third reset voltage on the third reset signal line Vref3 to the second terminal of the drive module 121 to reset the second terminal of the drive module 121. This prevents the drive module 121 from being in a conducting state for a long time, which would cause changes in the characteristics of the transistors in the drive module 121. In other words, it improves the bias state of the transistors in the drive module 121, thereby ensuring that the drive module 121 can generate drive current better.
[0160] Furthermore, the third reset module 128 and the second reset module 126 share the fourth scan line S4, which can reduce the number of traces and help improve the pixel density of the display panel.
[0161] Optionally, during the second reset phase, the third reset module 128 transmits the third reset voltage on the third reset signal line Vref3 to the second terminal of the drive module 121. This causes the third reset module 128 to reset the second terminal of the drive module 121 during the second reset phase.
[0162] Optionally, the first reset phase occurs before the data writing and threshold compensation phases;
[0163] The second reset phase is located between the data writing and threshold compensation phase and the light emission phase.
[0164] This configuration allows the control terminal of the driver module 121 to be reset before writing data voltage to it, preventing residual charge on the control terminal from interfering with the written data voltage. Furthermore, resetting the second terminal of the driver module 121 before the light-emitting stage improves the bias state of the transistors in the driver module 121, allowing it to generate drive current more effectively. Finally, resetting the first terminal of the sub-pixel 110 before the light-emitting stage clears residual charge from the first terminal, enabling the sub-pixel 110 to emit light more efficiently.
[0165] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Optionally, refer to... Figure 6 The drive module 121 includes a drive transistor T1;
[0166] The data writing module 122 includes a data writing transistor T2. The control electrode of the data writing transistor T2 is connected to the first scan line S1. The first electrode of the data writing transistor T2 is connected to the data line Data. The second electrode of the data writing transistor T2 is connected to the first electrode of the driving transistor T1.
[0167] Among them, the driving transistor T1 can be either an N-type transistor or a P-type transistor. Figure 6 The diagram illustrates the case where the driving transistor T1 is a P-type transistor, but this is not a limitation. The data writing transistor T2 can be either an N-type or a P-type transistor. Figure 6 The illustration shows a case where the data writing transistor T2 is a P-type transistor, but this is not a limitation. Preferably, both the driving transistor T1 and the data writing transistor T2 are P-type transistors, such that the effective level of the first scan signal on the first scan line S1 is low, and the ineffective level of the first scan signal is high. After data writing, the first scan signal changes from an effective level to an ineffective level, which can raise the voltage of the control electrode (gate) of the driving transistor T1, thereby reducing the data voltage and thus lowering the power consumption of the display panel.
[0168] For example, the first terminal of driving transistor T1 is the source, and the second terminal of driving transistor T1 is the drain; or, the first terminal of driving transistor T1 is the drain, and the second terminal of driving transistor T1 is the source. The first terminal of data writing transistor T2 is the source, and the second terminal of data writing transistor T2 is the drain; or, the first terminal of data writing transistor T2 is the drain, and the second terminal of data writing transistor T2 is the source. This embodiment does not impose any limitations.
[0169] Specifically, during the data writing and threshold compensation phase, the data writing transistor T2 is turned on, transmitting the data voltage on the data line Data to the driving transistor T1 to achieve data writing.
[0170] Optionally, refer to Figure 6 The threshold compensation module 123 includes a threshold compensation transistor T3. The first terminal of the threshold compensation transistor T3 is connected to the second terminal of the driving transistor T1. The second terminal of the threshold compensation transistor T3 is connected to the control terminal of the driving transistor T1. The control terminal of the threshold compensation transistor T3 is connected to the second scan line S2.
[0171] In this embodiment, the first electrode of the threshold compensation transistor T3 is the source, and the second electrode of the threshold compensation transistor T3 is the drain; or, the first electrode of the threshold compensation transistor T3 is the drain, and the second electrode of the threshold compensation transistor T3 is the source. This embodiment does not limit the specific electrode.
[0172] Specifically, during the data writing and threshold compensation stages, the driving transistor T1 is turned on, the data writing transistor T2 is turned on, and the threshold compensation transistor T3 is turned on. The data writing transistor T2 transmits the data voltage on the data line Data to the control electrode (gate) of the driving transistor T1 through the driving transistor T1 and the threshold compensation transistor T3. In other words, the data voltage on the data line Data is transmitted to the control electrode (gate) of the driving transistor T1 after threshold compensation, thus realizing data writing and threshold compensation.
[0173] Optionally, refer to Figure 6 The first reset module 124 includes a first reset transistor T4, the first terminal of the first reset transistor T4 is connected to the first reset signal line Vref1, the second terminal of the first reset transistor T4 is connected to the first terminal of the threshold compensation transistor T3, and the first reset transistor T4 is connected to the third scan line S3.
[0174] In this embodiment, the first electrode of the first reset transistor T4 is the source, and the second electrode of the first reset transistor T4 is the drain; or, the first electrode of the first reset transistor T4 is the drain, and the second electrode of the first reset transistor T4 is the source. This embodiment does not limit the specific electrode.
[0175] Specifically, when the third scan signal on the third scan line S3 controls the first reset transistor T4 to turn on, and the second scan signal on the second scan line S2 controls the threshold compensation transistor T3 to turn on, the first reset transistor T4 transmits the first reset voltage on the first reset signal line Vref1 through the threshold compensation transistor T3 to the control electrode (gate) of the driving transistor T1, thereby resetting the control electrode (gate) of the driving transistor T1.
[0176] Optionally, refer to Figure 6The light emission control module 125 includes a first light emission control transistor T5 and a second light emission control transistor T6. The first terminal of the first light emission control transistor T5 is connected to the power supply line VDD, and the second terminal of the first light emission control transistor T5 is connected to the first terminal of the driving transistor T1. The first terminal of the second light emission control transistor T6 is connected to the second terminal of the driving transistor T1, and the second terminal of the second light emission control transistor T6 is connected to the first terminal of the corresponding sub-pixel 110. The control terminals of the first light emission control transistor T5 and the second light emission control transistor T6 are connected to the light emission control line EM.
[0177] In this embodiment, the first electrode of the first light-emitting control transistor T5 is the source, and the second electrode of the first light-emitting control transistor T5 is the drain; or, the first electrode of the first light-emitting control transistor T5 is the drain, and the second electrode of the first light-emitting control transistor T5 is the source. The first electrode of the second light-emitting control transistor T6 is the source, and the second electrode of the second light-emitting control transistor T6 is the drain; or, the first electrode of the second light-emitting control transistor T6 is the drain, and the second electrode of the second light-emitting control transistor T6 is the source. The first light-emitting control transistor T5 can be an N-type transistor or a P-type transistor. The second light-emitting control transistor T6 can be an N-type transistor or a P-type transistor. Figure 6 The diagram shows the case where the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are P-type transistors, but this is not a limitation.
[0178] Specifically, when the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on, the power line VDD, the first light-emitting control transistor T5, the driving transistor T1, the second light-emitting control transistor T6, the sub-pixel 110 and the fourth power supply VSS form a current path, causing the driving transistor T1 to generate a driving current and drive the sub-pixel 110 to emit light.
[0179] Optionally, refer to Figure 6 The second reset module 126 includes a second reset transistor T7. The first terminal of the second reset transistor T7 is connected to the second reset signal line Vref2, the second terminal of the second reset transistor T7 is connected to the first end of the sub-pixel 110, and the control terminal of the second reset transistor T7 is connected to the fourth scan line S4.
[0180] In this embodiment, the first terminal of the second reset transistor T7 is the source, and the second terminal is the drain; or, the first terminal of the second reset transistor T7 is the drain, and the second terminal is the source. This embodiment does not impose a limitation on either type. The second reset transistor T7 can be an N-type transistor or a P-type transistor. Figure 6The diagram illustrates the case where the second reset transistor T7 is a P-type transistor, but this is not a limitation. Sub-pixel 110 includes an organic light-emitting diode (OLED).
[0181] Specifically, in the second reset stage, the fourth scan signal on the fourth scan line S4 controls the second reset transistor T7 to turn on, and the second reset transistor T7 transmits the second reset voltage on the second reset signal line Vref2 to the first end of the sub-pixel 110 to reset the first end of the sub-pixel 110.
[0182] Optionally, refer to Figure 6 The storage module 127 includes a storage capacitor Cst, which is connected between the power supply line VDD and the control electrode of the driving transistor T1. Thus, the storage capacitor Cst can maintain the potential of the control electrode of the driving transistor T1, enabling the driving transistor T1 to stably generate a driving current.
[0183] Optionally, refer to Figure 6 The third reset module 128 includes a third reset transistor T8. The first terminal of the third reset transistor T8 is connected to the third reset signal line Vref3, the second terminal of the third reset transistor T8 is connected to the second terminal of the driving transistor T1, and the control terminal of the third reset transistor T8 is connected to the fourth scan line S4.
[0184] In this embodiment, the first terminal of the third reset transistor T8 is the source, and the second terminal is the drain; or, the first terminal of the third reset transistor T8 is the drain, and the second terminal is the source. This embodiment does not impose a limitation on this. The third reset transistor T8 can be an N-type transistor or a P-type transistor. Figure 6 The example shows the case where the third reset transistor T8 is a P-type transistor, but it is not limited to that case.
[0185] Specifically, in the second reset stage, the fourth scan signal on the fourth scan line S4 controls the third reset transistor T8 to turn on. The third reset transistor T8 transmits the third reset voltage on the third reset signal line Vref3 to the second terminal of the driving transistor T1, resetting the second terminal of the driving transistor T1, improving the bias state of the driving transistor T1, and making it easier for the driving transistor T1 to generate driving current better.
[0186] Optionally, refer to Figure 6 Both the threshold compensation transistor T3 and the first reset transistor T4 are N-type transistors. This configuration reduces the leakage current at the control electrode of the driving transistor T1, thereby stabilizing the voltage at the control electrode of the driving transistor T1. This, in turn, allows the driving transistor T1 to stably generate driving current, enabling the sub-pixel 110 to emit light stably and improving the display effect of the display panel.
[0187] Optionally, refer to Figure 6 The third reset transistor T8 is a dual-gate transistor. This can reduce the leakage current of the drive transistor T1, making it easier to maintain the drive current.
[0188] Figure 7 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention, for reference. Figure 6 and Figure 7 The driving process of the pixel circuit includes the following stages.
[0189] In the first reset phase t1, the third scan signal Scan3 on the third scan line S3 is high, and the first reset transistor T4 is turned on. The second scan signal Scan2 on the second scan line S2 is high, and the threshold compensation transistor T3 is turned on. The first reset transistor T4 transmits the first reset voltage on the first reset signal line Vref1 through the threshold compensation transistor T3 to the control electrode (gate) of the driving transistor T1, thereby resetting the control electrode (gate) of the driving transistor T1. Furthermore, the first reset voltage is relatively small, which allows the driving transistor T1 to turn on.
[0190] During the data writing and threshold compensation phase t2, the driving transistor T1 is turned on, the second scan signal Scan2 on the second scan line S2 is high, and the threshold compensation transistor T3 is turned on. The first scan signal Scan1 on the first scan line S1 is low, and the data writing transistor T2 is turned on. The data writing transistor T2 transmits the data voltage on the data line Data through the driving transistor T1 and the threshold compensation transistor T3 to the control electrode (gate) of the driving transistor T1. In other words, the data voltage on the data line Data is transmitted to the control electrode (gate) of the driving transistor T1 after threshold compensation, thus realizing data writing and threshold compensation.
[0191] During the second reset phase t3, the fourth scan signal Scan4 on the fourth scan line S4 is at a low level, and the second reset transistor T7 and the third reset transistor T8 are turned on. The second reset transistor T7 transmits the second reset voltage on the second reset signal line Vref2 to the first terminal of the sub-pixel 110, resetting the first terminal of the sub-pixel 110. The third reset transistor T8 transmits the third reset voltage on the third reset signal line Vref3 to the second terminal of the driving transistor T1, resetting the second terminal of the driving transistor T1, improving the bias state of the driving transistor T1, and facilitating the driving transistor T1 to generate driving current better.
[0192] During the light-emitting stage t4, the light-emitting control signal Em on the light-emitting control line EM is at a low level, and the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on. The power line VDD, the first light-emitting control transistor T5, the driving transistor T1, the second light-emitting control transistor T6, the sub-pixel 110 and the fourth power supply VSS form a current path, which causes the driving transistor T1 to generate a driving current, driving the sub-pixel 110 to emit light.
[0193] This invention also provides a driving method for a display panel, wherein the display panel is any of the display panels provided in any embodiment of this invention. Figure 8 This is a flowchart of a display panel driving method provided in an embodiment of the present invention, see reference. Figure 8 The driving methods for the display panel include:
[0194] S210. Power supply voltage is transmitted to each pixel circuit through the power supply line; wherein, the pixel circuits corresponding to at least two different light-emitting colors are connected to different power supply voltages; for pixel circuits connected to different power supply lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power supply voltage connected to the pixel circuit.
[0195] In this display device, the driver chip corresponding to the display panel can transmit power voltage to each pixel circuit via a power line. The pixel circuit can be connected to the first end of the sub-pixel. When the power line provides a positive voltage to the pixel circuit, a negative voltage is applied to the second end of the sub-pixel; conversely, when the power line provides a negative voltage to the pixel circuit, a positive voltage is applied to the second end of the sub-pixel. This allows the power line, pixel circuit, and sub-pixel to form a loop, enabling the pixel circuit to drive the sub-pixel to emit light.
[0196] Specifically, among all sub-pixels of different emitting colors, at least two sub-pixels of different emitting colors have pixel circuits connected to different power lines. These different power lines transmit different power voltages, resulting in the pixel circuits of at least two different emitting colors receiving different power voltages. For example, the power line connected to the pixel circuit of the sub-pixel with the smallest aperture ratio is different from that of the other sub-pixels. For pixel circuits connected to different power lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power voltage received by the pixel circuit. This results in the pixel circuit of the sub-pixel with the smallest aperture ratio receiving the smallest power voltage, and consequently, the pixel circuit of the sub-pixel with the smallest aperture ratio needs to receive a smaller black-state data voltage, thereby reducing the black-state data voltage of the display panel. In this way, the data lines of the display panel do not need to transmit a large voltage, thus reducing the power consumption of the display panel and improving its performance.
[0197] S220 transmits data voltage to each pixel circuit via a data line.
[0198] Specifically, the driver chip in the display device corresponding to the display panel can transmit data voltage to each pixel circuit through the data line, so that each pixel circuit generates a driving current according to the corresponding data voltage, driving the corresponding sub-pixel to emit light.
[0199] Optionally, the display panel driving method further includes: (The method is described in the original text, but the translation is incomplete.)
[0200] Step a1: Transmit the initial power supply voltage to each pixel circuit through the power supply line; wherein, the pixel circuits corresponding to at least two different light-emitting colors are connected to different initial power supply voltages.
[0201] Specifically, the initial power supply voltage corresponding to each sub-pixel of a specific emitting color can be determined first through simulation or other methods. For example, the sub-pixel with the smallest aperture ratio corresponds to the smallest initial power supply voltage. This ensures that the black-state data voltage corresponding to the sub-pixel with the smallest aperture ratio is relatively small, thus allowing for a smaller initial black-state data voltage for the display panel. After determining the initial power supply voltage, the initial black-state data voltage of the display panel can be determined. Following the determination of the initial power supply voltage for each sub-pixel of a specific emitting color, the driver chip transmits the corresponding initial power supply voltage to each pixel circuit via power lines.
[0202] Step a2: Based on the initial black state data voltage, transmit the data voltage to each pixel circuit through the data line.
[0203] Specifically, the driver chip can determine the data voltage corresponding to each pixel circuit based on the initial black-state data voltage and the preset grayscale, allowing the driver chip to transmit the corresponding data voltage to each pixel circuit via the data line. For example, each sub-pixel has the same preset grayscale.
[0204] Step a3: Obtain the actual data voltage of the pixel circuit corresponding to each emitting color sub-pixel under the same gray level using an external device. After adjusting the initial power supply voltage and the initial black state data voltage according to the deviation between the actual data voltages of the pixel circuits corresponding to different emitting colors sub-pixels, obtain the power supply voltage corresponding to each emitting color sub-pixel.
[0205] Specifically, after the driver chip transmits the corresponding data voltage to each pixel circuit via the data line, the external device can acquire the actual data voltage of the pixel circuit corresponding to each sub-pixel of a certain emitting color at the same grayscale (preset grayscale). Then, it calculates the deviation value of the actual data voltage of the pixel circuit corresponding to sub-pixels of different emitting colors. For example, it calculates the deviation value of the actual data voltage of the pixel circuit corresponding to every two sub-pixels of different emitting colors, or it calculates the deviation value of the actual data voltage corresponding to the sub-pixel with the smallest aperture ratio from the actual data voltage corresponding to any other sub-pixel. Based on the deviation values between the actual data voltages of the pixel circuits corresponding to sub-pixels of different emitting colors, the initial power supply voltage and the initial black state data voltage are adjusted.
[0206] For example, if the deviation between the actual data voltage corresponding to the sub-pixel with the smallest aperture ratio and the actual data voltage corresponding to any other sub-pixel is small, less than a set threshold, the initial power supply voltage corresponding to the sub-pixel with the smallest aperture ratio can be further reduced to obtain the final power supply voltage corresponding to the sub-pixel with the smallest aperture ratio. The initial power supply voltages corresponding to the other sub-pixels can remain unchanged and be directly used as the final power supply voltage corresponding to that sub-pixel. The external device transmits the final power supply voltage corresponding to the sub-pixels of each emission color to the driver chip, so that the driver chip can transmit the power supply voltage to each pixel circuit through the power line based on the obtained power supply voltage corresponding to each sub-pixel of each emission color.
[0207] The pixel circuit includes a driving transistor. For example, the gate of the driving transistor is connected to the data voltage, and the source of the driving transistor is connected to the power supply voltage. Then, while ensuring the gate-source voltage difference of the driving transistor remains constant, the power supply voltage and the black-state data voltage have a positive correlation; that is, the smaller the power supply voltage, the smaller the black-state data voltage. Therefore, after adjusting (reducing) the initial power supply voltage, the initial black-state data voltage can be adjusted (reduced) accordingly to obtain the final black-state data voltage. This final black-state data voltage is then transmitted to the driving chip, allowing the driving chip to generate a data voltage based on the acquired black-state data voltage.
[0208] The external device can be a host computer or a display device base, etc., and this embodiment does not limit it.
[0209] This embodiment also provides a display device. Figure 9 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Figure 9As shown, the display device includes the display panel provided in any of the above embodiments. The display device can be any product or component with display functionality, such as a mobile phone, tablet computer, television, monitor, laptop computer, or digital photo frame. Since the display device includes the display panel provided in any embodiment of the present invention, it possesses the same beneficial effects as the display panel provided in any embodiment of the present invention, and will not be elaborated further here.
[0210] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0211] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A display panel, characterized in that, The display panel includes: at least two sub-pixels with different luminous colors and at least two pixel circuits; The pixel circuit is connected to a power line and a data line respectively. The power line is used to provide power voltage to the pixel circuit, and the data line is used to provide data voltage to the pixel circuit. The pixel circuit is connected to the sub-pixel, and the pixel circuit is used to generate a driving current according to the data voltage to drive the corresponding sub-pixel to emit light; Among them, the aperture ratios of the sub-pixels with different emission colors are different. Among all the sub-pixels with different emission colors, the power supply lines connected to the pixel circuits corresponding to at least two different emission colors are different, so that the pixel circuits corresponding to the at least two different emission colors are connected to different power supply voltages. Among them, for pixel circuits connected to different power supply lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power supply voltage connected to the pixel circuit.
2. The display panel according to claim 1, characterized in that, The display panel includes at least a first light-emitting color sub-pixel and a second light-emitting color sub-pixel, wherein the aperture ratio of the first light-emitting color sub-pixel is greater than the aperture ratio of the second light-emitting color sub-pixel; the power line includes a first power line and a second power line. The pixel circuit corresponding to the sub-pixel of the first emitting color is connected to the first power line; the first power line is used to provide a first power supply voltage to the pixel circuit corresponding to the sub-pixel of the first emitting color. The pixel circuit corresponding to the sub-pixel of the second emitting color is connected to the second power line; the second power line is used to provide a second power supply voltage to the pixel circuit corresponding to the sub-pixel of the second emitting color. The first power supply voltage is greater than the second power supply voltage; Preferably, the first emitting color sub-pixel is a red sub-pixel or a blue sub-pixel, and the second emitting color sub-pixel is a green sub-pixel.
3. The display panel according to claim 2, characterized in that, The display panel also includes sub-pixels of a third luminous color; The aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the second emitting color; the aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the first emitting color. The pixel circuit corresponding to the sub-pixel of the third emitting color is connected to the first power line; the first power line is used to provide a first power supply voltage to the pixel circuit corresponding to the sub-pixel of the third emitting color. Preferably, the first luminous color sub-pixel is a red sub-pixel, the third luminous color sub-pixel is a blue sub-pixel, and the second luminous color sub-pixel is a green sub-pixel.
4. The display panel according to claim 2, characterized in that, The display panel also includes sub-pixels of a third luminous color; The aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the second emitting color; the aperture ratio of the sub-pixel of the third emitting color is greater than the aperture ratio of the sub-pixel of the first emitting color. The power line also includes a third power line; The pixel circuit corresponding to the sub-pixel of the third emitting color is connected to the third power line; the third power line is used to provide a third power voltage to the pixel circuit corresponding to the sub-pixel of the third emitting color. Wherein, the third power supply voltage is greater than the first power supply voltage, and the first power supply voltage is greater than the second power supply voltage; Preferably, the first luminous color sub-pixel is a red sub-pixel, the third luminous color sub-pixel is a blue sub-pixel, and the second luminous color sub-pixel is a green sub-pixel.
5. The display panel according to any one of claims 1-4, characterized in that, The pixel circuit includes: A driving module, which is connected to the sub-pixel, is used to generate a driving current; A data writing module is connected between the data line and the driving module. The control terminal of the data writing module is connected to the first scan line. The data writing module is used to transmit the data voltage on the data line to the driving module in response to the effective level of the first scan signal on the first scan line. The transistor type in the data writing module is the same as the transistor type in the driving module. The effective level of the first scan signal is less than the ineffective level of the first scan signal. A threshold compensation module is connected between the second end of the driving module and the control end of the driving module. The control end of the threshold compensation module is connected to the second scan line. The threshold compensation module is used to perform threshold compensation on the driving module in response to the second scan signal on the second scan line. Preferably, the driving module includes a driving transistor, and the threshold compensation module includes a threshold compensation transistor; The display panel also includes a substrate; The first scan line is located on one side of the substrate; The control electrode of the driving transistor is connected to the second electrode of the threshold compensation transistor via a connecting line, the connecting line being located on the side of the first scan line away from the substrate; the orthographic projection of the connecting line onto the substrate overlaps with the orthographic projection of the first scan line onto the substrate to form a first capacitor; Preferably, the capacitance of the first capacitor is less than 4 fenfa; Preferably, the capacitance of the first capacitor is greater than or equal to 1 fenfarad and less than 4 fenfarads; Preferably, the capacitance of the first capacitor is greater than or equal to 2 fenfarats and less than 4 fenfarats.
6. The display panel according to claim 5, characterized in that, The first end of the data writing module is connected to the data line, and the second end of the data writing module is connected to the first end of the driver module. Preferably, the data writing module is used to transmit the data voltage on the data line to the control terminal of the drive module during the data writing and threshold compensation stages; The threshold compensation module is used to perform threshold compensation on the driving module during the data writing and threshold compensation phases. Preferably, the pixel circuit further includes: A first reset module is connected between a first reset signal line and a first terminal of the threshold compensation module. The control terminal of the first reset module is connected to a third scan line. The first reset module is used to transmit the first reset voltage on the first reset signal line to the control terminal of the drive module through the threshold compensation module during the first reset phase. Preferably, the pixel circuit further includes: A light-emitting control module is provided, wherein the light-emitting control module is connected to the driving module between the power line and the first end of the sub-pixel, the control terminal of the light-emitting control module is connected to the light-emitting control line, and the light-emitting control module is used to control whether the driving module generates a driving current. Preferably, the light-emitting control module is used to control the driving module to generate a driving current during the light-emitting stage; Preferably, the pixel circuit further includes: The second reset module is connected between the second reset signal line and the first end of the sub-pixel. The control terminal of the second reset module is connected to the fourth scan line. The second reset module is used to respond to the fourth scan signal on the fourth scan line and transmit the second reset voltage on the second reset signal line to the first end of the sub-pixel. Preferably, the second reset module is used to transmit the second reset voltage on the second reset signal line to the first end of the sub-pixel during the second reset phase; Preferably, the pixel circuit further includes: A storage module is connected between the control terminal of the drive module and the power line; Preferably, the pixel circuit further includes: The third reset module is connected between the third reset signal line and the second terminal of the drive module. The control terminal of the third reset module is connected to the fourth scan line. The third reset module is used to respond to the fourth scan signal on the fourth scan line and transmit the third reset voltage on the third reset signal line to the second terminal of the drive module. Preferably, during the second reset phase, the third reset module transmits the third reset voltage on the third reset signal line to the second terminal of the drive module; Preferably, the first reset phase is located before the data writing and threshold compensation phases; The second reset phase is located between the data writing and threshold compensation phase and the light emission phase.
7. The display panel according to claim 6, characterized in that, The driving module includes a driving transistor; The data writing module includes a data writing transistor, the control electrode of which is connected to the first scan line, the first electrode of which is connected to the data line, and the second electrode of which is connected to the first electrode of the driving transistor. Preferably, the threshold compensation module includes a threshold compensation transistor, the first terminal of the threshold compensation transistor is connected to the second terminal of the driving transistor, the second terminal of the threshold compensation transistor is connected to the control terminal of the driving transistor, and the control terminal of the threshold compensation transistor is connected to the second scan line; Preferably, the first reset module includes a first reset transistor, the first terminal of the first reset transistor is connected to the first reset signal line, the second terminal of the first reset transistor is connected to the first terminal of the threshold compensation transistor, and the first reset transistor is connected to the third scan line; Preferably, the light emission control module includes a first light emission control transistor and a second light emission control transistor. The first terminal of the first light emission control transistor is connected to a power supply line, and the second terminal of the first light emission control transistor is connected to the first terminal of the driving transistor. The first terminal of the second light emission control transistor is connected to the second terminal of the driving transistor, and the second terminal of the second light emission control transistor is connected to the first end of the corresponding sub-pixel. The control terminals of the first and second light emission control transistors are connected to the light emission control line. Preferably, the second reset module includes a second reset transistor, the first terminal of the second reset transistor is connected to the second reset signal line, the second terminal of the second reset transistor is connected to the first end of the sub-pixel, and the control terminal of the second reset transistor is connected to the fourth scan line; Preferably, the storage module includes a storage capacitor connected between the power line and the control electrode of the driving transistor; Preferably, the third reset module includes a third reset transistor, the first terminal of the third reset transistor is connected to the third reset signal line, the second terminal of the third reset transistor is connected to the second terminal of the driving transistor, and the control terminal of the third reset transistor is connected to the fourth scan line; Preferably, both the threshold compensation transistor and the first reset transistor are N-type transistors.
8. A driving method for a display panel, characterized in that, The display panel includes: at least two sub-pixels with different light-emitting colors and at least two pixel circuits; the pixel circuits are respectively connected to power lines and data lines, and the pixel circuits are connected to the sub-pixels; the aperture ratios of the sub-pixels with different light-emitting colors are different; the power lines connected to the pixel circuits corresponding to the at least two sub-pixels with different light-emitting colors are different. The driving method for the display panel includes: Power voltage is transmitted to each pixel circuit through the power line; wherein, the pixel circuits corresponding to at least two different light-emitting colors are connected to different power voltages; for pixel circuits connected to different power lines, the smaller the aperture ratio of the sub-pixel corresponding to the pixel circuit, the smaller the power voltage connected to the pixel circuit. Data voltage is transmitted to each pixel circuit via the data line.
9. The method according to claim 8, characterized in that, Before transmitting power voltage to each pixel circuit via the power line, the method further includes: An initial power supply voltage is transmitted to each pixel circuit via the power line; wherein, the pixel circuits corresponding to at least two different light-emitting colors of sub-pixels are connected to different initial power supply voltages; Based on the initial black state data voltage, the data voltage is transmitted to each pixel circuit through the data line; The external device acquires the actual data voltage of the pixel circuit corresponding to each emitting color sub-pixel under the same grayscale, and adjusts the initial power supply voltage and the initial black state data voltage according to the deviation value between the actual data voltages of the pixel circuits corresponding to sub-pixels of different emitting colors, and then acquires the power supply voltage corresponding to each emitting color sub-pixel.
10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-7.