Display refresh rate optimization system based on dynamic data compression and power control

Abstract

The present application belongs to the technical field of display refresh rate optimization, and particularly relates to a display refresh rate optimization system based on dynamic data compression and power control. The present application aims at the problems of large redundancy of point-by-point data transmission, high delay of serial power calculation after frame end, and difficult improvement of high-partition display refresh rate in the existing SOC-BCON-LB driving architecture. The present application optimizes three parts of luminance data transmission, coordinate data optimization and buffer data power calculation in the original architecture, reduces the total amount of single-frame data transmitted from SOC to BCON, releases the bus bandwidth, eliminates the whole-frame cache waiting delay, synchronizes and parallelizes data transmission and power verification, and stably improves the display backlight refresh rate under the constraint of hardware power threshold, without loss of partition display accuracy.

Description

Technical Field

[0001] This invention belongs to the field of display refresh rate optimization technology, and in particular relates to a display refresh rate optimization system based on dynamic data compression and power control. Background Technology

[0002] Existing standard driver architectures such as Figure 1 As shown: SOC board (signal reception and analysis) → BCON timing control board (power statistics, data processing) → LB backlight board (zone illumination). The data and power processing flow is as follows: Figure 2 As shown:

[0003] 1. SOC outputs single data line by line and pixel by pixel: single pixel ID + single pixel brightness value. The more partitions there are, the more data packets there are.

[0004] 2. After the SOC transmits all pixel data for a complete frame, it buffers it all to the BCON.

[0005] 3. BCON iterates through all cached data, accumulates the brightness of all partitions, and calculates the peak power of the entire machine;

[0006] 4. If the total power consumption exceeds the hardware threshold, the brightness of the entire frame is uniformly compressed; otherwise, the light board driver is directly sent for display. The disadvantages include:

[0007] 1. Extremely high data transmission redundancy, limited bandwidth, and inability to achieve high refresh rates.

[0008] Sending independent IDs and brightness values ​​point by point, even when a large number of adjacent / same-area pixels have the same brightness, separate packets are still sent; under high partitioning, the number of data packets per frame is in the tens of thousands, the bus bandwidth is fully occupied, and the display refresh rate cannot break through high specifications such as 144Hz and 240Hz.

[0009] 2. Power calculation is serially blocked, resulting in large frame delays.

[0010] Power statistics can only be started after the entire frame of data has been received, resulting in a full frame buffering delay. In high-partition scenarios, the time taken for single-frame buffering, traversal, and power judgment can reach several milliseconds, further reducing the upper limit of the refresh rate and making it easy for screen ghosting and timing misalignment to occur.

[0011] 3. Compression and power control are disconnected, lacking dynamic adaptation capability.

[0012] When the power exceeds the limit, the brightness of the entire frame is compressed uniformly, which cannot distinguish high-proportion areas of the same brightness for lightweight transmission, resulting in serious waste of bandwidth resources. Summary of the Invention

[0013] To address the issues of high data redundancy and high serial power calculation latency in the existing SOC-BCON-LB driver architecture, which makes it difficult to improve the refresh rate of high-zone displays, this invention proposes a display refresh rate optimization system based on dynamic data compression and power control.

[0014] The technical solution of this invention is as follows:

[0015] A display refresh rate optimization system based on dynamic data compression and power control is used in an LED display driver architecture comprising a SOC board, a BCON timing control board, and an LB backlight board. The system includes:

[0016] The SOC board is configured to receive a frame of original backlight partition brightness matrix, traverse all partition pixels and cluster them according to brightness value, generate compressed data packets for all pixels with the same brightness value, and the data format of the compressed data packets is: brightness value + total number of consecutive pixels + basic ID of grouped region; and the SOC board sends the compressed data packets in descending order of brightness ratio.

[0017] The BCON timing control board is configured to, during the process of receiving the compressed data packets, parse the number of pixels and brightness values ​​in real time for each set of compressed data packets received, and synchronously accumulate the current cumulative total power; and continuously determine whether the cumulative power exceeds a preset hardware power threshold during transmission: if the cumulative power exceeds the hardware power threshold, then immediately perform dynamic brightness compression on the current and untransmitted data packets; if all compressed data packets are transmitted and the cumulative power does not exceed the hardware power threshold, then send the decompressed partition brightness data to the LB backlight board;

[0018] When the SOC board performs coordinate encoding on clustered pixels of the same brightness, it uses the physical center point of the backlight screen as the differential origin and only transmits the offset difference value of each pixel relative to the differential origin. The BCON timing control board restores the complete pixel coordinates based on the differential origin and the offset difference value.

[0019] The LB backlight panel illuminates the corresponding zones based on the received zone brightness data.

[0020] Specifically, the BCON timing control board cancels the full-frame caching mechanism and uses a segmented caching method to store the received compressed data packets. After completing power verification and coordinate restoration, the decompressed data is immediately sent to the LB backlight board.

[0021] Specifically, the offset difference is the difference M and N between the pixel coordinates and the coordinates of the difference origin on the X and Y axes, respectively. The pixel target coordinates are obtained by formula ( ) = ( ) was calculated to obtain, where ( () is the origin of the difference, ( () represents the pixel target coordinates.

[0022] This invention also proposes a method adapted to the system:

[0023] A display refresh rate optimization method based on dynamic data compression and power control is used in an LED display driver architecture that includes a SOC board, a BCON timing control board, and an LB backlight board, including:

[0024] Data compression: The SOC board receives a frame of original backlight partition brightness matrix, traverses all partition pixels and clusters them according to brightness value, and generates compressed data packets for all pixels with the same brightness value. The data format of the compressed data packets is: brightness value + total number of consecutive pixels + basic ID of grouped region.

[0025] Coordinate encoding: Using the physical center point of the backlight screen as the origin of the difference, for clustered pixels of the same brightness, only the offset difference of each pixel relative to the origin of the difference is calculated and transmitted, rather than the complete absolute coordinates;

[0026] Streaming power control: During the reception of compressed data packets, the BCON timing control board analyzes the number of pixels and brightness values ​​in real time and accumulates the current total power for each set of compressed data packets received. During transmission, it continuously judges whether the accumulated power exceeds the preset hardware power threshold: if the accumulated power exceeds the threshold midway, it immediately performs dynamic brightness compression on the current and untransmitted data packets without waiting for the entire frame to be received; if the threshold is not exceeded after transmission is completed, the decompressed partition brightness data is sent to the LB backlight board.

[0027] Zoned illumination: The LB backlight panel illuminates the corresponding zones based on the received zone brightness data;

[0028] During the data compression process, the SOC board sends the compressed data packets in descending order of brightness percentage.

[0029] During the streaming power control process, the BCON timing control board uses a segmented buffering method to store the received compressed data packets, eliminating the full frame buffering mechanism.

[0030] In the coordinate encoding process, the pixel target coordinates are obtained through the formula ( ) = ( ) was calculated to obtain, where ( () is the origin of the difference, ( ) represents the pixel target coordinates, and M and N are the offset differences on the X and Y axes, respectively.

[0031] The dynamic brightness compression employs a strategy of prioritizing brightness reduction in high-brightness areas, or performs nonlinear compression on the overall brightness while maintaining the subjective quality of the image.

[0032] A SOC board data compression encoding module, comprising:

[0033] The brightness clustering unit is configured to traverse all partition pixels in the original backlight partition brightness matrix of a frame and cluster them according to their brightness values.

[0034] The data packet encapsulation unit is configured to generate compressed data packets for all pixels with the same brightness value. The data format of the compressed data packet is: brightness value + total number of consecutive pixels + basic ID of the grouping region.

[0035] The sorting and sending unit is configured to send the compressed data packets in descending order of brightness percentage;

[0036] The differential coding unit is configured to use the physical center point of the backlight screen as the differential origin, calculate and output the offset difference between clustered pixels of the same brightness and the differential origin, in order to replace the transmission of complete absolute coordinates.

[0037] A BCON timing control board real-time power control module includes:

[0038] The segmented buffer unit is configured to store compressed data packets received from the SOC board in a segmented buffering manner;

[0039] The streaming accumulation unit is configured to analyze the number of pixels and brightness values ​​in each compressed data packet received in real time, and synchronously accumulate the current total power of the device.

[0040] The threshold judgment unit is configured to continuously judge whether the cumulative power exceeds the preset hardware power threshold during the transmission process;

[0041] The dynamic compression unit is configured to immediately perform dynamic brightness compression on the current and untransmitted data packets when the threshold judgment unit determines that the cumulative power exceeds the hardware power threshold.

[0042] The data delivery unit is configured to send the decompressed partition brightness data to the LB backlight board when all compressed data packets have been transmitted and the cumulative power has not exceeded the hardware power threshold.

[0043] The coordinate restoration unit is configured to restore the complete pixel coordinates based on the preset differential origin and the received offset difference.

[0044] The beneficial effects of this invention are:

[0045] 1. Reduce the total amount of data per frame transmitted from the SOC to the BCON, thereby freeing up bus bandwidth;

[0046] 2. Eliminate frame buffering delay; data transmission and power verification are synchronized and run in parallel.

[0047] 3. Under hardware power threshold constraints, the monitor backlight refresh rate is steadily increased without sacrificing the accuracy of zone display. Attached Figure Description

[0048] Figure 1 This is a schematic diagram of the SOC+BCON+LB architecture.

[0049] Figure 2 This is a schematic diagram of a traditional control method.

[0050] Figure 3 This is a schematic diagram of the control method of the present invention. Detailed Implementation

[0051] The main principles of the present invention will now be explained with reference to the accompanying drawings.

[0052] like Figure 3 As shown, the main optimizations of this invention are made to three parts of the original architecture: brightness data transmission, coordinate data optimization, and buffered data power calculation. Specifically, this is achieved through... Figure 2 and Figure 3 The conventional method and the method of the present invention are described in comparison:

[0053] 1) Batch dynamic compression encoding algorithm for pixels with the same brightness (optimized brightness transmission):

[0054] Existing technology: 1 pixel = 1 message (ID + brightness), which continues until all data is sent.

[0055] The processing method of the present invention:

[0056] The SOC receives a frame of the original backlight partition brightness matrix, traverses all partition pixels, and clusters them according to their brightness values.

[0057] All pixels with the same brightness value are packaged together, and the format of a single data entry is: brightness value + total number of consecutive pixels + basic ID of the group region; (the data is sorted from largest to smallest based on the number of repetitions, and those with more repetitions are sent first).

[0058] Thus, the method of the present invention abandons the transmission of pixel-by-pixel independent IDs and replaces the duplicate pixel identifier with a "quantity field" to complete data compression;

[0059] Example: If all 32 pixels have a brightness of 3FFF, only send a brightness of 3FFF + number of points 32 + region ID to replace 32 independent pixel messages.

[0060] 2) Two-dimensional coordinate differential encoding algorithm for the screen center origin (coordinate data optimization):

[0061] Existing technology: Each pixel uses complete independent XY coordinates from 0 to 65535, and the coordinate data occupies a large number of bits;

[0062] The differential encoding method of this invention is as follows:

[0063] The origin of the difference is set at the physical center point of the backlight screen. );

[0064] For clustered pixels of the same brightness, only the offset differences M and N relative to the origin are transmitted, without transmitting the complete absolute coordinates; pixel target coordinate conversion formula: ( ) = ( )

[0065] After receiving the differential offset, BCON reconstructs the complete pixel coordinates based on the origin;

[0066] Advantages: The offset difference in large areas of the same brightness (such as the sky or solid color background) is extremely small, and the number of coordinate bits can be reduced by more than 60%.

[0067] 3) Parallel real-time power accumulation control (buffered power calculation optimization):

[0068] Existing technology: Power is calculated once after the entire frame is received (serial blocking);

[0069] In this invention, parallel data transmission and power calculation are performed simultaneously:

[0070] SOC sends compressed data packets in descending order of brightness percentage (with large solid color areas transmitted first).

[0071] Each time BCON receives a set of compressed data packets, it analyzes the number of pixels and brightness in real time and simultaneously accumulates the current total power of the device.

[0072] During transmission, the system continuously checks whether the cumulative power exceeds the hardware power threshold.

[0073] ① If the accumulated data exceeds the limit during transmission: immediately perform dynamic brightness compression on the current and untransmitted data packets, without waiting for the entire frame to be received;

[0074] ② If the transmission is completed but the limit is still not exceeded: directly send the decompressed partition brightness data to the LB lamp board;

[0075] This achieves the goal of eliminating the full-frame caching mechanism and adopting segmented caching, thereby significantly reducing BCON memory usage and waiting latency.

Claims

1. A display refresh rate optimization system based on dynamic data compression and power control, used in an LED display driver architecture comprising a SOC board, a BCON timing control board, and an LB backlight board, characterized in that, The system includes: The SOC board is configured to receive a frame of original backlight partition brightness matrix, traverse all partition pixels and cluster them according to brightness value, generate compressed data packets for all pixels with the same brightness value, and the data format of the compressed data packets is: brightness value + total number of consecutive pixels + basic ID of grouped region; and the SOC board sends the compressed data packets in descending order of brightness ratio. The BCON timing control board is configured to, during the process of receiving the compressed data packets, parse the number of pixels and brightness values ​​in real time for each set of compressed data packets received, and synchronously accumulate the current cumulative total power; and continuously determine whether the cumulative power exceeds a preset hardware power threshold during transmission: if the cumulative power exceeds the hardware power threshold, then immediately perform dynamic brightness compression on the current and untransmitted data packets; if all compressed data packets are transmitted and the cumulative power does not exceed the hardware power threshold, then send the decompressed partition brightness data to the LB backlight board; When the SOC board performs coordinate encoding on clustered pixels of the same brightness, it uses the physical center point of the backlight screen as the differential origin and only transmits the offset difference value of each pixel relative to the differential origin. The BCON timing control board restores the complete pixel coordinates based on the differential origin and the offset difference value. The LB backlight panel illuminates the corresponding zones based on the received zone brightness data.

2. The display refresh rate optimization system based on dynamic data compression and power control according to claim 1, characterized in that, The BCON timing control board cancels the full-frame caching mechanism and uses a segmented caching method to store the received compressed data packets. After completing power verification and coordinate restoration, the decompressed data is immediately sent to the LB backlight board.

3. The display refresh rate optimization system based on dynamic data compression and power control according to claim 1, characterized in that, The offset difference is the difference M and N between the pixel coordinates and the coordinates of the origin of the difference on the X and Y axes, respectively. The pixel target coordinates are obtained by formula ( ) = ( ) was calculated to obtain, where ( () is the origin of the difference, ( () represents the pixel target coordinates.

4. A display refresh rate optimization method based on dynamic data compression and power control, used in an LED display driver architecture comprising a SOC board, a BCON timing control board, and an LB backlight board, characterized in that... include: Data compression: The SOC board receives a frame of original backlight partition brightness matrix, traverses all partition pixels and clusters them according to brightness value, and generates compressed data packets for all pixels with the same brightness value. The data format of the compressed data packets is: brightness value + total number of consecutive pixels + basic ID of grouped region. Coordinate encoding: Using the physical center point of the backlight screen as the origin of the difference, for clustered pixels of the same brightness, only the offset difference of each pixel relative to the origin of the difference is calculated and transmitted, rather than the complete absolute coordinates; Streaming power control: During the process of receiving compressed data packets, the BCON timing control board analyzes the number of pixels and brightness values ​​in real time and accumulates the current total power of the machine after receiving each set of compressed data packets; During transmission, the system continuously checks whether the cumulative power exceeds the preset hardware power threshold. If the cumulative power exceeds the threshold midway, dynamic brightness compression is immediately applied to the current and untransmitted data packets without waiting for the entire frame to be received. If the transmission is completed and the threshold is still not exceeded, the decompressed partition brightness data is sent to the LB backlight board. Zoned illumination: The LB backlight panel illuminates the corresponding zones based on the received zone brightness data; During the data compression process, the SOC board sends the compressed data packets in descending order of brightness percentage.

5. The display refresh rate optimization method based on dynamic data compression and power control according to claim 4, characterized in that, During the streaming power control process, the BCON timing control board uses a segmented buffering method to store the received compressed data packets, eliminating the full frame buffering mechanism.

6. The display refresh rate optimization method based on dynamic data compression and power control according to claim 4, characterized in that, In the coordinate encoding process, the pixel target coordinates are obtained through the formula ( ) = ( ) was calculated to obtain, where ( () is the origin of the difference, ( ) represents the pixel target coordinates, and M and N are the offset differences on the X and Y axes, respectively.

7. The display refresh rate optimization method based on dynamic data compression and power control according to claim 4, characterized in that, The dynamic brightness compression employs a strategy of prioritizing brightness reduction in high-brightness areas, or performs nonlinear compression on the overall brightness while maintaining the subjective quality of the image.

8. A SOC board data compression encoding module, applied to the system as described in any one of claims 1-3, characterized in that, include: The brightness clustering unit is configured to traverse all partition pixels in the original backlight partition brightness matrix of a frame and cluster them according to their brightness values. The data packet encapsulation unit is configured to generate compressed data packets for all pixels with the same brightness value. The data format of the compressed data packet is: brightness value + total number of consecutive pixels + basic ID of the grouping region. The sorting and sending unit is configured to send the compressed data packets in descending order of brightness percentage; The differential coding unit is configured to use the physical center point of the backlight screen as the differential origin, calculate and output the offset difference between clustered pixels of the same brightness and the differential origin, in order to replace the transmission of complete absolute coordinates.

9. A BCON timing control board real-time power control module, applied to the system as described in any one of claims 1-3, characterized in that, include: The segmented buffer unit is configured to store compressed data packets received from the SOC board in a segmented buffering manner; The streaming accumulation unit is configured to analyze the number of pixels and brightness values ​​in each compressed data packet received in real time, and synchronously accumulate the current total power of the device. The threshold judgment unit is configured to continuously judge whether the cumulative power exceeds the preset hardware power threshold during the transmission process; The dynamic compression unit is configured to immediately perform dynamic brightness compression on the current and untransmitted data packets when the threshold judgment unit determines that the cumulative power exceeds the hardware power threshold. The data delivery unit is configured to send the decompressed partition brightness data to the LB backlight board when all compressed data packets have been transmitted and the cumulative power has not exceeded the hardware power threshold. The coordinate restoration unit is configured to restore the complete pixel coordinates based on the preset differential origin and the received offset difference.

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