Adaptive backlight control method and device for virtual reality device display

Abstract

The application relates to a virtual reality device display adaptive backlight control method and device, belonging to the technical field of virtual reality display, comprising the following steps: acquiring an input video signal, extracting a frame synchronization signal from the input video signal, calculating a frame rate based on the frame synchronization signal, if the frame rate is less than or equal to a frame rate threshold value, entering a pulse backlight mode, setting physical parameters for generating backlight lighting pulses, generating each backlight lighting pulse, determining a trigger moment for generating each backlight lighting pulse based on the physical parameters, acquiring a completed picture area proportion before each trigger moment, if the completed picture area proportion reaches an area threshold value, determining a backlight area to be lighted based on the completed picture area proportion, and controlling the backlight area to be lighted when each trigger moment arrives, so that the frequency flicker and picture tearing under low frame rate input are eliminated, the visual fatigue is reduced through a low duty cycle pulse, and the display comfort is improved.

Description

Technical Field

[0001] This invention relates to the field of virtual reality display technology, and more specifically to an adaptive backlight control method and apparatus for virtual reality device displays. Background Technology

[0002] With virtual reality displays placed close to the eyes, the human eye is extremely sensitive to brightness flicker, requiring a refresh rate of at least 90Hz to eliminate the flickering sensation. However, when running heavily rendered scenes at retina-level resolution, the limited graphics card performance results in an actual output frame rate of only around 60Hz. In this case, the backlight flickers synchronously with the 60Hz refresh rate, causing noticeable flickering and exacerbating dizziness and eye strain. Therefore, there is an urgent need for an adaptive backlight control solution that can effectively eliminate flickering at low frame rate inputs.

[0003] Currently, existing methods improve the perceived flicker frequency by increasing the backlight illumination frequency from 60Hz input to 120Hz. They also employ a rolling backlight scheme, dividing the backlight into multiple zones and sequentially illuminating each zone following the screen refresh rate to improve dynamic blur. Furthermore, the signal conversion bridge chip built into the VR headset can extract frame synchronization signals to provide frame rate information, and the SOC can access the driver IC registers via the bus to obtain the real-time screen scanning status. These hardware foundations provide convenient conditions for adaptive backlight control at low frame rates.

[0004] In the aforementioned existing technologies, simply doubling the backlight frequency to 120Hz will cause image tearing and ghosting in areas that are not completed during the screen refresh process due to the response delay of liquid crystal molecules; while the scrolling backlight solution only follows the original frame rate scan and is not adapted for low frame rate doubling scenarios, and does not solve the problem of balancing brightness requirements and viewing comfort by reasonably allocating the duty cycle while dynamically following the screen refresh progress. Summary of the Invention

[0005] In view of the shortcomings of the related technologies, the purpose of this invention is to provide an adaptive backlight control method and device for virtual reality device display, so as to solve the technical problems of existing technologies, which simply multiply the backlight frequency when the graphics card outputs a low frame rate, resulting in screen tearing and ghosting, while the scrolling backlight solution only follows the original frame rate scan and cannot eliminate low-frequency flicker, and it is difficult to achieve a balance between brightness requirements and viewing comfort.

[0006] This invention provides an adaptive backlight control method for a virtual reality device display, comprising: Frame rate detection steps: Acquire the input video signal, extract the frame synchronization signal from the input video signal through the signal conversion bridge, and calculate the frame rate based on the frame synchronization signal; Mode configuration steps: If the frame rate is less than or equal to the frame rate threshold, the screen driver chip is controlled by the system-on-a-chip to enter the pulse backlight mode, and the physical parameters for generating backlight lighting pulses are set to generate each backlight lighting pulse. Trigger determination step: Based on the physical parameters, determine the trigger time for generating each of the backlight illumination pulses; Area determination steps: Before each triggering moment, obtain the proportion of the refreshed screen area in the display screen. If the proportion of the refreshed screen area reaches the area threshold, determine the backlight area to be lit based on the proportion of the refreshed screen area. Backlight illumination steps: When each of the aforementioned trigger moments arrives, the screen driver chip controls the backlight area to be illuminated to be lit.

[0007] By entering pulse backlight mode and configuring physical parameters at low frame rates, the backlight generates multiple lighting pulses at a higher frequency, thereby increasing the flicker frequency perceived by the human eye to an insensitive range and effectively eliminating the flicker sensation at low frame rates. Meanwhile, by obtaining the proportion of the refreshed screen area before the triggering time and determining the backlight area to be lit accordingly, the backlight is lit only in the stable area, avoiding image tearing and ghosting caused by the LCD not being fully flipped. In addition, through the coordinated control of the system-on-a-chip and the screen driver chip, dynamic matching between the backlight illumination area and the screen refresh rate is achieved. While eliminating flicker and avoiding screen tearing, the pulse distribution method with a low duty cycle reduces the instantaneous brightness impact, alleviates eye fatigue caused by close-range viewing, and reduces the visibility of screen display unevenness defects.

[0008] In some embodiments of the present invention, the mode configuration step specifically includes: If the frame rate is less than or equal to the frame rate threshold, a configuration command is sent to the screen driver chip through the system-on-a-chip. After receiving the configuration command, the screen driver chip enters the pulse backlight mode.

[0009] By sending configuration commands to the screen driver chip through the system-on-a-chip (SoC), the screen driver chip can directly enter the pulse backlight mode after receiving the command. This separates the control command and execution action for mode switching. The SoC only needs to issue commands and does not need to continuously participate in the mode configuration process, which reduces the computing resources occupied by the SoC during mode switching and improves the system's response speed and control efficiency. Meanwhile, this configuration instruction method enables the screen driver chip to immediately enter the pulse backlight mode when the frame rate meets the conditions, ensuring the synchronization between backlight frequency switching and frame rate changes, avoiding backlight flickering instability caused by mode switching delay, and ensuring the timeliness and reliability of low frame rate compensation mode switching.

[0010] In some embodiments of the present invention, the mode configuration step further includes: In the pulse backlight mode, the screen driver chip calculates the frame period based on the frame rate, sets the time interval between two adjacent backlight illumination pulses based on the frame period, and sets the duration of each backlight illumination pulse based on the time interval, as the physical parameter.

[0011] By having the screen driver chip calculate the frame period based on the frame rate in pulse backlight mode, and then setting the time interval and duration sequentially based on the frame period, the interval between each backlight illumination pulse and the duration of each pulse are derived based on the frame period. This ensures a precise match between the pulse parameters and the current input frame rate, avoiding backlight illumination timing deviations caused by parameter mismatch. Meanwhile, the hierarchical relationship between frame period, time interval, and duration allows the adjustment of pulse parameters to adapt to different frame rate changes. When the frame rate fluctuates, each parameter can be updated synchronously to maintain the uniform distribution of backlight pulses within the frame period. This ensures that the frequency-doubled backlight can maintain a stable flicker frequency under different frame rate conditions, thus improving the system's adaptability.

[0012] In some embodiments of the present invention, the trigger determination step specifically includes: The screen driver chip determines the trigger time of the first backlight illumination pulse based on a preset compensation time, and determines the trigger time of each subsequent backlight illumination pulse in sequence based on the trigger time of the first backlight illumination pulse and the time interval.

[0013] The trigger time of the first backlight pulse is determined by the preset compensation time, so that the first pulse can avoid the unstable area at the beginning of the screen refresh and ensure that the screen has enough area to complete the refresh when the backlight is first lit, thus avoiding the exposure of the incomplete screen due to premature lighting. Meanwhile, the trigger times of subsequent pulses are determined sequentially based on the trigger time and time interval of the first pulse, so that each pulse is evenly distributed in sequence within the frame period, achieving uniform frequency doubling of the backlight lighting frequency. This avoids uneven brightness and uneven flicker perception caused by pulses being concentrated in a certain period of time, ensuring that the human eye receives uniform brightness stimulation within the frame period, and further improving visual comfort at low frame rates.

[0014] In some embodiments of the present invention, the region determination step specifically includes: Before each of the aforementioned triggering moments, the system-on-a-chip reads the scan status register of the screen driver chip to obtain the current scan line position of the display screen; Obtain the total number of vertical lines on the display screen, and calculate the proportion of the refreshed image area based on the total number of vertical lines and the current scan line position.

[0015] By reading the scan status register of the screen driver chip through the system-on-a-chip (SoC) to obtain the current scan line position and calculating the proportion of the refreshed image area based on the total number of vertical lines on the screen, the system achieves real-time and accurate acquisition of the screen refresh progress. This allows the system to accurately grasp the range of stable areas that have been refreshed on the screen at the current moment. This acquisition method directly utilizes the existing register data inside the screen driver chip, eliminating the need for additional hardware detection circuits and reducing system costs. At the same time, the calculated proportion provides a precise quantitative basis for subsequently determining the backlight area to be illuminated, enabling backlight control to make accurate decisions based on the real-time refresh progress and avoiding misjudgments and backlight control deviations caused by inaccurate refresh progress information.

[0016] In some embodiments of the present invention, the region determination step further includes: If the proportion of the refreshed screen area reaches the area threshold, the backlight area to be lit is determined based on the difference between the proportion of the refreshed screen area and the preset safety margin.

[0017] By using the difference between the ratio of the refreshed screen area and the preset safety margin as the basis for determining the backlight area to be lit when the ratio of the refreshed screen area reaches the area threshold, the area to be lit is completely within the stable area that has been refreshed. This avoids screen defects caused by minor instability in the edge areas due to the refreshed screen. The introduction of the safety margin compensates for the system delay between reading the refresh state and the actual backlight lighting, as well as the residual response time of the liquid crystal in the boundary area. This ensures that all areas covered by the backlight are completely stable when the backlight is lit, further improving the reliability of screen integrity and effectively eliminating edge blurring and minor tearing.

[0018] In some embodiments of the present invention, the backlight illumination step specifically includes: When each trigger moment arrives, the screen driver chip outputs a driving signal to the backlight partition corresponding to the backlight area to be lit, and controls the backlight unit of the backlight partition to be lit based on the driving signal.

[0019] By outputting driving signals to the backlight zones corresponding to the backlight areas to be lit through the screen driver chip, the backlight control is refined from full-screen lighting to precise driving by zones. Only the backlight zones corresponding to the stable areas that have been refreshed are lit, while the backlight zones corresponding to the incomplete areas remain off. This fundamentally avoids the problem of the incomplete areas exposing the residual image of the previous frame due to backlight illumination during the screen refresh process. Meanwhile, the zone-based output driving method ensures that the spatial distribution of backlight brightness is precisely matched with the screen refresh rate, guaranteeing that priority refresh areas such as the center of the field of view are always fully illuminated, thereby improving the overall clarity of the display and the user's viewing experience.

[0020] Some embodiments of the present invention further provide an adaptive backlight control device for a virtual reality device display, comprising: A signal conversion bridge is used to extract frame synchronization signals from the input video signal; A system-on-a-chip (SoC) is connected to the signal conversion bridge chip. The SoC is used to calculate the frame rate based on the frame synchronization signal and generate a configuration instruction when the frame rate is less than or equal to a frame rate threshold. A screen driver chip is connected to the system-on-a-chip. The screen driver chip is used to enter the pulse backlight mode after receiving the configuration command, and set the physical parameters for generating backlight lighting pulses, and determine the trigger time of each backlight lighting pulse based on the physical parameters. A display screen is connected to the screen driver chip, and the display screen is used to display images; The system-on-a-chip is also used to obtain the proportion of the refreshed screen area in the display screen before each triggering time, and to determine the backlight area to be lit based on the proportion of the refreshed screen area. The screen driver chip is also used to control the backlight area to be lit in the display screen to be lit when each of the trigger times arrives.

[0021] Through the hardware architecture design of signal conversion bridge, system-on-a-chip, screen driver chip and display screen, a complete closed-loop control link was constructed, from frame synchronization signal extraction, frame rate judgment, pulse mode configuration to trigger time determination, area judgment and backlight lighting. The connection relationship and data flow between each component are clear, ensuring stable transmission of control signals and reliable output of backlight drive. The system-on-a-chip (SoC) and the screen driver chip have clearly defined functions. The SoC is responsible for frame rate calculation and region determination, while the screen driver chip is responsible for pulse parameter setting and backlight driving. The two work together to provide hardware support for backlight frequency multiplication and dynamic zone lighting at low frame rates, providing a stable and reliable hardware operating platform for adaptive backlight control methods.

[0022] In some embodiments of the present invention, the screen driver chip is further configured to: In the pulse backlight mode, the frame period is calculated based on the frame rate, and the time interval between two adjacent backlight lighting pulses is set based on the frame period. The duration of each backlight lighting pulse is also set based on the time interval, as the physical parameter.

[0023] By having the screen driver chip calculate the frame period based on the frame rate in pulse backlight mode, and set the time interval and duration based on the frame period, the screen driver chip has the ability to independently complete the pulse parameter configuration. It can adaptively adjust the pulse parameters according to the current frame rate without the intervention of the system-on-a-chip, reducing the computational overhead and bus communication burden of the system-on-a-chip. Meanwhile, the recursive calculations between frame period, time interval, and duration are all completed inside the screen driver chip, which shortens the transmission path and response delay of parameter configuration, enabling the update of pulse parameters to keep pace with frame rate changes. This ensures that the dual-pulse mode can quickly and accurately complete parameter configuration under different frame rate conditions, improving the response speed and adaptability of backlight control.

[0024] In some embodiments of the present invention, the system-on-a-chip is further configured to: Before each trigger moment, the scan status register of the screen driver chip is read to obtain the current scan line position of the display screen; Obtain the total number of vertical lines on the display screen, and calculate the proportion of the refreshed image area based on the total number of vertical lines and the current scan line position.

[0025] The system-on-a-chip (SoC) reads the scan status register of the screen driver chip to obtain the current scan line position and calculates the proportion of the refreshed image area based on the total number of vertical lines on the screen. This allows the SoC to accurately determine the range of refreshed areas on the screen based on real-time refresh technology, providing accurate quantitative basis for determining the backlight area to be lit. This acquisition method makes full use of the existing register data inside the screen driver chip, eliminating the need for additional detection circuits and reducing hardware costs. At the same time, the calculated proportion provides accurate input parameters for subsequent area judgment, ensuring the matching accuracy between the backlight area to be lit and the refreshed stable area, and avoiding backlight control deviations caused by inaccurate refresh progress information. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A flowchart illustrating an adaptive backlight control method for a virtual reality device display provided in an embodiment of the present invention; Figure 2 A backlight partitioning enable timing diagram provided in an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the spatial relationship between the proportion of a refreshed screen area and the backlight area to be illuminated, provided in an embodiment of the present invention. Figure 4 A schematic diagram comparing a standard timing sequence and an extended vertical blanking period timing sequence provided for an embodiment of the present invention; Figure 5 This is a structural diagram of an adaptive backlight control device for a virtual reality device provided in an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this application clearer, the application is described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application.

[0029] It should be noted that the terminology used herein is for the purpose of describing particular implementations only and is not intended to limit the exemplary implementations according to this application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. Furthermore, it should be understood that the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or apparatus.

[0030] With the rapid development of virtual reality display devices, the close-range, eye-to-eye nature of these displays makes the human eye extremely sensitive to brightness flicker. To eliminate flicker, the display refresh rate typically needs to be maintained above 90Hz. However, when users run retina-level resolution, such as heavily rendered scenes with a resolution of 2K or higher per eye, the actual output frame rate is often limited to around 60Hz due to the limitations of graphics card performance. In this situation, if the display backlight flickers synchronously with the 60Hz frequency, users will experience noticeable flickering, which severely exacerbates dizziness and visual fatigue.

[0031] Virtual reality headsets typically have built-in signal conversion bridges, such as DP to MIPI or HDMI to MIPI bridges. These bridges are used to convert the standard display interface signals output by the graphics card into the MIPI signals required by the display screen. The bridges can also extract and extract the frame synchronization signal VSYNC to provide the system with accurate frame rate information. In addition, the system-on-a-chip (SoC) inside the head-mounted display can access the internal registers of the display driver chip via the bus to obtain the real-time scanning refresh status of the screen.

[0032] Virtual reality displays typically refresh in a different direction than conventional displays. Since the human eye is more sensitive to the image in the center of the field of vision, virtual reality systems generally adopt a refresh order from the center of the screen outwards, that is, from the inside out, in order to prioritize the image quality and timeliness of the central area. In the existing technology, a direct solution is to increase the backlight illumination frequency to 120Hz when the input frame rate is 60Hz, so as to improve the flicker frequency perceived by the human eye. However, due to the response time of liquid crystal molecules, if the backlight is fully lit during the screen refresh process, the areas that have not been refreshed will display residual images from the previous frame, thus causing image tearing and blurring problems. To address this issue, a scrolling backlight solution has been proposed in existing technologies. This solution divides the backlight into multiple zones and illuminates each zone sequentially following the screen refresh rate to improve dynamic blur. However, in the aforementioned prior art, simply doubling the backlight frequency to 120Hz will cause image tearing and ghosting in areas that are not completed during the screen refresh process due to the response delay of liquid crystal molecules. The scrolling backlight solution only follows the original frame rate scan and is not adapted for low frame rate multiplication scenarios. It also fails to solve the technical challenge of balancing brightness requirements and viewing comfort through reasonable duty cycle allocation while dynamically following the screen refresh progress.

[0033] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0034] The technical solution of the present invention will be described in detail below with reference to specific embodiments and accompanying drawings.

[0035] like Figure 1 As shown, this invention provides an adaptive backlight control method for a virtual reality device display. The adaptive backlight control method is applied to an adaptive backlight control device, which includes a display screen and a virtual reality device. The virtual reality device includes a signal conversion bridge, a system-on-a-chip (SoC), and a screen driver chip. The adaptive backlight control method includes: Frame rate detection step S1: Acquire the input video signal, extract the frame synchronization signal from the input video signal through the signal conversion bridge, and calculate the frame rate based on the frame synchronization signal; Furthermore, the input video signal is acquired. The input video signal is the standard display interface signal output by the graphics card. The signal conversion bridge receives the input video signal and extracts the frame synchronization signal VSYNC from the input video signal. The frame synchronization signal VSYNC is used to indicate the start time of each frame. The signal conversion bridge chip contains a signal extraction circuit that can separate the frame synchronization signal from the input video signal and extract it to the system-on-a-chip. The signal conversion bridge chip has a counter inside. The counter measures the pulse interval between two adjacent frame synchronization signals. When the first frame synchronization pulse arrives, the counter starts counting; when the second frame synchronization pulse arrives, the counter stops counting, thus obtaining the time length of a complete frame cycle, that is, the time interval between two adjacent frames. Then, by dividing 1000ms by this time interval, the current frame rate can be calculated. For example, if the measured time interval is 16.67ms, then the frame rate is 1000÷16.67≈60Hz; In addition, a frame rate detection module is integrated inside the system-on-a-chip or outside the system-on-a-chip. The frame rate detection module calculates the frame rate by counting the number of interruptions of the frame synchronization signal per unit time, based on the triggering mechanism of the frame synchronization signal. Specifically, when the frame synchronization signal generates a rising edge, an interrupt is triggered. The system-on-a-chip records the interrupt event and counts the total number of interrupts within a preset time window. For example, if a 1-second statistical window is set, and the cumulative number of frame synchronization interruptions received within this window is 60, then after normalization, the current frame rate is determined to be 60Hz. Both of these methods can be used to obtain the current input frame rate, providing a basis for determining the subsequent low frame rate compensation mode.

[0036] Mode configuration step S2: If the frame rate is less than or equal to the frame rate threshold, the system-on-a-chip controls the screen driver chip to enter the pulse backlight mode and sets the physical parameters for generating backlight lighting pulses to generate each backlight lighting pulse. In some embodiments, the mode configuration step S2 specifically includes: If the frame rate is less than or equal to the frame rate threshold, a configuration command is sent to the screen driver chip through the system-on-a-chip. After receiving the configuration command, the screen driver chip enters the pulse backlight mode.

[0037] By sending configuration commands to the screen driver chip through the system-on-a-chip (SoC), the screen driver chip can directly enter the pulse backlight mode after receiving the command. This separates the control command and execution action for mode switching. The SoC only needs to issue commands and does not need to continuously participate in the mode configuration process, which reduces the computing resources occupied by the SoC during mode switching and improves the system's response speed and control efficiency. Meanwhile, this configuration instruction method enables the screen driver chip to immediately enter the pulse backlight mode when the frame rate meets the conditions, ensuring the synchronization between backlight frequency switching and frame rate changes, avoiding backlight flickering instability caused by mode switching delay, and ensuring the timeliness and reliability of low frame rate compensation mode switching.

[0038] In some embodiments, the mode configuration step S2 further includes: In pulse backlight mode, the screen driver chip calculates the frame period based on the frame rate, sets the time interval between two adjacent backlight illumination pulses based on the frame period, and sets the duration of each backlight illumination pulse based on the time interval, as physical parameters.

[0039] By having the screen driver chip calculate the frame period based on the frame rate in pulse backlight mode, and then setting the time interval and duration sequentially based on the frame period, the interval between each backlight illumination pulse and the duration of each pulse are derived based on the frame period. This ensures a precise match between the pulse parameters and the current input frame rate, avoiding backlight illumination timing deviations caused by parameter mismatch. Meanwhile, the hierarchical relationship between frame period, time interval, and duration allows the adjustment of pulse parameters to adapt to different frame rate changes. When the frame rate fluctuates, each parameter can be updated synchronously to maintain the uniform distribution of backlight pulses within the frame period. This ensures that the frequency-doubled backlight can maintain a stable flicker frequency under different frame rate conditions, thus improving the system's adaptability.

[0040] Furthermore, when the system-on-a-chip detects that the current frame rate meets the triggering conditions for the low frame rate compensation mode, the system-on-a-chip determines that it needs to enter the low frame rate compensation mode. The trigger condition for low frame rate compensation mode can be that the current frame rate is less than or equal to the frame rate threshold, where the frame rate threshold can be set to 60Hz. At this time, the system-on-a-chip sends a configuration command to the screen driver chip through the bus, which can be an I2C bus or an SPI bus. After receiving the configuration command, the screen driver chip enters the pulse backlight mode. In pulse backlight mode, the screen driver chip needs to generate multiple backlight activation pulses in each frame cycle; Taking the dual-pulse backlight mode as an example, the dual-pulse backlight mode generates two backlight lighting pulses in each frame cycle. Specifically, the screen driver chip first calculates the frame period based on the current frame rate. The frame period is 1 second divided by the frame rate. For example, when the current frame rate is 60Hz, the frame period is approximately 16.67ms. The frame period can also be obtained directly by configuring a lookup table in the system-on-a-chip code. That is, the frame period values ​​corresponding to different frame rates are stored in the lookup table in advance. When the frame rate is determined, the corresponding frame period is obtained directly by looking up the table, without the need for real-time calculation, so as to improve the response speed. Subsequently, the screen driver chip sets the time interval between each backlight illumination pulse based on the frame period, and this time interval is set to half of the frame period; Taking 60Hz as an example, the frame period is 16.67ms, so the time interval is about 8.33ms, that is, the interval between backlight lighting pulses is about 8.33ms; In addition, the screen driver chip also sets the duration of two backlight illumination pulses based on this time interval, and this duration is set to 10% of the time interval; Taking an 8.33ms time interval as an example, the duration of each pulse is approximately 0.83ms. Therefore, the duty cycle of each pulse is approximately 10%. The cumulative lighting time of two pulses within a complete frame period accounts for approximately 20%. For example, within a 60Hz frame period, when the first pulse begins, the light stays on for 0.83ms and then turns off. After an interval of 8.33ms, the second pulse begins, and the light stays on for 0.83ms and then turns off, until the next frame period begins and the above process is repeated. With the above parameter configuration, the actual backlight illumination frequency is increased to 120Hz, while the cumulative illumination time accounts for only 20%, which not only eliminates the flickering sensation at low frame rates but also controls the instantaneous brightness impact.

[0041] In pulse backlight mode, the parameter configuration can be calculated by the system-on-a-chip and sent to the screen driver chip, or the screen driver chip can calculate it itself after the system-on-a-chip sends out the basic parameters. For example, the system-on-a-chip sends the current frame rate to the screen driver chip, which calculates the frame period based on the frame rate, and then calculates the time interval and duration based on the frame period, finally completing the parameter configuration of the pulse backlight mode.

[0042] Trigger determination step S3: Based on physical parameters, determine the trigger time for generating each backlight illumination pulse; In some embodiments, triggering the determination step S3 specifically involves: The screen driver chip determines the trigger time of the first backlight illumination pulse based on a preset compensation time, and determines the trigger time of each subsequent backlight illumination pulse in sequence based on the trigger time of the first backlight illumination pulse and the time interval.

[0043] The trigger time of the first backlight pulse is determined by the preset compensation time, so that the first pulse can avoid the unstable area at the beginning of the screen refresh and ensure that the screen has enough area to complete the refresh when the backlight is first lit, thus avoiding the exposure of the incomplete screen due to premature lighting. Meanwhile, the trigger times of subsequent pulses are determined sequentially based on the trigger time and time interval of the first pulse, so that each pulse is evenly distributed in sequence within the frame period, achieving uniform frequency doubling of the backlight lighting frequency. This avoids uneven brightness and uneven flicker perception caused by pulses being concentrated in a certain period of time, ensuring that the human eye receives uniform brightness stimulation within the frame period, and further improving visual comfort at low frame rates.

[0044] Furthermore, the triggering time of the first backlight illumination pulse is determined by combining an interrupt signal with a preset compensation time; Specifically, the screen driver chip or system-on-a-chip uses the rising or falling edge of the frame synchronization signal as the trigger interrupt source. When the interrupt signal arrives, it indicates the start of a new frame cycle. At this time, the backlight does not light up immediately, but waits for a preset compensation time before triggering the first backlight lighting pulse. This compensation time is not a fixed value, but is determined according to the display characteristics of the virtual reality device, including factors such as the screen placement, refresh direction and optical characteristics. For example, in virtual reality devices, because the display screen refreshes from the inside out, the central area of ​​the screen, the sweet spot, is refreshed first. Therefore, the compensation time should be at least longer than the time required for the sweet spot to complete its refresh. This ensures that when the first backlight pulse is triggered, the central area of ​​the human eye, which is most sensitive to the image, has already completed the image update and is in a stable state. If the compensation time is too short, the first pulse will be triggered too early, before the sweet spot has completed its refresh. The central area illuminated by the backlight will still be in the process of image change, and the human eye will directly perceive screen tearing or incompleteness. If the compensation time is too long, although the integrity of the image can be guaranteed, it will compress the time interval and illumination range between subsequent pulses, resulting in uneven brightness distribution. Therefore, the compensation time needs to balance the interval time and illumination range of each backlight pulse as much as possible while ensuring that the sweet spot area is refreshed, in order to obtain the best visual experience. Ideally, each backlight illumination pulse is evenly distributed within the frame period. For example, in dual-pulse mode, the two pulses are located near the halfway point of the frame period and the end of the frame period, respectively. That is, the first pulse is located at about the halfway point of the frame period and the second pulse is located at the end of the frame period, thereby achieving a uniform distribution of backlight brightness. The value of the compensation time can be obtained through experimental calibration or theoretical calculation; for example, by measuring the image integrity of the sweet spot area under different delay times using a high-speed camera, the delay time with the most complete image and the most uniform brightness distribution can be selected as the preset compensation time. The compensation time can also be dynamically adjusted according to different display characteristics to adapt to different usage scenarios and display content. For example, when the screen refresh direction or optical characteristics change, the system-on-a-chip can recalculate or read the corresponding compensation time from the lookup table and update it to the screen driver chip to ensure that the first backlight lighting pulse can be triggered after the sweet spot area is refreshed under various usage conditions, while maintaining the uniform distribution of each pulse within the frame period, so as to obtain good visual comfort and screen integrity under different usage conditions.

[0045] Area determination step S4: Before each trigger moment, obtain the proportion of the refreshed screen area in the display screen. If the proportion of the refreshed screen area reaches the area threshold, determine the backlight area to be lit based on the proportion of the refreshed screen area. In some embodiments, the region determination step S4 specifically involves: Before each trigger moment, the current scan line position of the display screen is obtained by reading the scan status register of the screen driver chip through the system-on-a-chip. Obtain the total number of vertical lines on the display screen, and calculate the percentage of the refreshed image area based on the total number of vertical lines and the current scan line position.

[0046] By reading the scan status register of the screen driver chip through the system-on-a-chip (SoC) to obtain the current scan line position and calculating the proportion of the refreshed image area based on the total number of vertical lines on the screen, the system achieves real-time and accurate acquisition of the screen refresh progress. This allows the system to accurately grasp the range of stable areas that have been refreshed on the screen at the current moment. This acquisition method directly utilizes the existing register data inside the screen driver chip, eliminating the need for additional hardware detection circuits and reducing system costs. At the same time, the calculated proportion provides a precise quantitative basis for subsequently determining the backlight area to be illuminated, enabling backlight control to make accurate decisions based on the real-time refresh progress and avoiding misjudgments and backlight control deviations caused by inaccurate refresh progress information.

[0047] Furthermore, for each backlight illumination pulse in pulse backlight mode, before the pulse triggering time arrives, the system-on-a-chip reads the scan status register inside the screen driver chip via the I2C bus or SPI bus to obtain the real-time scan status of the display screen at the current moment. The scan status register stores the position information of the scan line currently being refreshed, i.e., the current scan line position. The system-on-a-chip (SoC) reads this register via the bus to obtain the current scan line position. At the same time, the system-on-a-chip also obtains the total number of vertical lines of the display screen. The total number of vertical lines is the total number of lines in the vertical direction of the display screen. For example, for a display screen with a resolution of 2160×2160, its total number of vertical lines includes at least 2160 effective display lines, and may also include the number of lines corresponding to the vertical blanking area. The specific value depends on the configuration of the screen driver chip. The system-on-a-chip calculates the proportion of the refreshed screen area based on the total number of vertical lines on the screen and the current scan line position. The calculation method is to divide the current scan line position by the total number of vertical lines on the screen to obtain the proportion of the refreshed screen area. For example, if the current scan line position is line 1320 and the total number of vertical lines on the screen is 2200, then the proportion of the screen area that has been refreshed is approximately 1320÷2200≈0.6, or 60%.

[0048] Because the display screen uses an inside-out refresh order, that is, refreshes sequentially from the center of the screen to the edge, the refreshed screen area is a continuous area that expands outward from the center of the screen. After the system-on-a-chip calculates the proportion of the refreshed screen area, it compares the proportion of the refreshed screen area with the preset area threshold. The area threshold must be greater than 50%, preferably between 55% and 70%, to ensure that the refreshed screen area has a sufficiently stable area to light up the backlight, while reserving a safety margin to avoid lighting up the edge area where there is still a slight instability in the screen due to the recent refresh. If the proportion of the refreshed screen area reaches the area threshold, the system-on-a-chip determines the backlight area to be lit based on the proportion of the refreshed screen area. If the proportion of the refreshed screen area does not reach the area threshold, the system chip will not light up any backlight area at the time of the pulse trigger, skip the pulse, and wait for the next pulse trigger to re-execute the above judgment process.

[0049] For example, within a 60Hz frame cycle, when the first backlight illumination pulse is about to be triggered, the system-on-a-chip reads the scan status register through the bus to obtain the current scan line position, and calculates the proportion of the currently refreshed image area as 60% based on the total number of vertical lines on the screen. That is, about 60% of the image area has been refreshed, and this area is a continuous area extending outward from the center of the screen. Since the ratio reaches the preset area threshold, the system-on-a-chip determines that the pulse can light up the backlight, and determines the area of ​​the backlight to be lit based on the ratio. When the second backlight illumination pulse is about to be triggered, the system-on-a-chip (SoC) executes the above reading and calculation process again. At this time, the screen refresh rate is close to 100%. The SoC determines the new backlight area to be illuminated based on the updated ratio. This area is larger than the area to be illuminated corresponding to the first pulse.

[0050] It should be noted that the screen driver chip has multiple scan status registers, each corresponding to different scan line position information. The system-on-a-chip selects the appropriate register to read according to actual needs. The system-on-a-chip does not perform a read operation at every pulse trigger moment. Instead, it reads the scan status register at a fixed sampling period and uses the latest read ratio of the refreshed screen area to make a judgment when the pulse trigger moment arrives, so as to reduce the bus communication frequency and reduce the computational overhead of the system-on-a-chip. While obtaining the current scan line position, the system-on-a-chip also obtains relevant parameters such as the total number of vertical lines and the number of blanking lines on the display screen, so as to more accurately calculate the proportion of the refreshed screen area.

[0051] like Figure 2 As shown, Figure 2 This is a timing diagram for enabling backlight partitions. The horizontal axis represents time, and the vertical axis, from top to bottom, represents the frame synchronization signal, the refresh progress curve, and the backlight partition enable signal.

[0052] The frame synchronization signal is a periodic square wave. The time interval between two adjacent rising edges is one frame period. The figure shows the first and second adjacent frames. In each frame period, the refresh progress curve gradually rises from 0% at the beginning of the frame and reaches 100% at the end of the frame period. This represents the complete process of the display screen refreshing from the center to the edge of the screen. The refresh progress has an approximately linear relationship with time. The backlight partition enable signal generates two effective pulse segments in each frame period, namely two backlight lighting pulses, which correspond to the trigger times of backlight lighting pulse P1 and backlight lighting pulse P2, respectively. The effective level of the backlight partition enable signal generated at the moment of backlight lighting pulse P1 is located after the refresh progress reaches the preset area threshold. At this time, the proportion of the refreshed screen area meets the lighting conditions, and the screen driver chip enables the corresponding backlight partition. The effective level of the backlight partition enable signal generated at the moment when the backlight lighting pulse P2 is triggered is located when the refresh progress is close to 100%. At this time, most areas of the screen have been refreshed, and the screen driver chip enables a larger area of ​​the updated backlight partition. The two durations are of equal width, corresponding to the duration of the backlight illumination pulse, and the interval between the two pulse segments is approximately half the frame period. Unenabled backlight zones remain off, ensuring that the backlight only illuminates in stable areas that have been refreshed.

[0053] In some embodiments, the region determination step S4 further includes: If the proportion of the refreshed screen area reaches the area threshold, the area to be illuminated is determined based on the difference between the proportion of the refreshed screen area and the preset safety margin.

[0054] By using the difference between the ratio of the refreshed screen area and the preset safety margin as the basis for determining the backlight area to be lit when the ratio of the refreshed screen area reaches the area threshold, the area to be lit is completely within the stable area that has been refreshed. This avoids screen defects caused by minor instability in the edge areas due to the refreshed screen. The introduction of the safety margin compensates for the system delay between reading the refresh state and the actual backlight lighting, as well as the residual response time of the liquid crystal in the boundary area. This ensures that all areas covered by the backlight are completely stable when the backlight is lit, further improving the reliability of screen integrity and effectively eliminating edge blurring and minor tearing.

[0055] Furthermore, the partition enable calculation logic built into the system-on-a-chip or screen driver chip determines the backlight area to be lit based on the proportion of the already refreshed screen area. Set the proportion of the refreshed screen area to R. The proportion of the backlight area to be lit to the full screen area is R minus the preset safety margin Δ. The value of the preset safety margin Δ ranges from 5% to 10%. It is used to ensure that the backlight area to be lit is completely inside the refreshed stable area in space, so as to avoid screen defects caused by the slight instability of the boundary area after the refresh is completed. The preset safety margin Δ can be dynamically adjusted according to the current frame rate or refresh rate. When the frame rate is low or the refresh rate is slow, the safety margin is increased to compensate for the longer LCD response time and system latency. The system-on-a-chip or screen driver chip expands outward from the center of the screen according to the layout information of the backlight partitions, and sets the area that is at the front of the backlight partitions and whose corresponding display area ratio does not exceed R-Δ as the backlight area to be lit. Since virtual reality displays use an inside-out refresh order, the backlight zones arranged from the center of the screen outwards are in the same order as the refresh completion. Therefore, the first consecutive zone is selected as the area to be lit.

[0056] During each backlight illumination pulse, the screen driver chip only outputs a drive signal to the backlight partition corresponding to the backlight area to be illuminated, controlling only the backlight unit of the corresponding area in the partition backlight module to be illuminated, while other backlight partitions not included in the backlight area to be illuminated remain in the off state and do not output drive signals. For example, such as Figure 3As shown, if the first backlight illumination pulse in the current frame period is about to be triggered, and the proportion R of the refreshed screen area read by the system chip is 60%, and the preset safety margin Δ is 5%, then the proportion of the backlight area to be illuminated to the full screen area is 55%, and this area is the central concentric area with the center of the screen as the origin. The screen driver chip outputs a lighting drive signal with a width of approximately 0.83ms only to the backlight zone corresponding to the central 55% area, so that the backlight unit in that area is lit up; At this point, the human eye sees a completely updated, tear-free, and clear image directly in the center of its field of vision. However, in areas where the image has not been refreshed, the corresponding backlight zones are not lit, so the user cannot see any residual images from the previous frame that may exist in these areas. Then, when the second backlight illumination pulse is triggered, the system-on-a-chip reads the refresh progress again. At this time, the refresh progress is close to 100%, for example, reaching 95%. Then the proportion of the backlight area to be illuminated is 90% of the total screen area. The screen driver chip illuminates the larger central concentric area again, also using a low duty cycle pulse drive. The backlight areas to be lit by the two pulses are different. The area corresponding to the second pulse is larger than the area corresponding to the first pulse. However, both areas are concentrically expanded with the center of the screen as the origin, which is consistent with the screen's refresh order from the inside out. The total backlight illumination time of the two pulses accounts for about 20% within the 60Hz frame cycle.

[0057] If, due to excessive rendering load, the proportion of the refreshed screen area read by the system-on-chip at the moment the first backlight illumination pulse is triggered is still less than 50% in a certain frame, the system-on-chip instructs the screen driver chip to skip the pulse, that is, not to output any drive signal at the moment the pulse is triggered, not to illuminate any backlight partition, and to wait for the moment the second backlight illumination pulse is triggered before making a judgment. If the screen area ratio has not reached the area threshold by the time the second backlight illumination pulse is triggered, then skip it until the next frame cycle starts judging again. The aforementioned skipping mechanism ensures that the backlight is only turned on when the screen has a sufficient area to complete the refresh and stabilize, effectively guaranteeing image integrity.

[0058] Furthermore, the determination of the backlight area to be illuminated is performed by the system-on-a-chip (SoC). After the SoC calculates the set of backlight partition numbers corresponding to the backlight area to be illuminated, it sends the set to the backlight control register of the screen driver chip via the bus. The screen driver chip then outputs a drive signal based on the set. The determination of the backlight area to be lit can also be performed by the partition enable calculation logic built into the screen driver chip. The system chip only sends the ratio R of the refreshed screen area and the preset safety margin Δ to the screen driver chip. The screen driver chip calculates the backlight area to be lit on its own and directly outputs the drive signal, which reduces the amount of communication data between the system chip and the screen driver chip and improves the response speed.

[0059] Backlight illumination step S5: When each trigger moment arrives, the screen driver chip controls the backlight area to be illuminated to be lit.

[0060] In some embodiments, the backlight illumination step S5 specifically includes: At each trigger moment, the screen driver chip outputs a drive signal to the backlight zone corresponding to the backlight area to be lit, and controls the backlight unit of the backlight zone to be lit based on the drive signal.

[0061] By outputting driving signals to the backlight zones corresponding to the backlight areas to be lit through the screen driver chip, the backlight control is refined from full-screen lighting to precise driving by zones. Only the backlight zones corresponding to the stable areas that have been refreshed are lit, while the backlight zones corresponding to the incomplete areas remain off. This fundamentally avoids the problem of the incomplete areas exposing the residual image of the previous frame due to backlight illumination during the screen refresh process. Meanwhile, the zone-based output driving method ensures that the spatial distribution of backlight brightness is precisely matched with the screen refresh rate, guaranteeing that priority refresh areas such as the center of the field of view are always fully illuminated, thereby improving the overall clarity of the display and the user's viewing experience.

[0062] Furthermore, when the trigger time of each backlight illumination pulse arrives, the screen driver chip outputs a drive signal to the backlight partition corresponding to the determined backlight area to be illuminated. The screen driver chip has a backlight control register, which stores a set of backlight partition numbers corresponding to the backlight area to be lit. When the trigger moment arrives, the screen driver chip reads the register and outputs a pulse width modulation drive signal to the corresponding backlight zone according to the set of zone numbers in the register. The drive signal has a predetermined duration, which has been set in the mode configuration step, for example, 10% of the time interval. Taking a 60Hz frame rate as an example, the duration is approximately 0.83ms. During this duration, the screen driver chip maintains the driving signal at an effective level, driving the backlight unit in the corresponding backlight zone to light up. After the duration ends, the driving signal is switched to an ineffective level, and the backlight unit is turned off. Because the backlight zones are arranged in an array in space, each backlight zone contains several backlight units. For example, in a mini LED backlight module, each backlight zone can contain multiple LED beads. When the screen driver chip outputs a driving signal to a certain backlight zone, all the backlight units in that zone light up simultaneously, illuminating the corresponding screen area. The backlight area to be lit usually contains multiple consecutive backlight zones, which are arranged outward from the center of the screen, consistent with the refresh order of the display from the inside out. Therefore, when the screen driver chip outputs driving signals to these zones, the illuminated backlight area is spatially presented as a concentric area with the center of the screen as the origin, which coincides with the center of the human eye's field of vision, ensuring that the area most sensitive to the human eye is always fully illuminated. When the second backlight activation pulse is triggered, the screen driver chip executes the above process again. Since the proportion of the refreshed screen area has increased at this time, the set of backlight partition numbers corresponding to the backlight area to be illuminated has also been updated. The screen driver chip outputs drive signals to the updated, larger range of backlight partitions. The duration of the drive signal is the same as that of the first pulse, both being a predetermined duration, such as 0.83ms. Therefore, the backlight area illuminated by the second pulse is larger than that illuminated by the first pulse, but the duration of the two illuminations is the same, both using low duty cycle drive. If a pulse is skipped, meaning the system chip determines that the refreshed screen area ratio has not reached the area threshold, the screen driver chip will not output a drive signal to any backlight partition at the trigger moment, and all backlight partitions will remain off. This skipping mechanism is achieved by the screen driver chip checking whether there is a valid set of backlight partition numbers in the backlight control register. If the register is empty or the set stored in it is an empty set, the screen driver chip will not output any drive signal. Furthermore, the voltage and current amplitudes of the drive signal can be configured according to the electrical characteristics of the backlight unit to ensure that the backlight unit reaches the target brightness within a predetermined duration. The screen driver chip has multiple pulse width modulation channels. Each backlight zone corresponds to an independent pulse width modulation channel. The duration and output timing of the driving signal can be configured independently for each channel. Before outputting the drive signal, the screen driver chip performs an enable check to confirm that the pulse corresponding to the current trigger moment has not been skipped and that the set of backlight partition numbers corresponding to the backlight area to be lit is not empty. If the check passes, the drive signal is output; if the check fails, no drive signal is output.

[0063] Based on the above adaptive backlight control method, by entering the pulse backlight mode and configuring physical parameters at low frame rates, the backlight generates multiple lighting pulses at a higher frequency, thereby increasing the flicker frequency perceived by the human eye to an insensitive range and effectively eliminating the flicker sensation at low frame rates. Meanwhile, by obtaining the proportion of the refreshed screen area before the triggering time and determining the backlight area to be lit accordingly, the backlight is lit only in the stable area, avoiding image tearing and ghosting caused by the LCD not being fully flipped. In addition, through the coordinated control of the system-on-a-chip and the screen driver chip, dynamic matching between the backlight illumination area and the screen refresh rate is achieved. While eliminating flicker and avoiding screen tearing, the pulse distribution method with a low duty cycle reduces the instantaneous brightness impact, alleviates eye fatigue caused by close-range viewing, and reduces the visibility of screen display unevenness defects.

[0064] In some embodiments, if the virtual reality headset is not equipped with a partitioned backlight module or to simplify the backlight control logic, a longer liquid crystal stabilization time can be obtained by increasing the vertical blanking period in the frame timing, thereby achieving frequency doubling backlight illumination without dynamic partitioning control. Figure 4 A comparative diagram of standard timing and extended vertical blanking period timing provided for embodiments of the present invention is shown below. Figure 4 As shown, under standard timing, the time interval between two adjacent pulses of the frame synchronization signal is one frame period, which corresponds to the frame period when the input frame rate is 60Hz, approximately 16.67ms. Within each period of the frame synchronization signal, there are vertical leading edge, valid image line and vertical trailing edge in sequence. The valid image line occupies most of the frame period. For example, the refresh time of the valid image line is about 12ms and the vertical trailing edge is about 4.67ms. The vertical trailing edge refers to the idle period after the end of each frame of valid image data transmission and before the start of the next frame's vertical synchronization signal, while the vertical leading edge refers to the idle period after the start of the vertical synchronization signal and before the start of valid image data transmission.

[0065] With the extended vertical blanking period timing, the period of the frame synchronization signal is the same as the standard timing, but the vertical trailing edge is significantly extended, and the duration of the effective image line is compressed to the beginning of the frame period, thus creating an idle period in the end of the frame period. Specifically, the system-on-a-chip writes new timing parameters into the timing configuration register of the signal conversion bridge or screen driver chip, significantly extending the vertical trailing edge time of the input frame. By extending the vertical trailing edge, the refresh of the effective image lines within a frame is compressed into the early part of the frame period, while the later part forms a longer idle period. Because the refresh time of the effective image lines is compressed, the pixel clock frequency needs to be increased accordingly in order to complete the data transmission and LCD driving of all effective lines in a shorter time, which will result in a slight increase in pixel clock frequency and power consumption. For example, in an alternative approach that extends the vertical blanking period, the system-on-a-chip (SoC) modifies the timing configuration register to extend the vertical trailing edge to 8ms while compressing the refresh time of valid image lines to 8.67ms. This way, the first 8.67ms of the frame period is used to refresh all valid image lines, leaving the remaining 8ms as an idle period.

[0066] During this idle period, all valid image lines have been refreshed, and the liquid crystal molecules have completed the flip from the previous frame to the current frame and reached a completely stable state, resulting in a static and stable screen. At this time, the backlight control circuit evenly distributes two low duty cycle lighting pulses at a frequency of 120Hz during the idle period. The duty cycle of each pulse is approximately 10%, meaning the duration of each pulse is approximately 10% of the pulse interval. Both pulses fall within the time period after the liquid crystal has fully stabilized, so even if the entire backlight module is fully lit, there will be no screen tearing or ghosting caused by the liquid crystal not having completed its flip-up. For example, during the 8ms idle period, the screen driver chip schedules the first backlight activation pulse at approximately 4ms, starting from the beginning of the idle period, and then turns it off after about 0.4ms. Then, it schedules the second backlight activation pulse at approximately 8ms, and then turns it off after about 0.4ms. Both backlight activation pulses fall within the time period after the liquid crystal has fully stabilized, so even if the backlight is fully illuminated, there will be no screen tearing. The interval between the two backlight illumination pulses is about 4.0ms, which is about half of the frame period. Therefore, the flicker frequency perceived by the human eye is equivalent to 120Hz, eliminating the flicker sensation at low frame rates. The cumulative lighting time is approximately 0.8ms, which is about 4.8% of the frame period of 16.67ms. If the cumulative duty cycle of approximately 20% is required to achieve the same cumulative duty cycle as the dynamic partition scheme, the duty cycle of each backlight lighting pulse can be appropriately increased to approximately 10%, so that the cumulative lighting time of two backlight lighting pulses is approximately 1.67ms.

[0067] The above solution eliminates the need for partition control, reading the scan status register, and calculating the backlight area to be lit, significantly simplifying the backlight control logic. At the cost of a slight increase in pixel clock frequency and power consumption, it achieves simplified backlight control logic and reduced hardware costs by eliminating the need for partitioned backlight modules. It is suitable for virtual reality headsets that do not have partitioned backlight modules or for scenarios that require simplified control logic.

[0068] Some embodiments of the present invention further provide an adaptive backlight control device for a virtual reality device display, comprising: A signal conversion bridge is used to extract frame synchronization signals from the input video signal; The system-on-a-chip (SoC) is connected to the signal conversion bridge chip. The SoC is used to calculate the frame rate based on the frame synchronization signal and generate configuration instructions when the frame rate is less than or equal to the frame rate threshold. The screen driver chip is connected to the system-on-a-chip. After receiving the configuration command, the screen driver chip enters the pulse backlight mode and sets the physical parameters for generating the backlight lighting pulse. Based on the physical parameters, the trigger time of each backlight lighting pulse is determined. The display screen is connected to the screen driver chip and is used to display images. The system-on-a-chip is also used to obtain the proportion of the refreshed screen area in the display before each triggering moment, and to determine the backlight area to be lit based on the proportion of the refreshed screen area. The screen driver chip is also used to control the backlight area in the display to be lit when each trigger moment arrives.

[0069] Through the hardware architecture design of signal conversion bridge, system-on-a-chip, screen driver chip and display screen, a complete closed-loop control link was constructed, from frame synchronization signal extraction, frame rate judgment, pulse mode configuration to trigger time determination, area judgment and backlight lighting. The connection relationship and data flow between each component are clear, ensuring stable transmission of control signals and reliable output of backlight drive. The system-on-a-chip (SoC) and the screen driver chip have clearly defined functions. The SoC is responsible for frame rate calculation and region determination, while the screen driver chip is responsible for pulse parameter setting and backlight driving. The two work together to provide hardware support for backlight frequency multiplication and dynamic zone lighting at low frame rates, providing a stable and reliable hardware operating platform for adaptive backlight control methods.

[0070] like Figure 5 As shown, the device includes a signal conversion bridge, a system-on-a-chip, a screen driver chip, and a display screen; wherein the display screen consists of a liquid crystal panel and an LED backlight module disposed on the backlight side of the liquid crystal panel.

[0071] The signal conversion bridge is connected to the input video signal terminal and the system-on-a-chip (SoC) respectively. It is used to receive the input video signal, convert the input video signal into a MIPI video stream, extract the frame synchronization signal from the input video signal, send the MIPI video stream to the screen driver chip, and send the frame synchronization signal to the SoC. The system-on-a-chip connects to the signal conversion bridge and connects to the screen driver chip via I2C or SPI bus. The system-on-a-chip integrates a frame rate detection module and partition enable calculation logic. The frame rate detection module is used to receive the frame synchronization signal sent by the signal conversion bridge chip and calculate the current frame rate based on the frame synchronization signal. The partition enable calculation logic is used to calculate the set of backlight partition numbers corresponding to the backlight area to be lit based on the proportion of the refreshed screen area and the preset safety margin. The screen driver chip connects the system-on-a-chip (SoC) and the display screen. It is used to receive configuration instructions sent by the SoC, enter the pulse backlight mode, and set the physical parameters for generating backlight lighting pulses. Based on the physical parameters, it determines the trigger time of each backlight lighting pulse and outputs driving signals to the LED backlight module of the display screen according to the backlight area to be lit, so as to control the corresponding backlight zone to light up. At the same time, the screen driver chip is also used to drive the LCD panel to display the screen. The screen driver chip has a built-in scan status register. The system-on-a-chip reads the scan status register through the I2C or SPI bus to obtain the current scan line position of the LCD panel in order to calculate the proportion of the screen area that has been refreshed. The display screen is connected to the screen driver chip. Its LCD panel is used to receive the drive signals from the screen driver chip and display the image. Its LED backlight module is used to receive the drive signals output by the screen driver chip and control the corresponding backlight zones to light up based on the drive signals, so as to provide backlight illumination for the LCD panel.

[0072] The aforementioned device achieves adaptive control of backlight frequency multiplication and dynamic zone lighting at low frame rates through the coordinated operation of the signal conversion bridge, system-on-a-chip, screen driver chip, and display screen.

[0073] In some embodiments, the screen driver chip is further configured to: In pulse backlight mode, the frame period is calculated based on the frame rate, and the time interval between two adjacent backlight lighting pulses is set based on the frame period. The duration of each backlight lighting pulse is also set based on the time interval, which are used as physical parameters.

[0074] By having the screen driver chip calculate the frame period based on the frame rate in pulse backlight mode, and set the time interval and duration based on the frame period, the screen driver chip has the ability to independently complete the pulse parameter configuration. It can adaptively adjust the pulse parameters according to the current frame rate without the intervention of the system-on-a-chip, reducing the computational overhead and bus communication burden of the system-on-a-chip. Meanwhile, the recursive calculations between frame period, time interval, and duration are all completed inside the screen driver chip, which shortens the transmission path and response delay of parameter configuration, enabling the update of pulse parameters to keep pace with frame rate changes. This ensures that the dual-pulse mode can quickly and accurately complete parameter configuration under different frame rate conditions, improving the response speed and adaptability of backlight control.

[0075] In some embodiments, the system-on-a-chip is further configured to: Before each trigger moment, the scan status register of the screen driver chip is read to obtain the current scan line position of the display screen; Obtain the total number of vertical lines on the display screen, and calculate the percentage of the refreshed image area based on the total number of vertical lines and the current scan line position.

[0076] The system-on-a-chip (SoC) reads the scan status register of the screen driver chip to obtain the current scan line position and calculates the proportion of the refreshed image area based on the total number of vertical lines on the screen. This allows the SoC to accurately determine the range of refreshed areas on the screen based on real-time refresh technology, providing accurate quantitative basis for determining the backlight area to be lit. This acquisition method makes full use of the existing register data inside the screen driver chip, eliminating the need for additional detection circuits and reducing hardware costs. At the same time, the calculated proportion provides accurate input parameters for subsequent area judgment, ensuring the matching accuracy between the backlight area to be lit and the refreshed stable area, and avoiding backlight control deviations caused by inaccurate refresh progress information.

[0077] It should be noted that the above is a reference method and device for adaptive backlight control of virtual reality device display, and the present invention is not limited thereto.

[0078] This invention extracts frame synchronization signals and detects frame rates through a signal conversion bridge chip. When the frame rate meets the low frame rate condition, the system-on-a-chip configures the screen driver chip to enter pulse backlight mode and sets physical parameters to generate backlight lighting pulses. Based on the physical parameters, the trigger time of each pulse is determined. Before each trigger time, the proportion of the refreshed screen area is obtained and the backlight area to be lit is determined according to the proportion. When each trigger time arrives, the backlight area to be lit is controlled to be lit. This achieves multiple technical effects, such as increasing the backlight flicker frequency to a range insensitive to the human eye when the graphics card outputs a low frame rate to eliminate flicker, obtaining the screen refresh progress in real time and lighting only the stable area to avoid screen tearing, and reducing the instantaneous brightness impact to reduce eye fatigue through low duty cycle pulse distribution. This solves the technical problems in the prior art where simple backlight frequency doubling causes screen tearing and ghosting, and the scrolling backlight solution cannot eliminate low-frequency flicker by only following the original frame rate scan, and it is difficult to achieve a balance between brightness requirements and viewing comfort.

[0079] Finally, it should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0080] The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them; although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications can still be made to the specific implementation of the present invention or equivalent substitutions can be made to some technical features without departing from the spirit of the technical solutions of the present invention, and all such modifications and substitutions should be covered within the scope of the technical solutions claimed in the present invention.

Claims

1. An adaptive backlight control method for a virtual reality device display, characterized in that, include: Frame rate detection steps: Acquire the input video signal, extract the frame synchronization signal from the input video signal through the signal conversion bridge, and calculate the frame rate based on the frame synchronization signal; Mode configuration steps: If the frame rate is less than or equal to the frame rate threshold, the screen driver chip is controlled by the system-on-a-chip to enter the pulse backlight mode, and the physical parameters for generating backlight lighting pulses are set to generate each backlight lighting pulse. Trigger determination step: Based on the physical parameters, determine the trigger time for generating each of the backlight illumination pulses; Area determination steps: Before each triggering moment, obtain the proportion of the refreshed screen area in the display screen. If the proportion of the refreshed screen area reaches the area threshold, determine the backlight area to be lit based on the proportion of the refreshed screen area. Backlight illumination steps: When each of the aforementioned trigger moments arrives, the screen driver chip controls the backlight area to be illuminated to be lit.

2. The adaptive backlight control method for virtual reality device display according to claim 1, characterized in that, The specific steps for configuring the mode are as follows: If the frame rate is less than or equal to the frame rate threshold, a configuration command is sent to the screen driver chip through the system-on-a-chip. After receiving the configuration command, the screen driver chip enters the pulse backlight mode.

3. The adaptive backlight control method for virtual reality device display according to claim 2, characterized in that, The mode configuration step also includes: In the pulse backlight mode, the screen driver chip calculates the frame period based on the frame rate, sets the time interval between two adjacent backlight illumination pulses based on the frame period, and sets the duration of each backlight illumination pulse based on the time interval, as the physical parameter.

4. The adaptive backlight control method for virtual reality device display according to claim 3, characterized in that, The trigger determination step is specifically as follows: The screen driver chip determines the trigger time of the first backlight illumination pulse based on a preset compensation time, and determines the trigger time of each subsequent backlight illumination pulse in sequence based on the trigger time of the first backlight illumination pulse and the time interval.

5. The adaptive backlight control method for virtual reality device display according to claim 1, characterized in that, The specific steps for determining the region are as follows: Before each of the aforementioned triggering moments, the system-on-a-chip reads the scan status register of the screen driver chip to obtain the current scan line position of the display screen; Obtain the total number of vertical lines on the display screen, and calculate the proportion of the refreshed image area based on the total number of vertical lines and the current scan line position.

6. The adaptive backlight control method for virtual reality device display according to claim 1, characterized in that, The region determination step also includes: If the proportion of the refreshed screen area reaches the area threshold, the backlight area to be lit is determined based on the difference between the proportion of the refreshed screen area and the preset safety margin.

7. The adaptive backlight control method for virtual reality device display according to claim 1, characterized in that, The backlight activation step is specifically as follows: When each trigger moment arrives, the screen driver chip outputs a driving signal to the backlight partition corresponding to the backlight area to be lit, and controls the backlight unit of the backlight partition to be lit based on the driving signal.

8. An adaptive backlight control device for a virtual reality device display, characterized in that, include: A signal conversion bridge is used to extract frame synchronization signals from the input video signal; A system-on-a-chip (SoC) is connected to the signal conversion bridge chip. The SoC is used to calculate the frame rate based on the frame synchronization signal and generate a configuration instruction when the frame rate is less than or equal to a frame rate threshold. A screen driver chip is connected to the system-on-a-chip. The screen driver chip is used to enter the pulse backlight mode after receiving the configuration command, and set the physical parameters for generating backlight lighting pulses, and determine the trigger time of each backlight lighting pulse based on the physical parameters. A display screen is connected to the screen driver chip, and the display screen is used to display images; The system-on-a-chip is also used to obtain the proportion of the refreshed screen area in the display screen before each triggering time, and to determine the backlight area to be lit based on the proportion of the refreshed screen area. The screen driver chip is also used to control the backlight area to be lit in the display screen to be lit when each of the trigger times arrives.

9. The adaptive backlight control device for virtual reality device display according to claim 8, characterized in that, The screen driver chip is also configured to: In the pulse backlight mode, the frame period is calculated based on the frame rate, and the time interval between two adjacent backlight lighting pulses is set based on the frame period. The duration of each backlight lighting pulse is also set based on the time interval, as the physical parameter.

10. The adaptive backlight control device for virtual reality device display according to claim 8, characterized in that, The system-on-chip is also configured to: Before each trigger moment, the scan status register of the screen driver chip is read to obtain the current scan line position of the display screen; Obtain the total number of vertical lines on the display screen, and calculate the proportion of the refreshed image area based on the total number of vertical lines and the current scan line position.

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