Antiferroelectric multilayer ceramic capacitor with in-layer heterostructure and method of manufacturing the same

Abstract

The application provides a kind of anti-ferroelectric multilayer ceramic capacitor with in-layer heterostructure and its preparation method, belong to electronic information material and component field, the anti-ferroelectric multilayer ceramic capacitor includes multilayer anti-ferroelectric dielectric layer and inner electrode;Inner electrode is between adjacent anti-ferroelectric dielectric layer;Anti-ferroelectric dielectric layer is formed by two layers of the same thickness anti-ferroelectric thick film superposition composite unit, composite unit is divided into two kinds of structure of homogeneity AA type and heterogeneity AB type;Homogeneity AA type composite unit is formed by two layers of the same component anti-ferroelectric thick film superposition;Heterogeneity AB type composite unit is formed by one layer of tetragonal phase anti-ferroelectric thick film and one layer of orthorhombic phase anti-ferroelectric thick film superposition.The application builds tetragonal phase / orthorhombic phase hetero-interface in single dielectric layer and controls its proportion, induces interface polarization and interface strain synergistic effect, so that high energy storage density and high energy storage efficiency can be realized simultaneously, and the temperature stability of energy storage performance is improved.

Description

Technical Field

[0001] This invention relates to the field of electronic information materials and components, specifically to an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure and its preparation method. Background Technology

[0002] With the rapid development of global energy technologies, pulsed power technology has been widely applied in various fields such as industrial manufacturing, biomedicine, construction engineering, and military weaponry. Dielectric capacitors are the core energy storage components of pulsed power devices. Due to their high power density and rapid charging and discharging capabilities, they possess enormous application potential and market value in military fields such as directed energy weapons and high-power laser weapons, as well as in civilian fields such as particle beam cutting and electric vehicles.

[0003] With the rapid development of new energy vehicles, 5G communication, and high-power pulse technology, higher requirements are being placed on the comprehensive energy storage performance of dielectric capacitors. The energy storage dielectric material is a key factor determining the energy storage performance of dielectric capacitors. Among them, antiferroelectric materials, due to their field-induced antiferroelectric-ferroelectric phase transition and double hysteresis loops, have become highly promising energy storage dielectric materials. Antiferroelectric multilayer ceramic capacitors (MLCCs), relying on multilayer dielectric thick-film stacking and interdigitated electrode structures, can effectively increase capacitance within a limited volume and are currently the mainstream device form. However, traditional antiferroelectric MLCCs use a single-layer thick-film structure between the two inner electrodes. The design approach mainly focuses on improving the electrical characteristics of a single dielectric layer through component doping, grain size control, or sintering process optimization, relying on material bulk modification to optimize energy storage performance. The aforementioned single-layer dielectric unit structure lacks a flexibly designable heterogeneous interface system, making it difficult to utilize interface effects to control the polarization and breakdown characteristics of antiferroelectrics, thus hindering the application of the structural advantages of heterogeneous interfaces in MLCCs.

[0004] In view of this, it is necessary to design an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure and its preparation method to solve the above problems. Summary of the Invention

[0005] In view of the technical problems existing in the background art, this application provides an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure and its preparation method, aiming to solve the technical problem that existing antiferroelectric multilayer ceramic capacitors cannot simultaneously achieve high energy storage density and high energy storage efficiency.

[0006] In a first aspect, this application provides an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, comprising a multilayer antiferroelectric dielectric layer and an internal electrode; The internal electrode is located between adjacent antiferroelectric layers; The antiferroelectric layer is formed by stacking two antiferroelectric thick films of the same thickness to form a composite unit. The composite unit is divided into two types of structures: homogeneous AA type and heterogeneous AB type. The homogeneous AA type composite unit is formed by stacking two antiferroelectric thick films of the same composition. The heterogeneous AB type composite unit is formed by stacking a tetragonal antiferroelectric thick film and a cross-opposite antiferroelectric thick film. The multilayer antiferroelectric layer is formed by mixing and stacking the homogeneous AA-type composite units and the heterogeneous AB-type composite units in a preset ratio; wherein the heterogeneous AB-type composite units account for 30% to 100% of all composite units.

[0007] As a further improvement of this application, the two antiferroelectric thick films in the composite unit have the same thickness, and both are 5~20 μm.

[0008] As a further improvement of this application, the multilayer antiferroelectric layer is an antiferroelectric layer with a total of 3 composite units formed by stacking AA-AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AB.

[0009] As a further improvement of this application, the multilayer antiferroelectric layer is formed by periodic stacking, and the stacking form includes one of AA-AA-AB cycle, AA-AB cycle, and AB continuous cycle.

[0010] As a further improvement of this application, the dielectric layer A in the homogeneous AA-type composite unit is (Pb 1-m- 1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05 O3 is a tetragonal antiferroelectric material, where the values ​​of x and m both range from 0.01 to 0.05. Or the dielectric layer A in the homogeneous AA-type composite unit is (Pb) 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 O3 is an orthogonal antiferroelectric material, where the values ​​of y and n are both in the range of 0.01 to 0.05.

[0011] As a further improvement of this application, in the heterogeneous AB-type composite unit, when the dielectric layer A is a tetragonal opposite ferroelectric material, the dielectric layer B is an orthogonal opposite ferroelectric material; when the dielectric layer A is an orthogonal opposite ferroelectric material, the dielectric layer B is a tetragonal opposite ferroelectric material.

[0012] As a further improvement of this application, the adjacent inner electrodes are staggered to form an interdigitated electrode structure; the inner electrodes are prepared using one or more of silver, palladium, and platinum. Above and below the multilayer antiferroelectric dielectric layer, there are also antiferroelectric material sacrificial layers stacked.

[0013] Secondly, this application provides a method for preparing an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, comprising the following steps: S1. Preparation of pre-calcined powder: After ball milling, drying and calcination of tetragonal opposite ferroelectric components and orthogonal opposite ferroelectric components respectively, a second ball milling and drying process is performed to obtain tetragonal opposite ferroelectric pre-calcined powder and orthogonal opposite ferroelectric pre-calcined powder. S2. Casting: The tetragonal opposite ferroelectric pre-calcined powder and the orthogonal opposite ferroelectric pre-calcined powder are respectively prepared into casting slurries, and after vacuum degassing, they are cast to obtain tetragonal opposite ferroelectric thick films and orthogonal opposite ferroelectric thick films. S3. Composite unit preparation: AA type composite unit is prepared by stacking two identical tetragonal anti-ferroelectric thick films, and AB type composite unit is prepared by stacking one tetragonal anti-ferroelectric thick film and one orthogonal anti-ferroelectric thick film. After hot pressing, the two anti-ferroelectric thick films are tightly bonded together. S4. Internal electrode printing: The prepared composite unit is cut and a metal internal electrode is printed on the surface of the film using a screen printing process; S5. Preparation of multilayer ceramic capacitor green blank: According to the preset ratio and stacking method, AA-type composite units and AB-type composite units with internal electrodes are stacked from bottom to top. At the same time, antiferroelectric sacrificial layers are stacked on the upper and lower surfaces of the overall structure. Then, the whole structure is subjected to hot pressing and cold isostatic pressing to obtain an antiferroelectric multilayer capacitor green blank with an intralayer heterostructure. S6. Debinding and sintering: The antiferroelectric multilayer capacitor green blank is subjected to high-temperature debinding and sintering treatment; S7. End electrode preparation: After sintering and natural cooling, silver electrode paste is coated on the left and right end faces of the capacitor, and the end electrodes are prepared by sintering to obtain an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure.

[0014] As a further improvement of this application, in step S1, the tetragonal antiferroelectric material composition is (Pb 1-m- 1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05The raw materials PbO, BaCO3, La2O3, ZrO2, SnO2, and TiO2 are mixed according to the nominal stoichiometric ratio of the metal elements in the component; the orthogonal opposite ferroelectric material component is (Pb 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 PbO, BaCO3, La2O3, ZrO2 and SnO2 raw materials are mixed according to the nominal chemical ratio of the metal elements in the component.

[0015] As a further improvement of this application, in steps S3 and S5, the temperature of the hot pressing treatment is 50~90℃, the pressure is 2~25 MPa, and the holding time is 1~30 min. In step S5, the pressure of the cold isostatic pressing treatment is 20~200 MPa, and the holding time is 10~30 min; In step S6, the high-temperature debinding is performed by holding the material at a temperature of 450~600 ℃ for 30~300 min; the sintering treatment is performed by holding the material at a temperature of 1050~1200 ℃ for 2~6 h.

[0016] The beneficial effects of this application are as follows: This application provides an antiferroelectric multilayer ceramic capacitor with an intralayer heterogeneous structure and its fabrication method. The antiferroelectric multilayer ceramic capacitor includes multiple antiferroelectric dielectric layers and an inner electrode; the inner electrode is located between adjacent antiferroelectric dielectric layers; the antiferroelectric dielectric layers are formed by stacking two antiferroelectric thick films of the same thickness to form a composite unit, and the composite units are divided into two types: homogeneous AA type and heterogeneous AB type; the homogeneous AA type composite unit is formed by stacking two antiferroelectric thick films of the same composition; the heterogeneous AB type composite unit is formed by stacking a tetragonal antiferroelectric thick film and an orthogonal antiferroelectric thick film; the multiple antiferroelectric dielectric layers are formed by mixing and stacking homogeneous AA type composite units and heterogeneous AB type composite units in a predetermined ratio; wherein, the proportion of heterogeneous AB type composite units in all composite units is 30% to 100%. This application constructs an intralayer heterostructure, namely a heterogeneous AB-type composite unit, between adjacent internal electrodes, consisting of two different antiferroelectric dielectric layers. By controlling the proportion of the heterogeneous AB-type composite unit in the overall dielectric layer, different degrees of interfacial polarization and interfacial strain can be controlled to optimize the polarization response and breakdown field strength of the antiferroelectric MLCC, effectively improving energy storage density and efficiency. Simultaneously, the complementary electrical properties of tetragonal antiferroelectricity and orthogonal antiferroelectricity enhance the temperature stability of energy storage performance.

[0017] This application breaks through the structural limitations of traditional antiferroelectric MLCCs where adjacent internal electrodes are separated by a single-layer dielectric. It innovatively employs a dual-system antiferroelectric (tetragonal antiferroelectric) and orthogonal antiferroelectric thick-film antiferroelectric structure to construct homogeneous AA-type composite units and heterogeneous AB-type composite units within the layer, forming a controllable heterogeneous interface system. Material A (tetragonal antiferroelectric) exhibits low hysteresis loss, demonstrating high energy storage efficiency; material B (orthogonal antiferroelectric) exhibits high maximum polarization intensity, demonstrating high energy storage density. By utilizing the differentiated matching of the crystal phase structure, dielectric properties, and electrostrain of the two types of antiferroelectric materials (A and B), a synergistic mechanism of interfacial polarization effect and interfacial strain is constructed. On the one hand, due to the significant difference in dielectric properties between the two phases, space charge is generated at the heterogeneous interface, forming interfacial polarization, which can enhance the overall polarization intensity and is beneficial to improving energy storage density. On the other hand, the interfacial strain induced by the difference in electrostrain between materials A and B can effectively regulate the domain flipping behavior and polarization characteristics of antiferroelectric materials, ultimately overcoming the problem of the difficulty in achieving both high polarization intensity and low hysteresis loss, and simultaneously achieving high energy storage density and high energy storage efficiency.

[0018] The advantages of the antiferroelectric multilayer ceramic capacitor with intralayer heterostructure prepared in this application lie in the synergistic optimization of the macroscopic polarization response and hysteresis loss of the device through the interfacial polarization effect and interfacial strain mechanism, thereby effectively improving the energy storage density and energy storage efficiency. The prepared antiferroelectric multilayer ceramic capacitor with an AB-type composite unit (a total of 6 layers, with AB accounting for 100%) intralayer heterostructure has an energy storage density of 21.7 J·cm⁻¹. -3 The energy storage efficiency is 95.3%, and the energy density change rate is ±10% and the energy storage efficiency change rate is ±2% within a wide temperature range of -60 ℃ to 160 ℃, demonstrating excellent temperature stability. This application opens up new ideas for the structural design and controllable fabrication of high-performance antiferroelectric multilayer ceramic capacitors, promotes the practical application of lead-based antiferroelectric ceramic materials, and aligns with the industry development trend of integrated, miniaturized, and lightweight electronic components.

[0019] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of this application, the accompanying drawings used in this application will be briefly described below. Obviously, the drawings described below are merely some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without any creative effort.

[0021] Figure 1This is a schematic diagram of the structure of the antiferroelectric multilayer ceramic capacitor with a heterogeneous structure within the “AA-AA-AB” periodic cyclic layer prepared in Example 1 of this application. Figure 2 This is a schematic diagram of the antiferroelectric multilayer ceramic capacitor with a heterogeneous structure within the "AA-AB" periodic cyclic layer prepared in Example 2 of this application. Figure 3 This is a schematic diagram of the structure of the antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure of AB-type composite unit prepared in Example 3 of this application. Figure 4 This is a schematic diagram of the structure of the antiferroelectric multilayer ceramic capacitor with a conventional single-layer dielectric unit prepared in Comparative Example 1. Figure 5 This is a schematic diagram of the structure of the antiferroelectric multilayer ceramic capacitor with homogeneous AA-type composite units prepared in Comparative Example 2. Figure 6 Cross-sectional scanning electron microscope (SEM) images of the antiferroelectric multilayer ceramic capacitors after sintering, provided in Comparative Examples 1, 2, 3 and 3. Figure 7 Temperature stability spectra of energy storage density and energy storage efficiency of the antiferroelectric multilayer ceramic capacitors provided in Comparative Examples 1, 2, 3 and 3 in the temperature range of -60℃ to 160℃. Detailed Implementation

[0022] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0024] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0027] Traditional antiferroelectric multilayer ceramic capacitors (MLCCs) mainly rely on a single-layer dielectric structure, and the design approach is limited to optimizing electrical properties through material bulk modification. Due to the lack of flexible heterogeneous interface systems, existing structures cannot effectively control the polarization and breakdown characteristics of antiferroelectrics using interface effects, resulting in the structural advantages of heterogeneous interfaces not being fully utilized in MLCCs.

[0028] To address the technical challenge of balancing energy storage density and efficiency in existing antiferroelectric MLCCs, this application provides an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure and its fabrication method. By constructing a tetragonal / orthorhombic heterostructure interface within a single dielectric layer and controlling its proportion, the synergistic effect of interface polarization and interface strain is induced, thereby simultaneously achieving high energy storage density and high energy storage efficiency.

[0029] In a first aspect, embodiments of this application provide an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, comprising a multilayer antiferroelectric dielectric layer and an inner electrode; The internal electrode is located between adjacent antiferroelectric layers; The antiferroelectric layer is formed by stacking two antiferroelectric thick films of the same thickness to form a composite unit. The composite unit is divided into two types of structures: homogeneous AA type and heterogeneous AB type. The homogeneous AA type composite unit is formed by stacking two antiferroelectric thick films of the same composition. The heterogeneous AB type composite unit is formed by stacking one tetragonal antiferroelectric thick film and one orthogonal antiferroelectric thick film. The multilayer antiferroelectric layer is formed by mixing and stacking homogeneous AA-type composite units and heterogeneous AB-type composite units in a preset ratio; wherein, the proportion of heterogeneous AB-type composite units in all composite units is 30% to 100%.

[0030] In the technical solution of this application embodiment, by adjusting the proportion of heterogeneous AB-type composite units in the overall dielectric layer, different degrees of interface polarization effect and interface strain can be controlled to induce, thereby synergistically optimizing the polarization response and breakdown field strength of the antiferroelectric multilayer ceramic capacitor, and thus effectively improving the energy storage density and energy storage efficiency.

[0031] Furthermore, in some embodiments, the two antiferroelectric thick films in the composite unit have the same thickness, and both are 5~20μm.

[0032] In the technical solution of this application embodiment, the thickness of all composite units in a single MLCC is kept consistent, ensuring uniform stress distribution during film forming and co-firing, and avoiding defects such as cracking and delamination caused by thickness differences.

[0033] Furthermore, in some embodiments, the multilayer antiferroelectric layer is an antiferroelectric layer with a total of 3 composite units formed by stacking AA-AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AB.

[0034] Alternatively, the multilayer antiferroelectric layers are formed by periodic stacking, with stacking patterns including one of the following: AA-AA-AB cycle, AA-AB cycle, and AB continuous cycle.

[0035] In the technical solutions of this application, the essence of different stacking methods lies in the systematic control of the proportion of AB-type heterogeneous composite units. Unlike the existing technology where alternating stacking of single-layer films can only build heterogeneous interfaces between layers, this application extends the construction of heterogeneous interfaces from between layers to within layers through a two-level structural design of first compositing and then stacking. This allows each composite unit to independently contribute to the heterogeneous interface effect, achieving fine control of interface density and interface effect.

[0036] Furthermore, in some embodiments, the dielectric layer A in the homogeneous AA-type composite unit is (Pb 1-m-1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05 O3 is a tetragonal antiferroelectric material, where the values ​​of x and m both range from 0.01 to 0.05. Or, in a homogeneous AA-type composite unit, the dielectric layer A is (Pb) 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 O3 is an orthogonal antiferroelectric material, where the values ​​of y and n are both in the range of 0.01 to 0.05.

[0037] In the technical solution of this application embodiment, the tetragonal phase dielectric layer has low hysteresis loss and can provide high energy storage efficiency; the orthorhombic phase dielectric layer has high maximum polarization intensity and can provide high energy storage density. When dielectric layer A is used as a homogeneous AA-type composite unit, it can exert its respective performance advantages on its own; while when it is used as a layer in a heterogeneous AB-type composite unit, it can be stacked with an antiferroelectric dielectric layer B with a different phase structure but compatible composition. By utilizing the difference in crystal phase structure and dielectric properties, a synergistic mechanism of interface polarization and interface strain can be constructed at the heterogeneous interface within the layer, thereby further enhancing the polarization response while maintaining low loss.

[0038] Furthermore, in some embodiments, in the heterogeneous AB-type composite unit, when dielectric layer A is a tetragonal opposite ferroelectric material, dielectric layer B is an orthogonal opposite ferroelectric material; when dielectric layer A is an orthogonal opposite ferroelectric material, dielectric layer B is a tetragonal opposite ferroelectric material.

[0039] In the technical solution of this application embodiment, a synergistic mechanism of interfacial polarization effect and interfacial strain is constructed by differentiating the crystal phase structure, dielectric properties, and electrostrain of two types of antiferroelectric materials. Dielectric layer A and dielectric layer B have similar elemental compositions and compatible sintering processes, which can form a dense interfacial bond, providing a good material basis for the formation of interfacial polarization effect and interfacial strain between heterogeneous interfaces.

[0040] Furthermore, in some embodiments, adjacent inner electrodes are staggered to form an interdigitated electrode structure; the inner electrodes are prepared using one or more of silver, palladium, and platinum; and antiferroelectric sacrificial layers are stacked above and below the multilayer antiferroelectric dielectric layer.

[0041] In the technical solution of this application embodiment, the interdigitated electrode structure, through the staggered distribution of adjacent inner electrodes, allows the electric field to penetrate laterally within the dielectric layer, effectively reducing the effective dielectric thickness and improving the uniformity of the electric field distribution. This significantly enhances the breakdown field strength and energy storage density within a limited device volume. Using silver, palladium, platinum, or their alloys to prepare the inner electrodes ensures their conductivity matches the chemical compatibility and thermal expansion of the ceramic dielectric layer during co-firing. Furthermore, stacking antiferroelectric sacrificial layers on top and bottom of the multilayer antiferroelectric dielectric layers provides symmetrical stress constraints and a material diffusion barrier during debinding and high-temperature sintering, effectively preventing warping, cracking, or delamination of the device due to uneven interlayer stress, thus ensuring the integrity and reliability of the device structure.

[0042] Secondly, embodiments of this application provide a method for preparing an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, comprising the following steps: S1. Preparation of pre-calcined powder: After ball milling, drying and calcination of tetragonal opposite ferroelectric components and orthogonal opposite ferroelectric components respectively, a second ball milling and drying process is performed to obtain tetragonal opposite ferroelectric pre-calcined powder and orthogonal opposite ferroelectric pre-calcined powder. S2. Casting: The tetragonal opposite ferroelectric pre-calcined powder and the orthogonal opposite ferroelectric pre-calcined powder are respectively prepared into casting slurries, and after vacuum degassing, they are cast to obtain tetragonal opposite ferroelectric thick films and orthogonal opposite ferroelectric thick films. S3. Composite unit preparation: AA type composite unit is prepared by stacking two identical tetragonal anti-ferroelectric thick films, and AB type composite unit is prepared by stacking one tetragonal anti-ferroelectric thick film and one orthogonal anti-ferroelectric thick film. After hot pressing, the two anti-ferroelectric thick films are tightly bonded together. S4. Internal electrode printing: The prepared composite unit is cut and a metal internal electrode is printed on the surface of the film using a screen printing process; S5. Preparation of multilayer ceramic capacitor green blank: According to the preset ratio and stacking method, AA-type composite units and AB-type composite units with internal electrodes are stacked from bottom to top. At the same time, antiferroelectric sacrificial layers are stacked on the upper and lower surfaces of the overall structure. Then, the whole structure is subjected to hot pressing and cold isostatic pressing to obtain an antiferroelectric multilayer capacitor green blank with an intralayer heterostructure. S6. Debinding and sintering: High-temperature debinding and sintering treatment is performed on the green blank of the antiferroelectric multilayer capacitor. S7. End electrode preparation: After sintering and natural cooling, silver electrode paste is coated on the left and right end faces of the capacitor, and the end electrodes are prepared by sintering to obtain an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure.

[0043] In step S1, the rotation speed of the first and second ball milling is 200~500 r / min, and the ball milling time is 3~48 h; the drying temperature is 50~110 ℃, and the drying time is 3~12 h; the calcination temperature is 800~950 ℃, and the calcination time is 2~5 h.

[0044] In step S2, the casting process involves dispersing the corresponding antiferroelectric pre-calcined powder together with dispersant, defoamer, binder, and plasticizer in a solvent, and ball-milling them at 200-500 r / min for 3-48 minutes. h. Obtain the casting slurry (the formulation of the casting slurry can be set with reference to relevant existing technologies, including the various comparative examples and embodiments of the present invention; the solvent is a mixed solution of anhydrous ethanol and toluene, used to dissolve the added organic matter; the binder is a mixed solution of polyvinyl butyral and ethanol, used to coat the ceramic powder particles, and after curing, form a three-dimensional resin framework, giving the cast film a certain degree of flexibility; the defoamer is trioleic acid glyceride, used to eliminate some of the bubbles generated during stirring; the dispersant is polyethylene glycol, used to disperse the ceramic particles, facilitating the coating of the binder; the plasticizer is butyl benzyl phthalate, used to improve the flexibility and extensibility of the cast film, so as to facilitate processing and storage; the pre-calcined and ball-milled powder can be ball-milled and mixed with the above organic matter in a certain proportion to obtain a mixture), vacuum defoaming for 10~60 min, casting the casting slurry on a casting machine at a speed of 0.5~5 m / min and drying it to obtain a single-layer film; preferably, the thickness of the cast single-layer film is 5~20 μm.

[0045] Furthermore, in some embodiments, in step S1, the tetragonal antiferroelectric material composition is (Pb 1-m- 1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05 The raw materials PbO, BaCO3, La2O3, ZrO2, SnO2, and TiO2 are mixed according to the nominal stoichiometric ratio of the metal elements in this component; the orthogonal ferroelectric material composition is (Pb 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 PbO, BaCO3, La2O3, ZrO2 and SnO2 raw materials are mixed according to the nominal chemical ratio of the metal elements in the component.

[0046] In the technical solution of this application embodiment, tetragonal phase and orthogonal antiferroelectric materials have similar basic raw material systems, which makes them compatible in pre-firing, tape casting and sintering processes, providing a material basis for subsequent lamination to form a dense interface. The raw materials are precisely proportioned according to the nominal stoichiometric ratio, aiming to control the stoichiometric ratios of Pb, Ba, La and Zr, Sn, Ti metal elements from the source, thereby precisely controlling the phase structure, phase transition electric field and polarization behavior of the material, ensuring the consistency and repeatability of performance between different batches.

[0047] Furthermore, in some embodiments, in step S3, the hot pressing temperature is 50~90℃, the pressure is 2~25MPa, and the holding time is 1~30 min; after hot pressing, the interface between the two thick film layers is dense without bubbles or delamination defects. In step S4, the metal used for screen printing is any one of silver, palladium, and platinum, or an alloy of multiple metals. The thickness of the inner electrode in the printed molding is controlled between 0.5 and 3 μm. The printed electrodes of adjacent composite units adopt a staggered arrangement design to provide a basis for the subsequent interdigitated electrode structure. In step S5, the overall hot pressing process parameters are consistent with the hot pressing parameters of the composite unit in step S3; the pressure of cold isostatic pressing is 20~200 MPa, and the holding time is 10~30 min; the antiferroelectric material sacrificial layer is made by separately casting tetragonal antiferroelectric pre-calcined powder and orthogonal antiferroelectric pre-calcined powder, the thickness of a single sacrificial layer is 5~20 μm, the number of layers of the upper and lower sacrificial layers is the same, and the number of layers of the sacrificial layer on one side is 2~10, which can effectively prevent device warping; In step S6, the high-temperature debinding is carried out at a temperature of 450~600 ℃ for 30~300 min; the sintering treatment is carried out at a temperature of 1050~1200 ℃ for 2~6 h.

[0048] Furthermore, in some embodiments, in step S7, the heating rate of the burn-off end is 3~5 ℃ / min, and after heating to 500~750 ℃, it is held for 10~30 min and then cooled naturally with the furnace. The silver paste of the end electrode completely covers all dielectric layer sections at both ends of the device, ensuring the reliability of the conductive connection.

[0049] The following are some specific embodiments. It should be noted that the embodiments described below are exemplary and are only used to explain this application, and should not be construed as limiting this application. Where specific techniques or conditions are not specified in the embodiments, they shall be performed in accordance with the techniques or conditions described in the literature in this field or according to the product instructions. Reagents or instruments whose manufacturers are not specified are all conventional products that can be obtained commercially.

[0050] I. Preparation Method Example 1 This embodiment provides a method for fabricating an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, which has an "AA-AA-AB" cyclic pattern (the cycle period is 2, i.e., AA-AA-AB-AA-AA-AB, a total of 6 layers, and AB accounts for 33.33%), and specifically includes the following steps: S1. Preparation of pre-calcined powder: according to the chemical formula (Pb) 0.915 Ba 0.04 La 0.03 (Zr) 0.65 Sn0.3 Ti 0.05 )O3 (PBLZST, denoted as A) and (Pb 0.965 Ba 0.02 La 0.01 (Zr) 0.6 Sn 0.4 Antiferroelectric powders were prepared by using PbO (PBLZS, denoted as B) and TiO2 (PbO, BaCO3, La2O3, ZrO2, SnO2, and TiO2) according to the stoichiometric ratio of each element in the chemical formula. The mixtures were ball-milled at a speed of 400 r / min for 6 h, and then dried at 100 ℃ for 4 h to obtain the mixed powder. The above mixed powder was pre-calcined at 850℃ for 3 hours and then subjected to a second ball milling process at a speed of 400 r / min for 6 hours. Subsequently, it was dried at 100℃ for 4 hours to obtain pre-calcined powder A and pre-calcined powder B. S2. Casting: The two types of pre-fired powders are mixed with various additives and solvents in a fixed mass ratio, and ball-milled at 350 r / min for 6 hours to prepare a casting slurry. The specific mass ratio of each component is as follows: 2% dispersant (polyethylene glycol), 2% defoamer (glyceryl trioleate), 6% binder (mixed solution of polyvinyl butyral and ethanol), 4% plasticizer (butyl benzyl phthalate), 48% mixed solvent (toluene: anhydrous ethanol = 3:1), and the remaining component is pre-fired ceramic powder. The mixed solvent is a mixture of toluene and anhydrous ethanol in a volume ratio of 3:1, and the binder is a mixed solution of polyvinyl butyral and ethanol. Subsequently, the casting slurry was vacuum defoamed for 40 minutes, then cast on a casting machine (casting speed of 2 m / min) and dried to obtain a casting film with a thickness of 15 μm, forming antiferroelectric monolayer thick film A and antiferroelectric monolayer thick film B; S3. Composite unit preparation: The above antiferroelectric monolayer thick film was stacked in two layers to prepare AA type (composed of two layers of antiferroelectric monolayer thick film A) and AB type (composed of one layer of antiferroelectric monolayer thick film A and one layer of antiferroelectric monolayer thick film B) composite units, respectively. Then, hot pressing was performed at a temperature of 60℃, a pressure of 10 MPa, and a holding time of 15 minutes to ensure that the two layers of antiferroelectric thick film were tightly bonded together; S4. Internal electrode printing: The prepared AA-type and AB-type composite units are cut and screen-printed on the film surface as an internal electrode layer using a screen printing process (other common metal electrode materials, such as any one or more metals such as silver, palladium, and platinum, can also be used). The thickness of the internal electrode layer is 1 μm. S5. Preparation of multilayer ceramic capacitor green body: Thick films with electrodes are stacked in an alternating pattern of “AA-AA-AB” (cycle period is 2; i.e., AA-AA-AB-AA-AA-AB) to form an interdigitated electrode structure. At the same time, antiferroelectric sacrificial layers are stacked on the upper and lower surfaces of the overall structure. The antiferroelectric sacrificial layers are made by casting pre-fired powder A separately. The thickness of a single sacrificial layer is 15μm. The number of sacrificial layers on the upper and lower surfaces is the same, and the number of sacrificial layers on one side is 5. Then, the whole body is subjected to hot pressing and cold isostatic pressing. The hot pressing temperature is 60℃, the pressure is 10MPa, and the holding time is 15min. The cold isostatic pressing pressure is 100MPa and the holding time is 20min, resulting in an antiferroelectric multilayer ceramic capacitor green body with an intralayer heterogeneous structure of “AA-AA-AB” (cycle period is 2). S6. Debinding and sintering: Place the green body in a muffle furnace, debind at 600℃ for 30 min, and sinter at 1150℃ for 3 h; S7. End Electrode Preparation: After sintering, the electrode is naturally cooled to room temperature and then removed. Silver electrode paste is applied to the left and right end faces. The end electrodes are then prepared by sintering the end electrodes. The sintering process involves heating to 600℃ at a rate of 5℃ / min, holding at that temperature for 10~20min, and then cooling with the furnace. This yields an antiferroelectric multilayer ceramic capacitor with an intralayer heterogeneous structure exhibiting an "AA-AA-AB" cyclic pattern (cycle period of 2). The structure is as follows: Figure 1 As shown.

[0051] Example 2 This embodiment provides a method for fabricating an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure. Compared to Embodiment 1, the only difference is that in step S5, the thick film with electrodes is stacked in an alternating pattern according to an "AA-AB" cycle (the cycle period is 3, i.e., AA-AB-AA-AB-AA-AB, a total of 6 layers, with AB accounting for 50%). The remaining steps are basically the same as in Embodiment 1, ultimately yielding an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure having an "AA-AB" cycle (cycle period of 3), as shown in the figure. Figure 2 As shown.

[0052] Example 3 This embodiment provides a method for fabricating an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure. Compared to Embodiment 1, the only difference is that in step S5, the "AB" thick film with electrodes is stacked in an alternating manner (a total of 6 layers, with AB accounting for 100%). The remaining steps are basically the same as in Embodiment 1, ultimately yielding an antiferroelectric multilayer ceramic capacitor with an AB-type composite unit intralayer heterostructure, as shown in the figure. Figure 3 As shown.

[0053] Comparative Example 1 This comparative example is prepared according to existing technology (Pb).0.915 Ba 0.04 La 0.03 (Zr) 0.65 Sn 0.3 Ti 0.05 The process involves using O3 tetragonal antiferroelectric ceramic material to prepare an antiferroelectric multilayer ceramic capacitor with a conventional single-layer dielectric unit (single-layer thick film A); specifically, the following steps are included: S1. According to the chemical formula (Pb) 0.915 Ba 0.04 La 0.03 (Zr) 0.65 Sn 0.3 Ti 0.05 To prepare antiferroelectric powder using O3, PbO, BaCO3, La2O3, ZrO2, SnO2, and TiO2 were weighed according to the stoichiometric ratio of each element in the chemical formula. They were then ball-milled at a speed of 400 r / min for 6 h, followed by drying at 100 ℃ for 4 h to obtain the mixed powder. The above mixed powder was pre-calcined at 850℃ for 3 hours and then subjected to a second ball milling process at a speed of 400 r / min for 6 hours. Subsequently, it was dried at 100℃ for 4 hours to obtain the pre-calcined powder. S2. The prepared pre-calcined powder was ball-milled with dispersant, defoamer, binder, plasticizer and solvent at 350 r / min for 6 h to obtain a casting slurry. The slurry was defoamed under vacuum for 40 min. The casting slurry was cast on a casting machine at a speed of 2 m / min and dried to obtain a casting film with a thickness of 30 μm, forming an antiferroelectric monolayer thick film. S3. Cut the antiferroelectric single-layer thick film obtained by casting, and use screen printing to print 70Ag / 30Pd alloy as the inner electrode layer on the surface of the film. The thickness of the inner electrode layer is 1μm. S4. The antiferroelectric monolayer thick film with electrodes is stacked in an alternating manner (keeping the same number of active layers as in the embodiment, i.e., 6 layers) to form an interdigitated electrode structure. Then, it is hot-pressed at a temperature of 60°C, a pressure of 10 MPa, and a holding time of 15 min. The cold isostatic pressing pressure is 100 MPa and the holding time is 20 min to obtain an antiferroelectric multilayer ceramic capacitor green body with a conventional single-layer dielectric unit (single-layer thick film A). S5. Place the green compact in a muffle furnace, remove the binder at 600℃ for 30 min, sinter at 1150℃ for 3 h, and remove it after natural cooling to room temperature. Apply silver paste to both ends as terminal electrodes (the sintering process involves heating to 600℃ at a rate of 5℃ / min, holding for 10-20 min, and cooling with the furnace). This yields the antiferroelectric multilayer ceramic capacitor with a traditional single-layer dielectric unit (single-layer thick film A), as shown in the figure. Figure 4 As shown.

[0054] Comparative Example 2 This comparative example is prepared according to existing technology (Pb). 0.915 Ba 0.04 La 0.03 (Zr) 0.65 Sn 0.3 Ti 0.05 O3 tetragonal antiferroelectric ceramic material, and from this, an antiferroelectric multilayer ceramic capacitor with homogeneous AA-type composite unit (composed of two layers of antiferroelectric single-layer thick film A) was further prepared; The difference between this comparative example and Example 1 is that step S1 is performed according to the chemical formula (Pb). 0.915 Ba 0.04 La 0.03 (Zr) 0.65 Sn 0.3 Ti 0.05 O3 was used to prepare antiferroelectric powder; in step S5, the "AA" thick film with electrodes was stacked in an interlaced manner to form an interdigitated electrode structure; the remaining steps were basically the same as in Example 1; finally, an antiferroelectric multilayer ceramic capacitor with homogeneous AA-type composite units was obtained, with the structure as follows: Figure 5 As shown.

[0055] Comparative Example 3 This comparative example is prepared according to existing technology (Pb). 0.965 Ba 0.02 La 0.01 (Zr) 0.6 Sn 0.4 O3 orthogonal antiferroelectric ceramic material, and from this, an antiferroelectric multilayer ceramic capacitor with homogeneous AA-type composite unit (composed of two layers of antiferroelectric single-layer thick film A, where A represents orthogonal antiferroelectric material) was further prepared; The difference between this comparative example and comparative example 2 is that step S1 is performed according to the chemical formula (Pb). 0.965 Ba 0.02 La 0.01 (Zr) 0.6 Sn 0.4 O3 was used to prepare antiferroelectric powder; the remaining steps were basically the same as in Comparative Example 2; finally, an antiferroelectric multilayer ceramic capacitor with homogeneous AA-type composite units was obtained, with the structure as follows: Figure 5As shown.

[0056] II. Testing Methods 1. Energy storage performance test The hysteresis loop of the material was tested using a ferroelectric testing system (PK-CPE1701, PolyK Technologies, USA) at a test frequency of 10 Hz and room temperature. The breakdown field strength was the maximum electric field that could be measured. Under the maximum electric field, the polarization intensity of the hysteresis loop was the maximum polarization intensity. The energy storage density and energy storage efficiency were obtained by integrating the hysteresis loop.

[0057] 2. Cross-sectional micromorphology testing The microstructure of the cross-section of MLCC after sintering was characterized using a field emission scanning electron microscope (SEM, GeminiSEM300, Carl Zeiss, Germany).

[0058] 3. Temperature stability test The hysteresis loop under the maximum electric field was tested using the ferroelectric testing system of PolyK Technologies, Inc. in the United States at a frequency of 10 Hz and a temperature range of -60 ℃ to 160 ℃. By integrating the hysteresis loop, the energy storage density and energy storage efficiency at different temperatures were obtained to analyze temperature stability.

[0059] III. Analysis of Test Results for Each Embodiment and Comparative Example The energy storage performance of the antiferroelectric multilayer ceramic capacitors prepared in Examples 1, 2, 3, 4 and Comparative Examples 1, 2, 3 was tested, and the test results are shown in Table 1.

[0060] Table 1. Comparison of energy storage performance of Examples 1, 2, 3, 4 and Comparative Examples 1, 2, 3 As can be seen from Table 1, Comparative Example 1 and Comparative Example 2 have lower energy storage densities (8.9 J·cm³). -3 and 9.9 J·cm -3 Comparative Example 3 has a lower energy storage efficiency (86.2%), while Examples 1-3 have both high energy storage density and high energy storage efficiency, especially Example 3, which has an energy storage density as high as 21.7 J·cm³. -3The energy storage efficiency reaches 95.3%. Example 3 has PBLZST and PBLZS layers in equal proportions and constructs a heterogeneous interface within the PBLZST / PBLZS layer. Its maximum polarization intensity is close to that of PBLZS in Comparative Example 3, and it exhibits similar low hysteresis loss as PBLZST in Comparative Examples 1 and 2, while possessing the advantages of both types of antiferroelectric materials. The reason for the enhanced maximum polarization intensity is that the difference in dielectric constant between the two antiferroelectric materials generates space charge (interfacial polarization) at the heterogeneous interface, thereby inducing a dipole moment and enhancing the overall polarization intensity. The reason for the enhanced breakdown electric field is that the heterogeneous interface can effectively suppress the electrical dendrite process. In addition, due to the difference in electrostrain performance between the two phases, an interfacial stress field is formed, which can effectively regulate the domain flipping behavior and polarization characteristics of the antiferroelectric material, ultimately overcoming the difficulty of simultaneously achieving high polarization intensity and low hysteresis loss, and achieving both high energy storage density and high energy storage efficiency.

[0061] Figure 6 The images show cross-sectional SEM images of the antiferroelectric multilayer ceramic capacitors after sintering in Comparative Example 1 (single-layer PBLZST), Comparative Example 2 (double-layer PBLZST / PBLZST), Comparative Example 3 (double-layer PBLZS / PBLZS), and Example 3 (double-layer PBLZST / PBLZS). As can be seen from the images, all samples have dense ceramic layers, with tight bonding between the ceramic layers and the internal interdigitated electrodes, exhibiting a clear metal electrode-ceramic interface. This lays an important foundation for optimizing energy storage performance using interface effects.

[0062] Figure 7 The graphs show the temperature stability of the energy storage density and efficiency of the antiferroelectric multilayer ceramic capacitors of Comparative Examples 1, 2, 3, and 3 in the temperature range of -60℃ to 160℃. As can be seen from the graphs, the energy storage performance of each sample fluctuates to some extent with temperature changes, but the trends and magnitudes of these fluctuations differ. Comparative Examples 1 and 2 exhibit lower energy storage densities throughout the entire temperature range, with a change rate of ±13%. Comparative Example 3 shows relatively stable energy storage performance in the low-temperature range (-60℃ to 60℃), but its energy storage density decreases significantly in the high-temperature range (80℃ and above), with a change rate of ±20%. In contrast, the antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure prepared in Example 3 maintains a relatively high level of energy storage density and efficiency throughout the entire temperature range of -60℃ to 160℃, with a change rate of ±10% for energy storage density and ±2% for energy storage efficiency. This indicates that the sample possesses excellent temperature stability, which is beneficial for practical applications.

[0063] It should be noted that this application is not limited to the above-described embodiments. The above embodiments are merely examples, and any embodiments with the same structure and effect as the technical concept within the scope of this application are included in the technical scope of this application. Furthermore, various modifications that can be conceived by those skilled in the art to the embodiments, and other ways of constructing by combining some of the constituent elements of the embodiments, without departing from the spirit of this application, are also included in the scope of this application.

Claims

1. An antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure, characterized in that, Includes a multilayer antiferroelectric dielectric layer and an internal electrode; The internal electrode is located between adjacent antiferroelectric layers; The antiferroelectric layer is formed by stacking two antiferroelectric thick films of the same thickness to form a composite unit. The composite unit is divided into two types of structures: homogeneous AA type and heterogeneous AB type. The homogeneous AA type composite unit is formed by stacking two antiferroelectric thick films of the same composition. The heterogeneous AB type composite unit is formed by stacking a tetragonal antiferroelectric thick film and a cross-opposite antiferroelectric thick film. The multilayer antiferroelectric layer is formed by mixing and stacking the homogeneous AA-type composite units and the heterogeneous AB-type composite units in a preset ratio; wherein the heterogeneous AB-type composite units account for 30% to 100% of all composite units.

2. The antiferroelectric multilayer ceramic capacitor with an intralayer heterogeneous structure according to claim 1, characterized in that, The two antiferroelectric thick films in the composite unit have the same thickness, and both are 5~20 μm.

3. The antiferroelectric multilayer ceramic capacitor with an intralayer heterogeneous structure according to claim 1, characterized in that, The multilayer antiferroelectric layer is an antiferroelectric layer with a total of 3 composite units formed by stacking AA-AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AA-AB, or an antiferroelectric layer with a total of 2 composite units formed by stacking AB.

4. The antiferroelectric multilayer ceramic capacitor with an intralayer heterogeneous structure according to claim 1, characterized in that, The multilayer antiferroelectric layers are formed by periodic stacking, and the stacking form includes one of AA-AA-AB cycle, AA-AB cycle, and AB continuous cycle.

5. The antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure according to claim 1, characterized in that, The dielectric layer A in the homogeneous AA-type composite unit is (Pb) 1-m-1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05 O3 is a tetragonal antiferroelectric material, where the values ​​of x and m both range from 0.01 to 0.

05. Or the dielectric layer A in the homogeneous AA-type composite unit is (Pb) 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 O3 is an orthogonal antiferroelectric material, where the values ​​of y and n are both in the range of 0.01 to 0.

05.

6. The antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure according to claim 1, characterized in that, In the heterogeneous AB-type composite unit, when dielectric layer A is a tetragonal opposite ferroelectric material, dielectric layer B is an orthogonal opposite ferroelectric material; when dielectric layer A is an orthogonal opposite ferroelectric material, dielectric layer B is a tetragonal opposite ferroelectric material.

7. The antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure according to claim 1, characterized in that, The adjacent inner electrodes are staggered left and right, forming an interdigitated electrode structure; the inner electrodes are made of one or more of silver, palladium, and platinum. Above and below the multilayer antiferroelectric dielectric layer, there are also antiferroelectric material sacrificial layers stacked.

8. A method for preparing an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure as described in any one of claims 1-7, characterized in that, Includes the following steps: S1. Preparation of pre-calcined powder: After ball milling, drying and calcination of tetragonal opposite ferroelectric components and orthogonal opposite ferroelectric components respectively, a second ball milling and drying process is performed to obtain tetragonal opposite ferroelectric pre-calcined powder and orthogonal opposite ferroelectric pre-calcined powder. S2. Casting: The tetragonal opposite ferroelectric pre-calcined powder and the orthogonal opposite ferroelectric pre-calcined powder are respectively prepared into casting slurries, and after vacuum degassing, they are cast to obtain tetragonal opposite ferroelectric thick films and orthogonal opposite ferroelectric thick films. S3. Composite unit preparation: AA type composite unit is prepared by stacking two identical tetragonal anti-ferroelectric thick films, and AB type composite unit is prepared by stacking one tetragonal anti-ferroelectric thick film and one orthogonal anti-ferroelectric thick film. After hot pressing, the two anti-ferroelectric thick films are tightly bonded together. S4. Internal electrode printing: The prepared composite unit is cut and a metal internal electrode is printed on the surface of the film using a screen printing process; S5. Preparation of multilayer ceramic capacitor green blank: According to the preset ratio and stacking method, AA-type composite units and AB-type composite units with internal electrodes are stacked from bottom to top. At the same time, antiferroelectric sacrificial layers are stacked on the upper and lower surfaces of the overall structure. Then, the whole structure is subjected to hot pressing and cold isostatic pressing to obtain an antiferroelectric multilayer capacitor green blank with an intralayer heterostructure. S6. Debinding and sintering: The antiferroelectric multilayer capacitor green blank is subjected to high-temperature debinding and sintering treatment; S7. End electrode preparation: After sintering and natural cooling, silver electrode paste is coated on the left and right end faces of the capacitor, and the end electrodes are prepared by sintering to obtain an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure.

9. The method for preparing an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure according to claim 8, characterized in that, In step S1, the tetragonal antiferroelectric material composition is (Pb 1-m-1.5x Ba m La x (Zr) 0.65 Sn 0.3 Ti 0.05 The raw materials PbO, BaCO3, La2O3, ZrO2, SnO2, and TiO2 are mixed according to the nominal stoichiometric ratio of the metal elements in the component; the orthogonal opposite ferroelectric material component is (Pb 1-n-1.5y Ba n La y (Zr) 0.6 Sn 0.4 PbO, BaCO3, La2O3, ZrO2 and SnO2 raw materials are mixed according to the nominal chemical ratio of the metal elements in the component.

10. The method for preparing an antiferroelectric multilayer ceramic capacitor with an intralayer heterostructure according to claim 8, characterized in that, In steps S3 and S5, the temperature of the hot pressing treatment is 50~90 ℃, the pressure is 2~25 MPa, and the holding time is 1~30 min; In step S5, the pressure of the cold isostatic pressing treatment is 20~200 MPa, and the holding time is 10~30 min; In step S6, the high-temperature debinding is performed by holding the material at a temperature of 450~600 ℃ for 30~300 min; the sintering treatment is performed by holding the material at a temperature of 1050~1200 ℃ for 2~6 h.

Images