Constant current source driving circuit for ultra-low noise laser based on double-loop negative feedback

Abstract

The application discloses a kind of constant-current source driving circuit of ultra-low noise laser based on double-loop negative feedback, belong to laser driving technical field.For the shortcomings that single-loop negative feedback constant-current source speed precision is difficult to consider, monitoring and control share feedback path, lack active noise suppression, double-loop architecture is adopted: inner loop fast current control unit is constituted closed negative feedback loop by digital-to-analog conversion module, first-stage amplification module, second-stage error amplification module, regulating tube module and main sampling resistance module, and is responsible for bandwidth not less than 10kHz fast control;Outer loop fine current monitoring unit is output monitoring voltage after the differential voltage of main sampling resistance module two ends is amplified by first differential amplification module, and is responsible for fine monitoring;Inner and outer loop share current sensing node on the same main sampling resistance module, but electrically independent, not coupled with each other.The circuit is used for the ultra-low noise driving of narrow linewidth semiconductor laser, and can be applied to laser radar, atomic physics experiment and precision spectrum measurement and other fields.

Description

Technical Field

[0001] This invention belongs to the field of laser driving technology. More specifically, this invention relates to a constant current source driving circuit for an ultra-low noise laser based on dual-loop negative feedback. Background Technology

[0002] Existing laser drivers mostly employ a single-loop negative feedback constant current source architecture. The laser control circuit disclosed in Chinese invention patent application CN109950790A uses a current-series negative feedback principle. An operational amplifier amplifies the error between the set voltage and the feedback voltage from the sampling resistor, driving a field-effect transistor to generate laser current. A unidirectional transient voltage suppression diode provides upper limit protection for the output current. The constant current drive circuit for semiconductor lasers disclosed in Chinese utility model patent CN207651796U consists of a voltage reference unit, an error amplification unit, an adjustment circuit unit, and a sampling circuit unit sequentially connected by electrical signals to form a deep negative feedback closed-loop system. A single feedback loop simultaneously undertakes both current regulation and current monitoring tasks.

[0003] The aforementioned single-loop architecture has three main shortcomings in practical applications. First, the closed-loop bandwidth and steady-state accuracy in a single-loop structure are mutually restrictive. Increasing the closed-loop bandwidth to accelerate transient response reduces loop gain, leading to increased steady-state error and making it difficult to balance rapid adjustment and high-precision control. Second, current monitoring and current control share the same feedback path. The feedback signal used for closed-loop control is also the only source of current monitoring. The load effect of the monitoring channel directly affects control accuracy, and the control path and monitoring path cannot be designed with independent parameters. Third, it lacks an active noise suppression mechanism. The thermal noise of the sampling resistor, the voltage noise of the operational amplifier, and the thermal noise of the voltage divider network are directly superimposed on the output current through the control path, limiting further narrowing of the laser's linewidth performance. Summary of the Invention

[0004] To achieve these objectives and other advantages of the present invention, the ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback of the present invention assigns rapid adjustment and fine monitoring to two electrically independent circuit paths, and achieves coordination between the two paths by sharing the current sensing node on the same main sampling resistor module.

[0005] This invention provides an ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback, comprising:

[0006] The inner-loop fast current control unit consists of a digital-to-analog converter module, a first-stage amplifier module, a second-stage error amplifier module, an adjustment transistor module, and a main sampling resistor module, which are sequentially electrically connected to form a closed negative feedback loop. The digital-to-analog converter module outputs an analog set voltage, which is conditioned by the first-stage amplifier module and then outputs a first voltage, which is sent to the non-inverting input of the second-stage error amplifier module. Its inverting input receives the feedback voltage from the high end of the main sampling resistor module through a voltage divider network, and its output is connected to the control terminal of the adjustment transistor module through a drive resistor. The adjustment transistor module and the main sampling resistor module are connected in series to power the drive laser, and the low end of the main sampling resistor module is grounded.

[0007] The outer ring fine current monitoring unit includes a first differential amplifier module. Its non-inverting and inverting input terminals are connected to the high and low ends of the main sampling resistor module through the outer ring voltage divider resistor, respectively. The differential voltage across the main sampling resistor module is amplified and then output as a monitoring voltage signal.

[0008] The inner loop fast current control unit takes voltage feedback from the high end of the main sampling resistor module to form a closed loop, while the outer loop fine current monitoring unit takes differential voltage from both ends of the main sampling resistor module to form a channel. The two are electrically independent and uncoupled.

[0009] The closed-loop bandwidth of the inner-loop fast current control unit is not less than 10kHz. A compensation capacitor is connected in parallel between the inverting input and output of the second-stage error amplifier module to provide sufficient phase margin at the closed-loop bandwidth.

[0010] Preferably, the first-stage amplification module and the second-stage amplification module are cascaded. The first-stage amplification module receives the analog set voltage output by the digital-to-analog converter module, and the second-stage amplification module is a voltage follower, with its output terminal connected to the non-inverting input terminal of the second-stage error amplification module. The regulating transistor module contains an NPN bipolar transistor, with its base connected to the output terminal of the second-stage error amplification module via a driving resistor, its collector connected to the laser cathode via an LC filter network, and its emitter connected to the high end of the main sampling resistor module.

[0011] Preferably, the first-stage amplification module, the second-stage amplification module, the second-stage error amplification module, and the first differential amplification module all employ zero-drift operational amplifiers with a voltage noise density not exceeding 5.2 nV / m². .

[0012] Preferably, the main sampling resistor module is composed of precision resistors with a resistance range of 1.5Ω to 3.3Ω, a power of not less than 2W, an accuracy of not less than ±1%, and a temperature coefficient of not more than ±50ppm / °C.

[0013] Preferably, the output current I of the inner loop fast current control unit is... OUT With the output voltage V of the digital-to-analog converter module DAC The following conditions must be met: Where K is a constant, determined by the resistance R of the main sampling resistor module. S The gain G1 of the first-stage amplification module and the voltage division ratio of the voltage divider network at the inverting input of the second-stage error amplification module are jointly determined; the voltage divider network includes a resistor R8 connected to the high end of the main sampling resistor module and a resistor R connected to ground. 12 .

[0014] Preferably, the resistance of the main sampling resistor module is 2.2Ω, the gain G1 of the first-stage amplifier module is 1, the resistor R8 connected to the high end of the main sampling resistor module in the voltage divider network of the inverting input of the second-stage error amplifier module is 10 kΩ, and the resistor connected to ground is R... 12 When the voltage divider is 18.2 kΩ, that is, when the upper voltage divider resistor is 10 kΩ and the lower voltage divider resistor is 18.2 kΩ, K is 249.75 mA / V.

[0015] Preferably, the gain of the first differential amplifier module of the outer loop fine current monitoring unit is set according to the resistance value of the main sampling resistor module, so that the first monitoring voltage signal falls within the input voltage range of the microcontroller's built-in analog-to-digital converter when the maximum output current is reached.

[0016] Preferably, the compensation capacitor connected in parallel between the inverting input and output terminals of the second-stage error amplification module has a capacitance between 100pF and 10nF and uses a low-loss NPO type dielectric.

[0017] Preferably, the microcontroller is connected to the analog-to-digital converter module of the inner loop fast current control unit, the analog-to-digital converter input terminal of the outer loop fine current monitoring unit, and the numerically controlled analog switch module, and manages the dual-loop operation collaboratively by executing the following timing control logic:

[0018] a. During the power-on startup phase, the microcontroller first sets the output of the digital-to-analog converter module to zero. After a first preset time delay, it gradually raises the set voltage from zero to the target value according to a preset step size. During the step-up process, the first monitoring voltage signal is read in real time. When the deviation from the target value exceeds the preset error window, the step-up is frozen and the current set value is maintained until the deviation falls back into the error window. When the cumulative deviation exceeds the preset drift threshold, the resistance calibration sequence of the main sampling resistor module is triggered to recalibrate the reference current and correct subsequent control parameters.

[0019] b. After the step-up is completed and the inner loop fast current control unit is closed-loop stable, the microcontroller enters the normal operation stage. During the normal operation stage, the microcontroller samples the first monitoring voltage signal and the backlight current monitoring signal according to the second preset duration period. Based on the difference between the two monitoring signals and the set value, the microcontroller dynamically determines the consistency between the actual output current of the inner loop and the set current. When the consistency is lower than the consistency threshold, the microcontroller is triggered to adjust the output of the digital-to-analog conversion module proportionally and record the deviation as the basis for correction in the next cycle.

[0020] c. The numerical control analog switch module is controlled by the microcontroller signal and switches between constant current mode and constant optical power mode. During the mode switching interval, the inner loop fast current control unit maintains the current set value unchanged, and the outer loop fine current monitoring unit starts a new round of monitoring and sampling after a delay of the third preset time, so as to avoid the transient coupling of mode switching into the inner loop control closed loop. After the switching is completed, the inner loop fast current control unit executes the soft start timing based on the deviation of the set value before and after the switching. The set voltage change rate of the soft start timing does not exceed half of the upper limit of the set voltage change rate during normal operation.

[0021] d. Before each mode switch, the microcontroller first performs zero-point calibration on the first differential amplification module of the outer loop fine current monitoring unit. After calibration, it restarts the periodic sampling and consistency judgment logic of the normal operation phase.

[0022] Preferably, the circuit achieves synergistic optimization of low noise and temperature drift through the following constraints:

[0023] The resistance value R of the main sampling resistor module S Not less than 1.5Ω, so that the contribution of operational amplifier voltage noise and voltage divider network thermal noise referred to as output current varies with R. S Increase and decrease; R S The voltage drop should not exceed 3.3Ω to avoid excessive voltage drop consuming the effective dynamic range of the regulating tube module;

[0024] Decoupling capacitors are connected between the power supply ports of the first-stage amplification module, the second-stage amplification module, the second-stage error amplification module, and the first differential amplification module and the common ground. The equivalent series resistance of the decoupling capacitors is not higher than 50mΩ.

[0025] In the voltage divider network at the inverting input of the second-stage error amplifier module, resistor R8 connected to the high end of the main sampling resistor module and resistor R connected to ground are... 12 All use matching resistor pairs with an accuracy of not less than ±0.1% and a temperature coefficient of not more than ±10ppm / °C, and R8 and R 12 The proportional deviation between them shall not exceed ±0.2%;

[0026] The resistors connected in series at the two input terminals of the first differential amplifier module and the feedback resistor are both matching resistor pairs of the same specifications as the inner loop voltage divider network, so that the differential common-mode rejection ratio of the outer loop fine current monitoring unit and the inner loop feedback accuracy remain consistent at temperature.

[0027] Within the 10Hz to 100kHz frequency band, the total equivalent input current noise density, obtained by superimposing the thermal noise contributions of the main sampling resistor module, the operational amplifier voltage noise contribution, and the voltage divider network thermal noise contribution according to the square root of the noise density, does not exceed 10nA / m². The output current RMS noise does not exceed 2.5μA; through the above constraints, low noise and temperature drift are optimized in a coordinated manner, so that the output current baseline offset does not exceed the preset baseline offset threshold during long-term operation of the laser.

[0028] The present invention includes at least the following beneficial effects: The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback described in the present invention enables rapid adjustment and high-precision control to be electrically independent through the dual-loop negative feedback architecture, while the closed-loop bandwidth is not less than 10kHz and the steady-state error is not affected by the bandwidth increase; by sharing the current sensing node on the same main sampling resistor module but with independent electrical functions, the control path and the monitoring path do not form control coupling, avoiding the impact of the monitoring channel load effect on the control accuracy; and by providing phase margin by connecting a compensation capacitor in parallel between the inverting terminal and the output terminal of the second-stage error amplification module, the closed-loop stability of the inner loop is improved.

[0029] By cascading the first-stage amplification module and the second-stage amplification module and using NPN bipolar transistors to form a regulating transistor module, a linear transmission relationship is maintained between the base drive voltage of the regulating transistor and the output voltage of the digital-to-analog converter module. The collector is filtered by an LC filter network to reduce transient spikes in the power supply circuit.

[0030] All operational amplifiers are configured with a voltage noise density not exceeding 5.2 nV / The zero-drift operational amplifier suppresses the contribution of op-amp voltage noise to the output current to within the same order of magnitude as the thermal noise of the main sampling resistor.

[0031] By constraining the main sampling resistor module to have a resistance range of 1.5Ω to 3.3Ω, a power of not less than 2W, an accuracy of not less than ±1%, and a temperature coefficient of not more than ±50ppm / °C, the influence of the resistance drift of the main sampling resistor on the output current baseline during long-term laser operation meets the preset baseline offset threshold.

[0032] By establishing a linear transfer relationship I=K×V between the output current and the output voltage of the digital-to-analog converter module, the output current can be continuously adjusted within the full-scale range of the digital-to-analog converter module, and the adjustment step is determined only by the resolution of the digital-to-analog converter module.

[0033] By using specific resistor parameter combinations, a conversion factor of K≈250mA / V is achieved, enabling the output current of the digital-to-analog converter module to cover the operating range of commonly used narrow-linewidth semiconductor lasers from 0mA to 625mA within the range of 0V to 2.5V.

[0034] The gain of the outer loop first differential amplifier module is set according to the resistance value of the main sampling resistor module, so that the first monitoring voltage signal falls within the input voltage range of the microcontroller's built-in analog-to-digital converter when the maximum output current is reached, thus preventing the monitoring channel from saturating and losing its monitoring capability near the maximum output current.

[0035] By using a compensation capacitor with a capacitance between 100pF and 10nF and employing a low-loss NPO dielectric, the inner loop closed loop still has sufficient phase margin at a bandwidth of not less than 10kHz, thus avoiding current noise peaking in the closed loop near the bandwidth.

[0036] By employing a four-stage timing coordination mechanism—step-by-step establishment during power-on startup, consistency determination during normal operation, maintenance of mode switching intervals and soft-start switching, and zero-point calibration before mode switching—the dual loops maintain electrical function decoupling under different operating conditions, preventing transient coupling into the inner control loop.

[0037] By combining constraints on the upper and lower limits of the main sampling resistor module resistance, the equivalent series resistance constraint of the operational amplifier decoupling capacitor, the matching resistor pair constraint of the voltage divider network, the matching constraint between the outer loop differential resistor pair and the inner loop, the upper limit constraint of the output current noise density and RMS noise, and the long-term baseline offset threshold constraint, the total equivalent input current noise density is suppressed to within 10nA / m² in the 10Hz to 100kHz frequency band. The output current RMS noise is suppressed to within 2.5μA, and the baseline offset of the output current is guaranteed to meet the preset baseline offset threshold during long-term operation of the laser.

[0038] Other advantages, objectives and features of the present invention will become apparent in part from the following description, and in part from those skilled in the art through study and practice of the invention. Attached Figure Description

[0039] Figure 1 This is a block diagram of the overall architecture of the ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in this invention.

[0040] Figure 2 This is the control principle diagram of the inner loop fast current control unit.

[0041] Figure 3 This is the control principle diagram of the outer loop fine current monitoring unit. Detailed Implementation

[0042] The present invention will now be described in further detail with reference to specific embodiments, so that those skilled in the art can implement it based on the description.

[0043] It should be understood that terms such as “having,” “comprising,” and “including” as used herein do not exclude the presence or addition of one or more other elements or combinations thereof.

[0044] like Figure 1-3As shown, this invention discloses an ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback. The circuit consists of an inner-loop fast current control unit 100 and an outer-loop fine current monitoring unit 200. The inner-loop fast current control unit 100 is composed of a digital-to-analog converter module 101, a first-stage amplification module 110, a second-stage error amplification module 130, an adjustment tube module 140, and a main sampling resistor module 150 connected in sequence to form a closed negative feedback loop. The digital-to-analog converter module 101 receives the digital setting signal output by the microcontroller and outputs the corresponding analog setting voltage. The full-scale range of the analog setting voltage matches the bit depth of the built-in digital-to-analog converter module 101 of the microcontroller, typically 16 bits, with a reference voltage of 2.5V. The first-stage amplification module 110 conditions the analog setting voltage and outputs a first voltage signal V1; V1 is fed into the non-inverting input of the second-stage error amplification module 130. The inverting input of the second-stage error amplifier module 130 is connected to the feedback voltage drawn from the high end of the main sampling resistor module 150 via a voltage divider network. The voltage divider network consists of an upper voltage divider resistor and a lower voltage divider resistor connected in series. The high end of the upper voltage divider resistor is connected to the feedback node drawn from the high end of the main sampling resistor module 150, and the low end of the lower voltage divider resistor is grounded. The inverting input of the second-stage error amplifier module 130 is connected to the feedback voltage drawn from the high end of the main sampling resistor module 150 via a voltage divider network. The voltage divider network consists of a resistor R8 connected to the high end of the main sampling resistor module 150 and a resistor R connected to ground. 12 It is connected in series, where R8 = 10 kΩ, R 12 =18.2 kΩ; that is, the upper voltage divider resistor is R8 = 10 kΩ, and the lower voltage divider resistor is R 12= 18.2 kΩ. During operation, the regulating transistor module 140 outputs current I to the laser cathode. Current I generates a voltage drop across the main sampling resistor module 150. This voltage drop is attenuated by a voltage divider network and then fed into the inverting input of the second-stage error amplifier module 130, where it is compared with V1 at the non-inverting input. The deviation between the two is amplified by the second-stage error amplifier module 130 and drives the regulating transistor module 140, causing the feedback voltage from the high end of the main sampling resistor module 150 to continuously approach V1 after attenuation by the voltage divider network, thereby realizing the inner-loop fast current control closed loop. The closed-loop bandwidth of the inner-loop fast current control unit 100 is not less than 10kHz. To provide sufficient phase margin at a closed-loop bandwidth of not less than 10kHz, a compensation capacitor is connected in parallel between the inverting input and output of the second-stage error amplifier module 130. The typical capacitance of the compensation capacitor is between 100pF and 10nF, and can be adjusted within this range according to the actual dynamic characteristics of the inner loop. The outer-loop fine current monitoring unit 200 includes a first differential amplifier module 210, whose non-inverting and inverting input terminals are connected to the high and low ends of the main sampling resistor module 150 respectively via an outer-loop voltage divider resistor. This amplifies the differential voltage across the main sampling resistor module 150 and outputs a first monitoring voltage signal. This first monitoring voltage signal is fed into the input of the microcontroller's built-in analog-to-digital converter 310 and read by the microcontroller. The inner-loop fast current control unit 100 obtains feedback voltage from the high end of the main sampling resistor module 150 to construct a fast current control closed loop; the outer-loop fine current monitoring unit 200 obtains differential voltage from the two ends of the main sampling resistor module 150 to construct a current monitoring channel. The two units converge at the main sampling resistor module 150, a current sensing node, but are electrically independent and do not form control coupling.

[0045] The first-stage amplification module 110 and the second-stage amplification module 120 are cascaded. The first-stage amplification module 110 receives the analog setting voltage V_DAC output from the digital-to-analog converter module 101, and the output V1, after being shaped by the voltage follower in the second-stage amplification module 120, is sent to the non-inverting input of the second-stage error amplification module 130. The typical gain of the first-stage amplification module 110 is 1, corresponding to the voltage follower configuration. It can be adjusted within a reasonable range according to the correspondence between the full-scale range of the digital-to-analog converter module 101 and the full-scale range of the output current. The adjustment transistor module 140 contains an NPN bipolar transistor, the base of which is connected to the output of the second-stage error amplification module 130 via a drive resistor. The typical resistance value of the drive resistor is between tens of ohms and hundreds of ohms, used to limit the base current and compensate for the phase margin. The collector is connected to the laser cathode via an LC filter network, which is used to suppress transient spikes in the power supply circuit. The emitter is connected to the high end of the main sampling resistor module 150.

[0046] The first-stage amplification module 110, the second-stage amplification module 120, the second-stage error amplification module 130, and the first differential amplification module 210 all employ zero-drift operational amplifiers with a voltage noise density not exceeding 5.2 nV / m². This constraint suppresses the contribution of operational amplifier voltage noise to output current to within the same order of magnitude as the thermal noise of the main sampling resistor.

[0047] The main sampling resistor module 150 is composed of precision resistors with a resistance range of 1.5Ω to 3.3Ω, a power of not less than 2W, an accuracy of not less than ±1%, and a temperature coefficient of not more than ±50ppm / °C. This constraint reduces the contribution of operational amplifier voltage noise and voltage divider network thermal noise while avoiding excessive voltage drop occupying the effective dynamic range of the adjustment tube module 140. The low temperature drift coefficient ensures that the output current baseline offset meets the preset baseline offset threshold during long-term laser operation.

[0048] The output current I of the inner loop fast current control unit 100 and the output voltage V of the digital-to-analog converter module 101 satisfy the relationship I = K × V, where K is a constant, determined by the resistance R of the main sampling resistor module 150. S The gain G1 of the first-stage amplification module 110 and the voltage division ratio of the voltage divider network at the inverting end of the second-stage error amplification module 130 are jointly determined; this linear relationship makes the output current continuously adjustable within the full-scale range of the digital-to-analog converter module 101, and the adjustment step is determined only by the resolution of the digital-to-analog converter module 101.

[0049] Specifically, the output current I of the inner loop fast current control unit 100 out With the output voltage V of the digital-to-analog converter module 101 DAC The following relationship exists between them: Where G1 is the gain of the first-stage amplification module 110, and R... S R8 is the resistance value of the main sampling resistor module 150, and R8 is the resistor connecting the inverting input of the second-stage error amplifier module 130 to the high-side of the main sampling resistor module 150. 12 This is the resistor connected to ground at the inverting input of the second-stage error amplifier module 130. From the above formula, we can see that the output current I... out With the output voltage V of the digital-to-analog converter module 101 DAC The relationship is linear, and the proportionality coefficient K is determined by G1, R8, and R. 12 and R S A joint decision.

[0050] When the resistance value R of the main sampling resistor module 150 S =2.2Ω, the gain G1 of the first-stage amplifier module 110 is 1, the inverting input of the second-stage error amplifier module 130 is connected to the high-side resistor of the main sampling resistor module 150, the resistor R8 is 10kΩ, and the resistor R is connected to ground. 12When I = 18.2kΩ, substituting into the above formula yields I. out ≈250mA / V⋅V DAC ; where V DAC When the unit is V, I out The unit is mA. This parameter combination enables the output current of the digital-to-analog converter module 101 to cover the commonly used narrow-linewidth semiconductor laser operating range of 0mA to approximately 625mA within the range of 0V to 2.5V. By precise calculation, K = 0.24975A / V = 249.75mA / V, or 250mA / V with three significant figures.

[0051] The gain of the first differential amplifier module 210 of the outer loop fine current monitoring unit 200 is set according to the resistance value of the main sampling resistor module 150, so that the first monitoring voltage signal falls within the input voltage range of the microcontroller's built-in analog-to-digital converter 310 when the maximum output current is reached. In this preferred embodiment, the gain G2 of the first differential amplifier module 210 is 1.82; the first monitoring voltage signal V MON With output current I out The following conditions must be met between them: V MON =G2×R S ×I out； Substituting G2 = 1.82 and R... S =2.2Ω, therefore: V MON =1.82×2.2Ω×I out =4.004V / A×I out When the output current I out When =620mA=0.62A: V MON =4.004 × 0.62 ≈ 2.48V; This first monitoring voltage signal, after being filtered by RC, is sent to the microcontroller's built-in ADC, falling within the typical 0V to 3.3V input range of the analog-to-digital converter 310. If the output current is expressed in mA, the above formula can be written as V MON =0.004004V / mA×I out (mA). The above G2 = 1.82, coefficient 4.004V / A, and 620mA corresponding to 2.48V are typical parameters of this preferred embodiment, which can be adjusted according to the resistance value of the main sampling resistor module 150 and the ADC input range.

[0052] The compensation capacitor connected in parallel between the inverting input and output of the second-stage error amplifier module 130 has a capacitance between 100pF and 10nF and uses a low-loss NPO dielectric. This constraint ensures that the inner closed loop still has sufficient phase margin at a bandwidth of not less than 10kHz, avoiding current noise peaking in the closed loop near the bandwidth.

[0053] The microcontroller is connected to the analog-to-digital converter module 101 of the inner loop fast current control unit 100, the analog-to-digital converter input terminal of the outer loop fine current monitoring unit 200, and the numerical control analog switch module 220, and manages the dual-loop operation in a coordinated manner according to the following four-stage timing sequence. During the power-on startup phase, the microcontroller first sets the output of the analog-to-digital converter module 101 to zero, and after a first preset time delay, gradually raises the set voltage from zero to the target value according to a preset step size. During the step-raising process, the first monitoring voltage signal is read in real time. When the deviation from the target value exceeds the preset error window, the step-raising is frozen and the current set value is maintained until the deviation falls back into the error window. When the cumulative value of the deviation exceeds the preset drift threshold, the resistance calibration sequence of the main sampling resistor module 150 is triggered to recalibrate the reference current and correct the subsequent control parameters. After the stepped rise is completed and the inner loop fast current control unit 100 is closed-loop stable, the microcontroller enters the normal operation phase. During the normal operation phase, the microcontroller samples the first monitoring voltage signal and the backlight current monitoring signal according to the second preset duration period. Based on the difference between the two monitoring signals and the set value, it dynamically determines the consistency between the actual output current of the inner loop and the set current. When the consistency is lower than the consistency threshold, the microcontroller is triggered to proportionally fine-tune the output of the digital-to-analog converter module 101 and record the deviation as the basis for correction in the next cycle. The digital-controlled analog switch module 220 is controlled by the microcontroller signal and switches between constant current mode and constant optical power mode. During the mode switching interval, the inner loop fast current control unit 100 maintains the current set value unchanged, and the outer loop fine current monitoring unit 200 starts a new round of monitoring and sampling after a delay of the third preset duration to avoid transient coupling into the inner loop control closed loop during mode switching. After the switching is completed, the inner loop fast current control unit 100 executes the soft start sequence based on the deviation of the set value before and after the switching. The set voltage change rate of the soft start sequence does not exceed half of the upper limit of the set voltage change rate during the normal operation phase. Before each mode switch, the microcontroller first performs zero-point calibration on the first differential amplifier module 210 of the outer loop fine current monitoring unit 200. After calibration, it restarts the periodic sampling and consistency judgment logic of the normal operation phase.

[0054] The circuit achieves low noise and temperature drift optimization through the following five constraints working together. The resistance value R of the main sampling resistor module 150. S Not less than 1.5Ω, so that the contribution of operational amplifier voltage noise and voltage divider network thermal noise referred to as output current varies with R. S Increase and decrease; R SThe voltage drop should not exceed 3.3Ω to avoid excessive voltage drop occupying the effective dynamic range of the regulating transistor module 140. Decoupling capacitors are connected between the power supply ports and common ground of the first-stage amplification module 110, the second-stage amplification module 120, the second-stage error amplification module 130, and the first differential amplification module 210. The equivalent series resistance of the decoupling capacitors should not exceed 50mΩ; typical decoupling capacitor capacitance is between 0.1μF and 10μF, selected according to power supply ripple suppression requirements. The upper and lower voltage divider resistors of the inverting terminal voltage divider network of the second-stage error amplification module 130 are matching resistor pairs with an accuracy of not less than ±0.1% and a temperature coefficient not higher than ±10ppm / °C, and the proportional deviation between the upper and lower voltage divider resistors does not exceed ±0.2%. The resistors connected in series at the two input terminals of the first differential amplification module 210 and the feedback resistor are matching resistor pairs of the same specifications as the inner loop voltage divider network, ensuring that the differential common-mode rejection ratio of the outer loop fine current monitoring unit 200 and the inner loop feedback accuracy maintain temperature consistency.

[0055] Within the 10Hz to 100kHz frequency band, the total equivalent input current noise density, obtained by superimposing the thermal noise contributions of the main sampling resistor module 150, the operational amplifier voltage noise contribution, and the voltage divider network thermal noise contribution according to the square root of the noise density, does not exceed 10nA / m². The output current RMS noise does not exceed 2.45μA. Specifically, the contributions of each major noise source to the equivalent input current noise density of the output current are shown in Table 1 below:

[0056] Table 1 Rs=2.2Ω thermal noise 2.74 OPA189 Voltage Noise 2.36 Voltage divider network thermal noise 6.86 Total noise density 7.76

[0057] The total noise density is calculated by summing the square roots of the sum of the squares of the noise densities of each noise source:

[0058] ;

[0059] Based on the above noise superposition relationship, it can be seen that increasing the resistance R of the main sampling resistor module 150 will... S This can reduce the contribution of operational amplifier voltage noise and voltage divider network thermal noise to the output current; however, R S An excessively large value would consume the effective dynamic range of the regulating tube module 140. Therefore, R... S The impedance is limited to between 1.5Ω and 3.3Ω, preferably 2.2Ω. This constraint achieves synergistic optimization of low noise and temperature drift, ensuring that the output current baseline offset does not exceed a preset baseline offset threshold during long-term laser operation.

[0060] The above circuit, with a K-value combination of 150 and 250mA / V for the 2.2Ω main sampling resistor module, has been verified by LTspice simulation and actual measurement. The typical values ​​of the main technical indicators are as follows.

[0061] Within the 10Hz to 100kHz frequency band, the output current RMS noise of the inner-loop fast current control unit 100 is no higher than 2.45μA, and the equivalent input current noise density is no higher than 7.76nA / m³. The loop gain is independent of the set value within the full range of adjustment from 0mA to 625mA, and the closed-loop bandwidth is not less than 10kHz; the output current baseline offset meets the preset baseline offset threshold during long-term laser operation.

[0062] In Figure 2, the first-stage amplifier module 110 receives the analog set voltage output by the digital-to-analog converter module 101. The second-stage amplifier module 120 is a voltage follower, and its output terminal outputs a first voltage signal V1 and connects to the non-inverting input terminal of the second-stage error amplifier module 130. The inverting input terminal of the second-stage error amplifier module 130 receives the feedback voltage drawn from the high end of the main sampling resistor module 150 through a voltage divider network. Its output terminal is connected to the control terminal of the regulating tube module 140 through a drive resistor. The collector of the regulating tube module 140 is connected to the laser cathode through an LC filter network, and the emitter is connected to the high end of the main sampling resistor module 150. The low end of the main sampling resistor module 150 is grounded. Figure 3 The non-inverting input and inverting input of the first differential amplifier module 210 are connected to the high end and low end of the main sampling resistor module 150 through the outer ring voltage divider resistor, respectively. The second differential amplifier module 230 is used to detect the laser backlight current. The digitally controlled analog switch module 220 switches between constant current mode and constant optical power mode under the control of the microcontroller signal.

[0063] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and examples shown and described herein.

Claims

1. A constant current source driving circuit for an ultra-low noise laser based on dual-loop negative feedback, characterized in that, include: The inner-loop fast current control unit consists of a digital-to-analog converter module, a first-stage amplifier module, a second-stage error amplifier module, an adjustment transistor module, and a main sampling resistor module, which are sequentially electrically connected to form a closed negative feedback loop. The digital-to-analog converter module outputs an analog set voltage, which is conditioned by the first-stage amplifier module and then outputs a first voltage, which is sent to the non-inverting input of the second-stage error amplifier module. Its inverting input receives the feedback voltage from the high end of the main sampling resistor module through a voltage divider network, and its output is connected to the control terminal of the adjustment transistor module through a drive resistor. The adjustment transistor module and the main sampling resistor module are connected in series to power the drive laser, and the low end of the main sampling resistor module is grounded. The outer ring fine current monitoring unit includes a first differential amplifier module. Its non-inverting and inverting input terminals are connected to the high and low ends of the main sampling resistor module through the outer ring voltage divider resistor, respectively. The differential voltage across the main sampling resistor module is amplified and then output as a monitoring voltage signal. The inner loop fast current control unit takes voltage feedback from the high end of the main sampling resistor module to form a closed loop, while the outer loop fine current monitoring unit takes differential voltage from both ends of the main sampling resistor module to form a channel. The two are electrically independent and uncoupled. The closed-loop bandwidth of the inner-loop fast current control unit is not less than 10kHz. A compensation capacitor is connected in parallel between the inverting input and output of the second-stage error amplifier module to provide sufficient phase margin at the closed-loop bandwidth.

2. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The first-stage amplification module and the second-stage amplification module are cascaded. The first-stage amplification module receives the analog set voltage output from the digital-to-analog converter module. The second-stage amplification module is a voltage follower, and its output terminal is connected to the non-inverting input terminal of the second-stage error amplification module. The regulating transistor module contains an NPN bipolar transistor. Its base is connected to the output terminal of the second-stage error amplification module via a drive resistor, its collector is connected to the laser cathode via an LC filter network, and its emitter is connected to the high end of the main sampling resistor module.

3. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The first-stage amplification module, the second-stage amplification module, the second-stage error amplification module, and the first differential amplification module all employ zero-drift operational amplifiers with a voltage noise density not exceeding 5.2nV / m². .

4. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The main sampling resistor module is composed of precision resistors with a resistance range of 1.5Ω to 3.3Ω, a power of not less than 2W, an accuracy of not less than ±1%, and a temperature coefficient of not more than ±50ppm / °C.

5. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, Output current I of the inner loop fast current control unit OUT With the output voltage V of the digital-to-analog converter module DAC The following conditions must be met: Where K is a constant, determined by the resistance R of the main sampling resistor module. S The gain G1 of the first-stage amplification module and the voltage division ratio of the voltage divider network at the inverting input of the second-stage error amplification module are jointly determined; the voltage divider network includes a resistor R8 connected to the high end of the main sampling resistor module and a resistor R connected to ground. 12 .

6. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 5, characterized in that, The main sampling resistor module has a resistance of 2.2Ω, the first-stage amplifier module has a gain G1 of 1, the resistor R8 connected to the high end of the main sampling resistor module in the voltage divider network of the inverting input of the second-stage error amplifier module is 10 kΩ, and the resistor connected to ground is R... 12 When the voltage divider is 18.2 kΩ, that is, when the upper voltage divider resistor is 10 kΩ and the lower voltage divider resistor is 18.2 kΩ, K is 249.75 mA / V.

7. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The gain of the first differential amplifier module of the outer loop fine current monitoring unit is set according to the resistance value of the main sampling resistor module, so that the first monitoring voltage signal falls within the input voltage range of the microcontroller's built-in analog-to-digital converter when the maximum output current is reached.

8. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The compensation capacitor connected in parallel between the inverting input and output terminals of the second-stage error amplifier module has a capacitance between 100pF and 10nF and uses a low-loss NPO dielectric.

9. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The microcontroller is connected to the analog-to-digital converter module of the inner loop fast current control unit, the analog-to-digital converter input terminal of the outer loop fine current monitoring unit, and the numerically controlled analog switch module, and manages the dual-loop operation in a coordinated manner by executing the following timing control logic: a. During the power-on startup phase, the microcontroller first sets the output of the digital-to-analog converter module to zero. After a first preset time delay, it gradually raises the set voltage from zero to the target value according to the preset step size. During the step-raising process, the first monitoring voltage signal is read in real time. When the deviation from the target value exceeds the preset error window, the step-raising is frozen and the current set value is maintained until the deviation falls back into the error window. When the cumulative deviation exceeds the preset drift threshold, the main sampling resistor module resistance calibration sequence is triggered to recalibrate the reference current and correct subsequent control parameters. b. After the step-up is completed and the inner loop fast current control unit is closed-loop stable, the microcontroller enters the normal operation stage. During normal operation, the microcontroller samples the first monitoring voltage signal and the backlight current monitoring signal according to the second preset time period. Based on the difference between the two monitoring signals and the set value, it dynamically determines the consistency between the actual output current of the inner loop and the set current. When the consistency is lower than the consistency threshold, the microcontroller is triggered to adjust the output of the digital-to-analog conversion module proportionally and record the deviation as the basis for correction in the next cycle. c. The numerical control analog switch module is controlled by the microcontroller signal and switches between constant current mode and constant optical power mode. During the mode switching interval, the inner loop fast current control unit maintains the current set value unchanged, and the outer loop fine current monitoring unit starts a new round of monitoring and sampling after a delay of the third preset time, so as to avoid the transient coupling of mode switching into the inner loop control closed loop. After the switching is completed, the inner loop fast current control unit executes the soft start timing based on the deviation of the set value before and after the switching. The set voltage change rate of the soft start timing does not exceed half of the upper limit of the set voltage change rate during normal operation. d. Before each mode switch, the microcontroller first performs zero-point calibration on the first differential amplification module of the outer loop fine current monitoring unit. After calibration, it restarts the periodic sampling and consistency judgment logic of the normal operation phase.

10. The ultra-low noise laser constant current source driving circuit based on dual-loop negative feedback as described in claim 1, characterized in that, The circuit achieves coordinated optimization of low noise and temperature drift through the following constraints: The resistance value R of the main sampling resistor module S Not less than 1.5Ω, so that the contribution of operational amplifier voltage noise and voltage divider network thermal noise referred to as output current varies with R. S Increase and decrease; R S The voltage drop should not exceed 3.3Ω to avoid excessive voltage drop consuming the effective dynamic range of the regulating tube module; Decoupling capacitors are connected between the power supply ports of the first-stage amplification module, the second-stage amplification module, the second-stage error amplification module, and the first differential amplification module and the common ground. The equivalent series resistance of the decoupling capacitors is not higher than 50mΩ. In the voltage divider network at the inverting input of the second-stage error amplifier module, resistor R8 connected to the high end of the main sampling resistor module and resistor R connected to ground are... 12 All use matching resistor pairs with an accuracy of not less than ±0.1% and a temperature coefficient of not more than ±10ppm / °C, and R8 and R 12 The proportional deviation between them shall not exceed ±0.2%; The resistors connected in series at the two input terminals of the first differential amplifier module and the feedback resistor are both matching resistor pairs of the same specifications as the inner loop voltage divider network, so that the differential common-mode rejection ratio of the outer loop fine current monitoring unit and the inner loop feedback accuracy remain consistent at temperature. Within the 10Hz to 100kHz frequency band, the total equivalent input current noise density, obtained by superimposing the thermal noise contributions of the main sampling resistor module, the operational amplifier voltage noise contribution, and the voltage divider network thermal noise contribution according to the square root of the noise density, does not exceed 10nA / m². The output current RMS noise does not exceed 2.5μA; through the above constraints, low noise and temperature drift are optimized in a coordinated manner, so that the output current baseline offset does not exceed the preset baseline offset threshold during long-term operation of the laser.

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