An overcurrent protection circuit with a latch function

Abstract

The application relates to an overcurrent protection circuit with a latch function, which comprises a sampling unit for detecting the current flowing through a load and forming a detection voltage corresponding to the current on a sampling resistor; an overcurrent detection unit for being turned on when the detection voltage exceeds a preset threshold; a power switch unit for being turned off when the overcurrent detection unit is turned on and being kept in the off state under the action of a latch control unit; the latch control unit is turned on in response to the potential change generated by a coupling circuit during the transient process of the overcurrent detection unit from the on state to the off state, and maintains the potential state of the power switch unit control node through the on path; the coupling circuit is used for coupling the potential change caused by the state change of the overcurrent detection unit to the latch control unit; a maintenance path is formed between the latch control unit and the power switch unit control node, so that the power switch unit is kept in the off state after the overcurrent is removed.

Description

Technical Field

[0001] This invention relates to an overcurrent protection circuit, and more particularly to an overcurrent protection circuit with latching function. Background Technology

[0002] In existing electronic systems, overcurrent protection circuits are widely used in power management, motor drives and various power control scenarios. Their main function is to cut off or limit the current in time when the load is short-circuited, overloaded or subjected to abnormal current surges, thereby protecting the reliability and safety of power devices and the overall system.

[0003] In existing technologies, common overcurrent protection implementation schemes mainly include the following categories:

[0004] The first category is fuses or resettable circuit breakers (PTCs). This type of solution achieves melting or current limiting after overcurrent through the thermal effect of the material. It has a simple structure and low cost, but its response speed depends on the heat accumulation process, which cannot achieve fast electrical protection. Moreover, the protection accuracy is low, and the recovery time after activation is long, making it difficult to meet the requirements of modern electronic systems for fast response.

[0005] The second type is a detection scheme based on a sampling resistor combined with an operational amplifier or comparator. This scheme converts the current into a voltage signal by connecting a sampling resistor in series in the load circuit, and then uses an operational amplifier or comparator to determine a threshold value. Upon detecting an overcurrent signal, it controls the power MOSFET to turn off. This scheme has high detection accuracy and fast response speed, but its structure usually relies on external analog amplifier or comparator chips, which increases system cost and circuit complexity. It also has certain limitations in miniaturized and low-cost application scenarios.

[0006] The third type is a self-detection scheme based on the on-resistance (Rds(on)) of the MOSFET. This scheme uses the on-resistance of the power MOSFET itself to estimate the current and detects overcurrent by detecting the voltage drop. This method has a simple structure, but because the on-resistance of the MOSFET is greatly affected by temperature, process, and batch differences, the detection accuracy is low and the consistency is poor, making it difficult to meet the requirements of high-reliability systems.

[0007] The fourth category is solutions based on dedicated current sensing chips or electronic fuses (eFuse). These solutions are relatively complete in function, typically integrating overcurrent detection, short-circuit protection, and automatic recovery functions. However, they rely on dedicated chips, resulting in higher costs. They also have poor design flexibility, are highly dependent on the supply chain, and are not conducive to low-cost and customizable application scenarios.

[0008] The fifth type is the protection scheme based on constant current source limiting. This scheme maintains the current within a set range by connecting a constant current source in series in the circuit, thereby achieving overcurrent suppression. However, this method will generate significant power loss under overcurrent conditions, and the device is prone to severe overheating or even damage when operating in a current-limited state for a long time. In addition, its applicability is limited and it is difficult to use in systems with high current or high efficiency requirements.

[0009] In summary, while existing technologies in the field of overcurrent protection have their own advantages in terms of response speed, detection accuracy, or functional integration, they generally suffer from problems such as complex structure, high cost, insufficient temperature stability, or difficulty in achieving fast and reliable latching protection. Summary of the Invention

[0010] This invention relates to an overcurrent protection circuit with latching function, which solves the problems of the prior art.

[0011] This invention discloses an overcurrent protection circuit with latching function, comprising: a power switch unit, a sampling unit, an overcurrent detection unit, a latching control unit, and a coupling circuit; the sampling unit is used to detect the current flowing through the load and form a detection voltage corresponding to the current on the sampling resistor; the overcurrent detection unit is used to turn on when the detection voltage exceeds a preset threshold and return to the off state during the overcurrent release process; the power switch unit is used to be turned off when the overcurrent detection unit is turned on and remains off under the action of the latching control unit; the latching control unit is used to turn on in response to the potential change generated by the coupling circuit during the transient process of the overcurrent detection unit returning to the off state from the on state, and maintain the potential state of the power switch unit control node through its conduction path; the coupling circuit is used to couple the potential change caused by the state change of the overcurrent detection unit to the latching control unit; a maintenance path is formed between the latching control unit and the power switch unit control node, so that the power switch unit remains off after the overcurrent is released.

[0012] According to one embodiment of the circuit of the present invention, the power switching unit is a P-MOS transistor; wherein the source of the P-MOS transistor is connected to the lower end of the sampling resistor, the drain is connected to the load, and the gate is connected to the output node of the overcurrent detection unit and the latch control unit; wherein the P-MOS transistor is turned on when the gate potential is lower than the source potential and is turned off when the gate potential is close to the source potential.

[0013] According to one embodiment of the circuit of the present invention, the overcurrent detection unit includes an overcurrent detection transistor, wherein the base of the overcurrent detection transistor is connected to the sampling node between the sampling resistor and the overcurrent detection transistor, the emitter is connected to the power input terminal, and the collector is connected to the gate control node of the power switching unit. The overcurrent detection transistor turns on when it detects an overcurrent, causing the potential of the gate control node to rise, and returns to the off state from the on state during the overcurrent release process, thereby causing a transient change in the potential of the gate control node.

[0014] According to one embodiment of the circuit of the present invention, the coupling circuit includes a second capacitor and a fifth resistor, wherein the second capacitor is connected between the power input terminal and the coupling node, the fifth resistor is connected between the coupling node and the drain node of the power switching unit, and the control terminal of the latch control unit is connected to the coupling node; the coupling circuit is used to couple the potential change of the drain node of the power switching unit after it is turned off to the latch control unit, so as to trigger the latch control unit to enter the latching conduction state.

[0015] According to one embodiment of the circuit of the present invention, the latch control unit includes a latch control transistor, wherein the gate of the latch control transistor is connected to the coupling node between the second capacitor and the fifth resistor, the source of the latch control transistor is connected to the power input terminal, and the drain of the latch control transistor is connected to the fourth resistor, the other end of the fourth resistor being grounded; wherein when the overcurrent detection unit returns from the on state to the off state, the latch control transistor is triggered to conduct by the potential change generated by the coupling circuit, and maintains the control node potential of the power switching unit through its conduction path.

[0016] According to one embodiment of the circuit of the present invention, a fourth resistor is connected between the latch control transistor and ground to provide a bias reference and a reset discharge path.

[0017] According to one embodiment of the circuit of the present invention, the first capacitor is connected between the power input terminal and the power switch control node, for transient coupling filtering of the voltage of the power switch control node, and participates in the attenuation and recovery of the potential of the power switch control node during the reset process.

[0018] According to one embodiment of the circuit of the present invention, a third resistor is connected between the drain of the power switch unit and ground to provide potential stabilization and a pull-down path.

[0019] According to one embodiment of the circuit of the present invention, the latch control unit is turned on during the transient process of the overcurrent detection unit returning from the on state to the off state, and maintains the gate control node potential of the power switch unit through its conduction path, so that the power switch unit remains in the off state after the overcurrent is released.

[0020] According to one embodiment of the circuit of the present invention, the power switching transistor is an N-type MOSFET, a P-type MOSFET, or an IGBT; the overcurrent detection transistor is a MOSFET, a transistor, an IGBT, a comparator circuit, or a current detection chip.

[0021] This invention utilizes a detection and control structure composed of a sampling resistor and discrete transistors to achieve rapid detection of overcurrent conditions, rapid turn-off of power switching transistors, and self-locking after a fault. This reduces system cost and complexity while improving the response speed, reliability, and anti-interference capability of overcurrent protection. Attached Figure Description

[0022] Figure 1 The diagram shown is a schematic of an overcurrent protection circuit with latching function provided by the present invention. Detailed Implementation

[0023] To make the objectives, contents, and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0024] Figure 1 The diagram shown is a schematic of an overcurrent protection circuit with latching function provided by the present invention. Figure 1 As shown, the present invention provides an overcurrent protection circuit with latching function, including: power input terminal VCC, power switch Q1, sampling resistor R1, overcurrent detection transistor Q2, latching control transistor Q3, load R2, capacitor C1, capacitor C2 and resistor R5.

[0025] like Figure 1As shown, in an overcurrent protection circuit with latching function according to the present invention, the power input terminal VCC is connected to the source of power switch Q1 through sampling resistor R1 in sequence, and the other end of sampling resistor R1 is connected to overcurrent detection transistor Q2. The power input terminal VCC is also connected to latching control transistor Q3, capacitor C1, and capacitor C2. The source of power switch Q1 is connected to sampling resistor R1, which is connected in series between the power input terminal and power switch Q1. The drain of power switch Q1 is connected to one end of load R2, and the other end of load R2 is grounded, thus forming the main current path structure. The gate of power switch Q1 is connected to the collector of overcurrent detection transistor Q2 and the control node of latching control transistor Q3, used to receive overcurrent detection signals and latching sustain signals, thereby controlling the on and off states of power switch Q1 and realizing the on / off control of the load power supply path. In this structure, by controlling the gate potential of the power switch Q1, the current from the power input terminal VCC through the sampling resistor R1 can be selectively output to the load R2 or cut off, thereby achieving overcurrent protection. In the control branch, the base of the overcurrent detection transistor Q2 is connected to the sampling node between the sampling resistor R1 and the source of the power switch Q1, used to receive the voltage signal generated by the sampling resistor R1. The emitter of Q2 is connected to the power input terminal VCC, forming a high-side reference potential. The collector of Q2 is connected to the gate control node of the power switch Q1, used to pull and control the gate potential of Q1 under overcurrent conditions. The latch control transistor Q3 is a MOS transistor, and its gate is connected to the node between the capacitor C2 and the resistor R5. The source of the latch control transistor Q3 is connected to the power input terminal VCC. The drain of the latch control transistor Q3 is connected to the resistor R4. The resistor R3 is connected between the drain node of the power switch Q1 and ground. The resistor R4 is connected between the latch control transistor Q3 and ground. Capacitor C1 is connected between the power input terminal VCC and the gate control node of power switch Q1. Capacitor C2 is connected between the power input terminal VCC and resistor R5. Resistor R5 is connected between the control node of capacitor C2 and resistor R3.

[0026] like Figure 1 As shown, the sampling resistor R1 is used to convert the current flowing through the load R2 into a corresponding voltage signal and generate a detection voltage in the power path that is proportional to the load R2 current.

[0027] like Figure 1 As shown, power switch Q1 is used to control the power supply to load R2. Under normal operating conditions, power switch Q1 is in the on state, allowing power to be supplied to load R2 through the power input terminal VCC via R1; under abnormal conditions, power switch Q1 is turned off, thereby cutting off the main current path.

[0028] like Figure 1As shown, the overcurrent detection transistor Q2 is used to detect the voltage signal generated by the sampling resistor R1. The input terminal of the overcurrent detection transistor Q2 is connected to the sampling node to obtain the current information flowing through the sampling resistor R1. The output terminal of the overcurrent detection transistor Q2 is connected to the gate control node of the power switch Q1 to change the gate potential of the power switch Q1 when an overcurrent condition is detected. When the current flowing through the load exceeds a set threshold, the overcurrent detection transistor Q2 turns on, causing a change in the gate control node potential of the power switch Q1, thereby causing the power switch Q1 to switch from the on state to the off state, achieving overcurrent protection.

[0029] like Figure 1 As shown, latching control transistor Q3 is used to maintain the off state of power switch Q1 after overcurrent triggering. The control terminal of latching control transistor Q3 is connected to an RC coupling node composed of capacitor C2 and resistor R5 to receive transient trigger signals. The conducting terminal of latching control transistor Q3 is connected to the power supply side node, and its other end is connected to the bias network composed of resistors R3 and R4, thus participating in the control of the potential stability of the gate control node of power switch Q1 when it is conducting. When latching control transistor Q3 is conducting, it provides a sustaining effect on the gate control node of power switch Q1 through the bias network, so that power switch Q1 remains off even after the overcurrent condition is removed, thereby realizing the latching function.

[0030] like Figure 1 As shown, capacitor C1 is connected between the power input terminal VCC and the gate control node of power switch Q1, used for transient filtering of the gate control signal of power switch Q1 to suppress false triggering caused by power fluctuations or interference. Capacitor C2 is connected between the power input terminal and the RC coupling node, used for delaying and coupling the latch trigger signal. Resistor R5 is connected between the gate of Q3 and the drain of Q1, used to provide feedback and charge release path for the gate of Q3, and together with C2 and R3, adjusts the change time of the gate potential of Q3.

[0031] like Figure 1 As shown, resistor R3 is connected between the drain node of power switch Q1 and ground, and is used to provide a pull-down path and potential stabilization for the drain of power switch Q1.

[0032] like Figure 1 As shown, resistor R4 is connected between latch control transistor Q3 and ground to provide a stable bias reference potential for latch control transistor Q3 and to ensure the reliable reset capability of latch control transistor Q3 under different operating conditions.

[0033] like Figure 1 As shown, during the operation of this invention, the circuit working state can be divided into three stages: normal working state, overcurrent triggering state, and latching and holding state.

[0034] like Figure 1 As shown, under normal operating conditions, power switch Q1 is in the ON state. Current flows from the power input terminal VCC through the sampling resistor R1 into power switch Q1, and then returns to ground through the load R2, forming a stable power supply circuit. In this state, the voltage across the sampling resistor R1 is low and does not reach the overcurrent detection transistor Q2's turn-on threshold; therefore, overcurrent detection transistor Q2 remains in the OFF state. Simultaneously, since latch control transistor Q3 is not triggered to turn on, it also remains in the OFF state, and the circuit operates in a stable, low-power mode.

[0035] like Figure 1 As shown, when the load R2 experiences a short circuit or overload, the current flowing through the sampling resistor R1 increases rapidly, causing the voltage across the sampling resistor R1 to rise. When this voltage reaches the overcurrent detection transistor Q2's turn-on threshold, the overcurrent detection transistor Q2 quickly turns on and, through its collector, raises the gate potential of the power switch Q1 to the power supply potential, causing the gate-source voltage of the power switch Q1 to decrease to the turn-off condition. This drives the power switch Q1 from the on state to the off state, achieving the first stage of rapid turn-off protection.

[0036] At the instant power switch Q1 is turned off, the main current path is cut off, and the load current R2 drops rapidly to zero. At this time, the overcurrent detection transistor Q2 gradually returns to the off state, causing a change in the potential of the gate control node and related coupling nodes of power switch Q1. This potential change acts on the control terminal of latching control transistor Q3 through the coupling path formed by capacitor C2 and resistor R5, causing latching control transistor Q3 to enter the conducting state. After the overcurrent detection transistor Q2 returns to the off state, it maintains the potential of the gate control node of power switch Q1 through its conducting path, thus keeping power switch Q1 continuously in the off state and achieving the latching function. Therefore, even if the overcurrent condition disappears, because the latching path still exists, power switch Q1 will not automatically return to conduct, thus forming a self-holding latching state. This state allows the system to avoid repetitive inrush currents generated during fault recovery, improving system reliability and safety.

[0037] Meanwhile, throughout the entire operation, the RC network (capacitor C2 and resistor R5) continuously filters and delays the sampled signals and control nodes, thereby suppressing false triggering caused by power-on surges, electromagnetic interference, or transient load changes, so that the system only responds to continuous overcurrent conditions.

[0038] This circuit uses a power-down reset method by default. By restarting the power input terminal VCC, the latch control transistor Q3 is returned to the off state, the latch is released, and the circuit resumes normal operation.

[0039] In one alternative implementation, an external reset circuit can be added. By controlling the gate potential of the latch control transistor Q3, the potentials across the second capacitor C2 are rapidly brought to a uniform state, thereby releasing the latch state and achieving a controllable reset.

[0040] like Figure 1 As shown, in one optional embodiment, the power switch Q1 can be an N-type MOSFET instead of a P-type MOSFET, and used in conjunction with a corresponding gate drive circuit to adapt to different power supply structures.

[0041] like Figure 1 As shown, in one alternative implementation, the overcurrent detection transistor Q2 can be replaced by a comparator circuit or a dedicated current detection chip.

[0042] like Figure 1 As shown, in one optional embodiment, resistors R3 and R4 can be adjusted to different resistance values.

[0043] This invention achieves rapid identification and shutdown control of overcurrent states through a detection and control structure composed of sampling resistors and discrete transistors, without requiring operational amplifiers or dedicated current detection chips, significantly reducing the hardware complexity and overall cost of the system. Simultaneously, by directly controlling the gate of the power switch, rapid shutdown in overcurrent response is achieved, effectively avoiding the continuous losses and thermal failure risks of power devices under short-circuit or overload conditions.

[0044] The self-holding structure formed by the latching control unit enables the circuit to remain in the off state after overcurrent triggering, thereby avoiding repeated conduction and inrush current after the fault condition disappears, and improving the safety and stability of the system. Combined with RC delay and coupling network design, this invention can effectively filter transient interference signals, reduce the probability of false triggering, and improve anti-interference capability.

[0045] This invention supports restoring normal operation through power failure or external reset, and has good engineering scalability and adaptability. It can be flexibly configured according to different power devices and application scenarios, thus having good application value in low-cost, high-reliability power protection systems.

[0046] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. An overcurrent protection circuit with latching function, characterized in that, include: Power switching unit, sampling unit, overcurrent detection unit, latch control unit, and coupling circuit; The sampling unit is used to detect the current flowing through the load and to form a detection voltage corresponding to the current on the sampling resistor; The overcurrent detection unit is used to turn on when the detected voltage exceeds a preset threshold, and to return from the on state to the off state during the overcurrent release process. The power switch unit is used to be turned off when the overcurrent detection unit is turned on, and to remain in the off state under the action of the latch control unit. The latch control unit is used to turn on in response to the potential change generated by the coupling circuit during the transient process of the overcurrent detection unit returning from the on state to the off state, and maintain the potential state of the power switch unit control node through its conduction path; The coupling circuit is used to couple the potential change caused by the state change of the overcurrent detection unit to the latch control unit; A sustaining path is formed between the latch control unit and the power switch unit control node, so that the power switch unit remains in the off state after the overcurrent is released.

2. The circuit according to claim 1, characterized in that, The power switching unit is a P-MOS transistor; The source of the P-MOS transistor is connected to the lower end of the sampling resistor, the drain is connected to the load, and the gate is connected to the output node of the overcurrent detection unit and the latch control unit. The P-MOS transistor turns on when the gate potential is lower than the source potential and turns off when the gate potential is close to the source potential.

3. The circuit according to claim 1, characterized in that, The overcurrent detection unit includes an overcurrent detection transistor, wherein the base of the overcurrent detection transistor is connected to the sampling node between the sampling resistor and the overcurrent detection transistor, the emitter is connected to the power input terminal, and the collector is connected to the gate control node of the power switching unit. The overcurrent detection transistor turns on when it detects an overcurrent, causing the potential of the gate control node to rise, and returns to the off state from the on state during the overcurrent release process, thereby causing a transient change in the potential of the gate control node.

4. The circuit according to claim 1, characterized in that, The coupling circuit includes a second capacitor and a fifth resistor. The second capacitor is connected between the power input terminal and the coupling node, and the fifth resistor is connected between the coupling node and the drain node of the power switching unit. The control terminal of the latch control unit is connected to the coupling node. The coupling circuit is used to couple the potential change of the drain node of the power switching unit after it is turned off to the latch control unit to trigger the latch control unit to enter the latching conduction state.

5. The circuit according to claim 4, characterized in that, The latch control unit includes a latch control transistor, wherein the gate of the latch control transistor is connected to the coupling node between the second capacitor and the fifth resistor, the source of the latch control transistor is connected to the power input terminal, the drain of the latch control transistor is connected to the fourth resistor, and the other end of the fourth resistor is grounded. When the overcurrent detection unit returns from the on state to the off state, the latching control transistor is triggered to turn on by the potential change generated by the coupling circuit, and maintains the control node potential of the power switching unit through its conduction path.

6. The circuit according to claim 5, characterized in that, The fourth resistor is connected between the latch control transistor and ground to provide a bias reference and a reset discharge path.

7. The circuit according to claim 1, characterized in that, The first capacitor is connected between the power input terminal and the power switch control node to perform transient coupling filtering on the voltage of the power switch control node, and participates in the attenuation and recovery of the potential of the power switch control node during the reset process.

8. The circuit according to claim 1, characterized in that, The third resistor is connected between the drain of the power switch unit and ground to provide potential stability and a pull-down path.

9. The circuit according to claim 1, characterized in that, The latch control unit is turned on during the transient process of the overcurrent detection unit returning from the on state to the off state, and maintains the gate control node potential of the power switch unit through its conduction path, so that the power switch unit remains in the off state after the overcurrent is released.

10. The circuit according to claim 1, characterized in that, The power switching transistors are N-type MOSFETs, P-type MOSFETs, or IGBTs; Overcurrent detection transistors include MOSFETs, transistors, IGBTs, comparator circuits, or current detection chips.

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