Method for regulating direct current component of grid-connected current of inverter, medium and device

Abstract

The application discloses an inverter grid-connected current DC component adjusting method, medium and equipment, and relates to the technical field of inverters; the method comprises the following steps: obtaining a DC component reference value in an off-grid state of the inverter, calculating a real-time DC component average value after grid connection, and subtracting the reference value; when the absolute value of the difference value exceeds a set dead zone threshold value, the difference value is added or subtracted according to the positive or negative of the difference value to the additional value of a modulation wave; in one power frequency cycle, the additional value of the modulation wave is selectively superimposed on the original modulation wave only in part of the switching cycle, so that the absolute value of the DC component difference value gradually converges to be less than or equal to the dead zone threshold value. The medium and the equipment are used for implementing the above method. The application can break through the limitation of the minimum step length of a single comparison register without relying on high-precision PWM hardware, improve the DC component adjusting resolution, and take into account harmonic, reactive power and other grid-connected power quality indicators.

Description

Technical Field

[0001] This application relates to the field of inverter technology, and in particular to a method, medium and device for regulating the DC component of inverter grid-connected current. Background Technology

[0002] Grid-connected inverters typically convert direct current (DC) to alternating current (AC) and feed it into the power grid by controlling the switching on and off of power devices using modulated waves. Due to factors such as zero-point drift in the sampling circuit, non-ideal characteristics of the current sensor, non-ideal characteristics of the power devices, and drive dead time, a DC component is easily introduced into the grid-connected current output by the inverter. Excessive DC components in the grid-connected current can lead to problems such as magnetization of grid equipment, overheating, and degraded power quality. Therefore, it is necessary to suppress the DC component of the grid-connected current through control algorithms.

[0003] Existing technologies for suppressing the DC component of grid-connected current mainly fall into two categories: one is to collect the instantaneous value of the AC current output by the inverter, calculate the average value to obtain the observed value of the DC component, and then, after closed-loop feedback by the regulator, add a DC offset to the modulation wave of the inverter to suppress the DC component of the grid-connected current; the other is to collect the average value of the AC current sampling before grid connection as a zero-point reference, and then compare the real-time average value with this reference after grid connection to calibrate the AC current sampling zero point, thereby eliminating the DC component introduced by the zero-point drift of the sampling.

[0004] For the first type of solution, the DC offset is typically superimposed onto the modulation wave, and the correction accuracy is constrained by the hardware resolution of the PWM module in the control chip. Since the duty cycle of the modulation wave is determined by the minimum step size of the PWM comparator register, conventional chips can only achieve an adjustment resolution of 10mA. If higher DC component suppression accuracy is desired, a high-precision PWM module needs to be selected, which will increase hardware costs and reduce the versatility of the solution.

[0005] For the latter approach, although DC components can be suppressed by calibrating the ADC sampling zero point, the ADC channel also undertakes the task of sampling the rated grid-connected current, and its range needs to match the rated operating current. Due to range constraints, the sampling resolution is difficult to improve further, ultimately resulting in limited accuracy of DC component correction. Summary of the Invention

[0006] One objective of this application is to provide a method for regulating the DC component of inverter grid-connected current that can solve at least one of the defects in the above-mentioned background art.

[0007] Another object of this application is to provide a computer-readable storage medium for implementing the above-described inverter grid-connected current DC component regulation method.

[0008] Another object of this application is to provide an electronic device for implementing the above-described method for regulating the DC component of the inverter grid current.

[0009] To achieve at least one of the above objectives, one aspect of this application provides a method for adjusting the DC component of inverter grid-connected current, comprising the following steps: When the inverter is off-grid, sampling the inverter output current to obtain a DC component reference value; when the inverter is grid-connected, sampling the inverter output current in real time to obtain a real-time average value of the DC component; subtracting the real-time average value of the DC component from the DC component reference value to obtain a DC component difference; within each power frequency cycle, comparing the absolute value of the DC component difference with a preset dead zone threshold; if the absolute value of the DC component difference exceeds the dead zone threshold, correcting the modulation wave additive value according to the deviation direction of the DC component difference; in multiple switching cycles corresponding to the power frequency cycle, selecting a portion of the switching cycles to superimpose the corrected modulation wave additive value onto the original modulation wave, so that the absolute value of the DC component difference gradually converges to less than or equal to the dead zone threshold.

[0010] Preferably, when the absolute value of the DC component difference is less than or equal to the dead zone threshold, the modulated wave addition value of the previous power frequency cycle is directly used as the modulated wave addition value corrected for the current power frequency cycle; when the absolute value of the DC component difference exceeds the dead zone threshold, the process of correcting the modulated wave addition value according to the deviation direction of the DC component difference is as follows: if the DC component difference is less than the negative dead zone threshold, the modulated wave addition value of the previous power frequency cycle is added once with a preset step size to obtain the modulated wave addition value corrected for the current power frequency cycle; if the DC component difference is greater than the positive dead zone threshold, the modulated wave addition value of the previous power frequency cycle is subtracted once with a preset step size to obtain the modulated wave addition value corrected for the current power frequency cycle.

[0011] Preferably, the selection of the switching period for superimposing the modulation wave value onto the original modulation wave includes the following process: if the modulation wave value is greater than zero, in the positive half-cycle of the power frequency cycle, a portion of the switching period is selected to superimpose the modulation wave value onto the original modulation wave; otherwise, in the negative half-cycle of the power frequency cycle, a portion of the switching period is selected to superimpose the modulation wave value onto the original modulation wave.

[0012] Preferably, the method of superimposing the modulation wave value onto the original modulation wave is as follows: within a set angle range centered on the peak of the original modulation wave, the modified modulation wave value is superimposed onto the original modulation wave.

[0013] Preferably, the method of superimposing the modulation wave value onto the original modulation wave is as follows: within a set angle range before the original modulation wave reaches the zero-crossing point from positive to negative, the modified modulation wave value is superimposed onto the original modulation wave; or, within a set angle range after the modulation wave passes the zero-crossing point from negative to positive, the modified modulation wave value is superimposed onto the original modulation wave.

[0014] Preferably, the method of superimposing the modulation wave value onto the original modulation wave is as follows: the positive half-cycle of the original modulation wave is divided into multiple sub-intervals according to a preset angle value, and the modified modulation wave value is superimposed onto the original modulation wave in the inter-spaced sub-intervals.

[0015] Preferably, the method of superimposing the modulation wave value onto the original modulation wave is as follows: according to the preset optimal switching cycle arrangement sequence under each operating condition, select a portion of the corresponding switching cycles from multiple switching cycles corresponding to the power frequency cycle and superimpose the modified modulation wave value onto the original modulation wave.

[0016] Preferably, the process of obtaining the DC component reference value is as follows: during the countdown of the inverter starting from the off-grid state, the AC current output by the inverter is sampled; the average value of the sampled AC current is calculated using the inverter's power frequency cycle as a window to obtain the average value of the DC component sampling; after the grid-connected start-up countdown ends, the average value of the DC component sampling after low-pass filtering is used as the DC component reference value.

[0017] Another aspect of this application provides a computer-readable storage medium storing a computer program; when the computer program is executed by a processor, it implements the above-described method for regulating the DC component of the inverter grid-connected current.

[0018] Another aspect of this application provides an electronic device, including a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the above-described inverter grid-connected current DC component regulation method.

[0019] Compared with the prior art, the beneficial effects of this application are as follows: (1) This application obtains the DC component reference value in the inverter offline state and subtracts the real-time DC component average value from the reference value after grid connection. This can effectively eliminate the influence of fixed factors such as zero drift of sampling channel and hardware bias on DC component detection. At the same time, a dead zone threshold is set, and adjustment is only made when the difference exceeds the dead zone. This can avoid control jitter caused by frequent adjustment and improve the accuracy and stability of DC component adjustment.

[0020] (2) This application selects a portion of the switching cycles within a power frequency cycle for distributed pulse compensation, and utilizes the equivalent averaging effect of multiple switching cycles to achieve a small DC offset output. It does not rely on high-precision PWM hardware, and can break through the direct limitation of the minimum step size of a single PWM comparison register. While improving the DC component adjustment resolution, it also reduces hardware costs and has strong versatility.

[0021] (3) This application applies compensation by selecting different switching cycles within a power frequency cycle, rather than superimposing all switching cycles uniformly. It has a high degree of adjustment freedom and can suppress the DC component of the grid-connected current while taking into account grid-connected power quality indicators such as total harmonic distortion and reactive power accuracy, thus avoiding the significant adverse effects of DC component adjustment on other grid-connected performance. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the working steps of this application; Figure 2 This is a schematic diagram of the overall workflow of this application; Figure 3 This is a schematic diagram illustrating the specific location of the modulated wave after superimposition and correction of the original modulated wave in this application. Figure 4 This is a schematic diagram illustrating the specific location of the modulated wave after superimposition and correction of the original modulated wave in this application (Example 2). Figure 5 This is a schematic diagram of Example 3, showing the specific location of the modified modulation wave with added value after superposition to the original modulation wave in this application. Detailed Implementation

[0023] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0024] In the description of this application, it should be noted that the directional terms such as "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", and "counterclockwise" indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. They should not be construed as limiting the specific protection scope of this application.

[0025] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0026] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0027] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0028] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0029] One aspect of this application provides a method for regulating the DC component of the grid-connected current of an inverter, such as... Figure 1 and Figure 2 As shown, one preferred embodiment includes the following steps: S100: When the inverter is disconnected from the grid, the inverter output current is sampled to obtain the DC component reference value.

[0030] It should be noted that the off-grid state refers to the state where the inverter output relay is disconnected and no power is supplied to the grid, but the inverter control circuit, sampling circuit and PWM module can still work.

[0031] S200: When the inverter is connected to the grid, the inverter output current is sampled in real time to obtain the real-time average value of the DC component.

[0032] It should be understood that grid-connected status refers to the state in which the inverter output relay is closed and current is supplied to the grid.

[0033] S300: The difference between the real-time average value of the DC component and the reference value of the DC component is used to obtain the DC component difference value.

[0034] S400: In each power frequency cycle, the absolute value of the DC component difference is compared with the preset dead zone threshold. If the absolute value of the DC component difference exceeds the dead zone threshold, the modulated wave additional value is corrected according to the deviation direction of the DC component difference.

[0035] It should be understood that the power frequency period refers to the fundamental frequency period of the grid voltage; for example, a power grid with a frequency of 50Hz corresponds to a power frequency period of 20ms; a power grid with a frequency of 60Hz corresponds to a power frequency period of approximately 16.67ms. The modulated wave added value is mainly adjusted by changing the duty cycle of the switching cycle to regulate the output of the DC component.

[0036] S500: In multiple switching cycles corresponding to the power frequency cycle, select a portion of the switching cycles to superimpose the modified modulation wave with the original modulation wave, so that the absolute value of the DC component difference gradually converges to less than or equal to the dead zone threshold.

[0037] It should be understood that the switching cycle refers to the period during which the power devices of the inverter are turned on and off by controlling the PWM drive signal; for example, when the switching frequency is 20kHz, the switching cycle is 50μs; then for a power grid with a frequency of 50Hz, a single power frequency cycle corresponds to 400 switching cycles.

[0038] Based on the above technical solution, this application obtains the DC component reference value when the inverter is off-grid and then subtracts the real-time DC component average value from the reference value after grid connection. This effectively eliminates the influence of fixed factors such as zero-point drift of the sampling channel and hardware bias on DC component detection. At the same time, a dead zone threshold is set, and adjustment is only performed when the difference exceeds the dead zone. This avoids control jitter caused by frequent adjustments and improves the accuracy and stability of DC component adjustment.

[0039] This application achieves a small DC offset output by selecting a portion of the switching cycles within a power frequency cycle for distributed pulse compensation and utilizing the equivalent averaging effect of multiple switching cycles. It does not rely on high-precision PWM hardware and can overcome the direct limitation of the minimum step size of a single PWM comparator register. While improving the DC component adjustment resolution, it reduces hardware costs and has strong versatility.

[0040] This application applies compensation by selecting different switching cycles within a power frequency cycle and combining them, rather than uniformly superimposing all switching cycles. This provides a high degree of adjustment freedom and can suppress the DC component of the grid-connected current while taking into account grid-connected power quality indicators such as total harmonic distortion and reactive power accuracy. It also avoids the significant adverse effects of DC component adjustment on other grid-connected performance.

[0041] In a specific embodiment, such as Figure 2 As shown, the acquisition of the DC component reference value during step S100 includes the following process: S110: During the countdown of the inverter starting up from the off-grid state, the AC current output by the inverter is sampled.

[0042] It should be understood that the grid-connected startup countdown phase is a preparatory stage before the inverter transitions from off-grid to grid-connected status. This stage is used for relay self-testing, capacitor charging, and phase-locked loop stabilization. During this phase, the inverter output relay is not yet closed, and the actual current at the grid connection point is zero. However, the sampling circuit may still output non-zero sampled values ​​due to zero-point drift and hardware bias.

[0043] S120: Using the inverter's power frequency cycle as a window, the average value of the sampled AC current is calculated to obtain the average value of the DC component sampling and then low-pass filtered.

[0044] Specifically, the expression for the average value of the DC component sampling is: .

[0045] In the formula, This represents the average value of the DC component sampling, and N represents the number of current sampling points within the power frequency cycle. This represents the AC current sample value corresponding to the nth sampling point.

[0046] S130: Determine whether the grid-connected start-up countdown has ended. If the grid-connected start-up countdown has ended, use the average value of the DC component sampled after low-pass filtering as the DC component reference value. If the grid-connected start-up countdown has not ended, wait for the grid-connected start-up countdown to end.

[0047] It should be understood that low-pass filtering can suppress sampling noise and occasional interference, making the DC component reference value more stable and avoiding frequent accumulation or subtraction of the subsequent modulation wave value due to single-cycle fluctuations, thereby improving the stability and accuracy of DC component adjustment. There are various specific methods for low-pass filtering the DC component sampling mean, such as first-order low-pass filtering, moving average filtering, and amplitude limiting filtering; the specific filtering process is well known to those skilled in the art, and therefore will not be described in detail here.

[0048] Understandably, in this embodiment, acquiring the DC component reference value during the inverter's offline and normal start-up countdown phase avoids contamination of the DC component reference value by the actual grid-connected current. This ensures that the DC component reference value primarily reflects the fixed bias of the sampling channel, thereby improving the accuracy of subsequent DC component difference calculations. After the grid-connected start-up countdown ends, locking the DC component reference value ensures the stability and reliability of subsequent adjustment processes.

[0049] In a specific embodiment, when performing step S200, the process of obtaining the real-time DC component average value is basically the same as the process of obtaining the DC component reference value. That is, the AC current output by the inverter after grid connection is sampled in real time, and the average value of the sampled AC current is calculated within a window of the power frequency cycle to obtain the required real-time DC component average value, which is then low-pass filtered. To ensure the stability of the obtained real-time DC component average value, low-pass filtering is applied to the real-time DC component average value to suppress sampling noise and occasional interference.

[0050] It is important to note that after the grid connection start-up countdown ends, it is necessary to determine whether the inverter is in grid-connected status. If the inverter is in grid-connected status, proceed with step S200 and subsequent steps. If the inverter is not in grid-connected status, it indicates that the inverter may be faulty, and it is necessary to stop the execution of step S200 and subsequent steps and shut down the system.

[0051] In a specific embodiment, such as Figure 2 As shown, the obtained real-time average value of the DC component is subtracted from the DC component reference value to calculate the DC component difference. Therefore, when executing step S400, if the absolute value of the DC component difference is less than or equal to the dead zone threshold, it indicates that the DC component in the current power frequency cycle already meets the accuracy requirements and no correction of the modulation wave additive value is needed to avoid control jitter. Therefore, the modulation wave additive value of the previous power frequency cycle can be directly used as the corrected modulation wave additive value for the current power frequency cycle, i.e., the modulation wave additive value remains unchanged. If the absolute value of the DC component difference exceeds the dead zone threshold, it indicates that the DC component in the current power frequency cycle does not meet the accuracy requirements and the modulation wave additive value for the current power frequency cycle needs to be corrected. When correcting the modulation wave additive value, the correction direction and correction amount need to be determined; otherwise, it will exacerbate the accuracy error of the DC component.

[0052] In this embodiment, the process of correcting the modulated wave additive value according to the deviation direction of the DC component difference is as follows: If the DC component difference is less than a negative dead zone threshold, the modulated wave additive value of the previous power frequency cycle is added once with a preset step size to obtain the corrected modulated wave additive value for the current power frequency cycle. If the DC component difference is greater than a positive dead zone threshold, the modulated wave additive value of the previous power frequency cycle is subtracted once with a preset step size to obtain the corrected modulated wave additive value for the current power frequency cycle.

[0053] It is important to understand that the specific value of the dead-zone threshold can be selected according to the actual needs of those skilled in the art, but it must be significantly less than the maximum allowable limit of the DC component in the grid connection standard, while being greater than the system's sampling noise and adjustment resolution, to avoid malfunctions and oscillations. Generally, the grid connection standard requires that the DC component injected into the grid should be less than 0.5% of the rated current. Therefore, in this embodiment, the dead-zone threshold can be in the range of 0.05% to 0.2% of the rated current. The preset step size for each correction of the modulation wave additive value can be determined according to the resolution of the PWM hardware that generates the PWM drive signal; for example, the preset step size can be set to 1 to 4 minimum step sizes of the PWM comparator register.

[0054] For ease of understanding, the specific correction process for the modulated wave's added value can be represented by the following expression: .

[0055] In the formula, This represents the modulated wave additional value in the current k-th power frequency cycle. This represents the modulated wave additional value in the (k-1)th power frequency cycle. This indicates the preset step size. Indicates the difference in DC components. This represents the dead zone threshold.

[0056] It is understandable that this embodiment, through dead-time determination and directional single-step correction, can gradually approach the target value in a manner similar to integral adjustment, avoiding frequent reverse adjustments and overshoot oscillations. The control logic is simple, occupies few chip resources, and is suitable for execution in a digital signal processor (DSP) with interrupts at the power frequency cycle.

[0057] It is important to understand that if the modulation wave value is uniformly superimposed on all switching cycles within a single power frequency cycle, it can easily cause an overall duty cycle shift, affecting the output waveform quality. Furthermore, improper selection of the superposition position may lead to coupling between DC component regulation and harmonic / reactive power control. Therefore, the technical solution of this application provides a mechanism for selecting the superposition position of the modulation wave value. For ease of understanding, two specific embodiments will be described in detail below.

[0058] In a specific embodiment, when performing step S500, as follows: Figure 2 As shown, the selection of a portion of the switching period for superimposing the modulation wave value onto the original modulation wave includes the following process: if the modulation wave value is greater than zero, in the positive half-cycle of the power frequency cycle, a portion of the switching period is selected to superimpose the modulation wave value onto the original modulation wave; otherwise, in the negative half-cycle of the power frequency cycle, a portion of the switching period is selected to superimpose the modulation wave value onto the original modulation wave.

[0059] It is understandable that this embodiment uses positive and negative half-cycle selection to match the compensation direction with the current polarity, reducing the impact on the opposite polarity range, and making it easy to adjust the DC component while taking into account the output waveform quality; the selection logic is simple and easy to implement in a digital signal processor through a counter or lookup table.

[0060] It is important to know that when adding modulating wave values ​​to the original modulating wave, the impact on indicators such as total harmonic distortion and reactive power accuracy varies depending on the superposition position. To facilitate understanding, three specific examples will be used to describe this in detail below.

[0061] Specific example 1: such as Figure 3 As shown, within a set angle range centered on the peak of the original modulated wave, the modified modulated wave is superimposed on the original modulated wave with an additional value.

[0062] Specifically, the peak position of the original modulated wave can be defined as a reference point with a phase angle of 0°; then, the corrected modulated wave value is superimposed on the original modulated wave within a set angle range centered on this reference point. The specific superposition positions are as follows: Figure 3 The grid area is shown in the figure. The specific angle range of the superposition position can be determined by those skilled in the art according to their actual needs. For example, the angle range can be [-10°, +10°], [-15°, +15°], etc.

[0063] Specific example two: such as Figure 4 As shown, within a set angular range before the original modulated wave reaches the zero-crossing point from positive to negative, the modified modulated wave value is superimposed on the original modulated wave. Alternatively, within a set angular range after the modulated wave passes the zero-crossing point from negative to positive, the modified modulated wave value is superimposed on the original modulated wave.

[0064] Specifically, taking the peak position of the original modulated wave as the reference point for the phase angle of 0°, the zero-crossing position of the original modulated wave from positive to negative corresponds to the 90° phase angle position. The corrected modulated wave value can be superimposed on the original modulated wave within a set angle range before it reaches this zero-crossing point. The specific superposition position is as follows: Figure 4The grid area is shown in the figure. The specific angle range of the superposition position can be determined by those skilled in the art according to their actual needs. For example, the angle range can be [60°, 90°], [75°, 90°], etc.

[0065] Similarly, the zero-crossing position of the original modulated wave from negative to positive corresponds to a phase angle of 270°. The modified modulated wave value can be superimposed on the original modulated wave within a set angle range after the original modulated wave passes through this zero-crossing point. The specific angle range of the superposition position can be determined by those skilled in the art according to their actual needs. For example, the angle range can be [270°, 300°], [270°, 285°], etc.

[0066] Specific example three: such as Figure 5 As shown, the positive half-cycle of the original modulation wave is divided into multiple sub-intervals according to a preset angle value, and the modified modulation wave additional value is superimposed on the original modulation wave in the inter-interval sub-intervals.

[0067] Specifically, still taking the peak position of the original modulated wave as the reference point of 0° phase angle, the positive half-cycle of the original modulated wave corresponds to a phase angle range of 270° to 90°, or a phase angle range of -90° to 90°. The angle value for dividing the sub-intervals can be selected according to the actual needs of those skilled in the art; for example... Figure 5 As shown, if the angle value for dividing the sub-intervals is 30°, then the positive half-cycle of the original modulated wave can be divided into the following sub-intervals: [270°, 300°], [300°, 330°], [330°, 0°], [0°, 30°], [30°, 60°], and [60°, 90°]. The modified modulated wave values ​​can be superimposed onto the original modulated wave from the sub-intervals [270°, 300°], [330°, 0°], and [30°, 60°]. The specific superposition positions are shown below. Figure 5 As shown in the medium grid area.

[0068] Understandably, for Example 1, since the rate of change of the modulated wave near the peak is small, the impact of the added small correction on the fundamental amplitude is relatively controllable. This method may have a slight impact on total harmonic distortion (THD), but it has virtually no impact on reactive power accuracy, making it suitable for operating conditions with a large THD margin and a small reactive power accuracy margin. For Example 2, it has virtually no impact on THD and can adjust the fundamental current to the lag direction to some extent, thus playing a corrective role when the inverter capacitive current is too large, making it suitable for operating conditions that require simultaneous improvement of DC component and reactive current characteristics. For Example 3, although the implementation method is more complex than the first two examples, it can minimize the impact on THD and reactive power accuracy, making it suitable for operating conditions where other parameters have been well-tuned and the DC component needs to be decoupled and adjusted separately. Those skilled in the art can choose the appropriate method for applying the modulated wave value corresponding to the above three examples according to their actual needs.

[0069] In another specific embodiment, when performing step S500, the selection of the partial switching period for superimposing the modulation wave additional value onto the original modulation wave includes the following process: according to the preset typical optimal switching period arrangement and combination sequence under each operating condition, select the corresponding partial switching period from the multiple switching periods corresponding to the power frequency period and superimpose the modified modulation wave additional value onto the original modulation wave.

[0070] It should be understood that each operating condition includes grid voltage, output power, power factor, total harmonic distortion (THD), reactive power command, temperature, DC bus voltage, and other operating conditions. The corresponding typical optimal switching cycle permutation sequence is obtained through simulation, experimentation, or big data statistics. This sequence effectively balances DC component, THD, and reactive power accuracy under specific operating conditions. This sequence can be pre-set in the inverter control chip's memory, forming lookup table data. During inverter grid-connected operation, the current operating condition is monitored in real time. The corresponding sequence is selected through lookup table or interpolation. Then, a portion of the switching cycles corresponding to the power frequency cycle are selected according to this sequence, and the corrected modulation wave value is superimposed onto the original modulation wave.

[0071] To facilitate understanding of the technical solution of this application, the following will take the enhanced pulse width modulation (EPWM) module of the inverter using a digital signal processor (DSP) as an example to describe the specific implementation process of this application in detail.

[0072] (1) The EPWM module is a hardware resource used to generate PWM signals, including a time base counter, a period register, comparison registers CMPA and CMPB, an action limiter AQ, a dead-time generator DB, and output logic. The time base counter counts cyclically according to the set switching frequency, and the comparison registers CMPA and CMPB are loaded with comparison values. When the count value of the time base counter is greater than the comparison value loaded in the comparison register CMPA, the output of channel EPWMxA is set low; when the count value of the time base counter is less than the comparison value loaded in the comparison register CMPA, the output of channel EPWMxA is set high.

[0073] Let the value of the period register be TBPRD, then the duty cycle of the m-th switching cycle is... It can be represented as: .

[0074] In the formula, This represents the comparison value written to the compare register during the m-th switching cycle.

[0075] Based on the above expression, it can be seen that by changing the comparison value written to the comparison register... This changes the duty cycle of the current switching cycle; the inverter arm outputs a voltage pulse of corresponding width according to the duty cycle, and the voltage pulse, after passing through the output filter inductor and the grid impedance, forms the grid-connected current; therefore, the adjustment of the duty cycle is ultimately reflected in the control of the grid-connected current.

[0076] (2) When the inverter is in the off-grid state and the grid-connection start-up countdown is running normally, the DSP samples the AC current output by the inverter through the ADC to obtain the current sampling value. The DSP performs an average calculation on the sampling value according to the AC voltage power frequency cycle and performs low-pass filtering to obtain the DC component sampling average value. After the grid-connection countdown ends, the DSP locks the current DC component sampling average value as the DC component reference value.

[0077] (3) After the inverter enters the grid-connected state, the DSP continues to sample the grid-connected current through the ADC, calculates the real-time DC component average value according to the AC voltage power frequency cycle, and performs low-pass filtering. Then, the difference between the real-time DC component average value and the DC component reference value is obtained.

[0078] (4) Determine whether the absolute value of the DC component difference exceeds the preset dead zone threshold. If it does, update the modulated wave additional value according to the corresponding correction method.

[0079] (5) When each switching cycle arrives, the DSP determines whether the current switching cycle needs to be superimposed with the modulated wave additional value according to the pre-selected superposition method. If it is determined that superposition is needed, the compensation enable flag is set to 1; otherwise, the compensation enable flag is set to 0.

[0080] (6) In the current m-th switching cycle, the DSP calculates the comparison value to be finally written to the comparison register. The specific calculation expression is as follows: .

[0081] In the formula, This indicates the original comparison value loaded into the comparison register during the current m-th switching cycle. This indicates the compensation enable flag corresponding to the current m-th switching cycle. This represents the modulated wave additional value corresponding to the current m-th switching cycle.

[0082] At this time, the duty cycle of the m-th switching cycle It can be represented as: .

[0083] It should be understood that changes in the duty cycle directly alter the width of the inverter bridge arm output voltage pulse. Specifically, the DC bus voltage can be set as follows: Then, during the m-th switching cycle, the average value of the inverter bridge arm output voltage is... It can be approximated as: .

[0084] It's important to understand that when the modulated wave value is superimposed on the comparison value of a portion of the switching cycles, the duty cycle of these switching cycles changes slightly, causing a slight change in the pulse width of the inverter bridge arm output voltage, which in turn leads to a minor adjustment in the grid-connected current. Since a single power frequency cycle contains hundreds of switching cycles, and the DSP only applies the modulated wave value in a portion of these switching cycles, the average effect of these minor adjustments over a single power frequency cycle constitutes the required DC component compensation. Through closed-loop adjustment over multiple power frequency cycles, the real-time average value of the DC component can be gradually approximated to the DC component reference value.

[0085] Another aspect of this application provides a computer-readable storage medium, in a preferred embodiment of which a computer program is stored on the storage medium; when the computer program is executed by a processor, the above-described method for regulating the DC component of the inverter grid-connected current is implemented.

[0086] Another aspect of this application provides an electronic device, in one preferred embodiment of which includes a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the above-described inverter grid-connected current DC component regulation method.

[0087] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.

Claims

1. A method for regulating the DC component of the grid-connected current of an inverter, characterized in that, Includes the following steps: When the inverter is disconnected from the grid, the inverter output current is sampled to obtain the DC component reference value; When the inverter is connected to the grid, the inverter output current is sampled in real time to obtain the average value of the real-time DC component. The difference between the real-time average value of the DC component and the reference value of the DC component is obtained. Within each power frequency cycle, the absolute value of the DC component difference is compared with a preset dead zone threshold. If the absolute value of the DC component difference exceeds the dead zone threshold, the modulated wave additional value is corrected according to the deviation direction of the DC component difference. In multiple switching cycles corresponding to the power frequency cycle, a portion of the switching cycles are selected to superimpose the modified modulation wave with the original modulation wave, so that the absolute value of the DC component difference gradually converges to less than or equal to the dead zone threshold.

2. The inverter grid-connected current DC component adjustment method as described in claim 1, characterized in that, When the absolute value of the DC component difference is less than or equal to the dead zone threshold, the modulated wave addition value of the previous power frequency cycle is directly used as the modulated wave addition value after correction in the current power frequency cycle. When the absolute value of the DC component difference exceeds the dead zone threshold, the process of correcting the modulated wave's additional value based on the deviation direction of the DC component difference is as follows: If the difference of the DC component is less than the negative dead zone threshold, the modulated wave addition value of the previous power frequency cycle is accumulated once with a preset step size to obtain the modulated wave addition value after correction for the current power frequency cycle. If the difference in DC components is greater than the positive dead zone threshold, the modulated wave addition value of the previous power frequency cycle is cumulatively reduced by a preset step size to obtain the modulated wave addition value after correction for the current power frequency cycle.

3. The inverter grid-connected current DC component adjustment method as described in claim 1, characterized in that, The selection of the partial switching period for superimposing the modulated wave with the added value of the original modulated wave includes the following process: If the modulated wave value is greater than zero, the modulated wave value is superimposed on the original modulated wave during a portion of the positive half-cycle of the power frequency cycle; otherwise, the modulated wave value is superimposed on the original modulated wave during a portion of the negative half-cycle of the power frequency cycle.

4. The inverter grid-connected current DC component adjustment method as described in claim 3, characterized in that, The method of superimposing the modulated wave with the modulated wave is as follows: Within a set angular range centered on the peak of the original modulated wave, the modified modulated wave value is superimposed onto the original modulated wave.

5. The inverter grid-connected current DC component adjustment method as described in claim 3, characterized in that, The method of superimposing the modulated wave with the modulated wave is as follows: Within a set angle range before the original modulated wave reaches the zero-crossing point from positive to negative, the modified modulated wave value is superimposed on the original modulated wave. Alternatively, the modified modulation wave value can be superimposed onto the original modulation wave within a set angular range after the modulation wave passes through the zero-crossing point from negative to positive.

6. The inverter grid-connected current DC component adjustment method as described in claim 3, characterized in that, The method of superimposing the modulated wave with the modulated wave is as follows: The original modulated wave positive half-cycle is divided into multiple sub-intervals according to a preset angle value, and the modified modulated wave additional value is superimposed on the original modulated wave in the inter-spaced sub-intervals.

7. The inverter grid-connected current DC component adjustment method as described in claim 1, characterized in that, The method of superimposing the modulated wave with the modulated wave is as follows: According to the preset optimal switching cycle arrangement sequence for each operating condition, select a portion of the switching cycles corresponding to the power frequency cycle and superimpose the modified modulation wave with the added value.

8. The inverter grid-connected current DC component regulation method according to any one of claims 1-7, characterized in that, The process of obtaining the DC component reference value is as follows: During the countdown of the inverter's grid-connection startup from the off-grid state, the AC current output by the inverter is sampled; Using the inverter's power frequency cycle as a window, the average value of the sampled AC current is calculated to obtain the average value of the DC component sampling. After the grid connection and startup countdown ends, the average value of the DC component sampled after low-pass filtering is used as the reference value of the DC component.

9. An electronic device, characterized in that, It includes a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the inverter grid-connected current DC component regulation method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program; when the computer program is executed by a processor, it implements the inverter grid-connected current DC component adjustment method as described in any one of claims 1-8.

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