Direct-current voltage source parallel equalization circuit and control method and device thereof, energy storage system

Abstract

The application relates to a DC voltage source parallel equalization circuit and a control method and device thereof and an energy storage system. The circuit comprises: a plurality of DC voltage sources connected with first polarity ends. A segmented DC bus comprises a first capacitor and a second capacitor connected in series. The first end of the first capacitor is used as a first output end, and the second end thereof is connected with the first end of the second capacitor and used as a neutral end. The second end of the second capacitor is used as a second output end and is connected with the first polarity end. A plurality of compensation capacitors and current sharing circuits are connected between the first output end and corresponding second polarity ends. Each current sharing circuit comprises a branch inductor and a power electronic half-bridge circuit, and the power electronic half-bridge circuit is used for selectively connecting the corresponding second polarity end to the first output end or the neutral end through the branch inductor. A load circuit is used for stabilizing the voltage across the first capacitor at a first voltage setting value. The circuit can realize partial power conversion without an external power supply, solve the parallel circulating current problem, and has smaller loss.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a DC voltage source parallel balancing circuit and its control method, device, and energy storage system. Background Technology

[0002] In the field of battery energy storage, centralized energy storage systems have advantages such as large single-unit capacity and low cost. However, they typically require a large number of DC voltage sources connected in parallel, which can easily lead to circulating currents between the voltage sources due to differences in internal resistance and voltage fluctuations. To solve the problem of parallel circulating currents, the traditional solution is to boost the voltage of each DC voltage source through a full-power DC / DC converter and then connect them in parallel to ensure stable output voltage. However, due to the high energy consumption of DC / DC converters, this also results in low energy conversion efficiency for the entire system.

[0003] In response, some related technologies have attempted to address the parallel circulating current problem using partial power conversion circuits. For example, see reference... Figure 1 Some solutions incorporate a current-sharing circuit consisting of a series inductor and a half-bridge circuit at one pole of each DC voltage source. Utilizing the characteristics of the inductor, this transforms the parallel voltage source problem into a parallel current source problem, thus achieving better current control. However, these solutions still require an external DC power supply to provide additional power to each half-bridge circuit to compensate for power imbalances between them, introducing an additional energy conversion stage and resulting in relatively high circuit losses. Summary of the Invention

[0004] Based on this, this application provides a DC voltage source parallel balancing circuit that can solve the parallel circulating current problem without the need for an external DC power supply, thereby reducing circuit losses.

[0005] On one hand, this application provides a parallel equalization circuit for DC voltage sources, comprising: multiple DC voltage sources, the first polarity terminals of the multiple DC voltage sources being connected; a segmented DC bus, including a first capacitor and a second capacitor connected in series; a first terminal of the first capacitor serving as a first output terminal of the segmented DC bus; a second terminal of the first capacitor connected to the first terminal of the second capacitor serving as a neutral terminal of the segmented DC bus; a second terminal of the second capacitor serving as a second output terminal of the segmented DC bus and connected to the first polarity terminal; multiple compensation capacitors, corresponding one-to-one with the multiple DC voltage sources; one end of each compensation capacitor connected to the second polarity terminal of the corresponding DC voltage source; the other end of each compensation capacitor connected to the first output terminal; and multiple current sharing circuits, connected to the multiple DC voltage sources. Each DC voltage source corresponds to a DC voltage source; each current sharing circuit includes a branch inductor and a power electronic half-bridge circuit; the power electronic half-bridge circuit has a current input terminal; one end of the branch inductor is connected to the second polarity terminal of the DC voltage source; the other end of the branch inductor is connected to the current input terminal of the power electronic half-bridge circuit; the power electronic half-bridge circuit is connected in parallel between the first output terminal and the neutral terminal; the power electronic half-bridge circuit is used to selectively connect the second polarity terminal of the corresponding DC voltage source to the first output terminal or the neutral terminal through the branch inductor; the load circuit, connected to the first output terminal, the second output terminal and the neutral terminal respectively, is configured to control the neutral terminal current by adjusting its own operating parameters to stabilize the voltage across the first capacitor at a first voltage set value.

[0006] Optionally, the power electronic half-bridge circuit includes an upper bridge switch and a lower bridge switch; the connection between the upper bridge switch and the lower bridge switch serves as the current input terminal.

[0007] Optionally, the first polarity terminal is negative; in at least part of the current sharing circuit, the power electronic half-bridge circuit is composed of a first bridge arm switch and a first diode connected in series; one end of the first bridge arm switch is connected to the neutral terminal; the other end of the first bridge arm switch is connected to the anode of the first diode and serves as the current input terminal; the cathode of the first diode is connected to the first output terminal; or, the first polarity terminal is positive; in at least part of the current sharing circuit, the power electronic half-bridge circuit is composed of a first bridge arm switch and a first diode; wherein, one end of the first bridge arm switch is connected to the neutral terminal; the other end of the first bridge arm switch is connected to the cathode of the first diode and serves as the current input terminal; the anode of the first diode is connected to the first output terminal.

[0008] Optionally, the load circuit includes: an interleaved parallel chopper circuit, comprising multiple half-bridge chopper circuits and multiple filter inductors; each half-bridge chopper circuit corresponds one-to-one with a filter inductor; the two input terminals of each half-bridge chopper circuit are connected in parallel between the neutral terminal and the first output terminal; the output terminal of the half-bridge chopper circuit is connected to one end of the filter inductor; a filter capacitor; one end of the filter capacitor is connected to the other end of the multiple filter inductors; the other end of the filter capacitor is connected to the second output terminal; a first inverter; the DC-side input terminal of the first inverter is connected in parallel across the two ends of the filter capacitor.

[0009] Optionally, the half-bridge chopper circuit includes an upper bridge switch and a lower bridge switch; the connection between the upper bridge switch and the lower bridge switch serves as the output terminal of the half-bridge chopper circuit.

[0010] Optionally, the first polarity terminal is negative; at least part of the half-bridge chopper circuit is composed of a second bridge arm switch and a second diode connected in series; one end of the second bridge arm switch is connected to the first output terminal; the other end of the second bridge arm switch is connected to the cathode of the second diode and serves as the output terminal of the half-bridge chopper circuit; the anode of the second diode is connected to the neutral terminal; or, the first polarity terminal is positive; at least part of the half-bridge chopper circuit is composed of a second bridge arm switch and a second diode connected in series; one end of the second bridge arm switch is connected to the first output terminal; the other end of the second bridge arm switch is connected to the anode of the second diode and serves as the output terminal of the half-bridge chopper circuit; the cathode of the second diode is connected to the neutral terminal.

[0011] Optionally, each compensation capacitor has a first controllable switch connected in parallel across its two ends; the load circuit also includes a second controllable switch; one end of the second controllable switch is connected to the first output terminal; and the other end of the second controllable switch is connected to one end of the filter capacitor.

[0012] On the other hand, this application provides a control method for a parallel equalization circuit of a DC voltage source, applied to the aforementioned parallel equalization circuit of a DC voltage source. The method includes: determining the voltage setting parameters of the parallel equalization circuit of the DC voltage source based on a preset voltage setting rule; the voltage setting parameters include the total voltage setting value across the segmented DC bus, the first voltage setting value across the first capacitor, and the second voltage setting value across the second capacitor; performing closed-loop control on the voltage across the segmented DC bus and the voltage across the second capacitor; adjusting the operating parameters of the load circuit to control the neutral terminal current, so as to stabilize the voltage across the first capacitor at the first voltage setting value.

[0013] Optionally, the voltage setting parameters of the parallel equalization circuit of the DC voltage sources are determined based on the following formula:

[0014] Ucref1>2(Uavg-Umin) Ucref1>2(Umax-Uavg) Ucref1>Umax-Umin Ucref2=Uavg-0.5 Ucref1 Ucref=Uavg+0.5 Ucref1 Wherein, Ucref is the total voltage setting value; Ucref1 is the first voltage setting value; Ucref2 is the second voltage setting value; Uavg is the average voltage value of multiple DC voltage sources; Umax is the maximum voltage value of the DC voltage source; and Umin is the minimum voltage value of the DC voltage source.

[0015] Optionally, the load circuit includes an interleaved parallel chopper circuit, a filter capacitor, and a first inverter; the interleaved parallel chopper circuit includes multiple half-bridge chopper circuits; the voltage setting parameters also include a third voltage setting value for the filter capacitor; the operating parameters of the load circuit also include the duty cycle of each half-bridge chopper circuit; wherein, the third voltage setting value is set to be equal to the average voltage value of multiple DC voltage sources.

[0016] Optionally, each compensation capacitor has a first controllable switch connected in parallel across its two ends; the load circuit includes an interleaved parallel chopper circuit, a filter capacitor, and a second controllable switch; the interleaved parallel chopper circuit includes multiple half-bridge chopper circuits; one end of the second controllable switch is connected to the first output terminal; the other end of the second controllable switch is connected to one end of the filter capacitor; the method further includes: when the output voltage difference between any two DC voltage sources is less than or equal to a first preset voltage threshold, controlling the second controllable switch and multiple first controllable switches to close, and controlling multiple power electronic half-bridge circuits and multiple half-bridge chopper circuits to stop operating.

[0017] In another aspect, this application also provides a control device, including: a memory, a processor, and a program stored in the memory and executable on the processor. When the processor executes the program, it implements the aforementioned control method for the parallel equalization circuit of DC voltage sources.

[0018] Furthermore, this application also provides a power supply system, including the aforementioned DC voltage source parallel balancing circuit.

[0019] Optionally, the DC voltage source in the parallel equalization circuit of the power supply system can be an energy storage battery or a photovoltaic string.

[0020] The embodiments provided in this application construct a segmented DC bus by setting a first capacitor and a second capacitor connected in series. A DC voltage source and a compensation capacitor are connected in series and then in parallel across the bus. A current-sharing circuit composed of branch inductors and a power electronic half-bridge circuit is also included. This allows the first capacitor to absorb the unbalanced power between the current-sharing branches, while the second capacitor serves as the main power direct path. Simultaneously, a load circuit is connected to the first output terminal, the second output terminal, and the neutral terminal. This allows the load circuit to control the neutral terminal current by adjusting its own operating parameters, stabilizing the voltage across the first capacitor at a first voltage setpoint. Therefore, the unbalanced power exchange between the current-sharing branches is compensated by the load circuit, eliminating the need for an external DC power supply, thereby reducing energy conversion stages and lowering circuit losses. Attached Figure Description

[0021] Figure 1 This is a circuit diagram of a portion of the power conversion circuit in related technologies; Figure 2 This is a schematic diagram of the structure of a parallel equalization circuit of DC voltage sources according to an embodiment of this application; Figure 3 This is a circuit diagram of a parallel equalization circuit of DC voltage sources according to an embodiment of this application; Figure 4 A circuit diagram of a parallel equalization circuit of DC voltage sources according to another embodiment of this application; Figure 5 The circuit diagram is for another embodiment of the parallel equalization circuit of DC voltage sources in this application; Figure 6 This application also provides a circuit diagram of a DC voltage source parallel balancing circuit according to an embodiment; Figure 7 This is a flowchart illustrating a control method for a parallel equalization circuit of a DC voltage source according to an embodiment of this application. Figure 8 This is a schematic diagram of the structure of a control device according to an embodiment of this application.

[0022] Explanation of reference numerals in the attached figures 100. DC voltage source parallel balancing circuit; 110. Segmented DC bus; 120. Current sharing circuit; 121. Power electronic half-bridge circuit; 130. Load circuit; 140. Interleaved parallel chopper circuit; 141. Half-bridge chopper circuit; V1~VN. Multiple DC voltage sources; TJ1. First polarity terminal; C1. First capacitor; C2. Second capacitor; CB. Compensation capacitor; TS1. First output terminal; TSO. Neutral terminal; TS2. Second output terminal; TJ2. Second polarity terminal; CL. Filter capacitor; U1. First inverter; LB. Filter inductor; TIN. Current input terminal; S1. First controllable switch; S2. Second controllable switch; LZ. Branch inductor; QS. Upper bridge switch; QX. Lower bridge switch; QB1. First bridge arm switch; QB2. Second bridge arm switch; D1. First diode; D2. Second diode; DC+, DC-. DC side input terminals. Detailed Implementation

[0023] To make the technical solution and beneficial effects of this application more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.

[0024] refer to Figure 2 Some embodiments of this application provide a DC voltage source parallel equalization circuit 100, including multiple DC voltage sources V1 to VN, a segmented DC bus 110, multiple compensation capacitors CB, multiple current sharing circuits 120 and a load circuit 130.

[0025] The first polarity terminals TJ1 of multiple DC voltage sources are connected. The segmented DC bus includes a first capacitor C1 and a second capacitor C2 connected in series. The first terminal of the first capacitor C1 serves as the first output terminal TS1 of the segmented DC bus. The second terminal of the first capacitor C1 is connected to the first terminal of the second capacitor C2, serving as the neutral terminal TSO of the segmented DC bus. The second terminal of the second capacitor C2 serves as the second output terminal TS2 of the segmented DC bus and is connected to the first polarity terminal TJ1. Multiple compensation capacitors CB correspond one-to-one with multiple DC voltage sources. One end of each compensation capacitor CB is connected to the second polarity terminal TJ2 of the corresponding DC voltage source. The other end of each compensation capacitor CB is connected to the first output terminal TS1. Multiple current sharing circuits 120 correspond one-to-one with multiple DC voltage sources. Each current sharing circuit includes a branch inductor LZ and a power electronic half-bridge circuit 121. The power electronic half-bridge circuit 121 has a current input terminal TIN. One end of the branch inductor LZ is connected to the second polarity terminal TJ2 of the DC voltage source. The other end of the branch inductor LZ is connected to the current input terminal TIN of the power electronic half-bridge circuit 121. The power electronic half-bridge circuit 121 is connected in parallel between the first output terminal TS1 and the neutral terminal TSO. The power electronic half-bridge circuit 121 is used to selectively connect the second polarity terminal TJ2 of the corresponding DC voltage source to the first output terminal TS1 or the neutral terminal TSO through the branch inductor LZ. The load circuit 130, connected to the first output terminal TS1, the second output terminal TS2, and the neutral terminal TSO respectively, is configured to control the neutral terminal current by adjusting its own operating parameters to stabilize the voltage across the first capacitor C1 at a first voltage set value.

[0026] It is understandable that a DC voltage source can be various types of voltage sources, such as battery clusters, photovoltaic strings, and capacitor modules. The first polarity terminal TJ1 refers to the common connection terminal of multiple DC voltage sources V1 to VN. For example, refer to... Figure 3 Multiple DC voltage sources V1 to VN are connected at their negative terminals, with the first polarity terminal TJ1 being the negative terminal. Alternatively, refer to... Figure 4 Multiple DC voltage sources V1 to VN share a common positive terminal, with the first polarity terminal TJ1 being the positive terminal. The second polarity terminal TJ2 is the other terminal of each DC voltage source V1 to VN, and is led out to the corresponding current sharing circuit 120. The current sharing circuit 120 is mainly used to control the voltage of the compensation capacitor CB by cooperating with the complementary half-bridge switch and branch inductor LZ of the internal power electronic half-bridge circuit 121, thereby controlling the output current of each DC voltage source.

[0027] Load circuit 130 refers to the power output or consumption unit connected to the segmented DC bus 110. Neutral terminal current refers to the total current flowing into the neutral terminal TSO, i.e., the sum of the current output from the current sharing circuit to the neutral terminal TSO and the current input to the neutral terminal TSO from load circuit 130. Adjusting the operating parameters of load circuit 130 refers to various parameters that change the magnitude of the neutral terminal current, such as reference voltage and output power, which can be determined based on the topology of load circuit 130.

[0028] The aforementioned parallel equalization circuit 100 for DC voltage sources uses a segmented DC bus 110 formed by a series connection of a first capacitor C1 and a second capacitor C2. The DC voltage source and a compensation capacitor CB are connected in series and then in parallel across the bus. A current-sharing circuit 120, consisting of a branch inductor LZ and a power electronic half-bridge circuit 121, is also included. This allows the first capacitor C1 to absorb the unbalanced power between the current-sharing branches, while the second capacitor C2 serves as the main power direct path. Simultaneously, a load circuit 130 is connected to the first output terminal TS1, the second output terminal TS2, and the neutral terminal TSO. By adjusting its own operating parameters, it can control the neutral terminal current and stabilize the voltage across the first capacitor C1 at a first voltage setting value. Therefore, the unbalanced power exchange between the current-sharing branches is compensated by the load circuit, eliminating the need for an external DC power supply, thus reducing energy conversion stages and circuit losses.

[0029] Specifically, refer to Figure 2Each DC voltage source, along with its corresponding series compensation capacitor CB and current sharing circuit 120, forms a current sharing branch. Multiple current sharing branches are connected in parallel. The compensation capacitor CB is used to bear the difference between the DC voltage source voltage and the voltage of the segmented DC bus 110. The power electronic half-bridge circuit 121 in the current sharing circuit 120 is connected in parallel across the first capacitor C1. Its current input terminal TIN is connected to the second polarity terminal TJ2 of the DC voltage source and one end of the compensation capacitor CB through the branch inductor LZ. In practical operation, the power electronic half-bridge circuit 121 in the current sharing circuit 120 can be controlled by a dual closed-loop control of voltage and current. This allows the total output voltage of the multiple current sharing branches (i.e., the voltage across the segmented DC bus 110) to be limited to a constant value through voltage loop control, while the output current of the DC voltage source is adjusted to the corresponding value through current loop control, thus keeping the output voltage constant. Its specific working principle is as follows: Taking the discharge of a DC voltage source as an example, the DC voltage source and the compensation capacitor CB are connected in series and then directly connected in parallel to the segmented DC bus 110 to supply power to the load circuit 130. When the sum of their voltages exceeds the total voltage of the segmented DC bus 110, the output current of the DC voltage source will increase, and the power supplied to the load will also increase. When the sum of their voltages is lower than the total voltage of the segmented DC bus 110, the output current of the DC voltage source will decrease, and the power supplied to the load will also decrease. Therefore, by controlling the voltage of the compensation capacitor CB, the output current of the DC voltage source can be directly controlled. The power electronic half-bridge circuit 121 and the DC inductor LZ together form a step-down DC / DC circuit to control the voltage of the compensation capacitor CB. When the power electronic half-bridge circuit 121 connects the second polarity terminal TJ2 to the neutral terminal TSO through the branch inductor LZ, the compensation capacitor CB is connected in series with the branch inductor LZ and then in parallel across the first capacitor C1. This allows the first capacitor C1 to charge the compensation capacitor CB through the branch inductor LZ, increasing the inductor current. When the power electronic half-bridge circuit 121 connects the second polarity terminal TJ2 to the first output terminal TS1 through the branch inductor LZ, the compensation capacitor CB is connected in parallel across the branch inductor LZ. The branch inductor LZ continues to transfer energy to the compensation capacitor CB through freewheeling, reducing the inductor current. Therefore, by controlling the duty cycle of the switching action of the power electronic half-bridge circuit 121, the voltage of the compensation capacitor CB and the current of the branch inductor LZ can be controlled. Throughout the process, the output power of the compensation capacitor CB is the product of the voltage of the compensation capacitor CB and the output current of the DC voltage source. Since the voltage of the compensation capacitor CB is lower than the voltage across the segmented DC bus 110, the power that the power electronic half-bridge circuit 121 needs to handle is small, resulting in low losses.

[0030] Therefore, the unbalanced power that needs to be compensated by each DC voltage source is concentrated on the first capacitor C1. The first capacitor C1 becomes a capacitor dedicated to providing or absorbing the unbalanced power between the current sharing branches, and the unbalanced power is discharged to the load by adjusting the operating parameters of the load circuit 130. The second capacitor C2, on the one hand, can be connected in series with the first capacitor C1 to support the total output voltage, supply power to the load circuit 130 and realize the current decoupling control between the current sharing branches and the load circuit 130; on the other hand, it carries the main power after the current sharing branches are combined. The main power can be directly connected to the load circuit 130 after passing through the second capacitor C2, without participating in the power distribution between the current sharing branches. Thus, the DC voltage source parallel balancing circuit 100 realizes part of the power conversion function and reduces the loss in the power conversion process.

[0031] Meanwhile, due to the voltage imbalance among the various DC voltage sources V1 to VN, relying solely on the first capacitor C1 to absorb or release the unbalanced power will cause the voltage across the first capacitor C1 to continuously increase or decrease. Therefore, in the aforementioned parallel equalization circuit 100 of DC voltage sources, the load circuit 130 is simultaneously connected to the first output terminal TS1, the second output terminal TS2, and the neutral terminal TSO. The load circuit 130 can draw power from the second capacitor C2, and during steady-state operation, the charging and discharging rate of the second capacitor C2 will remain stable. When the voltage across the first capacitor C1 is low, it indicates that a significant amount of energy on the first capacitor C1 has been drawn away by the compensation capacitors CB of each current-sharing branch. The load circuit 130 can control the current flowing out of the neutral terminal TSO to increase, causing the second capacitor C2 to discharge faster, thereby causing the voltage across the second capacitor C2 to decrease until a new steady state is reached. Due to the closed-loop control effect of the current-sharing circuit 120, the voltage across the segmented DC bus 110 is controlled to be a constant voltage. Meanwhile, the first capacitor C1 and the second capacitor C2 are connected in series to form a segmented DC bus 110. The voltage across the first capacitor C1 is equal to the difference between the voltage across the segmented DC bus 110 and the voltage across the second capacitor C2. When the voltage across the second capacitor C2 decreases, the voltage across the first capacitor C1 will rise accordingly.

[0032] When the voltage across the first capacitor C1 is high, the current flowing out of the neutral terminal TSO can be reduced, slowing down the discharge rate of the second capacitor C2. The voltage across the second capacitor C2 will gradually rise until a new steady state is reached, and correspondingly, the voltage across the first capacitor C1 will decrease. Therefore, by adjusting the parameters of the load circuit 130, the neutral terminal current can be adjusted, thereby stabilizing the voltage across the first capacitor C1 at the first voltage setting value. This allows the load circuit 130 to compensate for the voltage across the first capacitor C1 without requiring an external DC power supply.

[0033] Furthermore, the aforementioned DC voltage source parallel balancing circuit 100 does not require an external DC power supply, which reduces circuit complexity and thus lowers the hardware and control costs of the circuit.

[0034] Furthermore, in the aforementioned parallel equalization circuit 100 for DC voltage sources, by providing each DC voltage source with a corresponding compensation capacitor CB and a current sharing circuit 120, the voltage of the segmented DC bus 110 can be adjusted by controlling the output current of each DC voltage source. The output current of each DC voltage source can be adjusted by simply adjusting the voltage across its respective compensation capacitor CB. The voltage across each compensation capacitor CB can be adjusted by controlling the duty cycle of the switching transistor in the power electronic half-bridge circuit 121. This allows the circuit to independently control the voltage across each compensation capacitor CB and the output current of each DC voltage source.

[0035] Furthermore, in some related technologies, to avoid introducing an external DC power supply, two identical battery clusters are connected in series via a power conversion circuit so that the compensation power required by the two battery clusters cancels each other out. However, this also results in an excessively high output voltage for the entire system, making it difficult to directly adapt to conventional grid-connected inverters. The aforementioned DC voltage source parallel balancing circuit 100, however, has a lower output voltage due to the parallel connection of multiple DC voltage sources V1 to VN, thus making it easier to adapt to conventional grid-connected inverters and improving the circuit's applicability.

[0036] In some embodiments, reference Figure 3 or Figure 4 The power electronic half-bridge circuit 121 includes an upper bridge switch QS and a lower bridge switch QX. The connection between the upper bridge switch QS and the lower bridge switch QX serves as the current input terminal TIN.

[0037] Specifically, the upper bridge switch QS and the lower bridge switch QX constitute a typical half-bridge circuit structure. By selectively turning on the upper bridge switch QS or the lower bridge switch QX, the power electronic half-bridge circuit 121 can achieve selective connection.

[0038] Furthermore, in the above embodiments, the power electronic half-bridge circuit 121 includes an upper bridge switch QS and a lower bridge switch QX, which enables the power electronic half-bridge circuit 121 to also support bidirectional current flow between the load circuit 130 and the DC voltage sources V1 to VN, thereby enabling the DC voltage sources V1 to VN to achieve charging and discharging functions through the DC voltage source parallel equalization circuit 100.

[0039] In some embodiments, reference Figure 3 or Figure 4The load circuit 130 includes an interleaved parallel chopper circuit 140, a filter capacitor CL, and a first inverter U1. The interleaved parallel chopper circuit 140 includes multiple half-bridge chopper circuits 141 and multiple filter inductors LB. Each half-bridge chopper circuit 141 corresponds one-to-one with a filter inductor LB. The two input terminals of each half-bridge chopper circuit 141 are connected in parallel between the neutral terminal TSO and the first output terminal TS1. The output terminal of the half-bridge chopper circuit 141 is connected to one end of each filter inductor LB. One end of the filter capacitor CL is connected to the other end of each filter inductor LB. The other end of the filter capacitor CL is connected to the second output terminal TS2. The DC-side input terminals (DC+, DC-) of the first inverter U1 are connected in parallel across the two ends of the filter capacitor CL.

[0040] Furthermore, the half-bridge chopper circuit 141 includes an upper bridge switch and a lower bridge switch. The connection between the upper bridge switch and the lower bridge switch serves as the output terminal of the half-bridge chopper circuit.

[0041] Specifically, when there is only a single inverter in the load circuit 130, connecting the inverter in parallel between any two output terminals of the segmented DC bus 110 makes it impossible to independently adjust the neutral terminal current to achieve voltage stability of the first capacitor C1. Therefore, in this embodiment, an interleaved parallel chopper circuit 140 is connected in parallel across the first capacitor C1. The interleaved parallel chopper circuit 140 has multiple half-bridge chopper circuits 141, with the two input terminals of each half-bridge chopper circuit 141 connected in parallel between the neutral terminal TSO and the first output terminal TS1, i.e., in parallel across the first capacitor C1. (Refer to...) Figure 3 or Figure 4 Each half-bridge chopper circuit 141 consists of an upper-bridge switch QS and a lower-bridge switch QX forming a half-bridge arm. The connection between the upper-bridge switch QS and the lower-bridge switch QX serves as the output terminal of the half-bridge chopper circuit and is connected to the filter inductor LB. In this load circuit 130, the neutral terminal current is equal to the sum of the products of the current in each half-bridge chopper circuit 141 and the duty cycle of the switch closest to the neutral terminal TSO. Therefore, by adjusting the duty cycle of the switches in the half-bridge chopper circuit 141, the magnitude of the neutral terminal current can be controlled, thereby changing the charging and discharging rate of the second capacitor C2 and stabilizing the voltage across the first capacitor C1 at the first voltage set value. Thus, the load circuit 130 achieves the adjustment of the voltage across the first capacitor C1 according to the neutral terminal current.

[0042] Furthermore, in this embodiment, the interleaved parallel chopper circuit 140 has multiple half-bridge chopper circuits 141 inside. The multiple half-bridge chopper circuits 141 use the same modulation signal and the carrier phase is staggered by 360° / m (m is the number of half-bridge chopper circuits 141) to achieve interleaved parallel connection, which can effectively reduce the current ripple and output voltage ripple of the neutral terminal TSO.

[0043] Furthermore, in applications such as energy storage systems, DC voltage sources V1 to VN typically need to have both energy storage and energy release functions. In the above embodiment, the half-bridge chopper circuit 141 is composed of an upper bridge switch QS and a lower bridge switch QX. This allows the half-bridge chopper circuit 141 to support bidirectional current flow between the load circuit 130 and the DC voltage sources V1 to VN, thereby enabling the DC voltage sources V1 to VN to achieve charging and discharging functions through the DC voltage source parallel equalization circuit 100.

[0044] Understandable, Figure 3 and Figure 4 The load circuit shown is exemplary; in other embodiments, the load circuit 130 may also be composed of other circuits. For example, in some embodiments, the load circuit 130 may include a drive circuit composed of two inverters, one inverter being connected in parallel across the segmented DC bus 110, and the other inverter being connected in parallel across the second capacitor C2. By adjusting the output power ratio of the two inverters, the neutral terminal current can be adjusted, thereby stabilizing the voltage across the first capacitor C1 at a first voltage set value.

[0045] In some embodiments, reference Figure 5 The first polarity terminal TJ1 is the negative terminal. In at least part of the current sharing circuit 120, the power electronic half-bridge circuit 121 is composed of a first bridge arm switch QB1 and a first diode D1 connected in series. One end of the first bridge arm switch QB1 is connected to the neutral terminal TSO. The other end of the first bridge arm switch QB1 is connected to the anode of the first diode D1 and serves as the current input terminal TIN. The cathode of the first diode D1 is connected to the first output terminal TS1.

[0046] Specifically, in some application scenarios such as photovoltaic systems, the DC voltage sources V1 to VN only need to output DC power unidirectionally to the load circuit 130. In this case, a power electronic half-bridge circuit 121 can be constructed using the first diode D1 and the first bridge arm switch QB1. When the first bridge arm switch QB1 is turned on, current flows out from the positive terminal of the DC voltage source V1 (i.e., the second polarity terminal TJ2), through the branch inductor LZ and the first bridge arm switch QB1, into the neutral terminal TSO, and then supplies the load circuit 130 through the second capacitor C2. The branch inductor LZ stores energy during this stage. At the same time, the compensation capacitor CB is connected in series with the branch inductor LZ and then in parallel across the first capacitor C1, exchanging energy with the first capacitor C1. When the first bridge arm switch QB1 is turned off, the current in the branch inductor LZ cannot change abruptly. It freewheels through the first diode D1, and the current flows from the positive terminal of the DC voltage source V1 through the branch inductor LZ and the first diode D1 to the first output terminal TS1. The inductor energy is fed back to the compensation capacitor CB. This enables the power electronic half-bridge circuit 121 to selectively connect the second polarity terminal TJ2 to the first output terminal TS1 or the neutral terminal TSO.

[0047] Furthermore, the first diode D1 not only does not require active control, but can also automatically block reverse current, avoiding the risk of shoot-through between the upper and lower diodes. This not only improves the safety of the circuit, but also reduces the control complexity of the switching transistor and reduces the switching losses of the circuit.

[0048] Further reference Figure 5 At least part of the half-bridge chopper circuit 141 is composed of a second bridge arm switch QB2 and a second diode D2 connected in series. One end of the second bridge arm switch QB2 is connected to the first output terminal TS1. The other end of the second bridge arm switch QB2 is connected to the cathode of the second diode D2 and serves as the output terminal of the half-bridge chopper circuit 141. The anode of the second diode D2 is connected to the neutral terminal TSO.

[0049] Specifically, in applications such as photovoltaic systems, the DC voltage sources V1 to VN only need to output DC power to the load circuit 130, and the current only flows to the half-bridge chopper circuit 141 through the neutral terminal TSO. Therefore, the half-bridge chopper circuit 141 can also be constructed by connecting the second bridge arm switch QB2 and the second diode D2 in series. This method can also utilize the unidirectional conduction and reverse cutoff characteristics of the diode to realize the chopping function of the half-bridge chopper circuit 141. At the same time, this method also has the advantages of simplifying the control logic and reducing the switching losses of the switch. The specific principle is similar to that of the power electronic half-bridge circuit 121 mentioned above, and will not be elaborated here.

[0050] Furthermore, it is understandable that Figure 5 The circuit structures of the power electronic half-bridge circuit 121 and the half-bridge chopper circuit 141 shown are exemplary. In other embodiments, the power electronic half-bridge circuit 121 and the half-bridge chopper circuit 141 may also be other circuit structures. For example, refer to... Figure 6 When the first polarity terminal TJ1 is positive, in at least part of the current sharing circuit 120, the power electronic half-bridge circuit 121 is composed of a first bridge arm switch QB1 and a first diode D1. One end of the first bridge arm switch QB1 is connected to the neutral terminal TSO. The other end of the first bridge arm switch QB1 is connected to the cathode of the first diode D1 and serves as the current input terminal TIN. The anode of the first diode D1 is connected to the first output terminal TS1. Meanwhile, refer to... Figure 6 When the first polarity terminal TJ1 is positive, at least part of the half-bridge chopper circuit 141 can also be constructed by connecting the second bridge arm switch QB2 and the second diode D2 in series. One end of the second bridge arm switch QB2 is connected to the first output terminal TS1. The other end of the second bridge arm switch QB2 is connected to the anode of the second diode D2 and serves as the output terminal of the half-bridge chopper circuit 141. The cathode of the second diode D2 is connected to the neutral terminal TSO. In this case, the power electronic half-bridge circuit 121 and the half-bridge chopper circuit 141 can also achieve... Figure 5The effect of the circuit structure. Specific principles and... Figure 5 The circuit structure shown is similar, the only difference being that, since the second polarity terminal TJ2 is the negative terminal, the positions of the first diode D1 and the second diode D2, and the connection method of the anode and cathode, are the same as... Figure 5 The positions of the first diode D1 and the second diode D2 are reversed compared to the anode-cathode connection, so that both diodes can function properly. Figure 6 The specific principles will not be elaborated here.

[0051] also, Figure 5 and Figure 6 In the illustrated embodiment, both the first bridge arm switch QB1 and the second bridge arm switch QB2 are MOSFETs. The source of each switch (QB1, QB2) serves as its first terminal, and the drain of each switch (QB1, QB2) serves as its other terminal. It should be understood that the first bridge arm switch QB1 and the second bridge arm switch QB2 in this application are not limited to MOSFETs.

[0052] In some embodiments, reference Figure 3 or Figure 4 Each compensation capacitor CB has a first controllable switch S1 connected in parallel across its two ends. The load circuit 130 also includes a second controllable switch S2. One end of the second controllable switch S2 is connected to the first output terminal TS1. The other end of the second controllable switch S2 is connected to one end of the filter capacitor CL.

[0053] Specifically, in the aforementioned Figure 2 In the circuit 100 of the illustrated embodiment, when the balance of multiple DC voltage sources V1 to VN is good, the risk of parallel circulating current in the circuit 100 is small. The power electronic half-bridge circuit 121 and the downstream half-bridge chopper circuit 141 can be stopped to reduce switching losses. The DC voltage sources can be connected to the first output terminal TS1 through the compensation capacitor CB to supply power to the load circuit 130, or the load circuit 130 can charge the DC voltage sources in reverse. However, since the compensation capacitor CB is still connected in series in the current loop, it will continue to charge or discharge and generate additional losses, resulting in poor charging and discharging efficiency of the DC voltage sources.

[0054] Based on this, such as Figure 3 or Figure 4 As shown, in the circuit 100 of the above embodiment, a first controllable switch S1 is also connected in parallel across each compensation capacitor CB. The first controllable switch S1 is mainly used to control whether the compensation capacitor is connected to the power supply circuit of the DC voltage source. When the balance between multiple DC voltage sources is good, the first controllable switch S1 can be closed to short-circuit the compensation capacitor CB, and the DC voltage source is directly connected in parallel across the segmented DC bus 110 to avoid additional losses in the compensation capacitor CB, thereby improving the charging and discharging efficiency of the entire circuit 100.

[0055] Meanwhile, in the circuit 100 of the above embodiment, a second controllable switch S2 is also provided in the load circuit 130. The second controllable switch S2 is mainly used to control whether to connect multiple half-bridge chopper circuits 141 to the load circuit 130. When the balance of multiple DC voltage sources is good, the second controllable switch S2 can be closed simultaneously, so that one end of the filter capacitor CL is directly connected to the first output terminal TS1 through the second controllable switch S2, thereby avoiding the connection of multiple half-bridge chopper circuits 141 to the load circuit 130, thereby avoiding additional losses in the switching device QB2 and the filter inductor LB, and improving the charging and discharging efficiency of the entire circuit 100.

[0056] Corresponding to the above embodiments, some embodiments of this application also provide a control method for a parallel equalization circuit of DC voltage sources, applied to the aforementioned parallel equalization circuit of DC voltage sources, see reference. Figure 7 The method includes: S101, based on preset voltage setting rules, determines the voltage setting parameters of the parallel equalization circuit of the DC voltage source. The voltage setting parameters include the total voltage setting value across the segmented DC bus, the first voltage setting value across the first capacitor, and the second voltage setting value across the second capacitor.

[0057] S102 performs closed-loop control on the voltage across the segmented DC bus and the voltage across the second capacitor. S103, adjust the operating parameters of the load circuit to control the neutral terminal current, so as to stabilize the voltage across the first capacitor at the first voltage setting value.

[0058] It should be noted that for the description of the control method of the DC voltage source parallel equalization circuit in the above embodiments, please refer to the relevant description of the DC voltage source parallel equalization circuit in the foregoing embodiments, which will not be repeated here.

[0059] The aforementioned control method first determines the voltage setting parameters according to preset voltage setting rules. Then, it performs closed-loop control on the voltages across the segmented DC bus and the voltages across the second capacitor. By adjusting its own operating parameters, it controls the neutral current, stabilizing the voltage across the first capacitor at the first voltage setting value. This allows the load circuit to compensate for the unbalanced power exchange in each current-sharing branch, eliminating the need for an external DC power supply, thus reducing energy conversion stages and circuit losses.

[0060] In some embodiments, the voltage setting parameters of the DC voltage source parallel equalization circuit are determined based on the following formulas (1)-(5): Ucref1>2(Uavg-Umin)(1) Ucref1>2(Umax-Uavg)(2) Ucref1>Umax-Umin(3) Ucref2=Uavg-0.5 Ucref1(4) Ucref=Uavg+0.5 Ucref1(5) Wherein, Ucref is the total voltage setting value. Ucref1 is the first voltage setting value. Ucref2 is the second voltage setting value. Uavg is the average voltage value of multiple DC voltage sources. Umax is the maximum voltage value of the DC voltage source; Umin is the minimum voltage value of the DC voltage source.

[0061] Specifically, the above formulas (1)-(3) are mainly used to ensure that the power electronic half-bridge circuit can normally control the increase or decrease of the inductor current of each current sharing branch under the complementary switching state, and provide sufficient unbalanced power compensation margin for the compensation capacitor of each current sharing branch, so that the circuit can maintain normal operation.

[0062] Secondly, the above formulas (4) and (5) are mainly used to set the relationship between the total voltage setting value, the second voltage setting value and the first voltage setting value. This ensures that, in steady state, the average duty cycle of all power electronic half-bridge circuits is approximately 0.5, and the current sharing branch has symmetrical adjustment capability in the direction of current increase and decrease, which is beneficial to achieving a good current sharing effect.

[0063] In some embodiments, reference Figure 3 The load circuit 130 includes an interleaved parallel chopper circuit 140, a filter capacitor CL, and a first inverter U1; the interleaved parallel chopper circuit 140 includes multiple half-bridge chopper circuits 141; the voltage setting parameters also include a third voltage setting value for the filter capacitor CL; the operating parameters of the load circuit 130 also include the duty cycle of each half-bridge chopper circuit 141; wherein, the third voltage setting value is set to be equal to the average voltage value of multiple DC voltage sources.

[0064] Specifically, as shown in formula (4) above, the second voltage setting value is equal to the average voltage value of multiple DC voltage sources minus half of the first voltage setting value. In the above control method, the third voltage setting value of the filter capacitor (i.e., the setting value of the voltage across the filter capacitor) is equal to the average voltage value of multiple DC voltage sources. And according to... Figure 3In the topology shown, under steady-state conditions, the voltage across the filter capacitor is equal to the sum of the output voltage of the interleaved parallel chopper circuit and the voltage of the second capacitor. Therefore, setting the third voltage setting to the average voltage of multiple DC voltage sources makes the output voltage of the interleaved parallel chopper circuit equal to half of the first voltage setting, thereby setting the duty cycle of the half-bridge chopper circuit to 0.5. This, in turn, gives the interleaved parallel chopper circuit symmetrical adjustment capability in the direction of current increase and decrease, improving the adjustable range.

[0065] It should be noted that for information on adjusting the operating parameters of the aforementioned load circuit, please refer to the aforementioned section on... Figure 3 The relevant description of the load circuit is not detailed here.

[0066] As a specific example, when the voltage across the second capacitor is greater than the second voltage setting value and the first inverter is in output power mode, the duty cycle of the half-bridge chopper circuit can be reduced, thereby increasing the current flowing out of the neutral terminal, causing the voltage across the second capacitor to decrease, and then increasing the voltage across the first capacitor to the first voltage setting value.

[0067] In some embodiments, reference Figure 3 Each compensation capacitor CB has a first controllable switch S1 connected in parallel across its two ends. The load circuit 130 includes an interleaved parallel chopper circuit 140, a filter capacitor CL, and a second controllable switch S2. The interleaved parallel chopper circuit 140 includes multiple half-bridge chopper circuits 141. One end of the second controllable switch S2 is connected to the first output terminal TS1; the other end of the second controllable switch S2 is connected to one end of the filter capacitor CL. The method further includes: when the output voltage difference between any two DC voltage sources is less than or equal to a first preset voltage threshold, controlling the second controllable switch and multiple first controllable switches to close, and controlling multiple power electronic half-bridge circuits and multiple half-bridge chopper circuits to stop operating.

[0068] It is understandable that the output voltage of a DC voltage source refers to the magnitude of the terminal voltage across the DC voltage source.

[0069] Specifically, if the output voltage difference between any two DC voltage sources is less than or equal to a first preset voltage threshold, it indicates that the balance of multiple DC voltage sources is good, and the risk of parallel circulating current is low. In this case, the switching losses generated by the operation of multiple power electronic half-bridge circuits and multiple half-bridge chopper circuits, as well as the current transmission losses generated by the compensation capacitors and the filter inductors, will actually affect the overall circuit transmission efficiency. Therefore, in the above control method, under this condition, the second controllable switch and multiple first controllable switches are closed, and the multiple power electronic half-bridge circuits and multiple half-bridge chopper circuits are stopped to avoid the aforementioned switching losses and transmission losses, thereby reducing circuit losses.

[0070] Based on the aforementioned embodiments of the DC voltage source parallel equalization circuit control method, in some other embodiments provided in this application, a control device is provided, the internal structure of which can be shown in the diagram below. Figure 8 As shown, the control device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When the computer program is executed by the processor, it implements a DC voltage source parallel equalization circuit control method.

[0071] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the control device applied thereto. The specific control device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0072] Based on the foregoing description of embodiments of the DC voltage source parallel balancing circuit, this application also provides a power supply system including the aforementioned DC voltage source parallel balancing circuit.

[0073] It is understandable that in the above power supply system, the DC voltage source in the parallel equalization circuit can be a photovoltaic string, making the power supply system a photovoltaic power supply system. Alternatively, the DC voltage source can also be an energy storage battery, making the power supply system an energy storage system.

[0074] The aforementioned power supply system uses a segmented DC bus formed by a series-connected first and second capacitor. A DC voltage source and a compensation capacitor are connected in series and then in parallel across the bus. A current-sharing circuit consisting of branch inductors and a power electronic half-bridge circuit is also included. This allows the first capacitor to absorb unbalanced power between the current-sharing branches, while the second capacitor serves as the main power direct path. Simultaneously, a load circuit is connected to the first output terminal, the second output terminal, and the neutral terminal. By adjusting its own operating parameters, the load circuit can control the neutral terminal current, stabilizing the voltage across the first capacitor at a set first voltage value. Therefore, the unbalanced power exchange between the current-sharing branches is compensated by the load circuit, eliminating the need for an external DC power supply. This reduces energy conversion steps and lowers circuit losses.

[0075] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0076] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0077] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0078] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0079] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0080] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A parallel equalization circuit for DC voltage sources, characterized in that, include: Multiple DC voltage sources are connected at their first polarity terminals; The segmented DC bus includes a first capacitor and a second capacitor connected in series; the first terminal of the first capacitor serves as the first output terminal of the segmented DC bus; the second terminal of the first capacitor is connected to the first terminal of the second capacitor and serves as the neutral terminal of the segmented DC bus; the second terminal of the second capacitor serves as the second output terminal of the segmented DC bus and is connected to the first polarity terminal. Multiple compensation capacitors correspond one-to-one with the multiple DC voltage sources; one end of each compensation capacitor is connected to the second polarity terminal of the corresponding DC voltage source; The other end of each of the compensation capacitors is connected to the first output terminal; Multiple current sharing circuits correspond one-to-one with the multiple DC voltage sources; each current sharing circuit includes a branch inductor and a power electronic half-bridge circuit. The power electronic half-bridge circuit has a current input terminal; one end of the branch inductor is connected to the second polarity terminal of the DC voltage source; the other end of the branch inductor is connected to the current input terminal of the power electronic half-bridge circuit; the power electronic half-bridge circuit is connected in parallel between the first output terminal and the neutral terminal. The power electronic half-bridge circuit is used to selectively connect the second polarity terminal of the corresponding DC voltage source to the first output terminal or the neutral terminal through the branch inductor. The load circuit, connected to the first output terminal, the second output terminal and the neutral terminal respectively, is configured to control the current at the neutral terminal by adjusting its own operating parameters, so as to stabilize the voltage across the first capacitor at a first voltage setting value.

2. The DC voltage source parallel equalization circuit according to claim 1, characterized in that, The power electronic half-bridge circuit includes an upper bridge switch and a lower bridge switch; the connection between the upper bridge switch and the lower bridge switch serves as the current input terminal.

3. The DC voltage source parallel balancing circuit according to claim 2, characterized in that, The first polarity terminal is the negative terminal; in at least part of the current sharing circuit, the power electronic half-bridge circuit is composed of a first bridge arm switch and a first diode connected in series; one end of the first bridge arm switch is connected to the neutral terminal; the other end of the first bridge arm switch is connected to the anode of the first diode and serves as the current input terminal; the cathode of the first diode is connected to the first output terminal. Alternatively, the first polarity terminal is the positive terminal; in at least part of the current sharing circuit, the power electronic half-bridge circuit is composed of a first bridge arm switch and a first diode connected in series; wherein, one end of the first bridge arm switch is connected to the neutral terminal; the other end of the first bridge arm switch is connected to the cathode of the first diode and serves as the current input terminal; the anode of the first diode is connected to the first output terminal.

4. The DC voltage source parallel balancing circuit according to claim 1, characterized in that, The load circuit includes: An interleaved parallel chopper circuit includes multiple half-bridge chopper circuits and multiple filter inductors; each half-bridge chopper circuit corresponds one-to-one with a filter inductor; the two input terminals of each half-bridge chopper circuit are connected in parallel between the neutral terminal and the first output terminal; the output terminal of each half-bridge chopper circuit is connected to one end of the filter inductor. A filter capacitor; one end of the filter capacitor is connected to the other end of the plurality of filter inductors; the other end of the filter capacitor is connected to the second output terminal; The first inverter; the DC input terminal of the first inverter is connected in parallel across the two ends of the filter capacitor.

5. The DC voltage source parallel balancing circuit according to claim 4, characterized in that, The half-bridge chopper circuit includes an upper bridge switch and a lower bridge switch; the connection between the upper bridge switch and the lower bridge switch serves as the output terminal of the half-bridge chopper circuit.

6. The parallel equalization circuit of DC voltage sources according to claim 4, characterized in that, The first polarity terminal is the negative terminal; at least part of the half-bridge chopper circuit is composed of a second bridge arm switch and a second diode connected in series; one end of the second bridge arm switch is connected to the first output terminal; the other end of the second bridge arm switch is connected to the cathode of the second diode and serves as the output terminal of the half-bridge chopper circuit; the anode of the second diode is connected to the neutral terminal. Alternatively, the first polarity terminal is the positive terminal; at least part of the half-bridge chopper circuit is composed of a second bridge arm switch and a second diode connected in series; one end of the second bridge arm switch is connected to the first output terminal; the other end of the second bridge arm switch is connected to the anode of the second diode and serves as the output terminal of the half-bridge chopper circuit; the cathode of the second diode is connected to the neutral terminal.

7. The DC voltage source parallel balancing circuit according to claim 4, characterized in that, Each of the compensation capacitors has a first controllable switch connected in parallel across its two ends; The load circuit also includes: A second controllable switch; one end of the second controllable switch is connected to the first output terminal; the other end of the second controllable switch is connected to one end of the filter capacitor.

8. A control method for a parallel equalization circuit of DC voltage sources, applied to the parallel equalization circuit of DC voltage sources as described in any one of claims 1-7, characterized in that, The method includes: Based on preset voltage setting rules, the voltage setting parameters of the parallel equalization circuit of DC voltage sources are determined; the voltage setting parameters include the total voltage setting value across the segmented DC bus, the first voltage setting value across the first capacitor, and the second voltage setting value across the second capacitor. Closed-loop control is performed on the voltage across the segmented DC bus and the voltage across the second capacitor. Adjust the operating parameters of the load circuit to control the neutral terminal current, so as to stabilize the voltage across the first capacitor at the first voltage setting value.

9. The control method according to claim 8, characterized in that, The voltage setting parameters of the parallel equalization circuit of the DC voltage sources are determined based on the following formula: Ucref1>2(Uavg-Umin) Ucref1>2(Umax-Uavg) Ucref1>Umax-Umin Ucref2=Uavg-0.5 Ucref1 Ucref=Uavg+0.5 Ucref1 Wherein, Ucref is the total voltage setting value; Ucref1 is the first voltage setting value; Ucref2 is the second voltage setting value; Uavg is the average voltage value of the plurality of DC voltage sources; Umax is the maximum voltage value of the DC voltage source; and Umin is the minimum voltage value of the DC voltage source.

10. The control method according to claim 9, characterized in that, The load circuit includes an interleaved parallel chopper circuit, a filter capacitor, and a first inverter; the interleaved parallel chopper circuit includes multiple half-bridge chopper circuits; the voltage setting parameters also include a third voltage setting value for the filter capacitor; the operating parameters of the load circuit also include the duty cycle of each of the half-bridge chopper circuits; wherein, the third voltage setting value is set to be equal to the average voltage value of the multiple DC voltage sources.

11. The control method according to claim 8, characterized in that, Each of the compensation capacitors has a first controllable switch connected in parallel across its two ends; the load circuit includes an interleaved parallel chopper circuit, a filter capacitor, and a second controllable switch; the interleaved parallel chopper circuit includes multiple half-bridge chopper circuits; one end of the second controllable switch is connected to the first output terminal; the other end of the second controllable switch is connected to one end of the filter capacitor; the method further includes: When the output voltage difference between any two DC voltage sources is less than or equal to a first preset voltage threshold, the second controllable switch and multiple first controllable switches are controlled to close, and the multiple power electronic half-bridge circuits and multiple half-bridge chopper circuits are controlled to stop operating.

12. A control device, characterized in that, include: A memory, a processor, and a program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the control method for the parallel equalization circuit of a DC voltage source according to any one of claims 8-11.

13. A power supply system, characterized in that, Includes the DC voltage source parallel equalization circuit according to any one of claims 1-7.

14. The power supply system according to claim 13, characterized in that, The DC voltage source in the parallel equalization circuit of the DC voltage source is an energy storage battery or a photovoltaic string.

Images