A type of aerospace satellite power supply S 4 R-type semi-adjustable busbar protection circuit
Patent Information
- Application Number
- CN202611278841.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-21
- Publication Date
- 2026-10-30
AI Technical Summary
[0005](1)S4R型半调节母线体制放电二极管一般采用单串多并设计,如图1所示,此种设计必须保证各并联放电二极管平均分担放电电流,但多并放电二极管只能靠均温设计(二极管工作温度相同)被动实现均流功能,随着器件性能衰减,均温设计易失效造成均流功能丧失,部分放电二极管会承担几倍的电流量,只要其中一只发生热击穿短路故障,放电二极管隔离功能随机丧失;
[0018](1)本发明的保护电路不影响原S4R控制方式,即放电二极管未发生短路时,该保护电路不影响充电和分流功能驱动信号正常的逻辑控制;
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Figure CN123019178A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of aerospace satellite power supply fault protection, specifically to an aerospace satellite power supply S 4 R-type semi-regulating busbar protection circuit. Background Technology
[0002] In recent years, with the rapid development of low-Earth orbit satellite constellations, higher technical requirements have been placed on satellite power systems in terms of miniaturization, lightweighting, and high power density. The spacecraft power subsystem consists of three parts: solar cell array, lithium-ion battery pack, and power controller. As the energy control unit, the power controller prioritizes power supply to the load during sunlight periods, using the remaining energy to charge the battery pack (when the battery pack is undercharged) or divert power (when the battery pack is fully charged). During shadow periods, the controller controls the battery pack to discharge and power the entire satellite.
[0003] The power control unit of the power controller for low-Earth orbit satellites typically uses S... 3 R type or S 4 R-type control mode, S 3 R-type control is mainly used in power systems that do not regulate the busbar, where the busbar voltage is the same as the battery voltage. The control method is simple, but energy utilization is low; S 4 The R-type control method is mainly used in semi-regulated bus power systems. The control method is complex. During the sunshine period, the bus voltage is close to the optimal operating point voltage of the solar cell, resulting in high energy utilization. During the shadow period, the battery directly supplies power to the entire satellite load through the discharge diode, the bus voltage decreases, and the voltage is clamped to the battery voltage.
[0004] S 4 While the R-type semi-regulated bus system boasts high energy efficiency and facilitates the miniaturization, lightweighting, and high power density design of low-Earth orbit satellite power systems, it also presents the following problems:
[0005] (1) S 4 R-type semi-regulated bus discharge diodes typically employ a single-string, multi-parallel design, such as... Figure 1 As shown, this design must ensure that each parallel discharge diode shares the discharge current equally. However, multiple parallel discharge diodes can only passively achieve the current sharing function through the temperature equalization design (diodes operating at the same temperature). As the performance of the devices degrades, the temperature equalization design is prone to failure, resulting in the loss of the current sharing function. Some discharge diodes will bear several times the current. If one of them suffers a thermal breakdown short circuit fault, the isolation function of the discharge diode will be randomly lost.
[0006] (2) Once the discharge diode experiences a thermal breakdown short circuit fault, the battery output is directly connected to the power supply bus. During the sunshine period, in addition to supplying power to the load, the remaining energy of the solar array will be uncontrollably used to charge the battery pack. The final charging voltage of the battery will be forcibly increased to the bus voltage V.母线 The charging control cannot be performed according to the previously designed charging current and final charging voltage, which is constant current followed by constant voltage. The final charging voltage of the battery pack increases, causing overcharging damage. The charging rate of the battery pack increases, accelerating the lifespan degradation of the battery pack, which will seriously affect the on-orbit service life of the spacecraft.
[0007] Patent CN105262477A provides an S 4 R logic control circuit and its logic control implementation method are given. Two implementations of S are presented. 4 The logic control circuit and its implementation method for R-type control; Patent CN109039064B provides a shunt adjustment device for preventing short circuits of a single-power supply diode in spacecraft; Patent CN111697681B provides a multi-channel charging shunt control system and its method for spacecraft, solving the problems of traditional S-type control. 4 The R-type circuit suffers from complex structure and high discharge efficiency losses. None of the above patents have effectively solved the problem of S... 4 The impact of a short-circuit fault in the R-semi-regulated bus system discharge diode on the lifespan of the power supply system. Summary of the Invention
[0008] The purpose of this invention is to provide a space satellite power supply S 4 The R-type semi-regulating busbar protection circuit can protect the battery pack in case of a short circuit in the discharge diode. 4 R power semi-regulation control mode automatically switches to S 3 R power non-adjustment control mode, automatically eliminates the original S 4 The influence of the BEA circuit in the R control signal is mitigated to prevent the battery pack from being overcharged due to prolonged high-rate charging, thus ensuring the continued stable operation of the aerospace power supply.
[0009] To achieve the above objectives, the present invention provides a space satellite power supply S 4 The R-type semi-regulating bus system protection circuit includes a discharge diode short-circuit fault detection circuit, a control signal generation circuit, a charging logic circuit, and a current shunt logic circuit. The discharge diode short-circuit fault detection circuit continuously monitors the current in the single-string N-parallel discharge diode path, where N is the total number of paths in the solar cell array. When the discharge diodes are operating normally, the discharge diode short-circuit fault detection circuit outputs a high level. If any discharge diode experiences a short-circuit fault, the discharge diode short-circuit fault detection circuit outputs a low level. The protection circuit is controlled by S... 4 The R-type semi-regulating bus system automatically switches to S-type power control mode. 3 R-type non-adjustable bus system power control mode; the control signal generation circuit generates the reference voltage V ref_bus The bus voltage feedback signal is used to generate a shunt control signal V through the main error amplifier circuit MEA. MEA; the reference voltage V ref_bus The battery pack voltage feedback signal is used to generate a charging control signal V through the battery error amplifier circuit BEA. BEA ; Shunt control signal V MEA and charging control signal V BEA Comparing with the same source triangular wave, control signals PWM are generated respectively. MEA and control signal PWM BEA The output signal of the discharge diode short-circuit fault detection circuit and the control signal PWM MEA and the control signal PWM BEA The charging logic circuit generates a charging drive signal; the output signal of the discharge diode short-circuit fault detection circuit and the control signal PWM are also included. MEA and the control signal PWM BEA The signal enters the shunt logic circuit and generates a shunt drive signal.
[0010] The aforementioned aerospace satellite power supply S 4 The R-type semi-regulating bus system protection circuit includes a charging logic circuit comprising a first AND gate and a first driving circuit, the output signal of the discharge diode short-circuit fault detection circuit, and the control signal PWM. MEA and the control signal PWM BEA The input is fed into the first AND gate for AND logic calculation, and the logic calculation result output by the first AND gate is used by the first driving circuit to form a charging driving signal.
[0011] The aforementioned aerospace satellite power supply S 4 The R-type semi-regulating bus system protection circuit includes a shunt logic circuit comprising a NOT gate, a second AND gate, a NOR gate, an OR gate, and a second drive circuit; the control signal PWM... BEA The output of the signal after the NOT gate operation is compared with the control signal PWM. MEA Both inputs enter the second AND gate for logical calculation, and the logical calculation result output by the second AND gate is used as the first input to the OR gate; the control signal PWM BEA The output signal of the discharge diode short-circuit fault detection circuit is fed into the NOR gate for logical operation, and the logical calculation result output by the NOR gate is used as the second input to the OR gate; the first input and the second input OR logical operation result are used by the second driving circuit to form a shunt driving signal.
[0012] The aforementioned aerospace satellite power supply S 4 The R-type semi-regulating bus system protection circuit, wherein the control signal logic truth values of the protection circuit are shown in Table 1:
[0013] Table 1 Truth Table of Control Signal Logic
[0014] 0 0 1 (Normal) 0 0 0 1 1 (Normal) 0 0 1 0 1 (Normal) 1 0 1 1 1 (Normal) 0 1 0 0 0 (fault) 1 0 0 1 0 (fault) 0 0
[0015] Among them, S JC The detection signal is the output signal of the discharge diode short-circuit fault detection circuit.
[0016] The aforementioned aerospace satellite power supply S 4 In the R-type semi-regulating bus system protection circuit, the discharge diode short-circuit fault detection circuit uses a bidirectional Hall sensor to collect the current in the single-string N-parallel discharge diode path in real time, and uses the short-circuit current as the trigger condition for switching power control mode.
[0017] Compared with the prior art, the beneficial technical effects of the present invention are:
[0018] (1) The protection circuit of the present invention does not affect the original S 4 R control mode, that is, when the discharge diode is not short-circuited, the protection circuit does not affect the normal logic control of the charging and shunt function drive signals;
[0019] (2) The discharge diode short-circuit fault detection circuit of the present invention can collect the discharge diode short-circuit current through a bidirectional Hall sensor as the trigger condition for the protection circuit. Once a short circuit is detected in the discharge diode, the protection circuit can be automatically triggered immediately, and S 4 The R-type semi-regulating bus power control mode can be automatically switched to S-type semi-regulating bus power control mode. 3 The R-type non-adjustable bus power control method ensures the continued stable operation of the power subsystem.
[0020] (3) The protection circuit of the present invention is composed of a bidirectional Hall sensor and logic gates, which has high reliability and is based on the original S 4 The R-type semi-regulating bus system control circuit requires fewer additional components, resulting in a simple, reliable, low-cost, and highly practical circuit. Attached Figure Description
[0021] The aerospace satellite power supply S of the present invention 4 The R-type semi-regulating busbar protection circuit is given in the following embodiments and figures.
[0022] Figure 1 For traditional S 3 R-type non-adjustable bus system control circuit topology diagram.
[0023] Figure 2 For traditional S 4 R-type semi-regulating bus system control circuit topology.
[0024] Figure 3 The space satellite power supply S in this embodiment of the invention 4 R-type semi-regulating bus system protection circuit topology diagram.
[0025] Figure 4 This is a logic timing diagram of each control signal in an embodiment of the present invention. Detailed Implementation
[0026] The following will combine Figures 1-4 The space satellite power supply S of the present invention 4 The R-type semi-regulating busbar protection circuit is described in further detail.
[0027] Traditional S 3 R-type non-adjustable bus system control circuit topology as follows: Figure 1 As shown, solar cell arrays are generally designed with multiple parallel connections. This invention uses a three-parallel solar cell array design as an example for illustration. During its lifespan, the bus voltage is clamped by the battery bank voltage, i.e., V 电池 =V 母线 As the bus voltage V increases during the charging or discharging process of the battery pack... 母线 Things will change. V ref_bus It is the control voltage of the bus voltage (the final charging voltage of the battery), which is controlled by the bus voltage V. 母线 (=V) 电池 ) Generate V by performing PI control BEA Signal, V BEA The signal is compared with the sawtooth wave to generate PWM. BEA1 The control signal, after being processed by NOT gate logic calculations and the drive circuit, ultimately generates the shunt drive signal SF1 for this stage of the solar cell array. The control logic is as follows: The control logic for the second and third channels is the same.
[0028] Traditional S 4 R-type semi-regulating bus system control circuit topology as follows: Figure 2 As shown, with S 3 The R-type design is the same. Taking a three-channel parallel solar array design as an example, the bus voltage remains constant during the sunshine period. During the shadow period, the bus voltage is the voltage of the battery pack minus the voltage drop of the discharge diode. Taking the first solar array Sa1 as an example, the switching states of the charging diode P1 and the shunt diode D1 in the charging shunt circuit corresponding to the first solar array Sa1 are affected by V. MEA Signal and V BEA Logic control of signals. V MEA Signal and V BEA The signal is compared with the sawtooth wave to generate PWM. MEA1 and PWM BEA1 The control signal, after logic operations, generates the drive signal SC1 for the charging tube P1 (logic is PWM). MEA1 &PWM BEA1 This generates the drive signal SF1 for the shunt transistor Q1 (with PWM logic). MEA1 & The control logic for the second and third channels is the same.
[0029] This invention aims to solve S 4 The R-type semi-regulating bus system control circuit suffers from bus voltage oscillation faults and battery pack charging overvoltage faults caused by short circuits in the discharge diode.
[0030] Figure 3 The image shows the space satellite power supply S according to an embodiment of the present invention. 4 R-type semi-regulating bus system protection circuit topology diagram.
[0031] like Figure 3 The aerospace satellite power supply S in this embodiment 4 The R-type semi-regulating busbar protection circuit includes a discharge diode short-circuit fault detection circuit 11, a control signal generation circuit 10, a charging logic circuit 12, and a shunt logic circuit 13. Compared to the traditional S... 4 Compared to the R-type semi-regulating bus system control circuit, the protection circuit of this embodiment adds a discharge diode short-circuit fault detection circuit 11. Furthermore, the logic operation circuits (charging logic circuit 12 and shunt logic circuit 13) of the protection circuit in this embodiment differ from those of the conventional S-type semi-regulating bus system control circuit. 4 The logic circuits of the R-type semi-regulating bus system control circuit are also different.
[0032] The discharge diode short-circuit fault detection circuit 11 detects the current in the discharge diode path in real time; when the discharge diode is working normally, the current is as follows: Figure 3 When the discharge diode short-circuit fault detection circuit 11 outputs a high level (i.e., output logic state 1) in the direction of the red arrow, the current flows in the reverse direction; when a short-circuit fault occurs in the discharge diode, the current flows in reverse direction, and the discharge diode short-circuit fault detection circuit 11 outputs a low level (i.e., output logic state 0). The protection circuit in this embodiment consists of S... 4 The R-type semi-regulating bus system automatically switches to S-type power control mode. 3 R-type non-regulating bus system power control method.
[0033] The control signal generation circuit 10 includes a main error amplifier circuit (MEA, Measurement Error Amplifier) 7, a battery error amplifier circuit (BEA, Battery Error Amplifier) 8, a first comparator, and a second comparator; the reference voltage V ref_bus With bus voltage V 母线 The feedback signal generates a shunt control signal V through the main error amplifier circuit MEA7. MEA (Positive feedback logic, V) 母线 Larger V MEA (The larger the value); reference voltage V ref_busWith battery pack voltage V 电池 The feedback signal generates a charging control signal V through the battery error amplifier circuit BEA8. BEA (Negative feedback logic, V) 电池 Larger V BEA (smaller); shunt control signal V MEA The triangular wave is compared with the first comparator to generate the control signal PWM. MEA Charging control signal V BEA The triangular wave is compared with the second comparator to generate the control signal PWM. BEA Among them, the shunt control signal V MEA and charging control signal V BEA The triangular waves being compared are the same triangular wave.
[0034] For an N-channel parallel solar cell array, each solar cell array has a discharge diode 4, a control signal generation circuit 10, a charging logic circuit 12, and a shunt logic circuit 13. The discharge diode short-circuit fault detection circuit 11 monitors the current in the path of the single-string N-parallel discharge diodes 4 in real time. If any one of the discharge diodes T1 to TN experiences a short-circuit fault, the discharge diode short-circuit fault detection circuit 11 outputs a low level (i.e., the output logic state is 0). That is, for an N-channel parallel solar cell array, there are N discharge diodes 4, N control signal generation circuits 10, N charging logic circuits 12, N shunt logic circuits 13, and one discharge diode short-circuit fault detection circuit 11.
[0035] Preferably, in this embodiment, the discharge diode short-circuit fault detection circuit 11 uses a bidirectional Hall sensor to collect the current in the single-string N-parallel discharge diode path in real time.
[0036] The following explanation will use the first solar cell array, Sa1, as an example. Figure 4 Explanation of the working principle of the protection circuit in this embodiment:
[0037] (1) Normal working status:
[0038] When the discharge diode is working normally and no short circuit fault occurs, the discharge diode short circuit fault detection circuit 11 outputs signal S. JC The value is 1; in the charging logic circuit 12, the control signal PWM is 1. MEA1 PWM control signal BEA1 The output signal S of the discharge diode short-circuit fault detection circuit 11 JC Input AND gate 14 performs AND logic calculation, i.e., PWM. MEA1 &PWM BEA1 &S JC =PWM MEA1 &PWM BEA1The output logic calculation result (i.e., PWM) MEA1 &PWM BEA1 The charging drive signal SC1 is generated by the driving circuit; in the current shunt logic circuit 13, the control signal PWM is generated. BEA1 The output of the signal after the NOT gate operation is compared with the control signal PWM. MEA1 They all enter AND gate 15 to perform logic calculations, and the output logic calculation result is PWM. MEA1 & As the first input to the OR gate, the control signal PWM BEA1 The output signal S of the discharge diode short-circuit fault detection circuit 11 JC Enter the NOR gate to perform logical operations, and output the logical calculation result. =0 is used as the second input to enter the OR gate, and the result of the OR logic operation between the first and second inputs is PWM. MEA1 & The shunt drive signal SF1 is generated by the drive circuit. At this time, the charging drive signal SC1 and the shunt drive signal SF1 are different from the traditional S. 4 The control circuit is the same as that of the R-type semi-regulating bus system.
[0039] (2) Abnormal working state:
[0040] When any one of the discharge diodes T1 to Tn experiences a short circuit fault, the battery pack output is directly connected to the power supply bus. At this time, V 母线 =V 电池 This causes the bus voltage V during the sunshine period. 母线 Always less than the reference voltage V ref_bus The shunt control signal V generated by the main error amplifier circuit MEA7... MEA Always high level, control signal PWM MEA1 The output signal S of the discharge diode short-circuit fault detection circuit 11 is always 0. JC The value is 0 (fault state); in the charging logic circuit 12, the control signal PWM is... MEA1 PWM control signal BEA1 The output signal S of the discharge diode short-circuit fault detection circuit 11 JC Input AND gate 14 performs AND logic calculation, i.e., PWM. MEA1 &PWM BEA1 &S JC =0, the output logic calculation result (0) is used by the driving circuit to form the charging drive signal SC1, that is, the original charging path terminates charging; in the shunt logic circuit 13, the PWM is controlled. BEA1 The output after NOT gate operation is compared with the control signal PWM. MEA1 They all enter AND gate 15 to perform logic calculations, and the output logic calculation result is PWM. MEA1 & =0 is used as the first input to enter the OR gate, controlling the PWM signal. BEA1 The output signal S of the discharge diode short-circuit fault detection circuit 11 JC Enter the NOR gate to perform logical operations, and output the logical calculation result. = As the second input enters the OR gate, the result of the first and second inputs is ORed. The shunt drive signal SF1 is generated by the drive circuit. At this time, only the shunt drive signal SF1 works, and the shunt drive signal SF1 is different from the traditional S. 3 The control circuit for the R-type non-adjustable bus system is the same, and the circuit switches to S. 3 In the R-type non-adjustable bus system, the battery pack continues to be charged with constant current and constant voltage according to the design values of charging current and final charging voltage, which will not reduce the life of the battery pack.
[0041] The control signal logic truth values of the protection circuit in this embodiment are shown in Table 1.
[0042] Table 1 Truth Table of Control Signal Logic
[0043] 0 0 1 (Normal) 0 0 0 1 1 (Normal) 0 0 1 0 1 (Normal) 1 0 1 1 1 (Normal) 0 1 0 0 0 (fault) 1 0 0 1 0 (fault) 0 0
Claims
1. A type of aerospace satellite power supply S 4 The R-type semi-adjustable busbar protection circuit is characterized by... It includes a discharge diode short-circuit fault detection circuit, a control signal generation circuit, a charging logic circuit, and a shunt logic circuit; The discharge diode short-circuit fault detection circuit detects the current in the single-string N parallel discharge diode path in real time, where N is the total number of paths in the solar cell array. When the discharge diode is working normally, the discharge diode short-circuit fault detection circuit outputs a high level; when any discharge diode experiences a short-circuit fault, the discharge diode short-circuit fault detection circuit outputs a low level. The control signal generating circuit will generate the reference voltage V ref_bus The bus voltage feedback signal is used to generate a shunt control signal V through the main error amplifier circuit MEA. MEA ; the reference voltage V ref_bus The battery pack voltage feedback signal is used to generate a charging control signal V through the battery error amplifier circuit BEA. BEA ; Shunt control signal V MEA and charging control signal V BEA Comparing with the same source triangular wave, control signals PWM are generated respectively. MEA and control signal PWM BEA ; The output signal of the discharge diode short-circuit fault detection circuit and the control signal PWM MEA and the control signal PWM BEA The charging logic circuit is then activated to generate a charging drive signal. The output signal of the discharge diode short-circuit fault detection circuit and the control signal PWM MEA and the control signal PWM BEA The signal enters the shunt logic circuit and generates a shunt drive signal.
2. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... When any one of the discharge diodes experiences a short-circuit fault, the protection circuit is activated by S. 4 The R-type semi-regulating bus system automatically switches to S-type power control mode. 3 R-type non-regulating bus system power control method.
3. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... The main error amplifier circuit MEA adopts positive feedback logic, that is, the larger the bus voltage, the stronger the shunt control signal V. MEA The larger the voltage of the battery pack, the higher the voltage of the charging control signal V. The battery error amplifier circuit BEA uses negative feedback logic, meaning that the higher the battery pack voltage, the higher the voltage of the charging control signal V. BEA The smaller.
4. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... The charging logic circuit includes a first AND gate and a first driving circuit, the output signal of the discharge diode short-circuit fault detection circuit, and the control signal PWM. MEA and the control signal PWM BEA The input is fed into the first AND gate for AND logic calculation, and the logic calculation result output by the first AND gate is used by the first driving circuit to form a charging driving signal.
5. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... The current splitting logic circuit includes a NOT gate, a second AND gate, a NOR gate, an OR gate, and a second driving circuit; the control signal PWM BEA The output of the signal after the NOT gate operation is compared with the control signal PWM. MEA Both inputs enter the second AND gate for logical calculation, and the logical calculation result output by the second AND gate is used as the first input to the OR gate; the control signal PWM BEA The output signal of the discharge diode short-circuit fault detection circuit is fed into the NOR gate for logical operation, and the logical calculation result output by the NOR gate is used as the second input to the OR gate; the first input and the second input OR logical operation result are fed into the second driving circuit to form a shunt driving signal.
6. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... When the discharge diode is working normally, the charging drive signal and the shunt drive signal are related to S. 4 The R-type semi-regulating bus system control circuit is consistent; when any discharge diode experiences a short-circuit fault, only the shunt drive signal operates, and the shunt drive signal is consistent with S. 3 The control circuit is the same as that of the R-type non-adjustable bus system.
7. A space satellite power supply S as described in claim 5 4 The R-type semi-adjustable busbar protection circuit is characterized by... The logic truth values of the control signals of the protection circuit are shown in Table 1: Table 1 Truth Table of Control Signal Logic Among them, S JC The detection signal is the output signal of the discharge diode short-circuit fault detection circuit.
8. A space satellite power supply S as described in claim 2 4 The R-type semi-adjustable busbar protection circuit is characterized by... The discharge diode short-circuit fault detection circuit uses a bidirectional Hall sensor to collect the current in the single-string N-parallel discharge diode path in real time, and uses the short-circuit current as the trigger condition for switching power control mode.
9. A space satellite power supply S as described in claim 1 4 The R-type semi-adjustable busbar protection circuit is characterized by... For an N-channel parallel solar cell array, there are N control signal generation circuits, N charging logic circuits, N shunt logic circuits, and one discharge diode short-circuit fault detection circuit. Each solar cell array has a control signal generation circuit, a charging logic circuit, and a shunt logic circuit, which generate corresponding charging drive signal SCn and shunt drive signal SFn, n=1, 2, 3, ..., N.
Citation Information
Patent Citations
S4R (Series Sequential Switching Shunt Regulator) logic control circuit and logic control implementation method thereof
CN105262477A
A shunt regulating device for preventing short circuits of a single-power-supply diode in spacecraft
CN109039064B
A multi-channel charging shunt control system and method for spacecraft
CN111697681B