A surge suppression and grid-compatible based high-power power supply cooperative control method

CN123019405APending Publication Date: 2026-10-30XI AN ACSOON POWER CO LTD
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Patent Information

Application Number
CN202611274634.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-21
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0003]但是,大功率电源的直流母线等效电容会随器件偏差、老化、温度和并机数量发生变化,供电电网的等效阻抗也会随配电线路长度、变压器容量以及同节点负载变化而变化

Benefits of technology

本发明通过使预充支路依次呈现两种已知预充阻抗,并分别取得预充电流、整流等效电压和直流母线电压的采样数据,能够利用已知阻抗变化对直流母线等效电容和电网等效阻抗进行在线辨识;由辨识结果选择后续预充阻抗,使预充过程能够适应母线电容偏差、残余电压以及电网强弱变化,减少固定延时造成的预充不足或无效等待。

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Abstract

The application belongs to the technical field of high-power power supply, and particularly discloses a high-power power supply cooperative control method based on surge suppression and power grid compatibility, which precharges a DC bus by sequentially adopting two known precharge impedances, determines the equivalent capacitance of the DC bus and the equivalent impedance of the power grid according to sampling data, and selects a target precharge impedance; predicts a secondary surge according to the voltage difference between the two ends of a solid-state transition switch, and sequentially turns on the solid-state transition switch, closes a mechanical main contactor and turns off the solid-state transition switch when the predicted value of the secondary surge is not greater than a preset surge limit value; after the main input path is established, limits the input change of a power factor correction module according to the equivalent impedance of the power grid, and limits the loading power of a subsequent DC conversion module according to the energy storage value of the DC bus and the allowed input power. The application can suppress the primary surge and the secondary surge, and improve the adaptability of the high-power power supply to different power grid conditions.
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Description

Technical Field

[0001] This invention belongs to the field of high-power power supply technology, and specifically relates to a high-power power supply collaborative control method based on surge suppression and grid compatibility. Background Technology

[0002] High-power switching power supplies typically include a PFC (Power Factor Correction) unit at the AC input and a large DC bus capacitor on its DC side to stabilize the bus voltage and supply power to the subsequent DC-DC converter module. When the equipment powers on, the initial voltage of the DC bus capacitor may be close to zero, or it may retain a residual voltage after a short power outage and subsequent power-on. If the main input contactor is closed directly, the AC power will rapidly charge the bus capacitor through the input lines, rectifiers, and contactor, resulting in a large surge current. Existing solutions generally use a fixed current-limiting resistor in conjunction with a pre-charge contactor, closing the mechanical main contactor after a fixed delay. Other solutions use thyristors, triacs, or power semiconductor devices instead of mechanical contacts for the transition. After the equipment enters operating mode, the power factor correction module draws power from the grid according to a preset current loop and power ramp-up curve, and the subsequent DC-DC converter module loads according to the load request.

[0003] However, the equivalent capacitance of the DC bus in a high-power power supply changes with component deviation, aging, temperature, and the number of parallel units. The equivalent impedance of the power grid also varies with the length of the distribution lines, transformer capacity, and load variations at the same node. Using a fixed pre-charge resistor and fixed time makes it difficult to accommodate different bus capacitances simultaneously: insufficient pre-charge will still generate a secondary surge at the moment the pre-charge branch switches to the main input path; excessive pre-charge time will prolong the startup time and increase the thermal burden on the current-limiting resistor. Furthermore, if the mechanical main contactor closes directly when the voltage difference across its terminals is large, contact impact and arcing are likely to occur. Summary of the Invention

[0004] The purpose of this invention is to overcome the defects in the existing technology and provide a high-power power supply collaborative control method based on surge suppression and grid compatibility.

[0005] This invention provides a high-power power supply collaborative control method based on surge suppression and grid compatibility. A pre-charge branch and a main power supply path are connected in parallel between the AC input terminal and the DC bus. The main power supply path includes a main input path and a power factor correction module arranged sequentially. The main input path includes a mechanical main contactor and a solid-state transition switch connected in parallel with the mechanical main contactor. A subsequent DC-DC converter module is arranged on the output side of the DC bus. The method includes: The pre-charge branch is sequentially controlled to pre-charge the DC bus with a first known pre-charge impedance and a second known pre-charge impedance, and sampling data corresponding to the two known pre-charge impedances are obtained respectively. The equivalent capacitance of the DC bus and the equivalent impedance of the power grid are determined based on the two sets of sampling data. The target pre-charge impedance for subsequent pre-charge is determined based on the equivalent capacitance of the DC bus and the equivalent impedance of the power grid; the voltage difference across the solid-state transition switch is obtained, and the secondary surge prediction value is determined based on the voltage difference and the equivalent impedance of the main input path; when the secondary surge prediction value is greater than the preset surge limit, pre-charge continues and the secondary surge prediction value is updated; when the secondary surge prediction value is not greater than the preset surge limit, the solid-state transition switch is turned on. After the solid-state transition switch is turned on, the voltage difference across the mechanical main contactor is monitored; when the voltage difference across the mechanical main contactor meets the preset closing condition, the mechanical main contactor is closed, the pre-charge branch is disconnected, and the solid-state transition switch is turned off during the zero-crossing window of the input current to establish the main input path. The input current or input power change rate of the power factor correction module is limited according to the equivalent impedance of the power grid. The DC bus energy storage value is determined according to the equivalent capacitance of the DC bus and the current DC bus voltage. The load power of the subsequent DC-DC converter module is limited according to the DC bus energy storage value and the allowable input power of the power factor correction module.

[0006] A further approach is to collect the AC input voltage and the initial DC bus voltage before performing the pre-charge operation, determine the effective value of the input voltage, the input frequency, and the zero-crossing time of the input voltage based on the AC input voltage, and select a complete pre-charge process or a shortened pre-charge process based on the ratio of the initial DC bus voltage to the pre-charge target voltage.

[0007] A further embodiment is that the precharge branch includes a precharge contactor, a precharge rectifier bridge, a first current-limiting resistor and a second current-limiting resistor connected in series, and an impedance switching switch connected in parallel with the second current-limiting resistor. The first known precharge impedance is formed by the first current-limiting resistor and the second current-limiting resistor connected in series when the precharge contactor is closed and the impedance switching switch is open. The second known precharge impedance is formed by the first current-limiting resistor retained after the impedance switching switch is closed to bypass the second current-limiting resistor. The pre-charge branch is controlled to pre-charge with the first known pre-charge impedance; when the DC bus voltage reaches the preset switching voltage or the pre-charge current drops to the preset switching current, the impedance switching switch is closed to switch to the second known pre-charge impedance; when neither the DC bus voltage nor the pre-charge current meets the corresponding switching conditions, the first known pre-charge impedance is maintained to continue pre-charging.

[0008] A further scheme is that the two sets of sampling data are acquired in the first sampling window and the second sampling window respectively, and both include the pre-charge current, the rectified equivalent voltage and the DC bus voltage; the first sampling window is located in the stable stage of pre-charging using the first known pre-charge impedance, and the second sampling window is located in the stable stage after switching to the second known pre-charge impedance.

[0009] A further approach is to determine the first DC bus equivalent capacitance estimate based on the relationship between the cumulative amount of pre-charge current and the change in DC bus voltage within the first sampling window, and to determine the second DC bus equivalent capacitance estimate based on the relationship between the cumulative amount of pre-charge current and the change in DC bus voltage within the second sampling window. The first DC bus equivalent capacitance estimate and the second DC bus equivalent capacitance estimate are then fused to obtain the DC bus equivalent capacitance. Based on the relationship between the rectified equivalent voltage, DC bus voltage, and pre-charge current within each sampling window, the corresponding total equivalent impedance of the pre-charge circuit is determined. The corresponding known pre-charge impedance is subtracted from the total equivalent impedance of each pre-charge circuit to obtain the first grid equivalent impedance estimate and the second grid equivalent impedance estimate. The first grid equivalent impedance estimate and the second grid equivalent impedance estimate are then fused to obtain the grid equivalent impedance.

[0010] A further approach is to determine the required pre-charge impedance based on the difference between the rectified equivalent voltage and the current DC bus voltage, the grid equivalent impedance, and the preset pre-charge current; when the required pre-charge impedance is not greater than the second known pre-charge impedance, the second known pre-charge impedance is determined as the target pre-charge impedance; when the required pre-charge impedance is greater than the second known pre-charge impedance, the first known pre-charge impedance is determined as the target pre-charge impedance.

[0011] A further embodiment is that the secondary surge prediction value is the ratio of the voltage difference across the solid-state transition switch to the equivalent impedance of the main input path, wherein the equivalent impedance of the main input path includes the equivalent impedance of the power grid, the on-resistance of the solid-state transition switch, and the impedance of the main input path. The conduction conditions of the solid-state transition switch also include: the current DC bus voltage reaches a preset proportion of the rectified peak value, and the current pre-charge current is lower than the preset transition current.

[0012] A further embodiment is that the solid-state transition switch includes bidirectional power switches connected in parallel with each phase contact of the mechanical main contactor; the corresponding bidirectional power switches are turned on according to the zero-crossing moment of each phase input, and the power factor correction module is controlled to operate with a preset transition current; when the voltage across each phase bidirectional power switch is lower than a preset voltage difference and the input current of each phase is lower than a preset closing current, the mechanical main contactor is closed; after confirming the closure of the mechanical main contactor according to the auxiliary contacts of the mechanical main contactor, the pre-charge contactor in the pre-charge branch is disconnected, and the corresponding bidirectional power switches are turned off during the zero-crossing window of each phase input current.

[0013] A further approach is to determine the upper limit of the input current or the rate of change of the input power of the power factor correction module based on the equivalent impedance of the power grid, wherein the upper limit of the input current or the rate of change of the input power decreases as the equivalent impedance of the power grid increases.

[0014] A further solution is to determine the DC bus energy storage value based on the DC bus equivalent capacitance, the current DC bus voltage, and the undervoltage threshold of the downstream DC-DC converter module, and to determine the bus support power based on the DC bus energy storage value and the preset release duration. The allowable load power of the downstream stage is determined based on the allowable input power of the power factor correction module and the bus support power; when the load request power is not greater than the allowable load power of the downstream stage, the downstream DC-DC converter module is controlled according to the load request power; when the load request power is greater than the allowable load power of the downstream stage, the load power of the downstream DC-DC converter module is limited to the allowable load power of the downstream stage.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention enables online identification of the DC bus equivalent capacitance and grid equivalent impedance by sequentially presenting two known pre-charge impedances in the pre-charge branch and obtaining sampling data of pre-charge current, rectified equivalent voltage, and DC bus voltage respectively. The subsequent pre-charge impedance is selected based on the identification results, so that the pre-charge process can adapt to bus capacitance deviation, residual voltage, and grid strength changes, reducing insufficient pre-charge or ineffective waiting caused by fixed delay.

[0016] This invention connects a solid-state transition switch and a mechanical main contactor in parallel in the main input path. First, it predicts the secondary surge based on the voltage difference across the switch and the equivalent impedance of the main input path. After the predicted value meets the limit, the solid-state transition switch is turned on. Then, when the voltage difference across the mechanical main contactor meets the closing condition, the mechanical contact is closed, and the solid-state device is turned off at the zero-crossing window of the input current. This can reduce the voltage surge and arc when the mechanical contact is closed. At the same time, the mechanical contact bears the steady-state large current, avoiding the continuous loss caused by the long-term conduction of the solid-state device.

[0017] This invention limits the upper limit of the input current or the rate of change of the input power of the power factor correction module based on the online determined equivalent impedance of the power grid, and makes the limit adaptively adjust with the equivalent impedance of the power grid, so that the equipment can increase the power consumption at a slower rate under weak power grid conditions, thereby reducing the line voltage drop and power grid voltage disturbance during startup and load transition, and improving the compatibility of high power supply with different power distribution conditions.

[0018] This invention determines the DC bus energy storage value based on the DC bus equivalent capacitance, DC bus voltage, and undervoltage threshold of the downstream DC-DC converter module. It then determines the downstream allowable load power by combining the allowable input power of the power factor correction module. When the load request exceeds the allowable value, the downstream load is actively limited, so that the power available on the input side, the energy storage that can be released by the bus in a short time, and the power demand of the downstream are kept in harmony, thereby reducing bus undervoltage, controlling oscillation, and cyclic restart. Attached Figure Description

[0019] The following figures are for illustrative purposes only and are not intended to limit the scope of the invention, wherein: Figure 1 This is a block diagram of the overall circuit topology of the high-power power supply system of the present invention; Figure 2 This is a schematic diagram of the pre-charge branch circuit connection of the present invention; Figure 3 This is a block diagram of the signal connection and control interface of the collaborative controller of the present invention; Figure 4 This is a flowchart of the high-power power supply collaborative control method of the present invention.

[0020] In the diagram, KP is the pre-charge contactor, QR is the impedance switching switch, KM is the mechanical main contactor, QT is the solid transition switch, Cbus represents the physical DC bus capacitance, and C represents the DC bus equivalent capacitance determined based on the sampled data. Detailed Implementation

[0021] To make the objectives, technical solutions, design methods, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0022] like Figure 1As shown, the three-phase AC input terminals, after input protection and EMI filtering, are connected in parallel with the DC bus via a main power supply path and a pre-charge branch. The input protection and EMI filtering provide conventional input protection and conducted interference suppression. The main power supply path sequentially includes the main input path and a power factor correction module; each phase of the main input path is formed by connecting the corresponding main contacts of the mechanical main contactor KM in parallel with the corresponding bidirectional power switches of the solid-state transition switch QT. The DC output terminal of the power factor correction module is connected to the DC bus, and a bus capacitor is connected between the positive and negative bus terminals. The DC bus then supplies power to the subsequent DC-DC converter module.

[0023] The precharge branch includes a precharge contactor KP, a precharge rectifier bridge DBP, and a precharge impedance switching unit connected in sequence. The precharge impedance switching unit is connected to the DC bus. Figure 2 As shown, the precharge impedance switching unit includes a first current-limiting resistor R1 and a second current-limiting resistor R2 connected in series, and an impedance switching switch QR connected in parallel with the second current-limiting resistor R2. When the precharge contactor KP is closed and QR is open, R1 and R2 are connected in series in the precharge circuit to form a first known precharge impedance; after QR is closed, R2 is bypassed, and R1 is retained in the circuit to form a second known precharge impedance.

[0024] like Figure 3 As shown, the sampling terminals of the collaborative controller are connected to the AC input voltage detection circuit, the pre-charge current detection circuit, the rectified output detection circuit, the DC bus voltage detection circuit, the differential voltage detection circuit across the solid-state transition switch, the input current detection circuit for each phase, and the auxiliary contacts of the mechanical main contactor, respectively. The output terminals of the collaborative controller are connected to the KP coil, the QR drive terminal, the QT gate drive terminal, and the KM coil via an isolation drive circuit, and output power or current limiting commands to the power factor correction module and the subsequent DC-DC converter module.

[0025] In this embodiment, taking a three-phase input as an example, phases A, B, and C are respectively equipped with mechanical main contacts KMa, KMb, and KMc. A bidirectional solid-state power switch QTa, QTb, or QTc is connected in parallel across each mechanical main contact. Each bidirectional solid-state power switch can be composed of two power MOSFETs or SiC MOSFETs connected in reverse series, enabling it to block AC voltages in both directions when turned off and to transmit positive and negative half-cycle currents when turned on. In low-frequency applications, other semiconductor switches that meet the requirements of bidirectional blocking and controllable turn-off can also be used. The output terminals of each phase parallel combination are connected to the corresponding input current sensor and the input inductor of the power factor correction module, and then connected to the power factor correction module. The two ends of the mechanical contacts of each phase are connected in parallel with the two ends of the corresponding phase's solid-state transition switch to obtain the voltage difference Uqa across the solid-state transition switch of phase A, the voltage difference Uqb across the solid-state transition switch of phase B, and the voltage difference Uqc across the solid-state transition switch of phase C, respectively. This voltage difference reflects the potential difference between the AC input side and the power factor correction module side that has not yet been eliminated before the main input path is turned on. The phase drives of the QT are independent, allowing the controller to turn each phase on or off sequentially based on the zero-crossing moment of the input. The KM is driven by a coil and the actual closed state is fed back through auxiliary contacts. The QT only carries current for a short period during the transition from the pre-charge branch to the mechanical main contacts; after the KM closes, the steady-state input current is handled by the low-conduction-loss mechanical contacts.

[0026] In this embodiment, the precharge contactor KP can be a three-pole contactor, with its three main contacts connected in series between the AC terminals of the three phases A, B, and C and the three-phase precharge rectifier bridge DBP. The positive output terminal of DBP is connected to the positive terminal of the DC bus in sequence via the precharge current sensor, R1, and R2, and its negative output terminal is connected to the negative terminal of the DC bus.

[0027] During the first pre-charge phase, KP is closed and QR is open. R1 and R2 form a larger first known pre-charge impedance to limit the initial surge during the low-voltage phase of the bus. When the DC bus voltage reaches the preset switching voltage, or the pre-charge current drops to the preset switching current, the controller closes QR, shorting R2. R1 then forms a smaller second known pre-charge impedance to improve the charging speed in the later stages of pre-charge. If none of the above switching conditions are met, QR remains open and pre-charge continues according to the first known pre-charge impedance.

[0028] Continue to refer to Figure 3 The AC input voltage detection circuit is used to obtain the instantaneous voltage of each phase and to determine the input frequency and the zero-crossing time of each phase; the pre-charge current can be obtained by a Hall sensor, an isolation amplifier shunt, or a current transformer. and It can be obtained from a high-resistance voltage divider network, an isolation amplifier, and an analog-to-digital conversion channel; the voltage difference across QT is obtained using an isolation differential detection circuit capable of withstanding the input common-mode voltage; the input current of each phase is used to determine the zero-crossing window and the mechanical contactor closing condition; the KM auxiliary contact is used to confirm that the mechanical main contactor has actually closed.

[0029] The collaborative controller internally includes at least a sampling and signal conditioning unit, an input RMS and zero-crossing identification unit, a DC bus equivalent capacitance and grid equivalent impedance identification unit, a pre-charge-QT-KM timing state machine, a power factor correction module input limiting unit, and a DC / DC load limiting unit. High-voltage side detection signals are electrically isolated or required to meet corresponding creepage distances and clearances before entering the controller.

[0030] High-power power supply collaborative control methods such as Figure 4 As shown, it should be noted that in this embodiment, when each judgment result is "no", the startup is not terminated, but the current safe state is maintained, precharging or monitoring continues, and the corresponding sampling volume is updated again; the next state is only entered after the conditions are met. Specifically, the following steps are included: Before performing the pre-charge operation, keep KM, QT, KP, and QR in the off state, and collect the AC input voltage and the initial DC bus voltage. The effective value of the input voltage, the input frequency, and the zero-crossing time of each phase are determined based on the AC input voltage, and then... Compare with the pre-charge target voltage. When Perform a full precharge when the level is low; when When the voltage is close to the target pre-charge voltage, the first pre-charge stage can be shortened or the process can start directly from the subsequent stage that meets safety requirements, in order to avoid repeated long pre-charges during short-term power outages and restarts.

[0031] Close KP and keep QR open, so that R1 and R2 are connected in series in the precharge circuit. Establish the first sampling window after the precharge reaches a relatively stable stage with the first known precharge impedance. ,exist Internal synchronization to obtain pre-charge current rectified equivalent voltage and DC bus voltage The relatively stable phase refers to the period when the contactor bounce and switching transients have ended, and the sampled data can be used for parameter identification.

[0032] when Reaching the preset switching voltage or When the current drops to the preset switching current, QR is closed, and the pre-charge impedance is switched from R1 and R2 in series to R1. If neither condition is met, the first known pre-charge impedance is maintained and pre-charging continues. After switching, a second sampling window is established to avoid the transient response of QR. And obtain the second set of pre-charge current. rectified equivalent voltage and DC bus voltage .

[0033] Based on the relationship between the cumulative pre-charge current and the change in DC bus voltage within the two sampling windows, the estimated values ​​of the equivalent capacitance of the first and second DC buses are obtained respectively. Taking the k-th sampling window as an example, the following formula can be used:

[0034] in, This is the sampling window number. According to the first The estimated value of the DC bus equivalent capacitance determined by each sampling window; For the first One sampling window; for Pre-charge current at any given moment; Sampling time; and The first The start and end times of each sampling window; and These are the DC bus voltages corresponding to the start and end times, respectively; This is the cumulative amount of the pre-charge current within the k-th sampling window. and After weighted fusion, the equivalent capacitance of the DC bus is obtained. .

[0035] According to each window , and The relationship between the two factors determines the total equivalent impedance of the pre-charge circuit. Then, by subtracting the known pre-charge impedance corresponding to the window, an estimate of the grid equivalent impedance is obtained. For example, when using the window average, it can be expressed as:

[0036] in, For the first The total equivalent impedance of the pre-charge circuit corresponding to each sampling window; For the first The rectified equivalent voltage represents the value within each sampling window; For the first The DC bus voltage represents the value within each sampling window; For the first The precharge current representative value within each sampling window; the above representative value is the average value, median value, or filtered value within the corresponding sampling window; For the first The known pre-charge impedance corresponding to each sampling window, where... =1 Given the first known pre-charge impedance, =2 The second known pre-charge impedance; This is the estimated equivalent impedance of the power grid obtained by subtracting the known pre-charge impedance from the total equivalent impedance of the pre-charge circuit. and After filtering and weighted fusion, the equivalent impedance of the power grid is obtained. .

[0037] according to With the present The difference and preset precharge current Determine the required precharge impedance For example, the initial calculated value can be obtained using the following formula, and upper and lower limits can be set based on the device rating and sampling error:

[0038] in, The required precharge impedance is calculated based on the current voltage state and the equivalent impedance of the power grid; This is the current rectified equivalent voltage; This is the current DC bus voltage; Preset precharge current indicates the target current or upper limit of current allowed to flow through the precharge branch during the precharge process; The equivalent impedance of the power grid obtained after fusion; This represents the equivalent voltage difference between the pre-charge rectifier side and the DC bus side. According to... The relationship between the first known precharge impedance and the second known precharge impedance is used to determine the target precharge impedance for subsequent precharges.

[0039] The voltage difference across each phase's QT is obtained in real time, and the secondary surge at the moment of QT turn-on is predicted based on the equivalent impedance of the main input path. For any phase, the following can be used:

[0040] in, This is the predicted value of the secondary surge when the solid-state transition switch is turned on; The voltage difference across the solid-state transition switch; The equivalent impedance of the power grid; The on-resistance of the solid-state transition switch; The main input path impedance includes the equivalent impedance of the input wires, connection terminals, power factor correction module input inductance, and related connecting devices. In a three-phase power supply, the corresponding impedances can be calculated separately for each phase. The maximum value among them was determined as the secondary surge prediction value.

[0041] After QT is turned on, the voltage difference across each phase's main contact and the input current of each phase are monitored in real time. When the voltage difference across each phase's QT is lower than the preset voltage difference and the input current of each phase is lower than the preset closing current, KM is driven to close; if the conditions are not met, QT remains on and monitoring continues. After the auxiliary contact of KM confirms that KM has closed, KP is opened, thus exiting the pre-charge branch; subsequently, the corresponding QT is turned off during the zero-crossing window of the input current of each phase, completing the transition from the pre-charge branch, solid-state transition path to the mechanical main input path.

[0042] After the main input path is established, according to Determine the upper limit of the input current or the rate of change of input power for the power factor correction module. When A lower value indicates a stronger power grid, allowing for a higher current limit or faster power ramp-up; when... When the current increases, the upper limit of the current or the rate of change of power is correspondingly reduced. In this embodiment, a pre-established... A piecewise linear table relating to allowable input current and allowable power slope is generated and interpolated during operation; simultaneously, based on... Current bus voltage and the undervoltage threshold of the subsequent DC / DC converter Determine the DC bus energy storage value :

[0043] in, The DC bus energy storage value represents the DC bus voltage. Descending to The amount of stored energy that can be released during this period; The equivalent capacitance of the DC bus after fusion; This is the DC bus voltage; This is the undervoltage threshold for the subsequent DC-DC converter module. When Not higher than At that time, the DC bus energy storage value The value is determined to be zero.

[0044] After residual voltage identification is completed, KP is closed, R1 and R2 are connected in series and sampled at W1; after the switching condition is met, QR is closed, R1 is used and sampled at W2; after parameter identification and secondary surge judgment are completed, QT is turned on phase by phase; after the mechanical closing condition is met, KM is closed, KP is opened after confirming the auxiliary contact, and QT is turned off when the input current crosses zero; finally, according to... The input power of the power factor correction module and the load power of the subsequent DC-DC converter module are gradually opened up along with the DC bus energy storage value. For example, for a three-phase 380V power supply with a rated power greater than 10kW, the power factor correction module can adopt a Vienna topology, and the target voltage of the DC bus can be set according to the requirements of the subsequent stage; R1, R2, sampling window length, preset switching voltage, preset switching current, surge limit, QT conduction voltage difference, and KM closing voltage difference can all be calibrated by the rated input voltage, bus capacitance range, pre-charge resistor pulse power, QT surge rating, and KM contact level.

[0045] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles of the embodiments, their practical application, or technical improvements in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A high-power power supply coordinated control method based on surge suppression and grid compatibility, characterized in that, A pre-charge branch and a main power supply path are connected in parallel between the AC input terminal and the DC bus. The main power supply path includes a main input path and a power factor correction module arranged sequentially. The main input path includes a mechanical main contactor and a solid-state transition switch connected in parallel with the mechanical main contactor. A subsequent DC-DC converter module is arranged on the output side of the DC bus. The method includes: The pre-charge branch is sequentially controlled to pre-charge the DC bus with a first known pre-charge impedance and a second known pre-charge impedance, and sampling data corresponding to the two known pre-charge impedances are obtained respectively. The equivalent capacitance of the DC bus and the equivalent impedance of the power grid are determined based on the two sets of sampling data. The target pre-charge impedance for subsequent pre-charge is determined based on the equivalent capacitance of the DC bus and the equivalent impedance of the power grid; the voltage difference across the solid-state transition switch is obtained, and the secondary surge prediction value is determined based on the voltage difference and the equivalent impedance of the main input path; when the secondary surge prediction value is greater than the preset surge limit, pre-charge continues and the secondary surge prediction value is updated; when the secondary surge prediction value is not greater than the preset surge limit, the solid-state transition switch is turned on. After the solid-state transition switch is turned on, the voltage difference across the mechanical main contactor is monitored; when the voltage difference across the mechanical main contactor meets the preset closing condition, the mechanical main contactor is closed, the pre-charge branch is disconnected, and the solid-state transition switch is turned off during the zero-crossing window of the input current to establish the main input path. The input current or input power change rate of the power factor correction module is limited according to the equivalent impedance of the power grid. The DC bus energy storage value is determined according to the equivalent capacitance of the DC bus and the current DC bus voltage. The load power of the subsequent DC-DC converter module is limited according to the DC bus energy storage value and the allowable input power of the power factor correction module.

2. The high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 1, characterized in that, Before performing the pre-charge operation, the AC input voltage and the initial DC bus voltage are collected. Based on the AC input voltage, the effective value of the input voltage, the input frequency, and the zero-crossing time of the input are determined. Based on the ratio of the initial DC bus voltage to the pre-charge target voltage, the complete pre-charge process or the shortened pre-charge process is selected.

3. The high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 2, characterized in that, The precharge branch includes a precharge contactor, a precharge rectifier bridge, a first current-limiting resistor and a second current-limiting resistor connected in series, and an impedance switching switch connected in parallel with the second current-limiting resistor. The first known precharge impedance is formed by the first current-limiting resistor and the second current-limiting resistor connected in series when the precharge contactor is closed and the impedance switching switch is open. The second known precharge impedance is formed by the first current-limiting resistor retained after the impedance switching switch is closed to bypass the second current-limiting resistor. The pre-charge branch is controlled to pre-charge with the first known pre-charge impedance; when the DC bus voltage reaches the preset switching voltage or the pre-charge current drops to the preset switching current, the impedance switching switch is closed to switch to the second known pre-charge impedance; when neither the DC bus voltage nor the pre-charge current meets the corresponding switching conditions, the first known pre-charge impedance is maintained to continue pre-charging.

4. The high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 3, characterized in that, The two sets of sampling data are acquired in the first sampling window and the second sampling window, respectively, and both include pre-charge current, rectified equivalent voltage and DC bus voltage; the first sampling window is located in the stable stage of pre-charging using the first known pre-charge impedance, and the second sampling window is located in the stable stage after switching to the second known pre-charge impedance.

5. A high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 4, characterized in that, The first DC bus equivalent capacitance estimate is determined based on the relationship between the cumulative amount of pre-charge current and the change in DC bus voltage within the first sampling window. The second DC bus equivalent capacitance estimate is determined based on the relationship between the cumulative amount of pre-charge current and the change in DC bus voltage within the second sampling window. The first DC bus equivalent capacitance estimate and the second DC bus equivalent capacitance estimate are then fused together to obtain the DC bus equivalent capacitance. Based on the relationship between the rectified equivalent voltage, DC bus voltage, and pre-charge current within each sampling window, the corresponding total equivalent impedance of the pre-charge circuit is determined. The corresponding known pre-charge impedance is subtracted from the total equivalent impedance of each pre-charge circuit to obtain the first grid equivalent impedance estimate and the second grid equivalent impedance estimate. The first grid equivalent impedance estimate and the second grid equivalent impedance estimate are then fused to obtain the grid equivalent impedance.

6. The high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 5, characterized in that, The required pre-charge impedance is determined based on the difference between the rectified equivalent voltage and the current DC bus voltage, the grid equivalent impedance, and the preset pre-charge current. When the required pre-charge impedance is not greater than the second known pre-charge impedance, the second known pre-charge impedance is determined as the target pre-charge impedance. When the required pre-charge impedance is greater than the second known pre-charge impedance, the first known pre-charge impedance is determined as the target pre-charge impedance.

7. A high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 6, characterized in that, The secondary surge prediction value is the ratio of the voltage difference across the solid-state transition switch to the equivalent impedance of the main input path. The equivalent impedance of the main input path includes the equivalent impedance of the power grid, the on-resistance of the solid-state transition switch, and the impedance of the main input path. The conduction conditions of the solid-state transition switch also include: the current DC bus voltage reaches a preset proportion of the rectified peak value, and the current pre-charge current is lower than the preset transition current.

8. The high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 7, characterized in that, The solid-state transition switch includes bidirectional power switches connected in parallel with each phase contact of the mechanical main contactor; the corresponding bidirectional power switches are turned on according to the zero-crossing moment of each phase input, and the power factor correction module is controlled to operate with a preset transition current; when the voltage across each phase bidirectional power switch is lower than the preset voltage difference and the input current of each phase is lower than the preset closing current, the mechanical main contactor is closed; after confirming the closure of the mechanical main contactor according to the auxiliary contacts of the mechanical main contactor, the pre-charge contactor in the pre-charge branch is disconnected, and the corresponding bidirectional power switches are turned off during the zero-crossing window of each phase input current.

9. A high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 8, characterized in that, The upper limit of the input current or the rate of change of the input power of the power factor correction module is determined based on the equivalent impedance of the power grid, and the upper limit of the input current or the rate of change of the input power decreases as the equivalent impedance of the power grid increases.

10. A high-power power supply coordinated control method based on surge suppression and grid compatibility according to claim 9, characterized in that, The DC bus energy storage value is determined based on the DC bus equivalent capacitance, the current DC bus voltage, and the undervoltage threshold of the downstream DC-DC converter module. The bus support power is determined based on the DC bus energy storage value and the preset release time. The allowable load power of the downstream stage is determined based on the allowable input power of the power factor correction module and the bus support power; when the load request power is not greater than the allowable load power of the downstream stage, the downstream DC-DC converter module is controlled according to the load request power; when the load request power is greater than the allowable load power of the downstream stage, the load power of the downstream DC-DC converter module is limited to the allowable load power of the downstream stage.