Active discharge control method, motor controller and storage medium

Abstract

The application provides an active discharge control method, a motor controller and a storage medium, and relates to the technical field of vehicle control. The method comprises the following steps: in the control power module, the non-target power tube on the bridge arm where the target power tube is located is turned on to provide a discharge current path; a first gate voltage is applied to the target power tube for a first time length in a current period to control the target power tube to work in a linear region; a first bus voltage corresponding to the power module at present is obtained, and whether the preset discharge termination condition is met is judged according to the first bus voltage; if the preset discharge termination condition is not met, a second gate voltage is applied to the target power tube for a first time length in a next period at intervals of a second time length; the second gate voltage is determined according to the actual consumed energy in the current period and the target consumed energy in the next period, adaptive control of the gate voltage of the target power tube is realized, the problem that the discharge fails due to the low gate voltage is avoided, and the reliability of the active discharge is ensured.

Description

Technical Field

[0001] This application relates to the field of vehicle control technology, and in particular to an active discharge control method, a motor controller, and a storage medium. Background Technology

[0002] The DC bus capacitor of the high-voltage drive system of an electric vehicle stores a large amount of electrical energy. When the vehicle is involved in a collision or an emergency power outage occurs, in order to ensure the safety of personnel, the voltage of the DC bus capacitor needs to be reduced to below the safe voltage within a specified time. This process is called active discharge.

[0003] In related technologies, active discharge can be achieved by controlling the power module to operate in the linear region. Specifically, the power module includes multiple bridge arms. By controlling one of the upper and lower power transistors of at least one bridge arm to be turned on, the other power transistor enters the linear region to consume the energy of the DC bus capacitor.

[0004] However, since a certain gate voltage needs to be applied to control the power transistor to enter the linear region, but the gate voltage threshold of the power transistor is affected by many factors such as temperature drift, individual differences, and lifetime drift, when the applied gate voltage is lower than the gate voltage threshold, the power transistor cannot enter the linear region, resulting in discharge failure and low reliability. Summary of the Invention

[0005] This application provides an active discharge control method, a motor controller, and a storage medium to improve the reliability of active discharge.

[0006] In a first aspect, embodiments of this application provide an active discharge control method, including: In the control power module, the non-target power transistors on the bridge arm where the target power transistor is located are in the on state to provide a discharge current path; In the current cycle, a first gate voltage is applied to the target power transistor and maintained for a first duration to control the target power transistor to operate in the linear region; Obtain the current first bus voltage corresponding to the power module, and determine whether the preset discharge termination condition is met based on the first bus voltage; If the preset discharge termination condition is not met, a second gate voltage is applied to the target power transistor in the next cycle after a second time interval and continues for a first time; wherein the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0007] Based on the above technical content, this application embodiment provides a current path for active discharge by keeping the non-target power transistor in the bridge arm in a conducting state. Simultaneously, since the non-target power transistor operates in the saturation region while remaining in a conducting state, its on-resistance is very small, allowing most of the bus voltage to be applied across the current path of the target power transistor, thereby improving discharge efficiency. Furthermore, the target power transistor is controlled to conduct and discharge only during the first duration of each cycle and is in a turned-off state during the second duration. Therefore, this application employs a pulsed intermittent discharge method rather than continuous discharge, ensuring that the target power transistor has cooling time in each cycle, and its junction temperature decreases during the second duration. This effectively avoids the risk of overheating damage caused by the continuous accumulation of junction temperature due to continuous energy consumption, ensuring device safety. In addition, the second gate voltage of the next cycle is dynamically determined based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle. The actual energy consumption reflects the actual control effect of the first gate voltage corresponding to the current cycle, while the target energy consumption of the next cycle reflects the energy consumption expected to meet the discharge requirements in the next cycle. Therefore, the actual energy consumed in the current cycle and the target energy consumed in the next cycle are used together as the basis for determining the second gate voltage, allowing the second gate voltage to be dynamically corrected based on the actual discharge effect of the previous cycle. When the target energy consumed in the next cycle is higher than the actual energy consumed in the current cycle, the second gate voltage for the next cycle is appropriately increased based on the first gate voltage corresponding to the current cycle; when the target energy consumed in the next cycle is lower than the actual energy consumed in the current cycle, the second gate voltage for the next cycle is appropriately decreased based on the first gate voltage corresponding to the current cycle. This ensures that when the corresponding second gate voltage is applied to the target power transistor in the next cycle, the actual energy consumed can reach the target energy, effectively avoiding the problem of discharge failure due to low gate voltage and ensuring the reliability of active discharge. In addition, this embodiment achieves closed-loop regulation of the gate voltage based on energy feedback, realizing adaptive adjustment of the gate voltage of the target power transistor without relying on the relevant parameters of the target power transistor. Therefore, it can eliminate the influence of factors such as individual differences and lifetime deviation of power transistors, further improving the reliability of active discharge.

[0008] In one possible implementation, the preset discharge termination condition includes a preset voltage threshold. Before applying the second gate voltage to the target power transistor in the next cycle, the following is also included: Based on the first bus voltage and the preset voltage threshold, the target energy consumption for the next cycle is determined; Obtain the second bus voltage of the power module before applying the first gate voltage to the target power transistor in the current cycle, and obtain the actual energy consumed in the current cycle based on the first bus voltage and the second bus voltage. The second gate voltage is determined based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle.

[0009] In this embodiment, since the first bus voltage is the bus voltage at the end of the first duration of the current cycle, and the second bus voltage is the bus voltage before the start of the current cycle, the actual energy consumption of the current cycle can be accurately determined based on the first and second bus voltages, unaffected by individual differences in power transistors or gate voltage offsets. Simultaneously, the target energy consumption for the next cycle is determined based on the first bus voltage and a preset voltage threshold. That is, the target energy consumption is an energy index that needs to be consumed, redistributed based on the actual bus voltage after the current cycle's discharge ends. This avoids excessive or insufficient energy consumption in the early stages, allowing the target energy consumption for the next cycle to be adaptively adjusted according to the discharge progress, providing a benchmark for determining the second gate voltage of the next cycle.

[0010] In one possible implementation, the target energy consumption for the next cycle is determined based on the first bus voltage and a preset voltage threshold, including: The energy to be released is obtained based on the first bus voltage and the preset voltage threshold. Obtain the end time of the current cycle discharge, and based on the end time of the current cycle discharge and the preset discharge duration, obtain the remaining discharge duration; The target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge duration.

[0011] Here, the target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge time. This takes into account both the remaining energy that the DC bus capacitor needs to consume and the time limit requirements for active discharge. Under the dual constraints of voltage and time, the target energy consumption for the next cycle can be redistributed. This effectively avoids the problem of the discharge time exceeding the preset discharge time due to relying solely on the remaining energy that needs to be consumed, and also avoids the situation where the bus voltage exceeds the preset voltage threshold after the discharge process ends due to relying solely on the remaining discharge time. Thus, precise constraints on the next cycle are achieved in both the time and energy dimensions.

[0012] In one possible implementation, the target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge duration, including: The remaining number of discharges is obtained based on the remaining discharge duration, the first duration, and the second duration. Based on the energy to be released and the remaining number of discharges, the initial energy consumed in the next cycle is obtained; Obtain the upper limit of energy, and based on the upper limit of energy, adjust the initial energy consumption to obtain the corresponding target energy consumption.

[0013] Based on the above technical content, the initial energy consumption for the next cycle is obtained based on the energy to be released and the remaining discharge cycles, thus evenly distributing the energy to be released to each remaining discharge cycle. Furthermore, the initial energy consumption is adjusted based on an upper energy limit to prevent the target power transistor from overheating and being damaged due to excessively high initial energy consumption, thereby ensuring device protection while maintaining overall discharge progress.

[0014] In one possible implementation, the second gate voltage is determined based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle, including: Based on the actual energy consumption in the current cycle and the target energy consumption in the next cycle, the difference between the target energy consumption and the actual energy consumption is obtained. The second gate voltage is determined based on the difference.

[0015] This application embodiment calculates the difference between the actual energy consumed in the current cycle and the target energy consumed in the next cycle. This difference can characterize the energy deviation that needs to be compensated in the next cycle compared to the current cycle. Based on this difference, the second gate voltage corresponding to the next cycle is determined, so that the adjustment of the gate voltage corresponds to the energy deviation, thereby realizing the drive adjustment of the gate voltage with energy as the closed loop control.

[0016] In one possible implementation, the second gate voltage is determined based on the difference, including: Obtain the preset proportional coefficient and integral coefficient; The proportional control quantity is obtained based on the proportional coefficient and the difference. Based on the first and second durations, the difference is integrated to obtain the corresponding integral value, and the integral control quantity is determined according to the integral value and the integral coefficient. The second gate voltage is obtained based on the proportional control quantity and the integral control quantity.

[0017] Based on the above technical content, the second gate voltage is determined jointly by the proportional control quantity and the integral control quantity. Since the proportional control quantity can respond quickly to the current difference, it ensures the response speed of the gate voltage regulation. The integral control quantity, obtained by integrating the difference, can smooth high-frequency fluctuations in the difference, avoiding frequent gate voltage jumps caused by bus voltage sampling noise or instantaneous current fluctuations, thereby suppressing switch oscillations and reducing the risk of latch-up, ensuring the stability of gate voltage regulation. Therefore, through the cooperation of the above proportional and integral control, both the response speed of gate voltage regulation in each cycle is guaranteed, and the stability of the gate voltage is improved, achieving precise gate voltage regulation.

[0018] In one possible implementation, before applying the first gate voltage to the target power transistor in the current cycle, the following is also included: If the current cycle is the initial cycle, the junction temperature of the target power transistor is obtained, and the first gate voltage is determined based on the junction temperature; If the current cycle is not the initial cycle, the first gate voltage is determined based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

[0019] In this embodiment, for the initial cycle, since no effective energy feedback information has been generated, and considering that junction temperature changes will alter the linear conduction characteristics of the power transistor, the first gate voltage is obtained based on the junction temperature. This avoids the problem of excessive initial discharge power consumption causing device burnout under different temperature conditions of the power transistor when the gate voltage is fixed, as well as the problem of discharge failure due to excessively low gate voltage. In subsequent cycles, the control logic switches to an energy closed-loop system. Based on the actual energy consumption of the previous cycle and the target energy consumption of the current cycle, the first gate voltage is dynamically determined. Therefore, even if discharge fails in the initial cycle due to a low gate voltage preventing the target power transistor from being turned on, dynamic adjustment of the gate voltage can still be performed in subsequent cycles, improving the reliability of active discharge.

[0020] In one possible implementation, determining the first gate voltage based on the junction temperature includes: Obtain the preset mapping relationship between junction temperature and voltage offset, as well as the preset gate voltage threshold. Based on the mapping relationship between junction temperature and voltage offset, the voltage offset corresponding to the current junction temperature is obtained; The first gate voltage corresponding to the initial cycle is determined based on the voltage offset corresponding to the current junction temperature and the gate voltage threshold.

[0021] In this embodiment, based on a preset mapping relationship between junction temperature and voltage offset, the voltage offset corresponding to the current junction temperature is obtained. The gate voltage threshold is corrected based on the voltage offset, which can effectively eliminate the influence of gate voltage threshold offset caused by junction temperature change. This prevents the first gate voltage of the initial cycle from being too low to control the target power transistor to enter the linear region, resulting in active discharge failure. It also effectively prevents the first gate voltage from being too high, resulting in a large current being generated by the shoot-through of the bridge arm where the target power transistor is located, causing the target power transistor to overheat and burn out.

[0022] Secondly, embodiments of this application provide an active discharge control device, comprising: The control module is used to control the non-target power transistors on the bridge arm where the target power transistor is located in the power module to be in the on state, so as to provide a discharge current path; The control module is also used to apply a first gate voltage to the target power transistor in the current cycle and maintain it for a first duration to control the target power transistor to operate in the linear region; The acquisition module acquires the current first bus voltage corresponding to the power module and determines whether the preset discharge termination condition is met based on the first bus voltage. The control module is also configured to, if it is determined that the preset discharge termination condition is not met, apply a second gate voltage to the target power transistor in the next cycle after a second time interval and continue for a first time interval; wherein the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0023] Thirdly, embodiments of this application provide a motor controller, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the computer program, it implements the active discharge control method as described in any of the first aspects.

[0024] Fourthly, embodiments of this application provide a vehicle including a motor controller as described in the third aspect.

[0025] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the active discharge control method as described in any of the first aspects.

[0026] It is understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0027] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the architecture of an electric drive system provided in an embodiment of this application; Figure 2 This is a schematic diagram of active discharge according to an embodiment of this application; Figure 3 This is a schematic flowchart of an active discharge control method provided in an embodiment of this application; Figure 4 This is a schematic diagram of pulsed intermittent discharge provided in an embodiment of this application; Figure 5 This is a flowchart illustrating an active discharge control method provided in another embodiment of this application; Figure 6 This is a schematic diagram of the structure of an active discharge control device provided in an embodiment of this application; Figure 7 This is a schematic diagram of the structure of a motor controller provided in one embodiment of this application. Detailed Implementation

[0030] The present application will be described more clearly below with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the function of the present application, but do not limit the present application in any way. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These all fall within the protection scope of the present application.

[0031] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0032] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0033] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0034] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0035] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0036] First, the terms used in the embodiments of this application will be explained: A power module is a voltage-controlled power semiconductor device with low on-resistance and high current handling capability, and is a core switching device for high-power power electronic conversion.

[0037] Active short circuit (ASC): Actively short-circuit the three-phase windings of the motor. It is often used for safety at high speeds and is usually achieved by turning on the upper or lower bridge arm of the power module.

[0038] Active discharge: In scenarios such as vehicle power failure or collision, the DC bus capacitor is discharged to reduce its voltage below the safe voltage.

[0039] Latch-up refers to the phenomenon where a power device enters a low-resistance, high-current, self-sustaining conduction state due to the accidental triggering of its internal parasitic structure (usually a parasitic thyristor, i.e., a pnpn four-layer structure), and cannot be turned off by conventional gate / base control signals. This is a destructive or functional failure type of reliability problem, and once it occurs, it often leads to device overheating and permanent damage.

[0040] Junction temperature: refers to the actual operating temperature of a semiconductor chip in an electronic device, which is usually higher than the temperature of the package casing.

[0041] In related technologies, when using a power module for active discharge, one of the upper and lower power transistors in at least one bridge arm can be fully turned on, while the other power transistor operates in the linear region, dissipating energy on the power module. This solution enables active discharge under ASC conditions without the need for additional power transistors and discharge resistors.

[0042] Controlling a power transistor to enter the linear region requires applying a certain gate voltage. Normally, to prevent excessive gate voltage from burning out the target power transistor operating in the linear region due to excessive current, or insufficient gate voltage from failing to discharge, the gate voltage threshold of the target power transistor needs to be detected while another power transistor is off. This is to control the target power transistor to enter the linear region. However, in actual operating conditions, emergencies such as bus overvoltage require entering ASC (Automatic Safety State) within a few microseconds, leaving insufficient time to detect the gate voltage threshold. Furthermore, under ASC conditions, the gate voltage threshold of the target power transistor cannot be detected because the other power transistor is on. This can lead to an output gate voltage that is too low to control the target power transistor into the linear region, resulting in active discharge failure and low reliability.

[0043] In addition, related technologies usually require specially designed circuits or dedicated driver chips to control the gate voltage of the power transistor so that it operates in the linear region, which is complex in structure and expensive.

[0044] The applicant has discovered that, in order to improve the reliability of active discharge, it is necessary to consider a new method for active discharge.

[0045] Based on the idea of ​​improving the reliability of active discharge by gradually adjusting the gate voltage to achieve successful discharge when the gate voltage is too low and discharge failure occurs, the embodiments of this application divide the discharge process into multiple cycles. The second gate voltage of the next cycle is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle, so that the second gate voltage can be dynamically corrected according to the actual discharge effect of the previous cycle. When the target energy consumed in the next cycle is higher than the actual energy consumed in the current cycle, the first gate voltage corresponding to the current cycle is appropriately increased to obtain the second gate voltage of the next cycle; when the target energy consumed in the next cycle is lower than the actual energy consumed in the current cycle, the first gate voltage corresponding to the current cycle is appropriately decreased to obtain the second gate voltage of the next cycle. This ensures that when the corresponding second gate voltage is applied to the target power transistor in the next cycle, the actual energy consumed can reach the target energy consumed, effectively avoiding the problem of discharge failure due to low gate voltage and ensuring the reliability of active discharge. In addition, this embodiment achieves gate voltage closed-loop regulation based on energy feedback, realizing adaptive adjustment of the gate voltage of the target power transistor without relying on the relevant parameters of the target power transistor. Therefore, it can eliminate the influence of factors such as individual differences and lifetime offset of the power transistor, and further improve the reliability of active discharge.

[0046] It should be noted that the active discharge control method of this application can achieve active discharge under ASC operating conditions as well as under non-ASC operating conditions.

[0047] First refer to Figure 1 , Figure 1 This is a schematic diagram of the architecture of an electric drive system provided in an embodiment of this application. The electric drive system includes a power battery, a DC bus capacitor, and a power module.

[0048] The two ends of the power battery are connected to the positive terminal and the negative terminal of the high-voltage bus, respectively, and the DC bus capacitor is connected in parallel with the power battery.

[0049] The DC side of the power module is connected to both the positive and negative terminals of the high-voltage bus, and its AC output terminal is connected to the drive motor. Figure 1 The drive motor is not shown in the diagram. The power module integrates multiple bridge arms. Each bridge arm consists of an upper power transistor and a lower power transistor connected in series. During active discharge, the DC bus capacitor can be actively discharged by controlling one of the upper and lower power transistors in the same bridge arm to be in the on state while the other power transistor operates in the linear region. For details, please refer to [reference needed]. Figure 2 As shown, Figure 2This is a schematic diagram of an active discharge situation according to an embodiment of this application. At this time, the upper power transistor is working in the linear region and can be equivalent to a variable resistor whose resistance is controlled by the gate voltage. The lower power transistor is in a fully conducting state and can be equivalent to a closed switch.

[0050] in addition, Figure 1 The motor controller is not shown. The motor controller can be connected to the gate of each power transistor in the power module to apply a gate voltage to the power transistor to control its operating state.

[0051] The following is combined Figure 1 Application scenarios, refer to Figures 3-5 This application describes an active discharge control method provided according to exemplary embodiments thereof. It should be noted that the above application scenarios are shown only to facilitate understanding of the spirit and principles of this application, and the embodiments of this application are not limited in any way. Rather, the embodiments of this application can be applied to any applicable scenario.

[0052] It should be noted that the embodiments of this application can be applied to motor controllers, that is, the active discharge control method provided by the exemplary embodiments of this application can be executed on the motor controller.

[0053] Furthermore, the active discharge control method provided according to the exemplary embodiments of this application can be executed on the same device or on different devices.

[0054] refer to Figure 3 , Figure 3 This is a schematic flowchart of an active discharge control method provided in an embodiment of this application. Figure 3 As shown, the method in the embodiments of this application may include: Step 301: In the control power module, the non-target power transistor on the bridge arm where the target power transistor is located is in the on state to provide a discharge current path.

[0055] Since each bridge arm includes an upper power transistor and a lower power transistor, the target power transistor is one of the upper and lower power transistors, used to operate in the linear region during active discharge to consume energy. It should be noted that there can be one or more target power transistors. For example, the power module includes three bridge arms, and the upper power transistor of each bridge arm is the target power transistor. Multiple target power transistors can discharge simultaneously or in turn, or only the upper power transistor of one bridge arm can be used as the target power transistor.

[0056] The non-target power transistor is another power transistor on the same bridge arm as the target power transistor. For example, if the target power transistor is the upper power transistor, then the non-target power transistor is the lower power transistor.

[0057] Step 302: Apply a first gate voltage to the target power transistor in the current cycle and maintain it for a first duration to control the target power transistor to operate in the linear region.

[0058] The first gate voltage is the gate voltage value applied to the target power transistor in the current cycle. Optionally, the first gate voltage can be applied to the gate of the target power transistor via a drive circuit. Specifically, for the first cycle, the first gate voltage can be determined based on the junction temperature of the target power transistor; for cycles other than the first cycle, the first gate voltage can be determined based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

[0059] It should be noted that the gate voltage applied to the target power transistor determines its operating state. The target power transistor's operating state includes the cutoff region, linear region, and saturation region. When the gate voltage is less than the gate voltage threshold, the target power transistor operates in the cutoff region, where it is turned off and consumes no energy. When the gate voltage is greater than the turn-on voltage threshold, the target power transistor is in the saturation region, fully conducting, but its resistance is extremely low, resulting in a very small voltage drop and minimal energy consumption. When the gate voltage is slightly higher than the gate voltage threshold but less than the turn-on voltage threshold, the target power transistor conducts and operates in the linear region. In this region, the target power transistor can be equivalent to a variable resistor whose resistance is controlled by the gate voltage. A certain current flows through it, and there is a relatively high voltage drop across the current path, thus achieving energy consumption. In this embodiment, the goal of applying the first gate voltage to the target power transistor during the first time period is to control the target power transistor to operate in the linear region, thereby consuming energy and achieving discharge.

[0060] Step 303: Obtain the current first bus voltage corresponding to the power module, and determine whether the preset discharge termination condition is met based on the first bus voltage.

[0061] The first bus voltage is the voltage sampled value across the DC bus capacitor after the first gate voltage is applied to the target power transistor in the current cycle and maintained for a first duration, i.e., after the current cycle has ended and the transistor has discharged. Optionally, the first bus voltage can be obtained through a voltage sampling circuit.

[0062] The preset discharge termination condition is the criterion for determining the end of active discharge. Optionally, the preset discharge termination condition includes the bus voltage falling below a preset voltage threshold. The preset voltage threshold is typically a safety threshold of 60V.

[0063] After obtaining the first bus voltage, it can be compared with a preset voltage threshold. If the first bus voltage is greater than the preset voltage threshold, it is determined that the preset discharge termination condition is not met, and subsequent steps can continue; if the first bus voltage is less than the preset voltage threshold, it is determined that the preset discharge termination condition is met, and subsequent discharge is stopped, without needing to execute subsequent steps.

[0064] Step 304: If it is determined that the preset discharge termination condition is not met, then after a second time interval, a second gate voltage is applied to the target power transistor in the next cycle and continues for a first time; wherein, the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0065] Since the junction temperature of the target power transistor will gradually rise when it is consuming energy in the linear region, in order to avoid overheating damage, a pulsed intermittent discharge method can be used to control the target power transistor to discharge. That is, within one cycle, the target power transistor is controlled to alternately turn on and off.

[0066] A cycle may include a first duration and a second duration, where the first duration is the on-time of the target power transistor in each cycle, and the second duration is the off-time of the target power transistor in each cycle. During the second duration, since the target power transistor is off (operating in the cutoff region), it no longer consumes energy, and the junction temperature of the target power transistor is reduced. In one implementation scenario, to prevent heat accumulation, the second duration may be set to be more than five times the first duration.

[0067] For details, please refer to [link / reference]. Figure 4 As shown, Figure 4 This is a schematic diagram of pulsed intermittent discharge provided in an embodiment of this application. During the first duration Δt, a first gate voltage is applied to the target power transistor. At this time, the target power transistor operates in the linear region, consuming energy, and the system is in a discharge state, causing the junction temperature of the target power transistor to rise. When the duration of applying the first gate voltage to the target power transistor reaches the first duration Δt, the application of the first gate voltage to the target power transistor is stopped, causing the target power transistor to turn off and continue for a second duration t. interval During this period, the target power transistor is in the cutoff region and no longer consumes energy, so the system is in a stopped discharge state, and the junction temperature of the target power transistor will decrease. Then, the above process is repeated until the first bus voltage after discharge meets the preset discharge termination condition.

[0068] The second gate voltage is the gate voltage value applied to the target power transistor in the next cycle. Optionally, the second gate voltage can be determined based on the difference between the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0069] The actual energy consumed refers to the energy actually released by the DC bus capacitor during the current cycle, which can be calculated from the bus voltages before and after the start of the current cycle.

[0070] The target energy consumption is the energy value required to meet the discharge time limit requirement in the next discharge cycle. It can be calculated based on the bus voltage at the end of the current cycle (i.e., the first bus voltage), the preset voltage threshold, and the remaining discharge time.

[0071] After applying a second gate voltage to the target power transistor in the next cycle and maintaining it for a first duration, steps 303 to 304 are repeated until the first bus voltage meets the preset discharge termination condition, at which point the operation stops.

[0072] In this embodiment, by keeping the non-target power transistor in the bridge arm on, a current path is provided for active discharge. Simultaneously, since the non-target power transistor operates in the saturation region while on, its on-resistance is very small, allowing most of the bus voltage to be applied across the current path of the target power transistor, thereby improving discharge efficiency. Furthermore, the target power transistor is controlled to conduct and discharge only during the first duration of each cycle and is turned off during the second duration. Therefore, this application employs a pulsed intermittent discharge method rather than continuous discharge, ensuring that the target power transistor has cooling time in each cycle. Its junction temperature decreases during the second duration, effectively avoiding the risk of overheating damage caused by the continuous accumulation of junction temperature due to continuous energy consumption, thus ensuring device safety. Additionally, the second gate voltage for the next cycle is dynamically determined based on the actual energy consumption of the current cycle and the target energy consumption for the next cycle. The actual energy consumption reflects the actual control effect of the first gate voltage corresponding to the current cycle, while the target energy consumption for the next cycle reflects the energy consumption expected to meet the discharge requirements in the next cycle. Therefore, the actual energy consumed in the current cycle and the target energy consumed in the next cycle are used together as the basis for determining the second gate voltage, allowing the second gate voltage to be dynamically corrected based on the actual discharge effect of the previous cycle. When the target energy consumed in the next cycle is higher than the actual energy consumed in the current cycle, the second gate voltage for the next cycle is appropriately increased based on the first gate voltage corresponding to the current cycle; when the target energy consumed in the next cycle is lower than the actual energy consumed in the current cycle, the second gate voltage for the next cycle is appropriately decreased based on the first gate voltage corresponding to the current cycle. This ensures that when the corresponding second gate voltage is applied to the target power transistor in the next cycle, the actual energy consumed can reach the target energy, effectively avoiding the problem of discharge failure due to low gate voltage and ensuring the reliability of active discharge. In addition, this embodiment achieves closed-loop regulation of the gate voltage based on energy feedback, realizing adaptive adjustment of the gate voltage of the target power transistor without relying on the relevant parameters of the target power transistor. Therefore, it can eliminate the influence of factors such as individual differences and lifetime deviation of power transistors, further improving the reliability of active discharge.

[0073] In addition, when determining the second gate voltage based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle in this embodiment, it is also necessary to consider the operating condition of no energy feedback in the initial cycle, so as to output a gate voltage that is adapted to the junction temperature of the current target power transistor at the start of discharge, and avoid the problem of failure of start-up discharge or damage to the target power transistor caused by large current generated by bridge arm shoot-through. Figure 5This is a flowchart illustrating an active discharge control method provided in another embodiment of this application, as shown below. Figure 5 As shown, the method includes: Step 501: In the control power module, the non-target power transistor on the bridge arm where the target power transistor is located is in the on state to provide a discharge current path.

[0074] Here, for the implementation of step 501, please refer to [link / reference]. Figure 3 The relevant descriptions in the embodiments will not be repeated here.

[0075] Step 502: If the current cycle is the initial cycle, obtain the junction temperature of the target power transistor and determine the first gate voltage based on the junction temperature; if the current cycle is not the initial cycle, determine the first gate voltage based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

[0076] The initial cycle refers to the first cycle after the start of active discharge. For the initial cycle, since there is no actual energy consumed in the previous cycle, the first gate voltage corresponding to the initial cycle cannot be determined by the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

[0077] Since the only information available at this point related to the gate voltage is the junction temperature of the target power transistor (JPT), which refers to the actual operating temperature inside the JPT, the gate voltage threshold will drift with changes in the JPT's junction temperature. Typically, the gate voltage threshold exhibits a negative temperature coefficient; that is, as the junction temperature increases, the gate voltage threshold decreases, and vice versa. If the same gate voltage is applied to the target power transistor at different junction temperatures, the transistor's operating state may differ. For example, at a lower junction temperature, the gate voltage threshold increases, and the gate voltage that would normally allow the JPT to enter the linear region may be lower than the increased threshold, thus insufficient to bring it into the linear region. Conversely, at a higher junction temperature, the gate voltage threshold decreases, and the gate voltage that would normally allow the JPT to enter the linear region may be much higher than the decreased threshold, causing the JPT to enter the saturation region with excessive current. Therefore, if the current cycle is the initial cycle, the corresponding first gate voltage can be determined based on the junction temperature.

[0078] In one implementation scenario, when a vehicle malfunctions, the power module can first be controlled to enter an ASC (Automatic Safety State) state, short-circuiting the three-phase windings of the motor to prevent back electromotive force from causing overvoltage surges to the DC bus. In ASC state, the non-target power transistors in the bridge arm containing the target power transistor are fully on to provide a discharge circuit. Subsequently, the junction temperature of the target power transistor is further acquired.

[0079] In one possible implementation, determining the first gate voltage based on the junction temperature includes: obtaining a preset mapping relationship between junction temperature and voltage offset, and a preset gate voltage threshold; obtaining the voltage offset corresponding to the current junction temperature based on the mapping relationship between junction temperature and voltage offset; and determining the first gate voltage corresponding to the initial period based on the voltage offset corresponding to the current junction temperature and the gate voltage threshold.

[0080] The gate voltage threshold is a reference value for the gate voltage at which the target power transistor can enter the linear region at a specific temperature, such as 25°C. This reference value can be obtained through pre-calibration.

[0081] The mapping relationship between junction temperature and voltage offset includes the voltage offset of the gate voltage threshold of the target power transistor at different junction temperatures, which can be obtained through pre-calibration. After obtaining the current junction temperature of the target power transistor, the voltage offset corresponding to the current junction temperature can be obtained from the mapping relationship between junction temperature and voltage offset by looking up a table. Then, this voltage offset is superimposed on the gate voltage threshold to obtain the first gate voltage corresponding to the initial cycle.

[0082] In this embodiment, based on a preset mapping relationship between junction temperature and voltage offset, the voltage offset corresponding to the current junction temperature is obtained. The gate voltage threshold is corrected based on the voltage offset, which can effectively eliminate the influence of gate voltage threshold offset caused by junction temperature change. This prevents the first gate voltage of the initial cycle from being too low to control the target power transistor to enter the linear region, resulting in active discharge failure. It also effectively prevents the first gate voltage from being too high, resulting in a large current being generated by the shoot-through of the bridge arm where the target power transistor is located, causing the target power transistor to overheat and burn out.

[0083] In another implementation scenario, if the current cycle is not the initial cycle, it indicates that one or more cycles have been completed. Therefore, the actual energy consumed in the previous cycle can be obtained, and the target energy consumed in the current cycle can also be determined. Based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle, the corresponding first gate voltage can be determined. The specific process can be referred to the determination process of the second gate voltage below. The details are as shown below and will not be described in detail here.

[0084] In this embodiment, for the initial cycle, since no effective energy feedback information has been generated, and considering that junction temperature changes will alter the linear conduction characteristics of the power transistor, the first gate voltage is obtained based on the junction temperature. This avoids the problem of excessive initial discharge power consumption causing device burnout under different temperature conditions of the power transistor when the gate voltage is fixed, as well as the problem of discharge failure due to excessively low gate voltage. In subsequent cycles, the control logic switches to an energy closed-loop system. Based on the actual energy consumption of the previous cycle and the target energy consumption of the current cycle, the first gate voltage is dynamically determined. Therefore, even if discharge fails in the initial cycle due to a low gate voltage preventing the target power transistor from being turned on, dynamic adjustment of the gate voltage can still be performed in subsequent cycles, improving the reliability of active discharge.

[0085] Step 503: Apply a first gate voltage to the target power transistor in the current cycle and maintain it for a first duration to control the target power transistor to operate in the linear region.

[0086] Step 504: Obtain the current first bus voltage corresponding to the power module, and determine whether the preset discharge termination condition is met based on the first bus voltage; the preset discharge termination condition includes a preset voltage threshold.

[0087] For the implementation of steps 503-504, please refer to [link / reference]. Figure 3 The relevant descriptions in the embodiments will not be repeated here.

[0088] Step 505: If it is determined that the preset discharge termination condition is not met, the target energy consumption for the next cycle is determined based on the first bus voltage and the preset voltage threshold; the second bus voltage corresponding to the power module is obtained before the first gate voltage is applied to the target power transistor in the current cycle, and the actual energy consumption for the current cycle is obtained based on the first bus voltage and the second bus voltage; the second gate voltage is determined based on the actual energy consumption for the current cycle and the target energy consumption for the next cycle.

[0089] The second bus voltage is the voltage sampled value across the DC bus capacitor before the first gate voltage is applied to the target power transistor in the current cycle. The first bus voltage is the voltage sampled value across the DC bus capacitor after the discharge in the current cycle. Therefore, the actual energy consumed in the current cycle can be obtained based on the first bus voltage and the second bus voltage.

[0090] One way to calculate the actual energy consumed in the current cycle is as follows: ΔP = 0.5 × C DC-Link (V pre-pulse ) 2 -0.5×C DC-Link (V after-pulse ) 2 Where ΔP represents the actual energy consumed in the current cycle, and CDC-Link This indicates the capacitance value of the DC bus capacitor, V. after-pulse V is the voltage of the first bus. pre-pulse This is the voltage of the second bus.

[0091] The target energy consumption is the energy value required to meet the discharge time limit requirement in the next discharge cycle. In one possible implementation, determining the target energy consumption for the next cycle based on the first bus voltage and a preset voltage threshold includes: obtaining the energy to be released based on the first bus voltage and the preset voltage threshold; obtaining the discharge end time of the current cycle and obtaining the remaining discharge time based on the discharge end time of the current cycle and a preset discharge duration; and determining the target energy consumption for the next cycle based on the energy to be released and the remaining discharge time.

[0092] The preset voltage threshold is the target voltage value for terminating active discharge. When the bus voltage is lower than this preset voltage threshold, the preset discharge termination condition is met, and discharge will no longer continue.

[0093] The energy to be released is the total energy required to reduce the current first bus voltage to a preset voltage threshold. It can be calculated by subtracting the residual energy corresponding to the preset voltage threshold from the energy stored in the current DC bus capacitor, as shown below: E release =0.5×C DC-Link (V after-pulse ) 2 -0.5×C DC-Link (V0) 2 Among them, E release Indicates energy to be released, C DC-Link This indicates the capacitance value of the DC bus capacitor, V. after-pulse V is the voltage of the first bus, and V0 is the preset voltage threshold.

[0094] The end time of the current cycle discharge is the end time of the first duration of the current cycle. The preset discharge duration is the pre-set total active discharge time limit, such as 3 seconds. The remaining discharge duration refers to the time between the end time of the current cycle discharge and the end time of the preset discharge duration.

[0095] In one possible implementation, the initial discharge time can be obtained. Based on the end time of the current cycle discharge and the initial discharge time, the consumed time can be calculated, which can be expressed as consumed time = end time of the current cycle discharge - initial discharge time. In this case, the remaining discharge time = preset discharge time - consumed time. Alternatively, the initial discharge time can be recorded as time zero, and the consumed time is then the end time of the current cycle discharge.

[0096] Here, the target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge time. This takes into account both the remaining energy that the DC bus capacitor needs to consume and the time limit requirements for active discharge. Under the dual constraints of voltage and time, the target energy consumption for the next cycle can be redistributed. This effectively avoids the problem of the discharge time exceeding the preset discharge time due to relying solely on the remaining energy that needs to be consumed, and also avoids the situation where the bus voltage exceeds the preset voltage threshold after the discharge process ends due to relying solely on the remaining discharge time. Thus, precise constraints on the next cycle are achieved in both the time and energy dimensions.

[0097] In one possible implementation, the target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge duration, including: obtaining the remaining discharge count based on the remaining discharge duration, the first duration, and the second duration; obtaining the initial energy consumption for the next cycle based on the energy to be released and the remaining discharge count; obtaining an energy upper limit value, and correcting the initial energy consumption based on the energy upper limit value to obtain the corresponding target energy consumption.

[0098] The remaining discharge count refers to the number of remaining executable discharge cycles from the end of the current cycle to the end of the preset discharge duration. It is calculated by dividing the remaining discharge duration by the duration of a single discharge cycle, as shown below: Times left =t left / (t interval +Δt) Among them, Times left t represents the remaining number of discharges. left t represents the remaining discharge duration. interval The second duration is Δt, and the first duration is t. interval +Δt represents the duration of a single cycle.

[0099] After obtaining the energy to be released and the remaining number of discharge cycles, the initial energy consumption for the next cycle can be determined based on both. In one possible implementation, from an energy allocation perspective, to ensure the discharge is completed within a preset discharge duration, one approach is to evenly distribute the energy to be released across each remaining cycle, ensuring each cycle undertakes the same energy consumption task. Therefore, the initial energy consumption can be obtained by dividing the energy to be released by the remaining number of discharge cycles; this value represents the average energy consumption required to meet the time limit.

[0100] Optionally, based on the initial energy consumption obtained above, to further prevent discharge timeout, a discharge coefficient can be introduced to correct the initial energy consumption. The calculation method for the corrected initial energy consumption can be as follows: P Initial =α×E release / Timesleft Among them, P Initial E is the initial energy consumed for the next cycle. release For energy to be released, Times left α represents the remaining number of discharges, and α is the discharge coefficient.

[0101] To prevent discharge timeout, the discharge coefficient α must be greater than or equal to 1. By introducing the discharge coefficient α, the initial energy consumption is appropriately increased based on the average energy consumption to compensate for possible deviations during the actual discharge process, thereby reducing the risk of discharge timeout and improving the reliability of active discharge within the preset discharge time.

[0102] It should be noted that the discharge coefficient α can be a pre-calibrated value or dynamically determined during the discharge process. For example, the actual energy released from the initial cycle to the current cycle can be obtained by subtracting the energy before the start of the initial cycle from the remaining energy after the current cycle. Then, based on the lower limit of energy and the number of discharges, the minimum energy required to be released from the initial cycle to the current cycle can be obtained. Next, the difference between the actual released energy and the minimum energy required to be released is obtained. The larger the difference, the smaller the actual released energy, and in this case, the discharge coefficient needs to be increased to increase the target energy consumption in the next cycle, thereby increasing the second gate voltage in the next cycle. Optionally, the discharge coefficient for the next cycle can be obtained based on a preset mapping relationship between the difference between the actual released energy from the initial cycle to the current cycle and the minimum energy required to be released and the discharge coefficient.

[0103] One method for calculating the lower energy limit is as follows: P min ×t0 / (t interval +Δt)≥0.5×C DC-Link ×(V bus ) 2 -0.5×C DC-Link (V0) 2 Among them, P min The lower limit of energy is t0, and the preset discharge duration is t0. interval The second duration is Δt, the first duration is Δt, and V is V. bus C is the bus voltage before the start of the initial cycle discharge. DC-Link This represents the capacitance value of the DC bus capacitor, where V0 is a preset voltage threshold. In one implementation scenario, because (V bus ) 2­ With (V0) 2 The order-of-magnitude difference is usually large, so 0.5 × C in the above formula can be ignored. DC-Link (V0) 2 .

[0104] The energy ceiling refers to the maximum energy that the target power transistor is allowed to consume within a single discharge cycle. In one possible implementation, the energy ceiling can be determined based on the junction temperature rise and thermal resistance of the target power transistor during a first duration. One calculation method is as follows: in, P max Δ represents the upper limit of energy. T j Z represents the junction temperature rise of the target power transistor during the first time period. th (Δt) represents the thermal resistance of the target power transistor, and Δt is the first duration.

[0105] In one implementation scenario, to prevent the target power transistor from overheating and being damaged due to excessive energy consumption exceeding the safe junction temperature limit within a single discharge cycle, the initial energy consumption needs to be corrected using an upper energy limit to obtain the target energy consumption. In one implementation scenario, if the initial energy consumption is less than or equal to the upper energy limit, this initial energy consumption can be used as the target energy consumption. In another implementation scenario, if the initial energy consumption is greater than the upper energy limit, this upper energy limit can be used as the target energy consumption.

[0106] Based on the above technical content, the initial energy consumption for the next cycle is obtained based on the energy to be released and the remaining discharge cycles, thus evenly distributing the energy to be released to each remaining discharge cycle. Furthermore, the initial energy consumption is adjusted based on an upper energy limit to prevent the target power transistor from overheating and being damaged due to excessively high initial energy consumption, thereby ensuring device protection while maintaining overall discharge progress.

[0107] In this embodiment, since the first bus voltage is the bus voltage at the end of the first duration of the current cycle, and the second bus voltage is the bus voltage before the start of the current cycle, the actual energy consumption of the current cycle can be accurately determined based on the first and second bus voltages, unaffected by individual differences in power transistors or gate voltage offsets. Simultaneously, the target energy consumption for the next cycle is determined based on the first bus voltage and a preset voltage threshold. That is, the target energy consumption is an energy index that needs to be consumed, redistributed based on the actual bus voltage after the current cycle's discharge ends. This avoids excessive or insufficient energy consumption in the early stages, allowing the target energy consumption for the next cycle to be adaptively adjusted according to the discharge progress, providing a benchmark for determining the second gate voltage of the next cycle.

[0108] In some embodiments, determining the second gate voltage based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle includes: obtaining the difference between the target energy consumed and the actual energy consumed based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle; and determining the second gate voltage based on the difference.

[0109] The difference between the target energy consumption for the next cycle and the actual energy consumption for the current cycle can be expressed as: P error =P target -ΔP Among them, P target Energy is consumed to achieve the target for the next cycle, ΔP is the actual energy consumed in the current cycle, and P error This is the difference between the two.

[0110] In one implementation scenario, if the difference P error If the value is greater than 0, it indicates that the target energy consumption for the next cycle is greater than the actual energy consumption for the current cycle. In this case, the voltage value needs to be further increased based on the first gate voltage corresponding to the current cycle. The larger the difference, the more voltage needs to be increased so that the actual energy consumption for the next cycle can reach the target energy consumption.

[0111] In another implementation scenario, if the difference P error If <0, it means that the target energy consumption in the next cycle is less than the actual energy consumption in the current cycle. In this case, the voltage value can be appropriately reduced based on the first gate voltage corresponding to the current cycle, so that the actual energy consumption in the next cycle can reach the target energy consumption without a high voltage.

[0112] In another implementation scenario, if the difference P error =0 indicates that the target energy consumption in the next cycle is the same as the actual energy consumption in the current cycle. In this case, there is no need to adjust the first gate voltage corresponding to the current cycle. Instead, the first gate voltage can be used as the second gate voltage corresponding to the next cycle to control the target power transistor. This will allow the actual energy consumption to reach the target energy consumption in the next cycle.

[0113] In one possible implementation, a proportional-integral (PI) algorithm, a proportional-integral-derivative (PID) algorithm, or other methods can be used to determine the second gate voltage corresponding to the next cycle based on the difference between the target energy consumption of the next cycle and the actual energy consumption of the current cycle, so as to achieve closed-loop regulation of the gate voltage.

[0114] Specifically, taking the PI algorithm as an example, the second gate voltage is determined based on the difference, including: obtaining a preset proportional coefficient and integral coefficient; obtaining a proportional control quantity based on the proportional coefficient and the difference; integrating the difference based on a first duration and a second duration to obtain the corresponding integral value, and determining an integral control quantity based on the integral value and the integral coefficient; and obtaining the second gate voltage based on the proportional control quantity and the integral control quantity.

[0115] One method for calculating the second gate voltage is as follows: in, Indicates the second gate voltage. This is the proportionality coefficient. The integral coefficient is... The difference between the target energy consumption for the next cycle and the actual energy consumption for the current cycle, where Δt is the first duration, t interval This is the second duration.

[0116] Based on the above technical content, the second gate voltage is determined jointly by the proportional control quantity and the integral control quantity. Since the proportional control quantity can respond quickly to the current difference, it ensures the response speed of the gate voltage regulation. The integral control quantity, obtained by integrating the difference, can smooth high-frequency fluctuations in the difference, avoiding frequent gate voltage jumps caused by bus voltage sampling noise or instantaneous current fluctuations, thereby suppressing switch oscillations and reducing the risk of latch-up, ensuring the stability of gate voltage regulation. Therefore, through the cooperation of the above proportional and integral control, both the response speed of gate voltage regulation in each cycle is guaranteed, and the stability of the gate voltage is improved, achieving precise gate voltage regulation.

[0117] This application embodiment calculates the difference between the actual energy consumed in the current cycle and the target energy consumed in the next cycle. This difference can characterize the energy deviation that needs to be compensated in the next cycle compared to the current cycle. Based on this difference, the second gate voltage corresponding to the next cycle is determined, so that the adjustment of the gate voltage corresponds to the energy deviation, thereby realizing the drive adjustment of the gate voltage with energy as the closed loop control.

[0118] Step 506: After a second time interval, apply a second gate voltage to the target power transistor in the next cycle and continue for a first time; wherein the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0119] For the implementation of step 506, please refer to [link / reference]. Figure 3 The relevant descriptions in the embodiments will not be repeated here.

[0120] In this embodiment, in the control power module, the non-target power transistors on the bridge arm containing the target power transistor are in a conducting state to provide a discharge current path. For the initial cycle, the junction temperature of the target power transistor is acquired, and the first gate voltage is determined based on the junction temperature. This effectively eliminates the influence of gate voltage threshold shift caused by junction temperature changes, effectively preventing the first gate voltage from being too low in the initial cycle, which would prevent the target power transistor from entering the linear region and causing active discharge failure. It also effectively prevents the first gate voltage from being too high, which would cause the bridge arm containing the target power transistor to shoot through and generate a large current, resulting in overheating and burnout of the target power transistor. For non-initial cycles, the first gate voltage is dynamically determined based on the actual energy consumption of the previous cycle and the target energy consumption of the current cycle. The first gate voltage is applied to the target power transistor in the current cycle and maintained for a first duration. After the first duration ends, the first bus voltage corresponding to the current power module is acquired. If the first bus voltage does not meet the preset discharge termination condition, the target energy consumption for the next cycle is further determined based on the first bus voltage and the preset voltage threshold. Furthermore, based on the first bus voltage and the second bus voltage before the start of the current cycle, the actual energy consumption for the current cycle is obtained. Then, based on the actual energy consumption for the current cycle and the target energy consumption for the next cycle, the second gate voltage for the next cycle is determined. Finally, after a second time interval, the second gate voltage is applied to the target power transistor in the next cycle and maintained for the first time interval. This process is repeated until the preset discharge termination condition is met. In this embodiment, the target power transistor is controlled to operate in the linear region for discharge during the first time interval and in the cutoff region during the second time interval to reduce the junction temperature. This pulsed intermittent discharge method effectively avoids the risk of overheating damage caused by the continuous accumulation and increase of junction temperature due to continuous energy consumption, ensuring device safety. In addition, this embodiment uses both the actual energy consumption of the current cycle and the target energy consumption for the next cycle as the basis for determining the second gate voltage, allowing the second gate voltage to be dynamically corrected based on the actual discharge effect of the previous cycle. If the target energy consumption in the next cycle is higher than the actual energy consumption in the current cycle, the second gate voltage for the next cycle is appropriately increased based on the first gate voltage corresponding to the current cycle. Conversely, if the target energy consumption in the next cycle is lower than the actual energy consumption in the current cycle, the second gate voltage for the next cycle is appropriately decreased based on the first gate voltage corresponding to the current cycle. This ensures that when the corresponding second gate voltage is applied to the target power transistor in the next cycle, the actual energy consumption reaches the target energy consumption, effectively avoiding discharge failure due to low gate voltage and ensuring the reliability of active discharge. Furthermore, this embodiment uses energy feedback to achieve closed-loop gate voltage regulation, realizing adaptive adjustment of the target power transistor's gate voltage without relying on the target power transistor's parameters. Therefore, it can eliminate the influence of individual differences and lifetime deviations of power transistors, further improving the reliability of active discharge.

[0121] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0122] Figure 6 This is a schematic diagram of the structure of an active discharge control device provided in an embodiment of this application. Figure 6 As shown, the active discharge control device provided in this embodiment may include a control module 601 and an acquisition module 602.

[0123] Among them, the control module 601 is used to control the non-target power transistor on the bridge arm where the target power transistor is located in the power module to be in the on state so as to provide a discharge current path; The control module 601 is also used to apply a first gate voltage to the target power transistor in the current cycle and continue for a first duration to control the target power transistor to operate in the linear region; The acquisition module 602 acquires the current first bus voltage corresponding to the power module, and determines whether the preset discharge termination condition is met based on the first bus voltage. The control module 601 is further configured to, if it is determined that the preset discharge termination condition is not met, apply a second gate voltage to the target power transistor in the next cycle after a second time interval and continue for a first time interval; wherein the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

[0124] In one possible implementation, the preset discharge termination condition includes a preset voltage threshold. The active discharge control device also includes a processing module 603, which is used for: Based on the first bus voltage and the preset voltage threshold, the target energy consumption for the next cycle is determined; Obtain the second bus voltage of the power module before applying the first gate voltage to the target power transistor in the current cycle, and obtain the actual energy consumed in the current cycle based on the first bus voltage and the second bus voltage. The second gate voltage is determined based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle.

[0125] In one possible implementation, processing module 603 is specifically used for: The energy to be released is obtained based on the first bus voltage and the preset voltage threshold. Obtain the end time of the current cycle discharge, and based on the end time of the current cycle discharge and the preset discharge duration, obtain the remaining discharge duration; The target energy consumption for the next cycle is determined based on the energy to be released and the remaining discharge duration.

[0126] In one possible implementation, processing module 603 is specifically used for: The remaining number of discharges is obtained based on the remaining discharge duration, the first duration, and the second duration. Based on the energy to be released and the remaining number of discharges, the initial energy consumed in the next cycle is obtained; Obtain the upper limit of energy, and based on the upper limit of energy, adjust the initial energy consumption to obtain the corresponding target energy consumption.

[0127] In one possible implementation, processing module 603 is specifically used for: Based on the actual energy consumption in the current cycle and the target energy consumption in the next cycle, the difference between the target energy consumption and the actual energy consumption is obtained. The second gate voltage is determined based on the difference.

[0128] In one possible implementation, processing module 603 is specifically used for: Obtain the preset proportional coefficient and integral coefficient; The proportional control quantity is obtained based on the proportional coefficient and the difference. Based on the first and second durations, the difference is integrated to obtain the corresponding integral value, and the integral control quantity is determined according to the integral value and the integral coefficient. The second gate voltage is obtained based on the proportional control quantity and the integral control quantity.

[0129] In one possible implementation, processing module 603 is further configured to: If the current cycle is the initial cycle, the junction temperature of the target power transistor is obtained, and the first gate voltage is determined based on the junction temperature; If the current cycle is not the initial cycle, the first gate voltage is determined based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

[0130] In one possible implementation, processing module 603 is specifically used for: Obtain the preset mapping relationship between junction temperature and voltage offset, as well as the preset gate voltage threshold. Based on the mapping relationship between junction temperature and voltage offset, the voltage offset corresponding to the current junction temperature is obtained; The first gate voltage corresponding to the initial cycle is determined based on the voltage offset corresponding to the current junction temperature and the gate voltage threshold.

[0131] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.

[0132] Figure 7 This is a schematic diagram of the structure of a motor controller provided in one embodiment of this application. Figure 7 As shown, the motor controller 700 of this embodiment includes a processor 710 and a memory 720, wherein the memory 720 stores a computer program 721 that can run on the processor 710. When the processor 710 executes the computer program 721, it implements the steps in any of the above method embodiments, for example... Figure 3 Steps 301 to 303 are shown. Alternatively, when processor 710 executes computer program 721, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 6 The functions of modules 601 to 603 are shown.

[0133] For example, computer program 721 may be divided into one or more modules / units, one or more of which are stored in memory 720 and executed by processor 710 to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of computer program 721 in motor controller 700.

[0134] Those skilled in the art will understand that Figure 7 This is merely an example of a motor controller and does not constitute a limitation on the motor controller. It may include more or fewer components than shown, or combine certain components, or different components, such as input / output devices, network access devices, buses, etc.

[0135] The processor 710 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0136] The memory 720 can be an internal storage unit of the motor controller, such as the motor controller's hard drive or memory, or an external storage device of the motor controller, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. The memory 720 can also include both internal and external storage units of the motor controller. The memory 720 is used to store computer programs and other programs and data required by the motor controller. The memory 720 can also be used to temporarily store data that has been output or will be output.

[0137] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0138] One embodiment of this application also provides a vehicle including the motor controller described above.

[0139] An embodiment of this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described active discharge control method.

[0140] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0141] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0142] In the embodiments provided in this application, it should be understood that the disclosed device / motor controller and method can be implemented in other ways. For example, the device / motor controller embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0143] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0144] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0145] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0146] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. An active discharge control method, characterized in that, include: In the control power module, the non-target power transistors on the bridge arm where the target power transistor is located are in the on state to provide a discharge current path; A first gate voltage is applied to the target power transistor in the current cycle and maintained for a first duration to control the target power transistor to operate in the linear region; Obtain the first bus voltage corresponding to the power module, and determine whether the preset discharge termination condition is met based on the first bus voltage; If it is determined that the preset discharge termination condition is not met, then after a second time interval, a second gate voltage is applied to the target power transistor in the next cycle and continues for the first time interval; wherein, the second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

2. The active discharge control method according to claim 1, characterized in that, The preset discharge termination condition includes a preset voltage threshold. Before applying the second gate voltage to the target power transistor in the next cycle, the method further includes: Based on the first bus voltage and the preset voltage threshold, the target energy consumption for the next cycle is determined; The second bus voltage of the power module is obtained before the first gate voltage is applied to the target power transistor in the current cycle, and the actual energy consumed in the current cycle is obtained based on the first bus voltage and the second bus voltage. The second gate voltage is determined based on the actual energy consumed in the current cycle and the target energy consumed in the next cycle.

3. The active discharge control method according to claim 2, characterized in that, The step of determining the target energy consumption for the next cycle based on the first bus voltage and the preset voltage threshold includes: The energy to be released is obtained based on the first bus voltage and the preset voltage threshold. Obtain the end time of the current cycle discharge, and based on the end time of the current cycle discharge and the preset discharge duration, obtain the remaining discharge duration; Based on the energy to be released and the remaining discharge duration, the target energy consumption for the next cycle is determined.

4. The active discharge control method according to claim 3, characterized in that, The step of determining the target energy consumption for the next cycle based on the energy to be released and the remaining discharge duration includes: The remaining number of discharges is obtained based on the remaining discharge duration, the first duration, and the second duration; Based on the energy to be released and the remaining number of discharges, the initial energy consumption for the next cycle is obtained; Obtain the upper limit of energy, and based on the upper limit of energy, correct the initial energy consumption to obtain the corresponding target energy consumption.

5. The active discharge control method according to any one of claims 2 to 4, characterized in that, The step of determining the second gate voltage based on the actual energy consumption of the current cycle and the target energy consumption of the next cycle includes: Based on the actual energy consumption in the current cycle and the target energy consumption in the next cycle, the difference between the target energy consumption and the actual energy consumption is obtained; The second gate voltage is determined based on the difference.

6. The active discharge control method according to claim 5, characterized in that, Determining the second gate voltage based on the difference includes: Obtain the preset proportional coefficient and integral coefficient; The proportional control value is obtained based on the proportional coefficient and the difference. Based on the first duration and the second duration, the difference is integrated to obtain the corresponding integral value, and the integral control quantity is determined according to the integral value and the integral coefficient. The second gate voltage is obtained based on the proportional control quantity and the integral control quantity.

7. The active discharge control method according to any one of claims 1 to 4, characterized in that, Before applying the first gate voltage to the target power transistor in the current cycle, the method further includes: If the current cycle is the initial cycle, the junction temperature of the target power transistor is obtained, and the first gate voltage is determined based on the junction temperature. If the current cycle is not the initial cycle, the first gate voltage is determined based on the actual energy consumed in the previous cycle and the target energy consumed in the current cycle.

8. The active discharge control method according to claim 7, characterized in that, Determining the first gate voltage based on the junction temperature includes: Obtain the preset mapping relationship between junction temperature and voltage offset, as well as the preset gate voltage threshold. Based on the mapping relationship between junction temperature and voltage offset, the voltage offset corresponding to the current junction temperature is obtained; The first gate voltage corresponding to the initial cycle is determined based on the voltage offset corresponding to the current junction temperature and the gate voltage threshold.

9. A motor controller, comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, characterized in that, When the processor executes the computer program, it implements the active discharge control method as described in any one of claims 1 to 8.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the active discharge control method as described in any one of claims 1 to 8.

Images