Interleaved totem-pole pfc converter and control method, apparatus, and storage medium thereof

Abstract

The application discloses an interleaved totem-pole PFC converter and a control method, equipment and storage medium thereof, and relates to the technical field of power electronics. The interleaved totem-pole PFC converter comprises at least two groups of high-frequency switching tubes. The control method of the interleaved totem-pole PFC converter comprises the following steps: in response to the interleaved totem-pole PFC converter being in a light-load working condition, determining a switching tube switching frequency according to a power frequency of a power grid to which the interleaved totem-pole PFC converter is connected, wherein the switching tube switching frequency is N / 2 times of the power frequency, and N is a positive integer; and controlling the at least two groups of high-frequency switching tubes to work in a polling mode with the voltage zero-crossing point of the power grid as a switching trigger point at the switching tube switching frequency. The application can improve the working efficiency of the interleaved totem-pole PFC converter in the light-load working condition and improve the reliability of the interleaved totem-pole PFC converter.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to an interleaved totem pole PFC converter and its control method, device and storage medium. Background Technology

[0002] With the rapid development of power electronics technology, interleaved totem pole PFC (Power Factor Correction) converters are widely used in various application scenarios such as two-stage AC / DC (Alternating Current to Direct Current) converter front-end topologies, vehicle power supply systems, and energy routers due to their advantages such as fewer components, simple structure, low electromagnetic interference, and the ability to achieve bidirectional energy flow. Interleaved totem pole PFC converters typically include at least two sets of high-frequency switching transistors, which operate with a 180° phase shift, effectively reducing input current ripple and suppressing electromagnetic interference.

[0003] However, under light load conditions, all high-frequency switches in the interleaved totem-pole PFC converter remain in a high-frequency operating state. Their switching losses, drive losses, and core losses do not decrease accordingly with the reduction in load, resulting in low light-load efficiency. Furthermore, the high-frequency switches operate at high frequencies throughout the converter's full load range, enduring long-term current and thermal stresses. This leads to uneven stress distribution among the high-frequency switches, severely impacting their lifespan and reducing system reliability. Summary of the Invention

[0004] The main objective of this application is to provide an interleaved totem pole PFC converter and its control method, device, and storage medium, aiming to improve the working efficiency of the interleaved totem pole PFC converter under light load conditions and enhance its reliability.

[0005] This application provides a control method for an interleaved totem pole PFC converter, wherein the interleaved totem pole PFC converter includes at least two sets of high-frequency switching transistors, and the method includes: In response to the interleaved totem pole PFC converter being in a light load condition, the switching frequency of the switching transistor is determined according to the power frequency of the power grid to which the interleaved totem pole PFC converter is connected, wherein the switching frequency of the switching transistor is N / 2 times the power frequency, and N is a positive integer; According to the switching frequency of the aforementioned switching transistors, and with the voltage zero-crossing point of the power grid as the switching trigger point, at least two sets of the aforementioned high-frequency switching transistors are controlled to work in a polling manner.

[0006] In one possible implementation, the step of controlling at least two sets of high-frequency switching transistors to poll at the switching frequency of the switching transistors, using the zero-crossing point of the grid voltage as the switching trigger point, includes: In response to the voltage of the power grid reaching zero crossing, control at least two groups of high-frequency switching transistors, the currently operating group of high-frequency switching transistors, to enter a wave blocking state. After the zero-crossing blocking interval of the current group of high-frequency switching transistors ends, the next group of high-frequency switching transistors in the current group is controlled to enter the working state with the initial duty cycle. Gradually increase the duty cycle of the next set of high-frequency switching transistors until the target duty cycle is reached.

[0007] In one possible implementation, before the step of controlling the next group of high-frequency switching transistors in the current group to enter the operating state with an initial duty cycle, the method further includes: Obtain the first temperature of the current group of high-frequency switching transistors and the second temperature of the next group of high-frequency switching transistors; In response to the second temperature being less than or equal to a preset temperature threshold, or the second temperature being less than or equal to the first temperature, the step of controlling the next group of high-frequency switching transistors in the current group to enter the working state with an initial duty cycle is executed.

[0008] In one possible implementation, the method further includes: In response to the second temperature being greater than the preset temperature threshold and the second temperature being greater than the first temperature, the first temperature is compared with the preset temperature threshold; In response to the first temperature being less than or equal to the preset temperature threshold, the current group of high-frequency switching transistors is controlled to enter the working state. In response to the first temperature being greater than the preset temperature threshold, an alarm message is output.

[0009] In one possible implementation, the method further includes: Obtain the actual total input current of the interleaved totem pole PFC converter; Compare the actual total input current with the full-load total input current of the interleaved totem pole PFC converter; In response to the actual total input current being less than or equal to a preset proportion of the full-load total input current, it is determined that the interleaved totem pole PFC converter is in a light-load condition. In response to the actual total input current being greater than the full-load total input current of the preset ratio, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

[0010] In one possible implementation, the step of determining the preset ratio includes: The temperature of each group of high-frequency switching transistors in the interleaved totem pole PFC converter is obtained; The preset ratio is determined based on the highest temperature among the temperatures of the high-frequency switching transistors in each group; The preset ratio is negatively correlated with the highest temperature.

[0011] In one possible implementation, prior to the step of determining that the interleaved totem pole PFC converter is under light load, the method further includes: In response to the actual total input current being less than or equal to a preset proportion of the full-load total input current, a first duration for which the actual total input current is less than or equal to the preset proportion of the full-load total input current is recorded. In response to the first duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a light load condition.

[0012] In one possible implementation, prior to the step of determining that the interleaved totem pole PFC converter is in a non-light load condition, the method further includes: In response to the actual total input current being greater than the preset proportion of the full-load total input current, a second duration for which the actual total input current is greater than the preset proportion of the full-load total input current is recorded; In response to the second duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

[0013] In one possible implementation, the method further includes: In response to the interleaved totem pole PFC converter being in a non-light load condition, at least two sets of the high-frequency switching transistors are controlled to operate in an interleaved phase manner of 180°.

[0014] In addition, to achieve the above objectives, this application also provides a control device, the control device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the control method for the interleaved totem pole PFC converter as described above.

[0015] Furthermore, to achieve the above objectives, this application also provides an interleaved totem pole PFC converter, the interleaved totem pole PFC converter comprising: At least two sets of high-frequency switching transistors, with the DC sides of each set of high-frequency switching transistors connected in parallel; A set of power frequency switching transistors is connected in parallel with the DC side of at least two sets of high frequency switching transistors; The output capacitor and load resistor are connected in parallel with the DC side of at least two sets of the high-frequency switching transistors; An AC input source, wherein the first end of the AC input source is connected to the midpoint of the bridge arm of each group of high-frequency switching transistors through different inductors, and the second end of the AC input source is connected to the midpoint of the bridge arm of a group of power frequency switching transistors; The control device described above is connected to the control terminals of at least two sets of the high-frequency switching transistors.

[0016] In addition, to achieve the above objectives, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the control method for the interleaved totem pole PFC converter as described above.

[0017] This application provides a control method for an interleaved totem pole PFC converter. The interleaved totem pole PFC converter includes at least two sets of high-frequency switching transistors. The control method includes: in response to the interleaved totem pole PFC converter being in a light-load condition, determining the switching frequency of the switching transistors based on the power frequency of the grid to which the interleaved totem pole PFC converter is connected, wherein the switching frequency of the switching transistors is N / 2 times the power frequency, and N is a positive integer; and controlling at least two sets of high-frequency switching transistors to work in a polling manner according to the switching frequency of the switching transistors, with the voltage zero-crossing point of the grid as the switching trigger point.

[0018] Therefore, the technical solution provided in this application, under light-load conditions of the interleaved totem-pole PFC converter, controls the high-frequency switching transistors in the interleaved totem-pole PFC converter to operate in a polling manner. This ensures that only one set of high-frequency switching transistors is active under light load, while the others are in a blocked state. This reduces the number of high-frequency switching transistors active under light load conditions, effectively reducing switching losses, drive losses, and core losses, and improving the efficiency of the interleaved totem-pole PFC converter under light load conditions. Simultaneously, because the high-frequency switching transistors operate alternately in a polling manner, this avoids the same set of high-frequency switching transistors continuously bearing current and thermal stress across the entire load range, achieving a balanced stress distribution among the high-frequency switching transistors. This extends the service life of the high-frequency switching transistors and effectively improves the reliability of the interleaved totem-pole PFC converter.

[0019] Furthermore, in the technical solution provided in this application, the switching frequency of each group of high-frequency switching transistors is determined based on the power grid frequency, and the switching is performed by polling the power grid voltage zero-crossing point as the switching trigger point. Since the power grid voltage zero-crossing point itself is the inherent blocking range of the switching transistor, the switching can be completed without adding additional hardware or relying on complex algorithms, which has good versatility and practicality. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 A flowchart illustrating the control method for the interleaved totem pole PFC converter provided in the first embodiment of this application; Figure 2 This is a schematic diagram of the structure of the interlaced totem pole PFC converter provided in the first embodiment of this application; Figure 3 A waveform diagram of the polling switching process when the switching frequency of the switching transistor is 1 / 2 times the power frequency, as provided in the first embodiment of this application; Figure 4 A waveform diagram of the polling switching process when the switching frequency of the switching transistor is 1 times the power frequency, as provided in the first embodiment of this application; Figure 5 This is a schematic diagram of the polling switching process provided in the first embodiment of this application. Figure 6 Another switching principle diagram of the polling switching process provided in the first embodiment of this application; Figure 7 This is a schematic diagram of the hardware operating environment involved in the embodiments of this application.

[0023] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0024] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0025] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0026] The execution subject of the control method for the interleaved totem pole PFC converter in this application can be a control device with data processing, network communication and program execution functions, such as a controller, control chip, etc. The control device can be independent of the interleaved totem pole PFC converter or integrated into the interleaved totem pole PFC converter.

[0027] The following description uses a control device as the execution subject to illustrate the various embodiments.

[0028] This application proposes a control method for an interleaved totem pole PFC converter according to a first embodiment. The interleaved totem pole PFC converter includes at least two sets of high-frequency switching transistors. Please refer to... Figure 1 The control method for the interleaved totem pole PFC converter may include steps S10~S20: Step S10: In response to the interleaved totem pole PFC converter being in a light load condition, determine the switching frequency of the switching transistor based on the power frequency of the grid to which the interleaved totem pole PFC converter is connected, wherein the switching frequency of the switching transistor is N / 2 times the power frequency, and N is a positive integer. Light load operation refers to the operating state of an interleaved totem-pole PFC converter with lower output power, typically meaning the actual output power does not exceed a preset percentage (e.g., 50%) of the rated power. The power grid frequency is the operating frequency of the alternating current in the power grid, also known as the power supply frequency. Currently, there are two main standard power frequencies for global power systems: 50Hz and 60Hz. The switching frequency of the switching transistors is the frequency at which the various high-frequency switching transistors cycle and switch under light load conditions.

[0029] This embodiment uses the power grid frequency as a reference to determine the switching frequency of the switching transistor, so that the switching frequency of the switching transistor and the power grid frequency have a fixed multiple relationship, thereby ensuring that the switching action of the switching transistor can be synchronized with the phase of the power grid, providing a prerequisite for subsequent switching at the zero-crossing point of the power grid voltage.

[0030] When determining the switching frequency of the switching transistor based on the power frequency of the grid to which the interleaved totem pole PFC converter is connected, the value of N can be a default value, or it can be determined in conjunction with the current light load level of the interleaved totem pole PFC converter, or it can be flexibly set according to the actual usage scenario. This embodiment does not impose specific limitations on this. The light load level is used to characterize the degree of light load of the interleaved totem pole PFC converter. A higher light load level indicates a lower load rate, meaning the interleaved totem pole PFC converter is closer to an unloaded state; a lower light load level indicates a higher load rate, meaning the interleaved totem pole PFC converter is closer to the half-load boundary.

[0031] In one possible implementation, when determining the switching frequency of the switching transistors based on the current light load level of the interleaved totem-pole PFC converter, N can be negatively correlated with the light load level. That is, the higher the light load level, the lower the load rate of the interleaved totem-pole PFC converter and the closer it is to the no-load state; the smaller the value of N, the lower the switching frequency of the switching transistors. Conversely, the lower the light load level, the higher the load rate of the interleaved totem-pole PFC converter and the closer it is to the half-load boundary; the larger the value of N, the higher the switching frequency of the switching transistors. Thus, by reducing the switching frequency under extremely light load conditions, the additional losses caused by switching actions can be reduced, thereby further improving the operating efficiency of the interleaved totem-pole PFC converter under light load conditions. Increasing the switching frequency when approaching half load can accelerate the heat stress distribution speed and prevent individual high-frequency switching transistors from overheating due to prolonged continuous operation, thereby achieving the optimal match between loss and heat stress balance across the entire light load range.

[0032] In one possible implementation, the light-load condition can be divided into multiple light-load levels based on the ratio of the actual total input current to the full-load total input current of the interleaved totem-pole PFC converter. For example, when the actual total input current is less than or equal to 20% of the full-load total input current, it is determined to be the first light-load level (very light-load); when the actual total input current is greater than 20% of the full-load total input current but less than or equal to 35%, it is determined to be the second light-load level (light-load); and when the actual total input current is greater than 35% of the full-load total input current but less than or equal to 50%, it is determined to be the third light-load level (nearly half-load).

[0033] Step S20: Control at least two sets of high-frequency switching transistors to work in a polling manner, using the zero-crossing point of the grid voltage as the switching trigger point, according to the switching frequency of the switching transistors.

[0034] The zero-crossing point of the power grid voltage is the moment when the power grid voltage waveform crosses zero amplitude, including the zero-crossing point transitioning from the positive half-cycle to the negative half-cycle and the zero-crossing point transitioning from the negative half-cycle to the positive half-cycle. Polling operation means that each group of high-frequency switching transistors operates alternately in a predetermined order, with each group taking turns to gain operating rights. At any given time, only one group of high-frequency switching transistors is in the operating state, while the other groups are in a blocked state. The blocked state is when the high-frequency switching transistor drive signal is disabled, and the switching transistor does not perform high-frequency switching action. In this state, the switching transistor does not generate switching losses or drive losses.

[0035] When controlling at least two groups of high-frequency switching transistors to operate in a polling manner based on the switching frequency of the switching transistors and using the zero-crossing point of the grid voltage as the switching trigger point, in one possible implementation, the control device can detect the zero-crossing point of the grid voltage in real time. In response to the grid voltage reaching the zero-crossing point, it executes a polling switching action (i.e., controlling the currently operating group of high-frequency switching transistors to enter a blocking state, and controlling the next group of high-frequency switching transistors to enter the operating state after the zero-crossing blocking interval ends). In another possible implementation, the control device can use a phase-locked loop to phase-lock the grid voltage and predict the arrival time of the next zero-crossing point. Before the predicted zero-crossing point arrives (e.g., before the previous switching cycle), the control device pre-completes the switching decision and parameter configuration. When the zero-crossing point actually arrives, it immediately executes the polling switching action. This implementation is suitable for scenarios with high real-time switching requirements and can effectively eliminate switching lag caused by detection delay. This embodiment does not specifically limit the implementation of step S20.

[0036] In one possible implementation, step S20 may include steps S21 to S23: Step S21: In response to the voltage of the power grid reaching the zero crossing point, control the current group of high-frequency switching transistors that are currently in operation to enter the wave blocking state. In this embodiment, the group of high-frequency switching transistors that is currently in operation among at least two groups of high-frequency switching transistors is referred to as the current group of high-frequency switching transistors.

[0037] Step S22: After the zero-crossing blocking interval of the current group of high-frequency switching transistors ends, control the next group of high-frequency switching transistors in the current group to enter the working state with the initial duty cycle. The zero-crossing blocking interval is a period of time near the zero-crossing point of the grid voltage. During this period, all high-frequency switching transistors in the interleaved totem pole PFC converter are in a blocking state. This is an inherent control requirement of the interleaved totem pole PFC converter to avoid current distortion near the zero-crossing point.

[0038] The initial duty cycle is the starting duty cycle used by the next group of high-frequency switching transistors after the zero-crossing blocking interval ends and enters the working state. It is less than the target duty cycle and is used to achieve soft start and suppress the current surge at the moment of switching in.

[0039] Step S23: Gradually increase the duty cycle of the next group of high-frequency switching transistors until the target duty cycle is reached.

[0040] The target duty cycle is the steady-state duty cycle value that the high-frequency switching transistors of the interleaved totem pole PFC converter need to achieve when the converter is operating normally under the current load conditions. In other words, it is the duty cycle required for the interleaved totem pole PFC converter to maintain stable output voltage.

[0041] When gradually increasing the duty cycle of the next set of high-frequency switching transistors, the duty cycle can be increased by a fixed increment; alternatively, it can be increased by a flexibly determined increment. For example, a larger step size can be used to quickly increase the duty cycle in the initial stage of duty cycle adjustment, and a smaller step size can be used for fine adjustment when approaching the target duty cycle. This embodiment does not specifically limit the implementation method of step S23.

[0042] In this embodiment, when the grid voltage reaches the zero-crossing point, the current group of high-frequency switching transistors is controlled to enter a blocking state. After the zero-crossing blocking interval ends, the next group of high-frequency switching transistors is controlled to start working with an initial duty cycle, which is gradually increased to the target duty cycle. Since the zero-crossing blocking interval is an inherent control interval of the interleaved totem pole PFC converter near the grid voltage zero-crossing point to avoid current distortion, the switching action is completed within this interval. Therefore, it will not introduce additional current distortion or electromagnetic interference to the normal operation of the interleaved totem pole PFC converter, ensuring the output quality of the interleaved totem pole PFC converter during the switching process. Furthermore, after the zero-crossing blocking interval ends, the next set of high-frequency switches is put into operation with the initial duty cycle, and then gradually increased to the target duty cycle. Compared with the method of directly switching in with the target duty cycle (i.e., full duty cycle), this avoids a large current surge when the next set of high-frequency switches is switched in, reduces the electrical stress on the next set of high-frequency switches and their corresponding magnetic components such as inductors, and reduces the switching loss and conduction loss at the moment of switching in. This makes the switching action of the interleaved totem pole PFC converter smoother and more reliable during the polling switching process, thereby improving the operational stability of the interleaved totem pole PFC converter.

[0043] This embodiment does not specifically limit the implementation method for controlling the next group of high-frequency switching transistors to enter the working state. For example, in other possible implementations, a soft start may not be performed, and the next group of high-frequency switching transistors may be directly controlled to enter the working state with the target duty cycle.

[0044] As can be seen from the above, the technical solution provided in this embodiment, under light load conditions of the interleaved totem pole PFC converter, controls the high-frequency switching transistors in the interleaved totem pole PFC converter to operate in a polling manner. This ensures that only one set of high-frequency switching transistors is active under light load, while the others are in a blocked state. This reduces the number of high-frequency switching transistors active under light load conditions, effectively reducing switching losses, drive losses, and core losses, and improving the efficiency of the interleaved totem pole PFC converter under light load conditions. Simultaneously, because the high-frequency switching transistors operate alternately in a polling manner, this avoids the same set of high-frequency switching transistors continuously bearing current and thermal stress across the entire load range, achieving a balanced stress distribution among the high-frequency switching transistors, thereby extending their service life and effectively improving the reliability of the interleaved totem pole PFC converter.

[0045] Furthermore, to address the issues of interleaved totem-pole PFC converters under light load conditions, one approach is to employ an alternating high- and low-frequency control strategy. This causes the four switching transistors of the converter to operate alternately at high and low frequencies, evenly distributing current and thermal stresses and thus extending the lifespan of the switching transistors. However, in practical engineering, considering system cost, the high-frequency and low-frequency switching transistors use different components, making it impossible to achieve alternating high and low-frequency operation. Therefore, this approach has limited versatility and practicality.

[0046] In this embodiment, the technical solution provides that each group of high-frequency switching transistors determines the switching frequency based on the power grid frequency and uses the zero-crossing point of the power grid voltage as the switching trigger point for polling and switching. Since the zero-crossing point of the power grid voltage is itself the inherent blocking range of the switching transistor, the switching can be completed without adding additional hardware or relying on complex algorithms, which has good versatility and practicality.

[0047] For example, to help understand the implementation principle of the control method for the interleaved totem pole PFC converter provided in this embodiment, the structure of the interleaved totem pole PFC converter is taken as an example. Figure 2 For example, in the diagram, Q1 and Q2 are the first group of high-frequency switching transistors, Q3 and Q4 are the second group of high-frequency switching transistors, S1 and S2 are power frequency switches, L1 and L2 are inductors, and V... ac For AC input source, C o For output capacitor, R L This is the load resistance.

[0048] When the switching frequency of the switching transistor is half the power frequency, the polling switching process can be expressed as follows: Figure 3 (f in the figure) g (At the power frequency); when the switching frequency of the switching transistor is 1 times the power frequency, the polling switching process can be expressed as follows: Figure 4 (f in the figure) g (For power frequency). Specifically, within the first switching cycle (corresponding to...) Figure 5 In state a1), the first group of high-frequency switches (Q1 and Q2) and the power frequency switches S1 and S2 are in working state, participating in the power transmission of the interleaved totem pole PFC converter, while the second group of high-frequency switches (Q3 and Q4) are in a blocked state and do not participate in power transmission. During the second switching cycle (corresponding to state a1), the first group of high-frequency switches (Q1 and Q2) and the power frequency switches S1 and S2 are in working state, participating in the power transmission of the interleaved totem pole PFC converter, while the second group of high-frequency switches (Q3 and Q4) are in a blocked state and do not participate in power transmission. Figure 5 In the a2 state), the second group of high-frequency switches (i.e., Q3 and Q4) and the power frequency switches S1 and S2 are in working state and participate in the power transmission of the interleaved totem pole PFC converter, while the first group of high-frequency switches (i.e., Q1 and Q2) are in the blocking state and do not participate in power transmission. This process is repeated to achieve the alternating operation of the two groups of high-frequency switches.

[0049] For example, taking an interleaved totem pole PFC converter with three sets of high-frequency switching transistors as an example, the polling switching process of the three sets of high-frequency switching transistors can be represented as follows: Figure 6 Specifically, within the first switching cycle (corresponding to...) Figure 6 In state b1), the first group of high-frequency switches (Q1 and Q2) and the power frequency switches S1 and S2 are in working state, participating in the power transmission of the interleaved totem pole PFC converter, while the second group of high-frequency switches (Q3 and Q4) and the third group of high-frequency switches (Q5 and Q6) are in a blocked state and do not participate in power transmission. During the second switching cycle (corresponding to...) Figure 6 In state b2), the second group of high-frequency switches and the power frequency switches S1 and S2 are in working state, participating in the power transmission of the interleaved totem pole PFC converter, while the first group of high-frequency switches (i.e., Q1 and Q2) and the third group of high-frequency switches (i.e., Q5 and Q6) are in a blocked state and do not participate in power transmission. During the third switching cycle (corresponding to...) Figure 6 In state b3), the third group of high-frequency switches (Q5 and Q6) and the power frequency switches S1 and S2 are in working state and participate in the power transmission of the interleaved totem pole PFC converter, while the first group of high-frequency switches (Q1 and Q2) and the second group of high-frequency switches (Q3 and Q4) are in a blocked state and do not participate in power transmission.

[0050] It should be noted that this example is only for the purpose of assisting in understanding this application and does not constitute a limitation on the control method of the interleaved totem pole PFC converter provided in this application. Other technical solutions based on this concept are all within the protection scope of this application.

[0051] Based on the first embodiment described above, a second embodiment of the control method for the interleaved totem pole PFC converter of this application is proposed. In the second embodiment, before the step of controlling the next group of high-frequency switching transistors of the current group to enter the working state with an initial duty cycle, the control method for the interleaved totem pole PFC converter may further include steps S221 to S222: Step S221: Obtain the first temperature of the current group of high-frequency switching transistors and the second temperature of the next group of high-frequency switching transistors; In this embodiment, the temperature of the current group of high-frequency switching transistors is referred to as the first temperature, and the temperature of the next group of high-frequency switching transistors is referred to as the second temperature.

[0052] Step S222: In response to the second temperature being less than or equal to a preset temperature threshold, or the second temperature being less than or equal to the first temperature, execute the step of controlling the next group of high-frequency switching transistors in the current group to enter the working state with an initial duty cycle.

[0053] The preset temperature is a pre-set critical temperature value used to determine whether the high-frequency switching transistor is in an overheated state. It can be a default value, or it can be flexibly set by the user according to actual needs, or it can be flexibly set according to the actual operation of the interleaved totem pole PFC converter. This embodiment does not make specific limitations on this.

[0054] In this embodiment, before activating the next group of high-frequency switches, the first temperature of the current group of high-frequency switches and the second temperature of the next group of high-frequency switches are obtained. Based on the comparison between the second temperature and a preset temperature threshold, and the comparison between the second temperature and the first temperature, a decision is made on whether to perform a switching action. It is understood that since the temperature of a high-frequency switch continuously rises after it is activated due to switching and conduction losses, if the temperature of the next group of high-frequency switches is already too high before switching in, its temperature will rise further after switching in, potentially exceeding a safe range. Therefore, by determining whether the second temperature is less than or equal to the preset temperature threshold, it can be ensured that the next group of high-frequency switches is within a safe temperature range; simultaneously, by determining whether the second temperature is less than or equal to the first temperature, it can be ensured that the next group of high-frequency switches will not be hotter than the current group of high-frequency switches. The switching action is performed only when at least one of these two conditions is met. This avoids switching when the temperature of the next set of high-frequency switching transistors is too high, preventing the temperature of the next set of high-frequency switching transistors from rising further or even exceeding the safety limit due to continuous operation after switching in. It ensures that the thermal stress can be evenly distributed between the two sets of high-frequency switching transistors, and avoids individual switching transistors from aging faster due to long-term operation at high temperatures. This extends the service life of each set of high-frequency switching transistors and improves the reliability and safety of the interleaved totem pole PFC converter during light-load polling operation.

[0055] Based on the second embodiment described above, a third embodiment of the control method for the interleaved totem pole PFC converter of this application is proposed. In the third embodiment, the control method for the interleaved totem pole PFC converter may further include steps S223 to S225: Step S223: In response to the second temperature being greater than a preset temperature threshold and the second temperature being greater than the first temperature, the first temperature is compared with the preset temperature threshold. Step S224: In response to the first temperature being less than or equal to a preset temperature threshold, control the current group of high-frequency switching transistors to enter the working state; The implementation method for controlling the current group of high-frequency switching transistors to enter the working state is similar to the implementation method for controlling the next group of high-frequency switching transistors to enter the working state, and will not be described in detail here.

[0056] Understandably, if the second temperature is greater than a preset temperature threshold and also greater than the first temperature, and the first temperature is less than or equal to the preset temperature threshold, it indicates that although the current group of high-frequency switching transistors has been operating for some time, its temperature is still within a safe range. However, the next group of high-frequency switching transistors is overheated and has a higher temperature than the current group. Switching to the next group would cause its temperature to rise further due to continuous operation, potentially exceeding its safe limit. In this case, instead of switching, the current group of high-frequency switching transistors continues to operate. This avoids transferring power transmission to the overheated next group and utilizes the current group's operating capacity within a safe temperature range to maintain the normal power output of the interleaved totem-pole PFC converter. This prevents power interruption due to switching decision errors, further improving the efficiency and reliability of the interleaved totem-pole PFC converter under light load conditions.

[0057] Step S225: In response to the first temperature being greater than the preset temperature threshold, an alarm message is output.

[0058] Alarm messages are used to indicate an abnormal state in the interleaved totem pole PFC converter. These messages can be audible and visual alarms, text prompts on the display screen, indicator lights, or voice prompts; this embodiment does not specify a particular method. The alarm messages can be output to a host computer, a local display device, or a remote monitoring platform to alert maintenance personnel that both the current group of high-frequency switching transistors and the next group are overheating and require manual intervention.

[0059] Understandably, if the second temperature is greater than a preset temperature threshold and also greater than the first temperature, and the first temperature is also greater than the preset temperature threshold, it indicates that both the current group of high-frequency switching transistors and the next group have exceeded their safe temperature range, and both groups are overheated. At this point, neither continuing to operate the current group of high-frequency switching transistors nor switching to the next group can prevent them from operating in an overheated state. Simple polling and switching may not improve the thermal condition of the interleaved totem-pole PFC converter. Therefore, an alarm message can be output to allow maintenance personnel or the upper-level monitoring system to promptly detect the overheating fault and take appropriate measures. This prevents the high-frequency switching transistors from aging or even being damaged due to prolonged operation in an overheated state, thereby improving the operational safety of the interleaved totem-pole PFC converter.

[0060] In other embodiments, if the interleaved totem pole PFC converter includes three or more groups of high-frequency switching transistors, then if the first temperature is greater than a preset temperature threshold, the third temperature of the next group of high-frequency switching transistors (i.e., the third group of high-frequency switching transistors) can also be obtained, and it can be determined whether the third temperature is less than or equal to the preset temperature threshold. If the third temperature is less than or equal to the preset temperature threshold, it means that the third group of high-frequency switching transistors is currently within a safe temperature range, and the next group of high-frequency switching transistors can be bypassed to control the third group of high-frequency switching transistors to enter the working state. If the third temperature is also greater than the preset temperature threshold, the temperature of the fourth group of high-frequency switching transistors is obtained for judgment until a group of high-frequency switching transistors with a temperature within a safe range is found to be put into operation, or if no usable high-frequency switching transistor is found after traversing all groups, an alarm prompt message is output. Therefore, in an interleaved totem pole PFC converter containing three or more groups of high-frequency switching transistors, when both the current group and the next group are overheating, by sequentially checking the temperature of the high-frequency switching transistors in each subsequent group and prioritizing the group whose temperature is within the safe range to start operation, the switching transistor resources in the interleaved totem pole PFC converter that are still in a good thermal state can be utilized to the maximum extent, avoiding unnecessary alarm shutdowns, and further improving the fault tolerance and operational continuity of the interleaved totem pole PFC converter in multiphase topology applications.

[0061] In this embodiment, when the second temperature of the next set of high-frequency switching transistors is greater than a preset temperature threshold and also greater than the first temperature, it indicates that the next set of high-frequency switching transistors is overheated and has a higher temperature than the current set. Switching to the next set of high-frequency switching transistors at this time may cause its temperature to rise further or even exceed the safety limit. Therefore, it is further determined whether the first temperature of the current set of high-frequency switching transistors is within the safe range. If the first temperature is within the safe range, the current set of high-frequency switching transistors is controlled to continue working to avoid switching to the overheated next set of high-frequency switching transistors, ensuring that the interleaved totem pole PFC converter can maintain normal power output. If the first temperature also exceeds the preset temperature threshold, it indicates that both the current set of high-frequency switching transistors and the next set of high-frequency switching transistors are overheated. At this time, whether the current set of high-frequency switching transistors continues to work or the next set of high-frequency switching transistors is switched, it is impossible to avoid the high-frequency switching transistors operating in an overheated state. Simple polling switching may no longer be able to improve the thermal state of the interleaved totem pole PFC converter. Therefore, an alarm message is output to remind maintenance personnel to intervene in a timely manner. Therefore, when the thermal state of both sets of high-frequency switching transistors deteriorates, alarm information is output to enable timely detection and handling of the fault state, preventing the high-frequency switching transistors from aging or being damaged due to long-term operation under over-temperature conditions, and further improving the operational safety and reliability of the interleaved totem pole PFC converter.

[0062] Based on the first, second, and / or third embodiments described above, a fourth embodiment of the control method for the interleaved totem pole PFC converter of this application is proposed. In the fourth embodiment, the control method for the interleaved totem pole PFC converter may further include steps S01 to S04: Step S01: Obtain the actual total input current of the interleaved totem pole PFC converter; The actual total input current is the real-time sampled value of the total input current actually drawn from the power grid by the interleaved totem pole PFC converter during operation. It is the sum of the input currents of all high-frequency switching transistor groups in the interleaved totem pole PFC converter. As shown in Formula 1 below, it reflects the current load size of the interleaved totem pole PFC converter.

[0063] P o =η V ac I in Formula 1; Where η is the efficiency of the interleaved totem pole PFC converter, V ac I is the grid voltage. in For the input current, P o This refers to the output power.

[0064] When obtaining the actual total input current of the interleaved totem pole PFC converter, a current sensor can be installed at the AC input terminal (e.g., the grid side) of the interleaved totem pole PFC converter to directly collect the actual total input current. Alternatively, current sensors can be installed in the branches corresponding to each group of high-frequency switches in the interleaved totem pole PFC converter to sample the input current of each branch, and then the input currents of each branch are summed to obtain the actual total input current of the interleaved totem pole PFC converter. This embodiment does not specifically limit the implementation method of step S01.

[0065] Step S02: Compare the actual total input current with the full-load total input current of the interleaved totem pole PFC converter; The full-load total input current is the total input current drawn from the power grid by the interleaved totem pole PFC converter when it is running under rated load conditions. It is usually determined in advance during the converter design and is not affected by the actual operating conditions.

[0066] Step S03: In response to the actual total input current being less than or equal to the full-load total input current of a preset ratio, it is determined that the interleaved totem pole PFC converter is in a light-load condition. The preset ratio is a pre-defined scaling factor used to proportionally reduce the total input current under full load to obtain a reference current value. This reference current value serves as the boundary between light-load and non-light-load operating conditions. The preset ratio can be a default value, or it can be flexibly set by the user according to actual usage needs, or it can be flexibly set according to the actual operation of the interleaved totem pole PFC converter. This embodiment does not impose specific limitations on this.

[0067] In one possible implementation, the step of determining the preset ratio may include: obtaining the temperature of each group of high-frequency switching transistors in the interleaved totem pole PFC converter; determining the preset ratio based on the highest temperature among the temperatures of each group of high-frequency switching transistors; wherein the preset ratio is negatively correlated with the highest temperature.

[0068] When determining the preset ratio based on the highest temperature among the temperatures of each group of high-frequency switching transistors, a relationship table can be used to record the ratios corresponding to different temperatures in advance. This allows for quick determination of the preset ratio through table lookup. Alternatively, a relationship model can be constructed to record the mapping between the preset ratio and the highest temperature. This model can then be used to accurately determine the preset ratio corresponding to the current highest temperature. This embodiment does not impose specific limitations on this approach.

[0069] In this embodiment, the temperature of each group of high-frequency switching transistors in the interleaved totem pole PFC converter is obtained, and a preset ratio is dynamically determined based on the highest temperature among the high-frequency switching transistors in each group. The preset ratio is negatively correlated with the highest temperature. Since the highest temperature reflects the temperature level of the group of high-frequency switching transistors with the worst thermal state in the interleaved totem pole PFC converter, when the highest temperature increases, it indicates that the overall thermal state of each group of high-frequency switching transistors tends to deteriorate. By reducing the preset ratio, the interleaved totem pole PFC converter can enter the light-load condition earlier and trigger polling switching control, thereby achieving a balanced distribution of thermal stress among the high-frequency switching transistors before the thermal state deteriorates, and suppressing further temperature increases. When the highest temperature decreases, it indicates that the overall thermal state of each group of high-frequency switching transistors tends to improve. By increasing the preset ratio, the interleaved totem pole PFC converter is less likely to enter the light-load condition, avoiding premature polling switching that introduces additional switching actions and losses when unnecessary. Therefore, this embodiment, by setting a preset ratio to adaptively adjust according to the negative correlation of the highest temperature, can not only intervene in advance to suppress overheating when the high-frequency switching tube temperature is high, but also avoid unnecessary switching actions when the high-frequency switching tube temperature is low, thereby improving the thermal management capability and adaptive capability of the interleaved totem pole PFC converter under varying operating conditions.

[0070] Understandably, if the actual total input current is less than or equal to the preset proportion of the full-load total input current, it indicates that the current load rate of the interleaved totem-pole PFC converter is low, and the interleaved totem-pole PFC converter is in a light-load condition. Under this condition, if all high-frequency switches continue to operate, switching losses, drive losses, and core losses will account for a large proportion of the total losses, affecting the overall efficiency of the converter. Therefore, it is necessary to activate the subsequent polling switching control strategy to reduce losses under light-load conditions.

[0071] Step S04: In response to the actual total input current being greater than the preset proportion of the full-load total input current, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

[0072] Understandably, if the actual total input current exceeds the preset proportion of the full-load total input current, it indicates that the interleaved totem-pole PFC converter is currently under high load. In this case, the interleaved totem-pole PFC converter is not in a light-load condition, i.e., a full-load or heavy-load condition. Under this condition, the switching losses of the high-frequency switching transistors account for a small proportion of the total losses. The interleaved totem-pole PFC converter requires all high-frequency switching transistors to participate in power transmission to meet the output power requirements. Therefore, there is no need to activate the polling switching control strategy; simply maintaining the normal interleaved 180° operating mode is sufficient to ensure the output capability of the interleaved totem-pole PFC converter.

[0073] In this embodiment, the actual total input current of the interleaved totem pole PFC converter is obtained and compared with the full-load total input current. The system determines whether the interleaved totem pole PFC converter is under light load based on whether the ratio of the actual total input current to the full-load total input current is less than or equal to a preset ratio. Since the ratio of the actual total input current to the full-load total input current directly reflects the current load rate of the interleaved totem pole PFC converter, the above comparison can accurately determine whether the converter is currently under light load or not. Therefore, when it is determined that the converter is under light load, a subsequent polling switching control strategy is triggered to improve light load efficiency and balance the stress on the switching transistors. When it is determined that the converter is under non-light load, the normal interleaved 180° operating mode is maintained to ensure power output capability under full load or heavy load, allowing the interleaved totem pole PFC converter to adaptively select the optimal operating mode according to the actual load conditions.

[0074] Based on the fourth embodiment described above, a fifth embodiment of the control method for the interleaved totem pole PFC converter of this application is proposed. In the fifth embodiment, before the step of determining that the interleaved totem pole PFC converter is under light load, the control method for the interleaved totem pole PFC converter may further include steps S031 to S032: Step S031: In response to the actual total input current being less than or equal to a preset proportion of the full-load total input current, record the first duration for which the actual total input current is less than or equal to a preset proportion of the full-load total input current. In this embodiment, the duration during which the actual total input current is less than or equal to a preset proportion of the full-load total input current is referred to as the first duration.

[0075] Step S032: In response to the first duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a light load condition.

[0076] The preset duration threshold is a pre-set time threshold value used to determine whether the time for which the actual total input current continuously meets a certain operating condition has reached a stable state sufficient to confirm the switching of operating conditions. It can be a default value, or it can be flexibly set by the user according to actual usage needs, or it can be flexibly set according to the actual operation of the interleaved totem pole PFC converter. This embodiment does not make specific limitations on this.

[0077] Furthermore, before determining that the interleaved totem pole PFC converter is under non-light load conditions, the control method for the interleaved totem pole PFC converter may also include steps S041~S042: Step S041: In response to the actual total input current being greater than a preset proportion of the full-load total input current, record the second duration for which the actual total input current is greater than a preset proportion of the full-load total input current. In this embodiment, the duration during which the actual total input current is greater than a preset proportion of the full-load total input current is referred to as the second duration.

[0078] Step S042: In response to the second duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

[0079] In this embodiment, when the actual total input current reaches the critical value of the light load condition or the non-light load condition, the interleaved totem pole PFC converter is not immediately determined to enter the corresponding operating condition. Instead, the duration for which the actual total input current continuously meets the corresponding operating condition condition is first recorded. Only when this duration reaches a preset duration threshold is the operating condition switch officially confirmed. Since load fluctuations or current sampling noise may cause the actual total input current to occasionally exceed the judgment boundary in a short period, immediately switching the operating condition at that moment would cause the interleaved totem pole PFC converter to frequently switch between light load and non-light load modes, leading to control oscillations and output voltage fluctuations. Therefore, this embodiment introduces a duration confirmation mechanism, confirming the operating condition switch only after the actual total input current continuously meets a certain operating condition condition to a preset duration threshold. This effectively filters out false triggering caused by instantaneous disturbances, ensuring the accuracy of operating condition determination and the stability of operating mode switching for the interleaved totem pole PFC converter during load changes.

[0080] Based on the first, second, third, fourth, and / or fifth embodiments described above, a sixth embodiment of the control method for the interleaved totem pole PFC converter of this application is proposed. In the sixth embodiment, the control method for the interleaved totem pole PFC converter may further include step S30: Step S30: In response to the interleaved totem pole PFC converter being in a non-light load condition, control at least two sets of high-frequency switching transistors to operate in an interleaved phase manner of 180°.

[0081] Because the output power of the interleaved totem pole PFC converter is high and the input current is large under non-light load conditions, this embodiment controls the high-frequency switching transistors in the interleaved totem pole PFC converter to operate in a 180° phase-interleaved manner when the interleaved totem pole PFC converter is under non-light load conditions. This makes the input current ripple of each group of high-frequency switching transistors similar in amplitude but 180° out of phase. After superposition, the ripple components cancel each other out, which significantly reduces the total input current ripple of the interleaved totem pole PFC converter. At the same time, electromagnetic interference is also effectively suppressed, thus ensuring the high power output quality and good electromagnetic compatibility of the interleaved totem pole PFC converter under non-light load conditions.

[0082] This application also provides a control device, which may include: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the control method of the interleaved totem pole PFC converter in the above embodiments.

[0083] The following is for reference. Figure 7 It shows a schematic diagram of the structure of a control device suitable for implementing the embodiments of this application. Figure 7 The control device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0084] like Figure 7 As shown, the control device may include a processing unit 101 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in read-only memory 102 or a program loaded from storage device 103 into random access memory 104. Random access memory 104 also stores various programs and data required for the operation of the control device. The processing unit 101, read-only memory 102, and random access memory 104 are interconnected via bus 105. Input / output interface 106 is also connected to bus 105. Typically, the following systems can be connected to input / output interface 106: input devices 107 including, for example, touch screens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 108 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 103 including, for example, magnetic tapes, hard disks, etc.; and communication devices 109. Communication device 109 allows the control device to communicate wirelessly or wiredly with other devices to exchange data. Although the diagram shows control equipment with various systems, it should be understood that it is not required to implement or have all of the systems shown. More or fewer systems may be implemented alternatively.

[0085] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 103, or installed from read-only memory 102. When the computer program is executed by processing device 101, it performs the functions defined in the methods of the embodiments of this application.

[0086] The control device provided in this application adopts the control method for the interleaved totem pole PFC converter in the above embodiments, which can improve the working efficiency of the interleaved totem pole PFC converter under light load conditions and improve the reliability of the interleaved totem pole PFC converter. Compared with the prior art, the beneficial effects of the control device provided in this application are the same as the beneficial effects of the control method for the interleaved totem pole PFC converter provided in the above embodiments, and other technical features in the control device are the same as the features disclosed in the methods of the above embodiments, and will not be repeated here.

[0087] It should be understood that various parts of the embodiments of this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0088] The above description is merely a specific implementation of the embodiments of this application, but the protection scope of the embodiments of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of the embodiments of this application. Therefore, the protection scope of the embodiments of this application should be determined by the protection scope of the above claims.

[0089] This application embodiment also provides an interleaved totem pole PFC converter, which may include: At least two sets of high-frequency switching transistors, with the DC sides of each set of high-frequency switching transistors connected in parallel; A set of power frequency switching transistors is connected in parallel with the DC side of at least two sets of high frequency switching transistors; The output capacitor and load resistor are connected in parallel with the DC side of at least two sets of high-frequency switching transistors; An AC input source is provided, with its first end connected to the midpoint of the bridge arm of each group of high-frequency switching transistors via different inductors, and its second end connected to the midpoint of the bridge arm of a group of power frequency switching transistors. The control device in the above embodiment is connected to the control terminals of at least two sets of high-frequency switching transistors.

[0090] Compared with the prior art, the beneficial effects of the interleaved totem pole PFC converter provided in this application embodiment are the same as the beneficial effects of the control device provided in the above embodiments, and other technical features in the interleaved totem pole PFC converter are the same as the features disclosed in the methods of the above embodiments, and will not be repeated here.

[0091] This application also provides a computer-readable storage medium storing a computer program that can run on a processor. The computer program is used to execute the control method of the interleaved totem pole PFC converter in the above embodiments.

[0092] The computer-readable storage medium provided in this application embodiment may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0093] The aforementioned computer-readable storage medium may be included in the control device; or it may exist independently and not assembled into the control device.

[0094] The aforementioned computer-readable storage medium carries one or more programs. When the aforementioned one or more programs are executed by the control device, the control device: in response to the interleaved totem pole PFC converter being in a light-load condition, determines the switching frequency of the switching transistors based on the power frequency of the grid to which the interleaved totem pole PFC converter is connected, wherein the switching frequency of the switching transistors is N / 2 times the power frequency, and N is a positive integer; and controls at least two sets of high-frequency switching transistors to work in a polling manner according to the switching frequency of the switching transistors, with the voltage zero-crossing point of the grid as the switching trigger point.

[0095] Computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0096] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0097] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0098] The computer-readable storage medium provided in this application embodiment stores computer-readable program instructions for executing the control method of the interleaved totem pole PFC converter described above. This improves the operating efficiency of the interleaved totem pole PFC converter under light load conditions and enhances its reliability. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application embodiment are the same as those of the control method for the interleaved totem pole PFC converter provided in the above embodiments, and will not be repeated here.

[0099] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the control method for the interleaved totem pole PFC converter as described above.

[0100] The computer program product provided in this application can improve the operating efficiency of the interleaved totem pole PFC converter under light load conditions and enhance its reliability. Compared with the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the control method for the interleaved totem pole PFC converter provided in the above embodiments, and will not be repeated here.

[0101] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A control method for an interleaved totem pole PFC converter, characterized in that, The interleaved totem pole PFC converter includes at least two sets of high-frequency switching transistors, and the method includes: In response to the interleaved totem pole PFC converter being in a light load condition, the switching frequency of the switching transistor is determined according to the power frequency of the power grid to which the interleaved totem pole PFC converter is connected, wherein the switching frequency of the switching transistor is N / 2 times the power frequency, and N is a positive integer; According to the switching frequency of the aforementioned switching transistors, and with the voltage zero-crossing point of the power grid as the switching trigger point, at least two sets of the aforementioned high-frequency switching transistors are controlled to work in a polling manner.

2. The method as described in claim 1, characterized in that, The step of controlling at least two sets of high-frequency switching transistors to poll and operate in a cycle, based on the switching frequency of the switching transistors and using the zero-crossing point of the grid voltage as the switching trigger point, includes: In response to the voltage of the power grid reaching zero crossing, control at least two groups of high-frequency switching transistors, the currently operating group of high-frequency switching transistors, to enter a wave blocking state. After the zero-crossing blocking interval of the current group of high-frequency switching transistors ends, the next group of high-frequency switching transistors in the current group is controlled to enter the working state with the initial duty cycle. Gradually increase the duty cycle of the next set of high-frequency switching transistors until the target duty cycle is reached.

3. The method as described in claim 2, characterized in that, Before the step of controlling the next group of high-frequency switching transistors in the current group to enter the working state with the initial duty cycle, the method further includes: Obtain the first temperature of the current group of high-frequency switching transistors and the second temperature of the next group of high-frequency switching transistors; In response to the second temperature being less than or equal to a preset temperature threshold, or the second temperature being less than or equal to the first temperature, the step of controlling the next group of high-frequency switching transistors in the current group to enter the working state with an initial duty cycle is executed.

4. The method as described in claim 3, characterized in that, The method further includes: In response to the second temperature being greater than the preset temperature threshold and the second temperature being greater than the first temperature, the first temperature is compared with the preset temperature threshold; In response to the first temperature being less than or equal to the preset temperature threshold, the current group of high-frequency switching transistors is controlled to enter the working state. In response to the first temperature being greater than the preset temperature threshold, an alarm message is output.

5. The method as described in claim 1, characterized in that, The method further includes: Obtain the actual total input current of the interleaved totem pole PFC converter; Compare the actual total input current with the full-load total input current of the interleaved totem pole PFC converter; In response to the actual total input current being less than or equal to a preset proportion of the full-load total input current, it is determined that the interleaved totem pole PFC converter is in a light-load condition. In response to the actual total input current being greater than the full-load total input current of the preset ratio, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

6. The method as described in claim 5, characterized in that, The steps for determining the preset ratio include: The temperature of each group of high-frequency switching transistors in the interleaved totem pole PFC converter is obtained; The preset ratio is determined based on the highest temperature among the temperatures of the high-frequency switching transistors in each group; The preset ratio is negatively correlated with the highest temperature.

7. The method as described in claim 5, characterized in that, Before the step of determining that the interleaved totem pole PFC converter is under light load conditions, the method further includes: In response to the actual total input current being less than or equal to a preset proportion of the full-load total input current, a first duration for which the actual total input current is less than or equal to the preset proportion of the full-load total input current is recorded. In response to the first duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a light load condition.

8. The method as described in claim 5, characterized in that, Before the step of determining that the interleaved totem pole PFC converter is in a non-light load condition, the method further includes: In response to the actual total input current being greater than the preset proportion of the full-load total input current, a second duration for which the actual total input current is greater than the preset proportion of the full-load total input current is recorded; In response to the second duration reaching a preset duration threshold, it is determined that the interleaved totem pole PFC converter is in a non-light load condition.

9. The method according to any one of claims 1 to 8, characterized in that, The method further includes: In response to the interleaved totem pole PFC converter being in a non-light load condition, at least two sets of the high-frequency switching transistors are controlled to operate in an interleaved phase manner of 180°.

10. A control device, characterized in that, The control device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the control method for the interleaved totem pole PFC converter as described in any one of claims 1 to 9.

11. An interleaved totem pole PFC converter, characterized in that, The interleaved totem pole PFC converter includes: At least two sets of high-frequency switching transistors, with the DC sides of each set of high-frequency switching transistors connected in parallel; A set of power frequency switching transistors is connected in parallel with the DC side of at least two sets of high frequency switching transistors; The output capacitor and load resistor are connected in parallel with the DC side of at least two sets of the high-frequency switching transistors; An AC input source, wherein the first end of the AC input source is connected to the midpoint of the bridge arm of each group of high-frequency switching transistors through different inductors, and the second end of the AC input source is connected to the midpoint of the bridge arm of a group of power frequency switching transistors; The control device as described in claim 10, wherein the control device is connected to the control terminals of at least two sets of the high-frequency switching transistors.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the control method for the interleaved totem pole PFC converter as described in any one of claims 1 to 9.

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