A high-gain dc-dc boost circuit

CN123019425APending Publication Date: 2026-10-30BEIJING MECHANICAL EQUIP INST
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Patent Information

Application Number
CN202510547790.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-28
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0015]鉴于上述的分析,本发明实施例旨在提供一种高增益的DC-DC升压电路,用以解决现有用于光伏等升压场景的非隔离型DC-DC变换器输出纹波较大,且增益-效率权衡受限的问题

Benefits of technology

[0026]与现有技术相比,本发明至少可实现如下有益效果之一:

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Abstract

The application relates to a high-gain DC-DC voltage boosting circuit, which comprises a secondary voltage boosting topological unit, a switch inductor capacitor voltage boosting unit, a diode switch D5 and an output capacitor C O The secondary voltage boosting topological unit and the switch inductor capacitor voltage boosting unit are connected in cascade and sequentially boost input voltage; a switch tube S1 is arranged in the secondary voltage boosting topological unit; one end of the diode switch D5 is connected with the output capacitor C O The other end of the diode switch D5 and the other end of the output capacitor C O Are respectively connected with the positive and negative output ends of the switch inductor capacitor voltage boosting unit; the two ends of the output capacitor C O Serve as output ends of the voltage boosting circuit; when the switch tube S1 is turned off, the diode switch D5 is turned on, the switch inductor capacitor voltage boosting unit charges the output capacitor C O , and when the switch tube S1 is turned off or turned on, the output capacitor C O discharges the load. The application realizes a high-gain DC-DC voltage boosting circuit.
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Description

Technical Field

[0001] This invention relates to the field of DC-DC converter technology, and more particularly to a high-gain DC-DC boost circuit. Background Technology

[0002] As an important component of renewable energy, photovoltaic power generation technology is receiving widespread attention and developing rapidly worldwide.

[0003] The output voltage of a single photovoltaic cell (usually called a photovoltaic cell) is relatively low, typically in the range of 0.5-0.8 volts, which is insufficient to meet the voltage and power requirements of practical applications. Therefore, multiple photovoltaic cells are connected in series to form photovoltaic modules (also known as photovoltaic panels or photovoltaic modules) with higher output voltages. To further meet the voltage and power requirements of power systems of different scales, these photovoltaic modules can be flexibly combined in series or parallel according to specific system design requirements to construct photovoltaic arrays and achieve higher voltage or current outputs.

[0004] However, photovoltaic systems face a significant technical challenge in actual operation: partial shading (such as clouds, leaves, dust, etc.) can cause a substantial drop in the output power of some components in the photovoltaic array, thereby affecting the overall system efficiency. This phenomenon stems from the "bottleneck effect" in traditional series structures—when any component in a series circuit is shaded, its current is limited, leading to a reduction in the power output of the entire series branch.

[0005] To address this issue, researchers proposed a photovoltaic system design based on a parallel topology. This architecture achieves electrical decoupling between modules by configuring a dedicated DC-DC converter (such as a micro-inverter or power optimizer) for each photovoltaic module.

[0006] Although photovoltaic technology has made significant progress through module optimization and array design, its DC output voltage remains relatively low, typically ranging from 15V to 45V. This voltage level is insufficient to directly meet the input requirements of medium- and high-voltage power electronic equipment (such as grid-connected inverters and energy storage systems), thus requiring high-gain DC-DC converters to boost the voltage to the hundreds of volts or even higher levels needed for practical applications.

[0007] DC-DC converters play a central role in such systems, their core function being to boost the low output voltage of the photovoltaic array to the target value by adjusting the voltage conversion ratio (Vout / Vin). However, traditional boost converters face technical bottlenecks when operating at high duty cycles (e.g., above 0.9): excessively high duty cycles exacerbate switching losses, reduce conversion efficiency, and trigger severe electromagnetic interference (EMI), thus limiting system reliability and power density. To overcome this limitation, there is an urgent need to develop novel high-gain topologies.

[0008] Isolated DC-DC converters achieve electrical isolation through high-frequency transformers and utilize high turns ratios to increase voltage gain. Despite their inherent advantage of electrical isolation, they still have the following drawbacks:

[0009] 1) Leakage inductance problem: Transformer leakage inductance will generate voltage spikes at the moment of switching, which will increase the stress on power devices;

[0010] 2) Cost and size: High-ratio transformers require more winding turns, which increases cost and size, making them unsuitable for the compact design of distributed photovoltaic systems.

[0011] 3) Transportation limitations: Large transformers face additional challenges during transportation and installation.

[0012] When electrical isolation is not required for the load, non-isolated DC-DC converters become a better choice. To improve their voltage gain, researchers have proposed several technical approaches:

[0013] 1) Voltage multiplier unit (VMC): It uses capacitor energy storage and switch control to achieve voltage superposition, but the output ripple is relatively large;

[0014] 2) Switching inductor and voltage boost (VL-SL) technology: combines inductor energy storage and capacitor discharge, but the gain-efficiency trade-off is limited. Summary of the Invention

[0015] Based on the above analysis, the present invention aims to provide a high-gain DC-DC boost circuit to solve the problems of large output ripple and limited gain-efficiency trade-off in existing non-isolated DC-DC converters used in photovoltaic and other boost scenarios.

[0016] This invention provides a high-gain DC-DC boost circuit, which includes a secondary boost topology, a switched inductor-capacitor boost unit, a diode switch D5, and an output capacitor C. O The secondary boost topology unit is cascaded with the switching inductor-capacitor boost unit to sequentially boost the input voltage; the secondary boost topology unit includes a switching transistor S1; the negative terminal of the diode switch D5 is connected to the output capacitor C. OOne end, the positive terminal of diode switch D5, and the output capacitor C O The other end is connected to the positive and negative output terminals of the switching inductor-capacitor boost unit, respectively; the output capacitor C O The two ends serve as the output terminals of the boost circuit; when the switch S1 is off, the diode switch D5 is on, and the switch inductor-capacitor boost unit is the output capacitor C. O When charging, the output capacitor C is open or closed when the switching transistor S1 is closed. O Both discharged to the load.

[0017] Furthermore, the secondary boost topology unit also includes an inductor L1, a switching branch, a capacitor branch, and an inductor L2; the switching branch and the capacitor branch are connected in parallel, with one end connected to one end of the inductor L1 and the other end connected to the negative terminal of the input power supply Vin, serving as the negative output terminal of the secondary boost topology unit; the other end of the inductor L1 is connected to the positive terminal of the input power supply Vin; the capacitor branch includes a capacitor C1 connected in series and a first switch; the connection point of the capacitor C1 and the first switch is also connected to one end of the inductor L2; the switching branch includes a switching transistor S1 connected in series and a second switch; the connection point of the switching transistor S1 and the second switch is also connected to the other end of the inductor L2, and this connection point serves as the positive output terminal of the secondary boost topology unit.

[0018] Furthermore, the first switch is a diode D1, with the positive terminal of D1 connected to inductor L1 and the negative terminal connected to capacitor C1.

[0019] Furthermore, the second switch is a diode D2, with the positive terminal of D2 connected to inductor L1 and the negative terminal connected to switching transistor S1.

[0020] Furthermore, the switching transistor S1 is an N-channel field-effect transistor. The gate of S1 receives an external switching control signal, the drain of S1 is connected to the second switch, and the source of S1 is connected to the negative terminal of the input power supply Vin.

[0021] Furthermore, the switched inductor-capacitor boost unit includes a switched inductor-capacitor boost circuit and a capacitor C3; the switched inductor-capacitor boost circuit and the capacitor C3 are connected in series.

[0022] Furthermore, the switching inductor-capacitor boost circuit includes a first capacitor branch, a second capacitor branch, and an inductor branch; the first capacitor branch and the inductor branch are connected in parallel, with one end connected to the positive output terminal of the secondary boost topology unit and the other end connected to one end of the second capacitor branch; the inductor branch includes a third switch and an inductor L3, the connection point of the third switch and the inductor L3 is connected to the other end of the second capacitor branch, and the connection point of the third switch and the inductor L3 is also connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to the negative output terminal of the secondary boost topology unit.

[0023] Furthermore, the second capacitor branch includes a fourth switch and capacitor C4 connected in series.

[0024] Furthermore, the third switch is diode D3. The cathode of diode D3 is connected to one end of inductor L3, and the anode of diode D3 is connected to the positive output terminal of the secondary boost topology unit.

[0025] Furthermore, the fourth switch is a diode D4. The negative terminal of D4 is connected to a capacitor C4, and the positive terminal of D4 is connected to the negative terminal of diode D3 and also to one end of capacitor C3.

[0026] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0027] 1. The present invention provides a high-gain DC-DC boost circuit comprising a secondary boost topology unit, a switched inductor-capacitor boost unit, a diode switch D5, and an output capacitor C. O The secondary boost topology unit is cascaded with the switching inductor-capacitor boost unit to sequentially boost the input voltage; the secondary boost topology unit includes a switching transistor S1; the negative terminal of the diode switch D5 is connected to the output capacitor C. O One end, the positive terminal of diode switch D5, and the output capacitor C O The other end is connected to the positive and negative output terminals of the switching inductor-capacitor boost unit, respectively; the output capacitor C O The two ends serve as the output terminals of the boost circuit; when the switch S1 is off, the diode switch D5 is on, and the switch inductor-capacitor boost unit is the output capacitor C. O When charging, the output capacitor C is open or closed when the switching transistor S1 is closed. O Both discharge to the load, featuring low switching stress and continuous output current.

[0028] 2. The secondary boost topology unit in this invention further includes inductor L1, a switch branch, a capacitor branch, and inductor L2; the switch-inductor-capacitor boost circuit includes a first capacitor branch, a second capacitor branch, and an inductor branch; the inductor branch includes a third switch and inductor L3. Based on the volt-second balance principle, the turns ratio between the output and input of the entire DC-DC boost circuit is derived for inductors L1, L2, and L3 as follows: It can achieve high voltage gain at low duty cycles (D is the duty cycle), ensuring high efficiency and optimal performance.

[0029] 3. The high-gain DC-DC boost circuit of this invention uses only one switching transistor S1, which is simple to control. Moreover, the secondary boost topology unit and the switching inductor-capacitor boost unit are equipped with a multi-layer LC filter structure, so the output voltage ripple is small.

[0030] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0031] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0032] Figure 1 This is a circuit schematic of a high-gain DC-DC boost circuit.

[0033] Figure 2 This is a circuit schematic of a high-gain DC-DC boost circuit with switch S1 closed.

[0034] Figure 3 This is a circuit schematic of a high-gain DC-DC boost circuit with the switching transistor S1 disconnected. Detailed Implementation

[0035] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0036] A specific embodiment of the present invention discloses a high-gain DC-DC boost circuit, such as... Figure 1 As shown. The boost circuit includes a secondary boost topology unit, a switched inductor-capacitor boost unit, a diode switch D5, and an output capacitor C. O The secondary boost topology unit is cascaded with the switching inductor-capacitor boost unit to sequentially boost the input voltage; the secondary boost topology unit includes a switching transistor S1; the negative terminal of the diode switch D5 is connected to the output capacitor C. O One end, the positive terminal of diode switch D5, and the output capacitor C O The other end is connected to the positive and negative output terminals of the switching inductor-capacitor boost unit, respectively; the output capacitor C O The two ends serve as the output terminals of the boost circuit; when the switch S1 is off, the diode switch D5 is on, and the switch inductor-capacitor boost unit is the output capacitor C. O When charging, the output capacitor C is open or closed when the switching transistor S1 is closed. O Both discharged to the load.

[0037] The secondary boost topology also includes an inductor L1, a switching branch, a capacitor branch, and an inductor L2. The switching branch and the capacitor branch are connected in parallel, with one end connected to one end of the inductor L1 and the other end connected to the negative terminal of the input power supply Vin, serving as the negative output terminal of the secondary boost topology. The other end of the inductor L1 is connected to the positive terminal of the input power supply Vin. The capacitor branch includes a capacitor C1 connected in series and a first switch. The connection point of the capacitor C1 and the first switch is also connected to one end of the inductor L2. The switching branch includes a switching transistor S1 connected in series and a second switch. The connection point of the switching transistor S1 and the second switch is also connected to the other end of the inductor L2, and this connection point serves as the positive output terminal of the secondary boost topology.

[0038] The first switch is a diode D1, with the positive terminal of D1 connected to inductor L1 and the negative terminal connected to capacitor C1.

[0039] The second switch is diode D2, with the positive terminal of D2 connected to inductor L1 and the negative terminal connected to switching transistor S1.

[0040] The switching transistor S1 is an N-channel field-effect transistor. The gate of S1 receives an external switching control signal, the drain of S1 is connected to the second switch, and the source of S1 is connected to the negative terminal of the input power supply Vin.

[0041] The switching inductor-capacitor boost unit includes a switching inductor-capacitor boost circuit and a capacitor C3; the switching inductor-capacitor boost circuit and the capacitor C3 are connected in series.

[0042] The switching inductor-capacitor boost circuit includes a first capacitor branch, a second capacitor branch, and an inductor branch. The first capacitor branch and the inductor branch are connected in parallel, with one end connected to the positive output terminal of the secondary boost topology unit and the other end connected to one end of the second capacitor branch. The inductor branch includes a third switch and an inductor L3. The connection point of the third switch and the inductor L3 is connected to the other end of the second capacitor branch, and the connection point of the third switch and the inductor L3 is also connected to one end of the capacitor C3. The other end of the capacitor C3 is connected to the negative output terminal of the secondary boost topology unit.

[0043] The second capacitor branch includes a fourth switch and capacitor C4 connected in series.

[0044] The third switch is diode D3. The cathode of diode D3 is connected to one end of inductor L3, and the anode of diode D3 is connected to the positive output terminal of the secondary boost topology unit.

[0045] The fourth switch is diode D4. The negative terminal of D4 is connected to capacitor C4, and the positive terminal of D4 is connected to the negative terminal of diode D3 and also to one end of capacitor C3.

[0046] Specifically, steady-state analysis was performed in continuous current mode (CCM).

[0047] The DC-DC boost circuit disclosed in this embodiment has two working modes, mode 1 and mode 2, depending on the state of the switching transistor S1 in continuous conduction mode (CCM).

[0048] Mode 1: When switch S1 is turned on, diodes D1, D3, and diode switch D5 are turned off. For example... Figure 2 As shown, inductor L1 is charged by the input power supply Vin, while inductors L2 and L3 are energized by capacitors C1, C2, C3, and C4. Capacitors C1 and C3 discharge, capacitors C2 and C4 charge, and the output capacitor C... O Provide energy to the load.

[0049] Mode 2: When switch S1 is off, diodes D2 and D4 are cut off, inductors L1, L2 and L3 discharge, capacitors C1 and C3 are charged, and capacitors C1 and C3 discharge. Output capacitor CO is charged through inductors L2 and L3 and also discharges to the load.

[0050] Combining mode 1 and mode 2 for inductors L1, L2, and L3, based on the volt-second balance principle, we can conclude that:

[0051]

[0052] Solve the following equation:

[0053] DV in +(1-D) (V) in - V C1 ) = 0 (6)

[0054] DV C1 + (1- D)( V C1 -V C3 ) = 0 (7)

[0055] DV C4 +(1-D)(V C3 +V C4 -V O )=0 (8)

[0056] D(V C2 +V C3 )+(1-D)V C2 =0 (9)

[0057] DV C4 +(1-D)V C2 =0 (10)

[0058] From (6), we can conclude that:

[0059] V in =V C1(1-D) (11)

[0060] From (7), we can conclude that:

[0061] V C 3 = V C1 / ( 1 - D) (12)

[0062] From (9), we can conclude that:

[0063] V C2 = -DV C3 (13)

[0064] Substituting (13) into (10) yields:

[0065] V C 4 = (1 - D)V C3 (14)

[0066] By substituting (11)-(14) into (8), we obtain:

[0067]

[0068] This yields the transformation relationship between the input and output of the DC-DC boost circuit.

[0069] Compared with the prior art, the high-gain DC-DC boost circuit provided in this embodiment includes a secondary boost topology unit, a switched inductor-capacitor boost unit, a diode switch D5, and an output capacitor C. O The secondary boost topology unit is cascaded with the switching inductor-capacitor boost unit to sequentially boost the input voltage; the secondary boost topology unit includes a switching transistor S1; the negative terminal of the diode switch D5 is connected to the output capacitor C. O One end, the positive terminal of diode switch D5, and the output capacitor C O The other end is connected to the positive and negative output terminals of the switching inductor-capacitor boost unit, respectively; the output capacitor C O The two ends serve as the output terminals of the boost circuit; when the switch S1 is off, the diode switch D5 is on, and the switch inductor-capacitor boost unit is the output capacitor C. O When charging, the output capacitor C is open or closed when the switching transistor S1 is closed. O Both discharge to the load, exhibiting low switching stress and continuous output current. The secondary boost topology provided in this embodiment also includes inductor L1, a switching branch, a capacitor branch, and inductor L2; the switching-inductor-capacitor boost circuit includes a first capacitor branch, a second capacitor branch, and an inductor branch; the inductor branch includes a third switch and inductor L3. Based on the volt-second balance principle, the turns ratio between the output and input of the entire DC-DC boost circuit is derived as follows: It can achieve high voltage gain at low duty cycles (D is the duty cycle), ensuring high efficiency and optimal performance. The high-gain DC-DC boost circuit provided in this embodiment uses only one switching transistor S1, which simplifies control. Moreover, the secondary boost topology and the switching inductor-capacitor boost unit are equipped with multi-layer LC filter structures, resulting in low output voltage ripple.

[0070] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0071] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A high-gain DC-DC boost circuit, characterized in that, The boost circuit includes a secondary boost topology unit, a switched inductor-capacitor boost unit, a diode switch D5, and an output capacitor C. O The secondary boost topology unit is cascaded with the switching inductor-capacitor boost unit to sequentially boost the input voltage; the secondary boost topology unit includes a switching transistor S1; the negative terminal of the diode switch D5 is connected to the output capacitor C. O One end, the positive terminal of diode switch D5, and the output capacitor C O The other end is connected to the positive and negative output terminals of the switching inductor-capacitor boost unit, respectively; the output capacitor C O The two ends serve as the output terminals of the boost circuit; When switch S1 is off, diode switch D5 is on, and the switching inductor-capacitor boost unit is the output capacitor C. O When charging, the output capacitor C is open or closed when the switching transistor S1 is closed. O Both discharged to the load.

2. The DC-DC boost circuit according to claim 1, characterized in that, The secondary boost topology also includes an inductor L1, a switching branch, a capacitor branch, and an inductor L2. The switching branch and the capacitor branch are connected in parallel, with one end connected to one end of the inductor L1 and the other end connected to the negative terminal of the input power supply Vin, serving as the negative output terminal of the secondary boost topology. The other end of the inductor L1 is connected to the positive terminal of the input power supply Vin. The capacitor branch includes a capacitor C1 connected in series and a first switch. The connection point of the capacitor C1 and the first switch is also connected to one end of the inductor L2. The switching branch includes a switching transistor S1 connected in series and a second switch. The connection point of the switching transistor S1 and the second switch is also connected to the other end of the inductor L2, and this connection point serves as the positive output terminal of the secondary boost topology.

3. The DC-DC boost circuit according to claim 2, characterized in that, The first switch is a diode D1, with the positive terminal of D1 connected to inductor L1 and the negative terminal connected to capacitor C1.

4. The DC-DC boost circuit according to claim 2, characterized in that, The second switch is diode D2, with the positive terminal of D2 connected to inductor L1 and the negative terminal connected to switching transistor S1.

5. The DC-DC boost circuit according to claim 2, characterized in that, The switching transistor S1 is an N-channel field-effect transistor. The gate of S1 receives an external switching control signal, the drain of S1 is connected to the second switch, and the source of S1 is connected to the negative terminal of the input power supply Vin.

6. The DC-DC boost circuit according to claim 2, characterized in that, The switching inductor-capacitor boost unit includes a switching inductor-capacitor boost circuit and a capacitor C3; the switching inductor-capacitor boost circuit and the capacitor C3 are connected in series.

7. The DC-DC boost circuit according to claim 6, characterized in that, The switching inductor-capacitor boost circuit includes a first capacitor branch, a second capacitor branch, and an inductor branch. The first capacitor branch and the inductor branch are connected in parallel, with one end connected to the positive output terminal of the secondary boost topology unit and the other end connected to one end of the second capacitor branch. The inductor branch includes a third switch and an inductor L3. The connection point of the third switch and the inductor L3 is connected to the other end of the second capacitor branch, and the connection point of the third switch and the inductor L3 is also connected to one end of the capacitor C3. The other end of the capacitor C3 is connected to the negative output terminal of the secondary boost topology unit.

8. The DC-DC boost circuit according to claim 7, characterized in that, The second capacitor branch includes a fourth switch and capacitor C4 connected in series.

9. The DC-DC boost circuit according to claim 7, characterized in that, The third switch is diode D3. The cathode of diode D3 is connected to one end of inductor L3, and the anode of diode D3 is connected to the positive output terminal of the secondary boost topology unit.

10. The DC-DC boost circuit according to claim 9, characterized in that, The fourth switch is diode D4. The negative terminal of D4 is connected to capacitor C4, and the positive terminal of D4 is connected to the negative terminal of diode D3 and also to one end of capacitor C3.