A power conversion circuit, a power supply method, and an electronic device

Abstract

Embodiments of the present application disclose a power conversion circuit, a power supply method and an electronic device. The power conversion circuit can include a control unit, a pass-through phase and a multi-stage phase, and the current output by the multi-stage phase is less than the current output by the pass-through phase. The control unit is configured to control the opening or closing of the pass-through phase and the multi-stage phase. The electronic device can use the power conversion circuit to perform the power supply method. In the power supply method, the electronic device starts the multi-stage phase to supply power to the load and outputs a second current; after detecting a condition for starting the pass-through phase, the electronic device starts the pass-through phase to supply power to the load and outputs a first current. The condition for starting the pass-through phase includes that the load current is greater than the sum of the currents provided by each multi-stage phase, and the change amount of the load current in a unit time is greater than or equal to a first threshold. Through the power supply method, the electronic device can realize adaptive power supply adjustment, and further improve the power supply efficiency under light load state and the adaptability to large dynamic scenarios.

Description

Technical Field

[0001] This application relates to the field of terminal technology, and in particular to a power conversion circuit, power supply method and electronic device. Background Technology

[0002] With the development of terminal technology, users have an extremely urgent need for longer battery life in electronic devices such as computers (PCs) and mobile phones, expecting them to support an ultra-long battery life and an always-connected experience. In addition, future AI PCs (AIPCs) are increasingly reliant on computing power; to achieve the required computing power, electronic devices must have strong battery life, further intensifying the demand for improved battery life in electronic devices.

[0003] Improving the power efficiency of electronic devices is one way to effectively extend their battery life. Optimizing the power supply architecture is one such effective method. Common power supply architectures include single-stage multiphase power supply architectures and multi-stage multiphase power supply architectures.

[0004] However, the aforementioned single-stage multiphase power supply architecture has low power efficiency. On the other hand, multi-stage multiphase power supply architecture struggles to quickly and stably provide sufficient current to meet the transient demands of the load, leading to problems such as degraded electronic device performance and response delays, which severely impact the user experience. Summary of the Invention

[0005] This application provides a power conversion circuit, a power supply method, and an electronic device. The power conversion circuit may include a control unit, a direct-flow phase, and multiple phases, wherein the current output by the multiple phases is less than the current output by the direct-flow phase. The control unit controls the opening and closing of the direct-flow phase and the multiple phases. The electronic device can use the power conversion circuit to execute the power supply method. In the power supply method, the electronic device starts the multiple phases to supply power to the load, outputting a second current; after detecting the conditions for the direct-flow phase to start, it starts the direct-flow phase to supply power to the load, outputting a first current. The conditions for the direct-flow phase to start include: the load current is greater than the sum of the currents provided by each of the multiple phases, and the change in load current per unit time is greater than or equal to a first threshold. Through the power supply method, the electronic device can achieve adaptive power supply adjustment under load changes, while further improving power efficiency under light load conditions and adaptability to large dynamic scenarios.

[0006] In a first aspect, this application provides a power conversion circuit, comprising: a control unit, a first step-down circuit, a second step-down circuit, and a third step-down circuit. The input terminal of the first step-down circuit is connected to the output terminal of a power supply, and its output terminal is connected to the power supply terminal of a load. It is used to step down the power supply voltage to supply power to the load, and the output current of the first step-down circuit is a first current. The input terminal of the second step-down circuit is connected to the output terminal of the third step-down circuit, and the input terminal of the third step-down circuit is connected to the output terminal of the power supply. The output terminal of the second step-down circuit is connected to the power supply terminal of the load, and it is used to step down the voltage output by the third step-down circuit to supply power to the load. The output current of the second step-down circuit is a second current, which is less than the first current. The output terminal of the control unit is connected to the control terminal of the first step-down circuit, and the output terminal of the control unit is also connected to the control terminal of the second step-down circuit. The control unit is used to control the first step-down circuit to start or stop, and the control unit is also used to control the second step-down circuit to start or stop.

[0007] By implementing the power conversion circuit provided in the first aspect, electronic devices can combine a direct phase (i.e., the first buck circuit) and a multi-stage phase (i.e., the second buck circuit) in the aforementioned power conversion circuit, thereby further improving the power efficiency of electronic devices under light load conditions and their adaptability to large dynamic scenarios.

[0008] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the conditions for starting the first buck circuit include: the change in load current per unit time is greater than or equal to a first threshold; and / or, the conditions for starting the first buck circuit include: the load current is greater than the sum of the currents provided by each of the second buck circuits, and the current provided by the second buck circuit is less than or equal to the maximum output current of the second buck circuit.

[0009] Implementing the power conversion circuit provided in the above embodiments, the direct-flow phase can be activated when multiple phases are insufficient to supply power to the load, and / or the direct-flow phase can be activated when the load changes too much and multiple phases cannot respond in time, thereby realizing adaptive power supply adjustment under load changes and improving adaptability to large dynamic scenarios.

[0010] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the first step-down circuit includes a first energy storage element that supplies power to the load, the first energy storage element being a first inductor, and the second step-down circuit includes a second energy storage element that supplies power to the load, the second energy storage element being a second inductor, wherein the inductance of the first inductor is less than or equal to the inductance of the second inductor.

[0011] By implementing the power conversion circuit provided in the above embodiments, the direct-flow phase can output a larger current by using a smaller inductor (i.e., the first inductor mentioned above). Therefore, under high dynamic conditions, the direct-flow phase can handle a larger current output, achieving stable power supply to the load under high dynamic conditions, thereby improving the adaptability of electronic devices to high dynamic scenarios. With larger inductance in the multi-stage phases, the power efficiency of the electronic device under light load conditions is improved.

[0012] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, there are multiple first buck circuits.

[0013] Implementing the power conversion circuit provided in the above embodiments, the power conversion circuit may include multiple through phases. Optionally, the inductors in the multiple through phases may have the same inductance. Optionally, the inductors in the multiple through phases may not be identical. It is understood that using multiple through phases containing large inductors can improve the fault tolerance of the power supply architecture, ensuring that the power supply architecture as a whole can still maintain stable power supply even in the event of a phase anomaly in a single through phase.

[0014] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, there are multiple second step-down circuits, and the second inductors in the multiple second step-down circuits are not all the same.

[0015] In implementing the power conversion circuit provided in the above embodiments, optionally, all of these plurality of second buck circuits can be large-inductance inductor phases. Optionally, these plurality of second buck circuits can include at least one large-inductance inductor phase and at least one small-inductance inductor phase. It is understood that when the above power conversion circuit includes multiple multi-stage phases, as the load slowly increases, the electronic device can gradually add multiple stages of phases to stably power the load.

[0016] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the second current output by the multiple second buck circuits is not exactly the same.

[0017] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the first buck circuit and the second buck circuit are integrated into the power management unit (PMU).

[0018] By implementing the power conversion circuit provided in the above embodiments, the device size can be reduced, the design can be simplified, and the cost can be reduced in the direct-phase and multi-stage camera-based PMU. At the same time, the integrated packaging can reduce the number of external connection points and solder points, thereby reducing the number of failure points and further improving the reliability of the above power conversion circuit.

[0019] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the second buck circuit is located in the power management unit (PMU), and the first buck circuit is independent of the PMU.

[0020] When implementing the power conversion circuit provided in the above embodiments, the direct phase is independent of the PMU, so the specifications of the direct phase are not limited by the PMU. Therefore, the selection of the direct phase in the power conversion circuit is more flexible. The selection of the direct phase includes, but is not limited to, the selection of the inductor and the selection of the MOSFET in the direct phase.

[0021] In conjunction with the power conversion circuit provided in the first aspect, in some embodiments, the load includes one or more of the following: a processor, a double-data-rate synchronous dynamic random access memory (DDR), and an organic light-emitting diode (OLED) display.

[0022] The type of load for implementing the power conversion circuit provided in the above embodiments is not limited to a CPU. The processor may also include a GPU, etc.

[0023] Secondly, this application provides a power supply method applied to an electronic device employing the power conversion circuit of any one of claims 1-10. The method includes: controlling a second step-down circuit to supply power to a load and outputting a second current; and, after detecting a condition for the first step-down circuit to start, starting the first step-down circuit to supply power to the load and outputting a first current, wherein the condition for the first step-down circuit to start includes one or more of the following: the load current is greater than the sum of the currents provided by the multiple second step-down circuits; the current provided by the second step-down circuit is less than or equal to the maximum output current of the second step-down circuit; and the change in load current per unit time is greater than or equal to a first threshold.

[0024] Implementing the method provided in the second aspect, the electronic device can activate the aforementioned multi-stage phases to supply power to the load under light load conditions, outputting a second current. When it is detected that the multi-stage phases are insufficient to supply power to the load, and / or when it is detected that the load change is too large and the multi-stage phases cannot respond in time, the aforementioned direct-flow phase is activated to supply power to the load, outputting a first current.

[0025] In conjunction with the method provided in the second aspect, in some embodiments, the method further includes: after a first duration of starting the first step-down circuit, turning off the first step-down circuit, and controlling the second step-down circuit to supply power to the load based on a first power supply strategy, wherein the first power supply strategy performs power supply based on one or more of the following factors: the required current of the second step-down circuit, the temperature of the load, and the voltage range of the second step-down circuit, wherein the required current of the second step-down circuit is equal to the load current.

[0026] By implementing the method provided in the above embodiments, the electronic device can shut down the direct-acting phase after a first duration of activation and control the multi-stage phases to supply power to the load based on the built-in power supply strategy (i.e., the first power supply strategy described above). At this time, the multi-stage phases are already able to respond to the load changes, so the electronic device can use the direct-acting phase for power supply during the period when the multi-stage phases cannot respond, and use the multi-stage phases for power supply after the multi-stage phases respond, thereby improving the adaptability of the electronic device in dynamic scenarios.

[0027] In conjunction with the method provided in the second aspect, in some embodiments, the first duration is greater than or equal to the output delay of the third buck circuit.

[0028] When implementing the method provided in the above embodiments, the first duration can be longer than the time difference between the multi-stage phase and the direct phase in responding to load changes, so that the electronic device ensures that the direct phase can supply power to the load before the multi-stage phase can supply power to the load, thereby ensuring a stable power supply to the load.

[0029] In conjunction with the method provided in the second aspect, in some embodiments, the method further includes: after starting the first step-down circuit, maintaining the first step-down circuit to supply power to the load, and controlling the second step-down circuit to supply power to the load based on a first power supply strategy, wherein the first power supply strategy performs power supply based on one or more of the following factors: the required current of the second step-down circuit, the temperature of the load, and the voltage range of the second step-down circuit, wherein the required current of the second step-down circuit is determined based on the load current and the first current output by the first step-down circuit.

[0030] By implementing the method provided in the above embodiments, after the multi-stage phases can respond to load changes, the electronic device still maintains direct phase to supply power to the load, and at the same time, the first power supply strategy is adopted to select the multi-stage phases to supply power to the load, thereby improving the adaptability in large dynamic scenarios even when there are fewer multi-stage phases.

[0031] Thirdly, this application provides an electronic device including a power conversion circuit and a load as described in the first aspect and any possible implementation thereof, the load including one or more of the following: a processor, a double-data-rate synchronous dynamic random access memory (DDR), and an organic light-emitting diode (OLED) display.

[0032] It is understood that the electronic device provided in the third aspect above adopts the power conversion circuit described in any possible implementation of the first and second aspects above, and therefore the beneficial effects it can achieve can be referred to the beneficial effects in the corresponding power conversion circuit, which will not be repeated here.

[0033] Fourthly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program to implement the method described in the second aspect and any possible implementation thereof.

[0034] Fifthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in the second aspect and any possible implementation thereof.

[0035] In a sixth aspect, this application provides a computer program product, including a computer program that, when executed by a processor, implements the method described in the second aspect and any two possible implementations of the second aspect.

[0036] Understandably, the electronic device provided in the fourth aspect, the computer storage medium provided in the fifth aspect, and the computer program product provided in the sixth aspect are all used to execute the method provided in this application. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods, and will not be repeated here. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of a power conversion circuit in a single-stage multiphase power supply architecture provided in an embodiment of this application;

[0038] Figure 2 This is a schematic diagram of a power conversion circuit in a multi-level, multi-phase power supply architecture provided in an embodiment of this application;

[0039] Figure 3 This is a schematic diagram of a power conversion circuit in a hybrid multiphase power supply architecture provided in an embodiment of this application;

[0040] Figure 4A This is a schematic diagram of a hybrid switched capacitor topology provided in an embodiment of this application;

[0041] Figure 4B This is a schematic diagram of a BUCK topology provided in an embodiment of this application;

[0042] Figure 4C This is a schematic diagram of a three-level Buck / Boost topology provided in an embodiment of this application;

[0043] Figure 5 This is a power supply schematic diagram of a hybrid multiphase power supply architecture provided in an embodiment of this application;

[0044] Figure 6 This is a schematic diagram of a single-stage and multi-stage feedback loop in a hybrid multiphase power supply architecture provided in an embodiment of this application;

[0045] Figure 7 This is a schematic diagram of a power conversion circuit in another hybrid multiphase power supply architecture provided in this application embodiment;

[0046] Figure 8 This is a schematic diagram illustrating the dynamic effects of different power supply architectures provided in an embodiment of this application;

[0047] Figure 9 This is a schematic diagram illustrating the power efficiency of different power supply architectures under different loads, as provided in the embodiments of this application.

[0048] Figure 10 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0049] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be a limitation of this application.

[0050] With the development of terminal technology, users have an extremely urgent need for longer battery life in electronic devices such as computers (PCs) and mobile phones, expecting them to support an ultra-long battery life and an ultimate always-on always-connected (AOAC) experience. In addition, future AI PCs (AIPCs) are increasingly reliant on computing power; to achieve the required computing power, electronic devices must have strong battery life as support, further intensifying the demand for improved battery life in electronic devices.

[0051] Improving the power efficiency of electronic devices is one way to effectively extend their battery life. Power efficiency refers to the ratio of a power system's output power to its input power. This ratio reflects the efficiency of energy utilization during the power supply process (i.e., the energy conversion process) and the proportion of energy lost during conversion. In this energy conversion process, electrical energy is primarily lost as heat. Therefore, improving power efficiency reduces the energy lost as heat during conversion, ensuring that more of the input electrical energy is used to maintain the normal operation of the electronic device. Thus, with a fixed total electrical input, improving power efficiency can effectively extend the battery life of electronic devices.

[0052] Optimizing the power supply architecture is one of the effective means to improve power efficiency. The aforementioned power supply architecture refers to a series of electronic components in an electronic device that convert the power supply voltage (such as a battery or external power adapter) or other input voltage into the voltage required by various internal components (also called loads), as well as the connection methods and control logic between them. The hardware part of the aforementioned power supply architecture and its connection relationships are called power conversion circuits. Common power supply architectures include single-stage multi-phase power supply architectures and multi-stage multi-phase power supply architectures. Here, "phase" refers to the power supply circuit in the power supply architecture; for example, three power supply circuits can be referred to as the first phase, second phase, and third phase, respectively. "Multi-phase" indicates that multiple power supply circuits supply power to the load.

[0053] The aforementioned single-stage multiphase power supply architecture refers to a power supply architecture that directly transforms the battery voltage (Vbat) or other input voltage to the voltage required by the load (also known as the load voltage) through a single voltage transformation. Figure 1 This is a schematic diagram of a power conversion circuit in a single-stage multiphase power supply architecture provided in an embodiment of this application. The load can be... Figure 1 The central processing unit (CPU) shown is illustrated. Figure 1 As shown, each phase can consist of a driver chip, two metal-oxide-semiconductor field-effect transistors (MOSFETs), and an inductor. The driver chip controls the switching state of the MOSFETs. Specifically, the driver chip receives control signals and generates appropriate gate drive voltages to control the MOSFETs' on / off states. The MOSFETs function as switches in this power supply architecture; their switching action controls the charging and discharging process of the inductor, thereby achieving continuous current flow and stable voltage output, ultimately providing the voltage required by the CPU to maintain its normal operation.

[0054] However, since all voltage conversions are completed in one stage in the above single-stage multiphase power supply architecture, if the energy conversion in this process is not optimal, more energy loss may occur, resulting in lower power efficiency.

[0055] Therefore, most electronic devices currently employ multi-stage, multi-phase power supply architectures to improve battery life. This multi-stage, multi-phase power supply architecture refers to a power supply architecture where the battery voltage or input voltage is converted to an intermediate voltage by a converter, and then converted to the load voltage by the intermediate voltage. Figure 2This is a schematic diagram of a power conversion circuit in a multi-level, multi-phase power supply architecture provided in an embodiment of this application. Wherein, Figure 2 The inductors 1 through N in the diagram are only used to distinguish different inductors in a multi-stage, multi-phase power supply architecture and do not imply that... Figure 2 Inductors 1 to N in the middle Figure 1 The inductors 1 through N are the same.

[0056] and Figure 1 Similarly, each phase above also consists of a driver chip, two MOSFETs, and at least one inductor. Compared to Figure 1 The power conversion circuit of the single-stage multiphase power supply architecture shown is, in such Figure 2 In the power conversion circuit of the multi-stage, multi-phase power supply architecture shown, the voltage input to the inductor of each phase is not the original power supply voltage or input voltage, but a proportional output voltage (Vn:1) after preliminary voltage reduction processing. This proportional output voltage can be obtained by processing the power supply voltage through an N:1 step-down circuit. For example, assuming the power supply voltage is 4.2V and N=2, then after this N:1 step-down circuit, a proportional output voltage of 2.1V can be obtained. If the CPU requires a load voltage of 0.8V, the electronic device can further step down this 2.1V Vn:1 to generate the required 0.8V load voltage.

[0057] The advantage of this multi-stage, multi-phase power supply architecture is that it allows the power system to perform voltage conversion in stages, and each stage can be optimized for specific voltage requirements, thereby improving overall power efficiency.

[0058] However, the aforementioned multi-stage, multi-phase power supply architecture cannot meet the requirements of high-dynamic scenarios, meaning its adaptability to such scenarios is poor. High-dynamic scenarios refer to situations where load demand changes significantly. For example, when a user switches from a low-load application (such as a document editor) to a high-load application (such as a game), the device load suddenly increases significantly, constituting a high-dynamic scenario. In such scenarios, electronic devices need to respond quickly to load changes to maintain stable voltage and current output. However, existing multi-stage, multi-phase power supply architectures struggle to quickly and stably provide sufficient current to meet the transient demands of the load, leading to performance degradation, response delays, and other problems that severely impact user experience.

[0059] Therefore, embodiments of this application provide a power conversion circuit, a power supply method, and an electronic device. The power supply architecture including the aforementioned power conversion circuit is also referred to as a hybrid multiphase power supply architecture. The power conversion circuit includes both multi-stage and single-stage architecture components. The electronic device can employ this hybrid multiphase power supply architecture to achieve adaptive power supply adjustment under load changes when implementing the aforementioned power supply method.

[0060] The load is not limited to a CPU; it can also be other processors (such as GPUs), double data rate synchronous dynamic random-access memory (DDR), organic light emitting diode (OLED) displays, or other electronic components that require power. This application does not impose any special limitations on this. In the following description, the load is illustrated using a CPU as an example.

[0061] Figure 3 This is a schematic diagram of a power conversion circuit in a hybrid multiphase power supply architecture provided in an embodiment of this application. The hybrid multiphase power supply architecture includes at least one direct-through phase and at least one multi-stage phase. The direct-through phase refers to a power supply circuit that directly converts the battery voltage (Vbat) or other input voltage to obtain the load voltage, and the multi-stage phase refers to a power supply circuit that converts the battery voltage or other input voltage multiple times to obtain the load voltage. The direct-through phase is also referred to as a first buck circuit, and the multi-stage phase is also referred to as a second buck circuit.

[0062] by Figure 3 Taking the hybrid multiphase power supply architecture shown as an example, the hybrid multiphase power supply architecture may include a multiplexer controller, a pulse modulation controller, an N:1 buck converter, a through phase, a large inductor phase, and several small inductor phases. The large inductor phase refers to a phase including at least one large inductor (e.g., L1), and the small inductor phase refers to a phase including at least one small inductor (e.g., L2). Both the large and small inductor phases belong to the multi-stage phases. The multiplexer controller and the pulse modulation controller can be combined and referred to as a control unit. The number of pulse modulation controllers can be consistent with the number of phases in the hybrid multiphase power supply architecture. The N:1 buck converter is also called the third buck converter. The architecture of the N:1 buck converter can be as follows: Figure 4A The hybrid switched-capacitor (HSC) topology shown, or as... Figure 4B The BUCK topology shown, or Figure 4CThe three-level Buck / Boost topology is shown. Specifically, as shown... Figure 4C As shown, the above three-level Buck / Boost topology can be a three-level Buck / Boost bidirectional converter topology with a flying capacitor (Cfly). It is not limited to the above topology; the architecture of the above N:1 buck circuit can also be other topologies, and this application embodiment does not impose any special limitations on them.

[0063] In the above hybrid multiphase power supply architecture, the input terminal of the direct-flow phase can be connected to the output terminal of the power supply, and the output terminal of the direct-flow phase is connected to the power supply terminal of the load, used to step down the power supply voltage to supply power to the load. Optionally, the power supply terminal of the load is the VCC pin of the load. The input terminal of the N:1 step-down circuit is connected to the output terminal of the power supply, used to convert the power supply voltage into a proportional output voltage Vn:1 for output. The input terminal of the large-inductance inductor phase is connected to the output terminal of the N:1 step-down circuit. Figure 3 In simplified terms, the input terminal of the phase is marked Vn:1, and the output terminal can be connected to the power supply terminal of the load to step down Vn:1 and supply power to the load. Similar to the connection relationship of the large inductor phase, the input terminal of the small inductor phase is connected to the output terminal (also denoted as Vn:1) of the N:1 step-down circuit, and the output terminal can be connected to the power supply terminal of the load to step down Vn:1 and supply power to the load. The multiplexer controller is used to select a suitable phase to supply power to the load. The pulse controller can be used to activate or conduct the phase selected by the multiplexer controller to supply power to the load. In some embodiments, the output terminal of each pulse modulation controller can be connected to the control terminal of each phase (including direct-through phases and multi-stage phases). Under the control of the multiplexer controller, by adjusting the duty cycle of the pulse width modulation (PWM) signal, the pulse modulation controller can control the current flowing through the switching element (such as the MOSFET mentioned above), thereby adjusting the output voltage of that phase. Understandably, when the pulse modulation controller turns on a phase, that phase can be considered as the selected circuit to supply power to the load, i.e., that phase is activated. Similarly, if the pulse modulation controller turns off a phase, it is considered as that phase is off and no longer supplies power to the load. That is, the control unit (including the multiplexer and the pulse modulation controller) can be used to control the activation or deactivation of direct-acting phases and multi-stage phases. In some embodiments, the pulse modulation controller can also be directly integrated into the multiplexer.

[0064] Furthermore, the aforementioned direct-through phase may include a driver chip n+1, two MOSFETs, and an energy storage element (such as a small-inductance inductor Ln+1). The MOSFET connected between the power supply voltage Vbat and the inductor Ln+1 is the high-side MOSFET, and the MOSFET connected between the inductor Ln+1 and ground is the low-side MOSFET. The energy storage element is used to supply power to the load. The energy storage element of the direct-through phase is also referred to as the first energy storage element, which is the first inductor. The driver chip n+1 can receive control signals (such as the aforementioned PWM signal) from a multiplexer controller, which are used to control the switching state of the two MOSFETs. It is understood that the driver chip n+1 can also ensure that the high-side MOSFET and the low-side MOSFET do not conduct simultaneously to avoid a short circuit. Specifically, when the high-side MOSFET is turned on and the low-side MOSFET is turned off, current flows from the power supply voltage / input voltage Vbat through inductor Ln+1, and inductor Ln+1 begins to store energy. When the low-side MOSFET is turned on and the high-side MOSFET is turned off, the current in inductor Ln+1 flows to ground through the low-side MOSFET and the lower end of inductor Ln+1, completing the discharge process of inductor Ln+1. Simultaneously, an induced electromotive force is generated at the output terminal of inductor Ln+1 (the end connected to the load), which can provide the required load voltage to the load. It can be understood that the driver chip n+1 can control the charging and discharging rate of inductor Ln+1 by adjusting the switching frequency of the MOSFET, thereby regulating the output load voltage.

[0065] Understandable, such as Figure 3 As shown, the above-mentioned multi-level phase (i.e. Figure 3 The circuit structure of the large-inductance phase and the small-inductance phase (in the above-mentioned multi-stage phase) can be referred to the relevant description of the direct-through phase, and will not be repeated here. The distinction between the above-mentioned multi-stage phase and the direct-through phase includes that the input voltage of the above-mentioned multi-stage phase is Vn:1, while the input voltage of the direct-through phase is Vbat. In the above-mentioned multi-stage phase, the difference between the large-inductance phase and the small-inductance phase is that the small-inductance phase uses a small-inductance inductor, while the large-inductance phase uses a large-inductance inductor. The inductance of the small-inductance inductor is less than the first inductance threshold, and the inductance of the large-inductance inductor is greater than or equal to the second inductance threshold. For example, the small-inductance inductor is an inductor with an inductance less than 200 nanohenries, and the large-inductance inductor is an inductor with an inductance greater than or equal to 200 nanohenries. It can be understood that the energy storage element in the above-mentioned multi-stage phase is also called the second energy storage element, and the second energy storage element is the second inductor. Optionally, such as... Figure 3As shown, the inductance of the first inductor is less than or equal to the inductance of the second inductor. For example, the inductance of the direct-flow phase is less than or equal to the inductance of the inductor in the high-inductance phase, and also less than or equal to the inductance of the inductor in the low-inductance phase. However, this is not a limitation. As long as the output current of the direct-flow phase is greater than the output current of the multi-stage phases, the inductance of the first inductor can also be slightly greater than the inductance of the second inductor. For example, it is possible for the inductance of the direct-flow phase to be greater than that of the low-inductance phase. This application does not impose any special limitations on this aspect.

[0066] The above Figure 3 The hybrid multiphase power supply architecture shown can be further simplified as follows: Figure 5 The diagram shown illustrates the power supply architecture of the hybrid multiphase power supply system. The following will explain... Figure 5 To introduce how electronic devices specifically utilize based on Figure 3 The power supply architecture shown illustrates the process of supplying power to a load (such as a CPU). Specifically, in... Figure 5 In this context, each voltage regulation module can be considered as... Figure 3 Each phase in the process. Specifically, the aforementioned first voltage regulation module can correspond to... Figure 3 The large-capacity inductor phase in the above-mentioned second voltage regulation module to the nth voltage regulation module can correspond to... Figure 3 In the small inductance phase, the above-mentioned (n+1)th voltage regulation module can correspond to... Figure 3 The straight-through phase in the middle, Figure 5 The voltage converter N:1 in the middle can be regarded as Figure 3 The N:1 step-down circuit in the circuit.

[0067] Depend on Figure 5 It can be seen that, on the one hand, the electronic device can input the battery voltage into the voltage converter N:1 for the first step-down conversion, and the output voltage is the aforementioned intermediate voltage. This intermediate voltage can then be input into various voltage regulation modules. When a voltage regulation module is turned on, the electronic device can output current through this module, thereby powering the CPU. Specifically, as... Figure 5 As shown, when the electronic device controls the first voltage regulation module to turn on, the first voltage regulation module outputs I1 to the CPU; when the electronic device controls the second voltage regulation module to turn on, the second voltage regulation module can output I2 to the CPU. And so on, the nth voltage regulation module can output I after being turned on. n To the CPU. Understandably, since the voltage regulation module also performs a voltage conversion on the input intermediate voltage to output the load voltage required by the CPU, the above describes how electronic devices utilize a multi-stage architecture within a hybrid multiphase power supply architecture to power the CPU.

[0068] On the other hand, electronic devices can also utilize the single-stage architecture portion of a hybrid multiphase power supply architecture to power the CPU, that is, as... Figure 5 As shown, the electronic device can directly input the battery voltage into the (n+1)th voltage regulation module. When the (n+1)th voltage regulation module is turned on, it outputs I. n+1 To the CPU. Where the (n+1)th voltage regulation module is a direct-through phase, the current I output by the direct-through phase is... n+1 Also known as the first current; the above-mentioned first voltage regulation module to the nth voltage regulation module are multi-stage phases, then the I1~I output of the above-mentioned multi-stage phases n Also known as the second current, the second current is less than the first current.

[0069] In the aforementioned hybrid multiphase power supply architecture, under the same conditions of input voltage and switching frequency, the larger the inductance of each phase, the smaller the current actually output to the CPU for that phase; conversely, the smaller the inductance of a phase, the larger the current actually output to the CPU for that phase. This is understandable because, for standardized design requirements, industrial designs typically design inductors with large and small inductance to be of the same size. The formula for calculating inductance is as follows: Where L is the inductance, μ0 is the free permeability, and μ r Here, N is the relative permeability of the material, A is the number of turns in the coil, and l is the cross-sectional area of ​​the coil. To increase the inductance within the same volume, researchers typically increase the number of turns N. Increasing the number of turns N leads to a longer conductor, which in turn increases the resistance R of the inductor. Since current loss P = I... 2 Therefore, the larger the resistance R of the inductor, the greater the loss P when the same current flows through it. Increased loss P leads to inductor heating and a rise in temperature. To ensure the normal operation of the inductor and avoid overheating damage, the current I flowing through the inductor must be limited. Therefore, compared to a small inductor, a large inductor has a larger DC resistance R, which reduces the maximum current it can withstand, resulting in a smaller output current. Similarly, a small inductor has fewer coils and a correspondingly lower resistance, resulting in less loss. This allows a small inductor to withstand a larger maximum current, leading to a larger output current.

[0070] Therefore, it is understandable that for Figure 5 In the hybrid multiphase power supply architecture shown, since the first voltage regulation module contains a large inductance inductor, while the second to nth voltage regulation modules contain small inductance inductors, the maximum output current of each voltage regulation module should actually satisfy the following formula: I1 <I2、I3、In Among them, I m This is used to represent the maximum output current of the m-th voltage regulation module, where m can be 1 to n.

[0071] The (n+1)th voltage regulation module mentioned above also contains an inductor with a small inductance value; therefore, I1 n+1 Since the (n+1)th voltage regulation module is located in the single-stage architecture, it is used to quickly respond to load changes to power the CPU. Understandably, during a sudden load change, the instantaneous current output of the (n+1)th voltage regulation module may need to support the sum of the output currents of one or more voltage regulation modules in a multi-stage architecture. Therefore, the current output of the (n+1)th voltage regulation module should be greater than that of the second to nth voltage regulation modules, i.e., the current output of I... n+1 It can satisfy the following formula: I1 <I2、I3、I n n11 .

[0072] The power supply method described above can be implemented based on the power conversion circuit. It is understood that when load demand changes, the electronic device can select and activate different voltage regulation modules to provide the required voltage and current to the load. Specifically, the electronic device can dynamically select the appropriate voltage regulation module to activate based on a power supply strategy comprised of multiple factors such as the load's power demand, voltage range, current requirements, and load temperature. That is, the electronic device can dynamically determine which phase or phases to use to power the CPU based on the aforementioned power supply strategy. To achieve this goal, optionally, the electronic device can assign different weights to multiple influencing factors and calculate the weighted average of each phase in real time during the power supply process, dynamically adjusting the power supply phases based on the calculation results. Not limited to the above method, this application does not specifically limit the power supply strategy adopted by the multi-channel selection controller or the factors considered in the power supply strategy.

[0073] ​​For example, when the electronic device is in standby mode, the CPU is in the aforementioned light-load state, which refers to a situation where the load current is less than a first current threshold. For example, the first current threshold is 2A. At this time, the electronic device only needs to input a small current (e.g., 2A) to the CPU to ensure its normal operation in standby mode. Therefore, the electronic device can control the first voltage regulation module to be turned on, while other voltage regulation modules are not turned on, thus using only I1 to power the CPU. As the load increases, the current required to support the normal operation of the CPU (i.e., the load current required by the CPU) also increases. It is understandable that the electronic device can control the load current supplied to the CPU by controlling whether the voltage regulation modules are turned on. For example, when the load increases, the load current required by the CPU rises from 2A to 4A. In addition to the already turned-on first voltage regulation module, the electronic device can also control the second voltage regulation module to be turned on, thus using I1+I2 to provide 4A of load current to the CPU. It is understandable that as the load continues to increase, the electronic device can also sequentially turn on subsequent third and fourth voltage regulation modules (…). Figure 5 (Not shown in the diagram) up to the nth voltage regulation module. n is a positive integer greater than or equal to 3.

[0074] In the above process, the power conversion circuit can detect the load change in various ways. In one implementation, a current detection point is set at the output terminal of each voltage regulation module. The multiplexing controller can determine whether the load has changed by detecting the current change at the current detection point, and then determine whether the power supply phase needs to be changed. For example, taking the first voltage regulation module as an example, the maximum output current of the first voltage regulation module can be 3A, but in the power conversion circuit, the first voltage regulation module can be set to provide a current of 2A to the load. That is, under light load conditions, when the control unit controls the first voltage regulation module to conduct and supply power to the load, the output I1 of the first voltage regulation module does not exceed 2A. It is understandable that, for each phase, for considerations such as stable power supply to each phase, the developers can set the current provided by each phase to be less than or equal to its maximum output current. If the multiplexing controller detects that the actual output current of a certain phase (e.g., the first voltage regulation module actually outputs 2.5A) is greater than or equal to the set current (e.g., 2A), it indicates that the load has increased. At this time, the multiplexing controller can start another phase to supply power.

[0075] Not limited to the above detection method, the above load can also directly output relevant information about load changes to the above control unit. The embodiments of this application do not make special limitations on how the above control unit detects load changes.

[0076] Not limited to the sequential conduction of the voltage regulation modules described above, the multiplexing controller can also select to conduct both the first and third voltage regulation modules, thereby using I1+I3 to provide a 4A load current to the CPU. It is understood that in the power supply method provided in this application embodiment, the multiplexing controller does not specifically limit which phase(s) to select to power the CPU after a load change in the electronic device.

[0077] However, the one or more phases selected by the aforementioned multiplexer controller to power the CPU should satisfy the following formula:

[0078]

[0079] In this context, I_chosed_m represents the current supplied by the m-th selected opposing load, and I_load represents the load current required by the load. It can be understood that the above formula implies that the sum of the currents supplied by one or more opposing loads selected by the multiplexing controller should be greater than or equal to the current required by the load.

[0080] Understandably, once the hardware structure is determined, the maximum current output by each phase and the current supplied by each phase can also be determined. The aforementioned multiplexing controller, after initially determining which phase(s) to select to power the CPU based on the above power supply strategy, can then use the above formula... This initial selection was validated to ensure that the chosen phase could meet the load's current requirements.

[0081] Understandably, the aforementioned multiplexing controller selects different multi-stage phase combinations to power the load based on the power supply strategy. This process assumes that the load on the electronic device gradually increases, and that the multi-stage phases can respond promptly to load changes, ensuring a stable power supply to the load. However, in dynamic scenarios, such as when a user closes a document editor and opens a game, the CPU suddenly switches from a light-load state to a heavy-load state. For example, the CPU's required load current suddenly increases from 2A to 12A. Here, the heavy-load state refers to a situation where the load current is greater than or equal to a second current threshold. For example, the second current threshold is 12A. Understandably, although the electronic device can provide sufficient load current to the CPU by controlling the conduction of the first to nth voltage regulation modules, these modules are located in the multi-stage architecture of the hybrid power supply architecture and require at least two voltage conversions. Therefore, the first to nth voltage regulation modules cannot quickly respond to the aforementioned load changes.

[0082] In other words, under highly dynamic scenarios, multi-phase power supply cannot respond to load changes in a timely manner, nor can it provide a stable power supply to the load. This is understandable because, compared to direct-flow phases, the multi-phase power supply architecture described above has more complex feedback loops, which means that adjusting the power supply by adjusting the multi-phase power supply requires more time.

[0083] Figure 6 This is a schematic diagram of single-stage and multi-stage feedback loops in a hybrid multiphase power supply architecture provided in an embodiment of this application. Figure 6 As shown, the feedback loop in the above hybrid power supply architecture can include two types of feedback loops, one of which is Figure 6 The upper part of the single-stage feedback loop, one type is Figure 6 The lower part is a multi-stage feedback loop. The aforementioned single-stage feedback loop can be... Figure 6 The feedback loop in the (n+1)th voltage regulation module can be described as follows: Figure 5 The feedback loops of the first voltage regulation module to any voltage regulation module in the nth voltage regulation module are described below. The following explanation uses a single-stage feedback loop as the feedback loop in the (n+1)th voltage regulation module and a multi-stage feedback loop as the feedback loop in the first voltage regulation module as an example.

[0084] The aforementioned single-stage feedback loop may include a voltage deviation detection module n+1, a current deviation detection module n+1, two operational amplifiers (operational amplifier 1 and operational amplifier 2), an H(S) feedback module, a comparator, a NOT gate, two MOSFETs, an inductor Ln+1, a bypass capacitor, a voltage detection point, and a current detection point. The voltage and current detection points can be located at the output of the inductor Ln+1. The input of the voltage deviation detection module n+1 is connected to the voltage detection point, and its output is connected to operational amplifier 1. The input of the current deviation detection module is connected to the current detection point, and its output is connected to operational amplifier 1. The output of operational amplifier 1 is connected to the input of operational amplifier 2. The other input of operational amplifier 2 is used to receive the input reference voltage deviation, and its output is connected to the input of the H(S) feedback module. The output of the H(S) feedback module is connected to the positive input of the comparator. The negative input of the comparator is used to receive a standard signal. The output of the comparator is directly connected to the control terminal of MOSFET1 and also connected to the control terminal of MOSFET2 via a NOT gate. The input of MOSFET1 is connected to the power supply, and its output is connected to inductor Ln+1. The input of MOSFET2 is connected to inductor Ln+1, and its output is grounded. The output of inductor Ln+1 is connected to the input of the bypass capacitor.

[0085] Specifically, in the aforementioned single-stage feedback loop, the electronic device can obtain real-time voltage from the aforementioned voltage detection point and real-time current from the aforementioned current detection point. Then, it calculates the voltage deviation using the aforementioned voltage deviation detection module and the current deviation using the aforementioned current deviation detection module. The voltage reference value and current reference value can be stored internally within the electronic device beforehand. Subsequently, the electronic device can use the aforementioned operational amplifier 1 (which can be configured as an adder) to normalize the two types of deviations into a voltage deviation. For example, the aforementioned operational amplifier 1 can convert the aforementioned current deviation ΔI_n+1 into a voltage deviation ΔV_n+1 according to the following formula and output the calculation result ΔV_n+1_new:

[0086] △V_n+1_new=△V_n+1+K×△I_n+1

[0087] Here, K, also known as the mixing factor, is used to convert current error into voltage error. K can be predetermined by the researchers and stored in the electronic device.

[0088] Subsequently, the electronic device can input the calculated voltage deviation ΔV_n+1_new into the operational amplifier 2. This operational amplifier 2 can be configured as a differential amplifier to calculate and output the difference between the voltage deviation ΔV_n+1_new and the reference voltage deviation ΔVref_n+1. This difference can be considered as the voltage deviation itself. This difference is then fed into the H(S) feedback module, which processes the input error signal (i.e., the voltage deviation) and outputs a control signal to the positive input of the comparator. The output control signal is used to adjust the duty cycle of the PWM controller. This processing can be described by the transfer function H(S). It is understood that the transfer function can be a simple proportional gain, for example, H(s) = M, or it can be a more complex filter or controller (such as a PID controller). This application embodiment does not impose any special limitations on the specific content of the transfer function H(s). The control signal is input to the positive input terminal of the comparator, and the negative input terminal of the comparator can be input with a standard signal for reference. This standard signal can be preset by the R&D personnel. The comparator is used to compare these two input signals and output a high-level or low-level signal based on the comparison result. Specifically, in a switching power supply, the comparator is used to generate a PWM signal and can adjust the duty cycle of the PWM signal based on changes in the input control signal. The PWM signal is used to control MOSFET1 and MOSFET2. The PWM signal output by the comparator can also be processed by an NOT gate before being input to MOSFET2, ensuring that only one MOSFET (either MOSFET1 or MOSFET2) is in the on state, thereby realizing the charging and discharging of inductor Ln+1.

[0089] Understandably, in the above single-stage feedback loop, the loop containing the H(S) feedback module can be referred to as the main feedback loop. Compared to the single-stage feedback loop, the multi-stage feedback loop includes a pre-stage feedback loop before the main feedback loop containing the H(S) feedback module. This pre-stage feedback loop can include two operational amplifiers (operational amplifier 3 and operational amplifier 4) and the H(s) pre-stage feedback module. One input terminal of operational amplifier 3 is connected to the output terminal of operational amplifier 1, and the other input terminal of operational amplifier 3 is used to input the first reference voltage deviation ΔVref_1_1. The output terminal of operational amplifier 3 is connected to the input terminal of operational amplifier 4. The other input terminal of operational amplifier 4 can be used to receive the second reference voltage deviation ΔVref_1_2. Optionally, the value of the second reference voltage deviation can be the same as the value of the first reference voltage deviation. The output terminal of operational amplifier 4 is connected to the input terminal of the H(s) pre-stage feedback module, and the output terminal of the H(s) pre-stage feedback module is connected to one input terminal of operational amplifier 2. Understandably, in a multi-stage feedback loop, one input of the operational amplifier 2 is still the voltage deviation of the output of the operational amplifier 1, while the other input is changed from the first reference voltage deviation to the output of the H(s) pre-stage feedback module.

[0090] Understandably, the input of the aforementioned pre-amplifier feedback loop at time 1 (i.e., the input of operational amplifier 3 at time 1) is denoted as V_err1. This V_err1, after calculation by the operational amplifier, can be denoted as V_err2. Similarly, the input of the aforementioned pre-amplifier feedback loop at time 2 can be denoted as ΔV_err1'. This V_err1', after calculation by the operational amplifier, can be denoted as V_err2'. The electronic device can use the voltage deviation error between different times as one input ΔV_err2 to the aforementioned operational amplifier 4, and then V_err2' - V_err2. The other input to the aforementioned operational amplifier 4 is the second reference voltage deviation ΔVref_1_2. Therefore, the result output by the operational amplifier 4 to the H(S) pre-amplifier feedback module is ΔVref_1_2 - ΔV_err2. Understandably, ΔVref_1_2 - ΔV_err2 can be considered as an error signal input to the aforementioned H(S) pre-amplifier feedback module. The aforementioned H(S) preamplifier feedback module is used for preliminary stabilization, amplification, or adjustment of the signal. For example, the H(S) preamplifier feedback module can be used to improve signal distortion. As another example, the H(S) preamplifier feedback module can adjust the amplitude, phase, etc., of the signal, thereby making the signal output to operational amplifier 2 more consistent with the requirements of the main feedback loop.

[0091] Not limited to, for example Figure 6The feedback loop structure shown in this application does not impose any special limitations on the specific structural details of single-stage and multi-stage feedback loops.

[0092] Based on the above discussion of single-stage and multi-stage feedback loops, we can conclude that electronic devices in a single-stage feedback loop only need load data at one moment to adjust power supply. In contrast, a multi-stage feedback loop requires load data at two different moments to perform the adjustment. Furthermore, compared to a single-stage feedback loop, a multi-stage feedback loop involves more computational steps, making it more complex and slower in processing. In hybrid multiphase power supply architectures, the multi-stage architecture partly relies on multi-stage feedback loops to regulate power supply. This means that when faced with large load changes, the aforementioned multi-stage architecture may not be able to respond quickly to load fluctuations, or may not be able to continuously provide stable power to the load. This delay and complexity can affect the efficiency and stability of power supply in high-dynamic scenarios. That is, for the CPU, there exists a delay period during which the CPU requires 12A of load current, but the aforementioned multi-stage architecture part can only provide 2A of load current.

[0093] In the aforementioned hybrid multiphase architecture, the single-stage architecture relies on the single-stage feedback loop to regulate power supply. Therefore, in high-dynamic scenarios, the direct-flow phase can respond promptly to load changes, thus providing a stable power supply to the load. Consequently, in the direct-flow phase, the electronic equipment can use a small-capacity inductor Ln+1, thereby outputting a larger I. n+1 Understandably, at this point, the I output by the (n+1)th voltage regulation module mentioned above... n+1 This system can handle the increased load current (e.g., 10A in the example above) when the multi-level architecture is unable to respond to the increased load current demand. Specifically, the condition for the direct-phase activation can include a change in load current greater than or equal to a first threshold per unit time, where the first threshold can be determined empirically by the developers. That is, in the above power supply method, the electronic device can control multiple phases to supply power to the load, outputting a second current. After detecting the direct-phase activation condition, the direct-phase is activated to supply power to the load, outputting the first current.

[0094] Understandably, in the aforementioned high-dynamic scenario, the optional (n+1)th voltage regulation module (i.e., the direct-flow phase) can bear the increased load current only during the aforementioned first duration. That is, after the first duration of the direct-flow phase activation, the electronic device shuts down the direct-flow phase and controls the multi-stage phases to supply power to the load based on the first power supply strategy. The aforementioned first power supply strategy can be implemented based on one or more of the following factors: the required current of the multi-stage phases, the load temperature, and the voltage range of the multi-stage phases, where, in this case, the required current of the multi-stage phases is equal to the load current. Here, the load current should be understood as the operating current of the load during normal operation after a load change. Understandably, the aforementioned first duration is greater than or equal to the output delay of the aforementioned N:1 buck circuit. This is because... Figure 3 or Figure 5 In the power conversion circuit shown, the delay of the multi-stage structure is mainly caused by the output delay of the N:1 buck circuit mentioned above, which can be generated based on the multi-stage feedback loop.

[0095] Optionally, in the aforementioned high-dynamic scenario, after activating the aforementioned through-phase, the electronic device can maintain the through-phase conducting to supply power to the load, and control multiple phases to supply power to the load based on the aforementioned first power supply strategy. In this case, the required current for the multiple phases in the aforementioned first power supply strategy can be determined based on the load current and the first current output by the through-phase. Specifically, the required current for the multiple phases is the load current minus the first current output by the through-phase. Similarly, the load current here should be understood as the operating current of the load when it is operating normally after a load change.

[0096] Understandably, the two schemes described above do not imply that the power supply strategy for electronic devices in high-dynamic scenarios contradicts that in low-dynamic scenarios. For example, under light load conditions, the electronic device can utilize the small current output from the first voltage regulator module to power the CPU. However, under high-dynamic load conditions (e.g., current demand increases from 2A to 12A), the multiplexing controller will select the first, second, and (n+1)th voltage regulator modules to provide power according to the power supply strategy. However, after the load change occurs, the second voltage regulator module cannot immediately respond to the load change to provide sufficient current I2 to power the CPU. In this case, this current is actually provided by the (n+1)th voltage regulator module. n+1 Bearing, i.e., I1 = 2A, I n+1=10A. Here, 10A can be the maximum current that the (n+1)th voltage regulation module can provide. After the first duration of the direct-phase start-up, the second voltage regulation module responds to the load change and outputs current I2 to power the CPU. Assuming I2 = 4A, then after the first duration of the load change, the three phases can provide the following currents to the load respectively: I1 = 2A, I2 = 4A, I... n+1 =6A. Therefore, it can be seen that when the multiplexer controller in the electronic device selects the above three phases to power the load, In other words, when the above-mentioned multiplexing controller selects the above three phases to power the load, it still ensures that the sum of the maximum current of the three phases is greater than or equal to the current required by the load.

[0097] In addition to the above-mentioned starting conditions, the conditions for starting the direct-flow phase can also include: the load current being greater than the sum of the currents provided by each of the multiple phases. It is understandable that when the load current is greater than the sum of the currents provided by each of the multiple phases, it means that even if all the multiple phases are started, they cannot supply enough power, therefore the direct-flow phase needs to be started to power the load. It is understandable that in the above-mentioned high-dynamic scenario, both of the above-mentioned starting conditions for the direct-flow phase may occur simultaneously.

[0098] Under normal conditions, the load requires less current, allowing the large-capacity inductor phase to operate in discontinuous conduction mode (DCM). In this mode, the inductor current drops to zero within the switching cycle, reducing the switching frequency, minimizing switching losses, and improving power supply efficiency. Furthermore, because load variations are small under light load conditions, complex control algorithms are not required to maintain current continuity, making the large-capacity inductor phase well-suited for DCM operation.

[0099] Under heavy load conditions, the load current is large. To maintain the stability and continuity of the output current, the shoot-through phase needs to operate in continuous conduction mode (CCM). In CCM mode, the inductor current remains continuous throughout the entire switching cycle and does not drop to zero, thus providing a stable current to the load. Furthermore, the current continuity in CCM mode allows the system to respond more quickly to load changes, rapidly adjusting the duty cycle to maintain a stable output voltage. This aligns with the shoot-through phase's requirement for a rapid response to load changes. Therefore, the shoot-through phase typically operates in CCM mode.

[0100] The above Figure 3In the power conversion circuit of the hybrid multiphase power supply architecture shown, the aforementioned through phase can be located in the power management unit (PMU) of the electronic device; that is, both the through phase and the multi-stage phase are integrated into the power management unit (PMU). Not limited to the above design, the power conversion circuit in the hybrid multiphase power supply architecture provided in this application embodiment can also be as follows: Figure 7 As shown. In Figure 7 In the power conversion circuit of the hybrid multiphase power supply architecture shown, the electronic devices employ an external DRMOS solution. DRMOS refers to a technology that packages a driver and MOSFET together. In this embodiment, the external DRMOS solution refers to a solution that packages the driver chip and two MOSFETs together, independent of the PMU. It is understood that using such... Figure 7 The external DRMOS solution shown allows developers to directly add the aforementioned through-phase to the existing multi-stage multi-phase power supply architecture to achieve the hybrid multi-phase power supply architecture provided in this application embodiment, thereby improving the flexibility and efficiency of power management without increasing additional hardware costs.

[0101] In the above Figure 3 and Figure 7 In Figure 3 and Figure 7 In this example, the direct-flow phase is configured to include an inductor Ln+1 with a small inductance. It can be understood that the purpose of including the small inductor Ln+1 in the direct-flow phase is to provide sufficient output current when the load demand changes significantly. By using a small inductor, the direct-flow phase can respond more flexibly to dynamic changes in the load. This design is equivalent to the effect achieved by multiple direct-flow phases containing large inductors. For example, if a single direct-flow phase with a small inductor needs to output 10A of current at a certain moment, then by replacing the inductor in the direct-flow phase with a large inductor, this 10A of current can be provided by five direct-flow phases, each outputting 2A of current and containing large inductors. Therefore, in the power conversion circuit described above, there can also be multiple direct-flow phases. Optionally, the inductors in the multiple direct-flow phases can have the same inductance. Optionally, the inductors in the multiple direct-flow phases can be different. Understandably, employing multiple through-phases containing large-capacity inductors can improve the fault tolerance of the power supply architecture. Even in the event of a phase anomaly in a single through-phase, the overall power supply architecture can still maintain stable power supply capability. Therefore, as long as the sum of all through-phases can increase the output current by more than the first current, the embodiments of this application do not specifically limit whether large-capacity or small-capacity inductors are used in the through-phases.

[0102] Similarly, in the power conversion circuit described above, the multi-stage phase may not include the small-inductance inductor phase; that is, the multi-stage phase may only include the large-inductance inductor phase. In this case, there may be one or more large-inductance inductor phases. If there are multiple large-inductance inductor phases, the inductance of these multiple large-inductance inductor phases may be exactly the same or different. If the multi-stage phase includes the small-inductance inductor phase, there may be one or more small-inductance inductor phases. In this case, the inductance of the inductors in the multi-stage phase may not be different. Correspondingly, the magnitude of the multi-stage phase output current (i.e., the second current) may also be different.

[0103] In the above Figure 3 and Figure 7 In this system, each phase can supply power to the CPU through a unified input. Specifically, the CPU can receive load current through a unified interface and then distribute it to different cores according to the load, such as... Figure 3 and Figure 7 Cores 1 through 9 are included. This is not limited to cores 1 through 9. Figure 3 and Figure 7 In some embodiments of the structure shown, each core of the CPU receives power independently. For example, in the traditional x86 architecture, the CPU does not provide a unified interface; instead, each core receives power independently. In this case, each phase can be connected to a different core of the CPU. When the load is another device, if the load contains multiple independent power-receiving modules, similarly, each phase can be connected to multiple independent power-receiving modules. The hybrid multiphase power supply architecture in this application does not impose any special limitations on how each phase in the power conversion circuit is specifically connected to the load.

[0104] Regardless of the above Figure 3 The hybrid multiphase power supply architecture shown is still Figure 7 The hybrid multiphase power supply architecture shown employs a hybrid power supply architecture that includes both direct-flow phases and multi-stage phases. This ensures compatibility with current multi-stage multiphase power supply architectures, guaranteeing power efficiency in most application scenarios. Furthermore, the multiplexing controller in this hybrid power supply architecture is compatible with most circuit designs found in current multi-stage multiphase power supply architectures.

[0105] In addition, adopting the above-mentioned hybrid multiphase power supply architecture has the following two beneficial effects:

[0106] 1) Electronic devices are more adaptable to dynamic scenes.

[0107] Figure 8This is a schematic diagram illustrating the dynamic effects of different power supply architectures provided in an embodiment of this application. The better the dynamic effect of the power supply architecture, the stronger the adaptability of the electronic device to large dynamic scenes; conversely, the worse the dynamic effect of the power supply architecture, the weaker the adaptability of the electronic device to large dynamic scenes.

[0108] Specifically, the power supply architecture described above can be represented by the voltage difference between the peak and valley values ​​of the load voltage. For example... Figure 8 As shown, for multi-level architectures (such as...) Figure 8 For the two-stage multiphase architecture shown in (a), the voltage difference ΔV1 = V1 - V2, where V1 is the peak load voltage and V2 is the valley load voltage. For the power supply architecture in this embodiment (i.e., the hybrid multiphase power supply architecture), the voltage difference ΔV2 = V3 - V4, where V3 is the peak load voltage and V4 is the valley load voltage. Figure 8 (a) and Figure 8 As can be seen from the comparison in (b), the voltage difference of the load voltage is smaller when the above-mentioned hybrid multiphase power supply architecture is adopted. This means that when the load changes, the above-mentioned hybrid multiphase power supply architecture can respond more quickly, thereby maintaining a stable output voltage. In other words, electronic devices using this hybrid multiphase power supply architecture are more adaptable to large dynamic scenarios.

[0109] 2) The power efficiency of electronic devices under light load conditions has been further improved.

[0110] Figure 9 This is a schematic diagram illustrating the power efficiency of different power supply architectures under different loads, as provided in the embodiments of this application.

[0111] like Figure 9 As shown, under light load conditions, that is, when the load current is less than or equal to 2A, the power efficiency of electronic devices using a hybrid multiphase power supply architecture is higher than that of electronic devices using a two-stage multiphase power supply architecture. In turn, the power efficiency of electronic devices using a two-stage multiphase power supply architecture is higher than that of electronic devices using a single-stage multiphase power supply architecture.

[0112] This is because, under heavy load conditions, the added through-phase can assist in providing output current to meet load demands, thus reducing the current supplied to the load by the large-inductance inductor phase. For example, if the large-inductance inductor phase originally needed to provide 2A of current, while the through-phase could provide 1A, then under the same load demand, the large-inductance inductor phase now only needs to provide 1A. This means that under most light load conditions, electronic devices may not require 2A of load current, and the large-inductance inductor phase only needs to output 1A to meet the CPU's power supply requirements. However, in existing designs, to cope with heavy load conditions, the large-inductance inductor phase is typically designed to provide 2A of current to the load.

[0113] The current supplied to the load by the high-inductance inductor is reduced, meaning the maximum output current of that high-inductance inductor phase can also be reduced accordingly. As described above, the smaller the maximum output current, the larger the inductance. A larger inductance allows the inductor to store more energy, which reduces the frequency of charging and discharging. Consequently, the switching frequency of the MOSFET also decreases, thereby reducing losses during switching. Therefore, with a constant input power, reducing switching losses can significantly improve the power efficiency of electronic devices. This design optimization helps improve the overall performance of the power management system, achieving more efficient energy utilization.

[0114] Figure 10 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application.

[0115] like Figure 10 As shown, the electronic device may include components such as a processor 101, a memory 102, a wireless communication processing module 103, a power switch 104, a display screen 105, an audio module 106, and a speaker 107. The components in the electronic device are connected to each other via a bus and communicate based on the bus.

[0116] Processor 101 may include one or more processing units, such as application processors (APs), modem processors, graphics processing units (GPUs), image signal processors (ISPs), controllers, video codecs, digital signal processors (DSPs), baseband processors, and / or neural network processing units (NPUs). These different processing units may be independent devices or integrated into one or more processors. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0117] Memory 102 is coupled to processor 101 and is used to store various software programs and / or multiple sets of instructions. Memory 102 can be used to store computer executable program code, which includes instructions. Processor 101 executes various functional applications and data processing of the electronic device by running the instructions stored in memory 102. Memory may also be provided in processor 101 for storing instructions and data.

[0118] The memory 102 may include one or more random access memory (RAM) and one or more non-volatile memory (NVM). The RAM can be directly read and written by the processor 101. The RAM can be used to store executable programs (e.g., machine instructions) of the operating system or other running programs, as well as user and application data. The NVM can also store executable programs and user and application data. Executable programs, i.e., user data, stored in the NVM can be pre-loaded into the RAM for direct reading and writing by the processor 101.

[0119] Executable program code and data (including but not limited to various voice data) used to implement the power supply method provided in the embodiments of this application can be stored in non-volatile memory. During the implementation of the above power supply method, the electronic device can load the non-volatile memory executable program code and user data into random access memory, so that the electronic device can control different phases to supply power when the load changes, so as to maintain a stable voltage and current output.

[0120] The wireless communication processing module 103 can provide wireless communication solutions including WLAN, such as Wi-Fi, Bluetooth communication, ZigBee communication, NFC communication, infrared communication, and UWB communication.

[0121] The power switch 104 can be used to control the power supply to electronic devices, thereby supplying power to the processor 101, memory 102, wireless communication processing module 103, display screen 105, audio module 106, speaker 107, etc. In this embodiment, the power switch 104 adopts the power conversion circuit in the hybrid multiphase power supply architecture, thereby improving the power efficiency of electronic devices under light load conditions and their adaptability to large dynamic scenarios, that is, improving the dynamic effect of power supply to electronic devices.

[0122] Display screen 105 is used for display. Display screen 105 includes a display panel. A touch sensor can be installed in display screen 105. The touch sensor is used to detect touch operations applied to or near it. The touch sensor can transmit the detected touch operation to an application processor to determine the type of touch event. Furthermore, the electronic device can provide visual output related to the touch operation through display screen 105. The electronic device can implement display functions through a GPU, display screen 105, touch sensor, and application processor, etc.

[0123] Audio module 106 can be used to convert digital audio signals into analog audio signals for output, and can also be used to convert analog audio input into digital audio signals. Speaker 107 can be used to convert the audio signals transmitted by audio module 106 into sound signals. Electronic devices can implement audio playback functions through audio module 106, speaker 107, etc. In some embodiments, audio module 106 may also include a microphone for converting sound signals into electrical signals.

[0124] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. Components may be implemented in hardware, software, or a combination of software and hardware.

[0125] It is understood that the software architecture illustrated in the embodiments of this application does not constitute a specific limitation on the above-described panoramic shooting method. In other embodiments of this application, the software architecture involved in the above-described panoramic shooting method may include more or fewer modules.

[0126] Those skilled in the art will recognize that the functions described in the embodiments of this application in one or more of the above examples can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transmission of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer. Embodiments of this application also provide a computer program product, including a computer program that, when run on a processor, implements the steps in the various method embodiments described above.

[0127] The above detailed embodiments further illustrate the purpose, technical solution, and beneficial effects of the embodiments of this application. It should be understood that the above are merely specific embodiments of the embodiments of this application and are not intended to limit the protection scope of the embodiments of this application. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solutions of the embodiments of this application should be included within the protection scope of the embodiments of this application.

Claims

1. A power conversion circuit, characterized in that, The power conversion circuit includes: a control unit, a first step-down circuit, a second step-down circuit, and a third step-down circuit. in, The input terminal of the first step-down circuit is connected to the output terminal of the power supply, and the output terminal is connected to the power supply terminal of the load. It is used to step down the power supply voltage to supply power to the load. The current output by the first step-down circuit is the first current. The input terminal of the second step-down circuit is connected to the output terminal of the third step-down circuit, the input terminal of the third step-down circuit is connected to the output terminal of the power supply, and the output terminal of the second step-down circuit is connected to the power supply terminal of the load. The second step-down circuit is used to step down the voltage output by the third step-down circuit to supply power to the load. The current output by the second step-down circuit is a second current, which is less than the first current. The output terminal of the control unit is connected to the control terminal of the first step-down circuit, and the output terminal of the control unit is also connected to the control terminal of the second step-down circuit. The control unit is used to control the first step-down circuit to start or stop, and the control unit is also used to control the second step-down circuit to start or stop.

2. The power conversion circuit according to claim 1, characterized in that, The conditions for starting the first step-down circuit include: the change in the load current per unit time is greater than or equal to a first threshold. And / or, the conditions for starting the first buck circuit include: the load current is greater than the sum of the currents provided by each of the second buck circuits, and the current provided by the second buck circuit is less than or equal to the maximum output current of the second buck circuit.

3. The power conversion circuit according to claim 1 or 2, characterized in that, The first step-down circuit includes a first energy storage element that supplies power to the load, the first energy storage element being a first inductor; the second step-down circuit includes a second energy storage element that supplies power to the load, the second energy storage element being a second inductor; and the inductance of the first inductor is less than or equal to the inductance of the second inductor.

4. The power conversion circuit according to claim 3, characterized in that, The first step-down circuit comprises multiple circuits.

5. The power conversion circuit according to claim 3 or 4, characterized in that, There are multiple second step-down circuits, and the second inductors in the multiple second step-down circuits are not all the same.

6. The power conversion circuit according to claim 5, characterized in that, The second currents output by the plurality of second buck circuits are not all the same.

7. The power conversion circuit according to any one of claims 1-6, characterized in that, The first buck circuit and the second buck circuit are integrated into the power management unit (PMU).

8. The power conversion circuit according to any one of claims 1-6, characterized in that, The second buck circuit is located in the power management unit (PMU), while the first buck circuit is independent of the PMU.

9. The power conversion circuit according to any one of claims 1-8, characterized in that, The load includes one or more of the following: a processor, double-rate synchronous dynamic random access memory (DDR), and an organic light-emitting diode (OLED) display.

10. A power supply method, characterized in that, The power supply method is applied to an electronic device employing the power conversion circuit according to any one of claims 1-9, the method comprising: The second step-down circuit is controlled to supply power to the load, and the second current is output. After detecting the conditions for starting the first step-down circuit, the first step-down circuit is started to supply power to the load and output the first current. The conditions for starting the first step-down circuit include one or more of the following: the change in the load current per unit time is greater than or equal to a first threshold, the load current is greater than the sum of the currents provided by each of the second step-down circuits, and the current provided by the second step-down circuit is less than or equal to the maximum output current of the second step-down circuit.

11. The method according to claim 10, characterized in that, The method further includes: After a first duration of starting the first step-down circuit, the first step-down circuit is turned off, and the second step-down circuit is controlled to supply power to the load based on a first power supply strategy. The first power supply strategy performs the power supply based on one or more of the following factors: the required current of the second step-down circuit, the temperature of the load, and the voltage range of the second step-down circuit, wherein the required current of the second step-down circuit is equal to the load current.

12. The method according to claim 11, characterized in that, The first duration is greater than or equal to the output delay of the third buck circuit.

13. The method according to claim 10, characterized in that, The method further includes: After the first step-down circuit is started, the first step-down circuit continues to supply power to the load, and the second step-down circuit is controlled to supply power to the load based on a first power supply strategy. The first power supply strategy performs the power supply based on one or more of the following factors: the required current of the second step-down circuit, the temperature of the load, and the voltage range of the second step-down circuit, wherein the required current of the second step-down circuit is determined based on the load current and the first current output by the first step-down circuit.

14. An electronic device, characterized in that, The device includes one or more processors, one or more memories, a power conversion circuit as described in any one of claims 1-9, and a load, wherein the load includes one or more of the following: the processor, a double data rate synchronous dynamic random access memory (DDR), and an organic light-emitting diode (OLED) display; wherein the one or more memories are coupled to the one or more processors, and the one or more memories are used to store computer program code, the computer program code including computer instructions that, when the one or more processors execute the computer instructions, cause the method as described in any one of claims 10-13 to be performed.

15. An electronic device, characterized in that, The device includes the power conversion circuit and load as described in any one of claims 1-9, wherein the load includes one or more of the following: a processor, a double-data-rate synchronous dynamic random access memory (DDR), and an organic light-emitting diode (OLED) display.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is run on an electronic device, it causes the method as described in any one of claims 10-13 to be performed.

17. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 10-13.

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