Single-inductor dual-polarity output converter and start-up method thereof

Abstract

The application discloses a single-inductor dual-polarity output converter and a starting method thereof. The converter comprises a dual-fly capacitor hybrid topology for generating positive and negative output voltage signals V OP , V ON , a decoupled common-mode control structure and a differential-mode control structure; the common-mode control structure is used for generating a detection threshold voltage V C according to a common-mode component of V OP and V ON and a common-mode reference voltage V CM_REF , and controlling total energy transmitted by a power inductor according to V C ; the differential-mode control structure is used for determining a load imbalance degree of V OP and V ON according to a differential-mode component of V OP and V ON and a differential-mode reference voltage V DM_REF , and adaptively distributing a total bias current into a positive path charging current I P and a negative path charging current I N according to the load imbalance degree, and generating positive and negative path conduction times T OP and T ON respectively according to I P and I N , so as to control adaptive distribution of energies of V OP and V ON . The application can meet low-noise requirements of high-end AMOLED display screens on positive and negative bipolar power supplies, and has small hardware overhead.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, specifically relating to a single-inductor bipolar output converter and its startup method. Background Technology

[0002] AMOLED displays, with their advantages of high contrast and low power consumption, have been widely used in various mobile terminal devices. To eliminate brightness flicker and ensure display stability, AMOLED display drivers require one positive power supply (VOP) and one negative power supply (VON), with the positive power supply being more sensitive to power supply noise than the negative one. SIBO converters only require one inductor to generate both positive and negative output voltages, making them the mainstream power supply solution for AMOLED displays. In recent years, a hybrid topology with two flying capacitors has emerged. This topology reduces voltage stress on the power switching transistors and decreases the voltage difference across the inductor by using two flying capacitors, effectively suppressing inductor current ripple and output voltage ripple, while simultaneously improving conversion efficiency and reducing chip area, becoming the mainstream development direction for SIBO converters. However, the hybrid topology with two flying capacitors has strict voltage constraints during startup—when containing 1.8V low-voltage devices, the critical node voltage must be precisely maintained at half the input voltage (VIN / 2) during startup; otherwise, device breakdown will occur. At the same time, existing control schemes struggle to balance transient response speed and hardware overhead, becoming a core bottleneck restricting the performance improvement of SIBO converters.

[0003] Currently, the closest existing implementation schemes include: Scheme 1: a PWM-controlled SIBO converter based on a dual-flying capacitor hybrid topology, and Scheme 2: a low-overshoot SIBO converter with a power stage auxiliary current source. Scheme 1 uses a dual-flying capacitor power topology, combined with a voltage-mode or current-mode PWM control architecture to achieve dual-output regulation. A typical example is the scheme proposed by ISSCC in 2024, which uses a 0.18μm process to achieve dual outputs at ±5V level, and the steady-state ripple performance is significantly improved compared to the traditional single-inductor topology. However, this type of scheme is limited by the bandwidth of the PWM control loop, resulting in a slow load transient response speed, and the output overshoot can reach more than 80mV when the load changes. To improve transient performance, some Scheme 2 schemes add an auxiliary current source to the power stage to quickly compensate for the voltage deviation caused by the load change through additional current injection. A typical example is the scheme proposed by ICCS in 2024, which can suppress the output overshoot during load changes to 48mV, but this scheme requires additional power stage devices, significantly increasing chip area and static power consumption, resulting in low hardware utilization efficiency.

[0004] In other words, existing technologies have the following drawbacks: (1) Insufficient transient response performance: The traditional PWM control scheme has limited loop bandwidth. When faced with the rapid load change in AMOLED scenarios, the output voltage overshoot is large and cannot meet the low noise requirements of high-end AMOLED displays for positive and negative bipolar power supplies.

[0005] (2) High hardware overhead: Existing low transient overshoot solutions rely on power stage auxiliary devices to improve performance, which comes at the cost of increasing chip area and static power consumption, which does not conform to the development trend of high integration and high efficiency of power management chips. Summary of the Invention

[0006] To address the aforementioned problems in the prior art, this invention provides a single-inductor bipolar output converter and its startup method. The technical problem to be solved by this invention is achieved through the following technical solution: In a first aspect, the present invention provides a single-inductor bipolar output converter, comprising: The dual-flying capacitor hybrid topology includes a power inductor, a first flying capacitor, a second flying capacitor, and multiple power switching transistors. This hybrid topology is used to generate a positive output voltage signal V. OP and negative output voltage signal V ON ; A common-mode control structure is used to control the output voltage signal V according to the given positive output voltage signal V. OP With the negative output voltage signal V ON Common-mode component and common-mode reference voltage V CM_REF Generate the valley current signal V of the power inductor. SENSE Detection threshold voltage V C And according to the detection threshold voltage V C Adjust the valley current signal V SENSE To control the total energy transmitted by the power inductor; Differential control structure, used to control the output voltage signal V according to the positive output voltage signal V OP With the negative output voltage signal V ON The differential-mode component and the differential-mode reference voltage V DM_REF Determine the positive output voltage signal V OP With the negative output voltage signal V ON The total bias current is adaptively distributed as the forward charging current I based on the degree of load imbalance. P With negative circuit charging current I N According to the forward charging current I P Generation forward conduction time T OP According to the negative circuit charging current I N Generation negative path conduction time T ON So that the normal conduction time T is passed OPand negative path conduction time T ON Control V OP and V ON Adaptive energy allocation.

[0007] Secondly, the present invention provides a startup control method for a single-inductor bipolar output converter, the method comprising: By controlling M1~M6 to be turned off and S1 to be activated, the converter enters the first stage of the pre-charge phase. In this first stage, the second resistor divider network is used to connect the drain of M5 to C. F2 The voltage at node SW4, the common connection point, is set to V. IN / 2, S1 is used for C OP Charge; By controlling M1~M4 and M6 to be turned off, and M5, S1 and S2 to be activated, the converter enters the second stage of the pre-charge phase, wherein, in the second stage, the voltage of node SW4 is V. IN / 2, and S2 is used to connect the drain located at M4 with C F2 Current is drawn from node SW3 at the common connection point until C. F2 The voltage across the terminals reaches V IN / 2; By controlling M1 and M3~M6 to be turned off while M2 is turned on, and S3 is activated, the converter enters the third stage of the pre-charging phase. In this third stage, S3 is used to charge C... F1 Charge until C F1 The voltage across the terminals reaches V IN / 2, after the third stage is completed, the pre-charging stage ends; By controlling M2, M3, and M4 to be turned on while M5~M6 are turned off, and M... 25 ~ M 27 All are turned on, causing the converter to enter the soft-start phase, wherein, in the soft-start phase, M 25 ~ M 27 This is used to gradually increase the output voltage until the converter enters normal voltage regulation operation.

[0008] Compared with the prior art, the beneficial effects of the present invention are as follows: 1) In this invention, the common-mode control structure adjusts the inductor valley current in real time to control the total energy of the system, while the differential-mode control structure dynamically modulates T in parallel and independently according to the degree of imbalance between the positive and negative output loads. OP With T ONTo achieve adaptive energy distribution, two control structures operate simultaneously and are decoupled, eliminating the bandwidth limitations of a single error amplifier and loop iteration delay inherent in traditional PWM schemes. When the load undergoes rapid changes, the common-mode control structure adjusts the total transmitted energy to match the change in total load power, while the differential-mode control structure adjusts the relative width of the two conduction times in real time to instantaneously allocate energy to the heavily loaded output branch. The entire adjustment process is completed continuously in the analog domain, with a response speed limited only by the bandwidth of the small-signal circuit, far faster than the load change timescale. This suppresses transient overshoot of the output voltage to a level far lower than that of traditional PWM schemes, meeting the low-noise requirements of high-end AMOLED displays for positive and negative bipolar power supplies.

[0009] 2) The transient performance improvement of this invention is entirely achieved by the small-signal circuits within the common-mode control structure and differential-mode control structure (including threshold voltage generation module, valley current detection module, comparator, etc.), without the need to add any auxiliary current source or additional power switching transistors to the power stage. In addition, the power stage topology remains unchanged as a standard dual-flying capacitor hybrid structure, and the chip area increase is only due to some small-signal control circuits (small device size and few in number). The static power consumption increase is far lower than the power consumption cost of large-size devices in the power stage in existing auxiliary current source solutions, achieving a balance between high performance and low hardware overhead, which is in line with the development trend of high integration and high efficiency of power management chips.

[0010] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the architecture of the SIBO converter provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the circuit principle of the adaptive current distribution module provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the circuit principle of the variable conduction time generation circuit provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the operating phase of the SIBO converter provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the corresponding waveforms of control signal timing and inductor current under three scenarios: balanced load, positive overload, and negative overload, provided by an embodiment of the present invention. Figure 6 This is a schematic diagram showing the circuit switching states and node voltage changes during the pre-charging and soft-start phases in chronological order, provided by an embodiment of the present invention. Detailed Implementation

[0012] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0013] In a first aspect, embodiments of the present invention provide a single-inductor bipolar output converter (i.e., a SIBO converter), comprising: a hybrid topology of two flying capacitors electrically connected to each other, a first resistor voltage divider network, a threshold voltage generation module, a valley current detection module, an adaptive current distribution module, a positive terminal conduction time generation module, a negative terminal conduction time generation module, and a driving module.

[0014] In this invention, a dual-capacitor hybrid topology is used to generate a positive output voltage signal V. OP and negative output voltage signal V ON For example, Figure 1 This is a schematic diagram of the SIBO converter architecture proposed in this invention. Figure 1 As shown, this application uses a standard dual-flying capacitor hybrid topology, which includes a power inductor L and a first flying capacitor C. F1 Second flying capacitor C F2 Power switching transistors M1~M6, capacitor C OP Capacitor C ON The source of M1 is connected to the drain of M6 and one end of the input signal source. The other end of the input signal source is grounded, along with the drain of M2. The input signal source is used to provide the input voltage signal V. IN The source of M2 and C F1 One end, the drain of M3, is connected, C F1 The other end is connected to the drain of M1 and one end of the power inductor L, and the other end of the power inductor L is connected to the drain of M4 and C. F2 One end is connected, the source of M4 is grounded, C F2 The other end is connected to the source of M6 and the drain of M5. The source of M5 serves as the positive output terminal to output a positive output voltage signal V. OP The source of M3 is used as the negative output terminal to output a negative output voltage signal V. ON The gates of M1 to M6 are all connected to the output terminal of the drive circuit; C OP One end is connected to the source of M5, C OP The other end is grounded, C ON One end is connected to the source of M3, C ON The other end is grounded. For example... Figure 1 As shown, M4, M5, and M6 are implemented using 1.8V low-voltage transistors to optimize chip area and conduction losses; the remaining switches use high-voltage devices (e.g., 5V high-voltage devices) to withstand output voltage stress. This topology reduces the voltage difference across inductor L by using two flying capacitors to divide the voltage, thereby reducing inductor current ripple and output voltage ripple, while also reducing the voltage stress on some switches, allowing the use of low-voltage devices to improve efficiency.

[0015] Figure 1 The remaining parts are divided into an interconnected first resistor voltage divider network, a threshold voltage generation module, a valley current detection module, an adaptive current distribution module, a positive terminal conduction time generation module, a negative terminal conduction time generation module, and a drive module. The specific composition of each module will be explained in detail later.

[0016] In this invention, the first resistor voltage divider network, the threshold voltage generation module, the valley current detection module, the adaptive current distribution module, the positive terminal conduction time generation module, the negative terminal conduction time generation module, and the driving module constitute a common-mode control structure. The common-mode control structure is used to control the output voltage signal V based on the threshold voltage generation module. OP With negative output voltage signal V ON Common-mode component and common-mode reference voltage V CM_REF Generates the valley current signal V of the power inductor L. SENSE Detection threshold voltage V C And based on the detection threshold voltage V C Adjusting the valley current signal V SENSE This allows for precise control of the total energy transmitted through the power inductor L. The common-mode control structure, together with the aforementioned dual-flying capacitor hybrid topology, forms a common-mode loop.

[0017] In this invention, the first resistor voltage divider network, the adaptive current distribution module, the positive terminal conduction time generation module, the negative terminal conduction time generation module, and the driving module constitute a differential mode control structure. The differential mode control structure is used to control the output voltage signal V based on the positive output voltage signal V. OP With negative output voltage signal V ON The differential-mode component and the differential-mode reference voltage V DM_REF Determine the positive output voltage signal V OP With negative output voltage signal V ON The total bias current is adaptively distributed as the forward charging current I based on the degree of load imbalance. P With negative circuit charging current I N According to the forward charging current I P Generation forward conduction time T OP According to the negative circuit charging current I N Generation negative path conduction time T ON So that the normal conduction time T is passed OP and negative path conduction time T ON Control V OP and V ON Adaptive energy distribution. The differential-mode control structure and the aforementioned dual-capacitor hybrid topology form a common-mode loop.

[0018] In this invention, the first resistor voltage divider network is used to generate a representative V. OP With V ONThe differential mode feedback signal V of the differential mode component DM_FB .like Figure 1 As shown, the first resistor voltage divider network consists of R1 and R2 connected in series. One end of R1 is connected to the output V. OP The node connection is such that one end of R2 is connected to the output V. ON Node connections.

[0019] In this invention, the threshold voltage generation module is used to generate a representative V. OP With V ON The common-mode feedback signal V of the common-mode component CM_FB According to V CM_FB Generate detection threshold voltage V C .like Figure 1 As shown, the inverting amplifier circuit (i.e. Figure 1 The output is V CM_FB The threshold voltage generation module consists of an adder, an error amplifier, and a type-II compensation network. The negative terminal of the inverting amplifier circuit is connected to the negative output voltage signal V. ON The positive output voltage signal V is connected to the positive terminal of the inverting amplifier circuit. OP The output of the inverting amplifier circuit outputs a common-mode feedback signal V. CM_FB Furthermore, the output of the inverting amplifier circuit is connected to the negative input of the error amplifier and the input of the type-II compensation network. The output of the type-II compensation network is connected to the output of the error amplifier. The positive input of the error amplifier is connected to the common-mode reference voltage V. CM_REF The error amplifier outputs a detection threshold voltage V. C .

[0020] In this invention, the valley current detection module is used to sample and obtain the valley current signal V from the hybrid topology of the dual-flying capacitors. SENSE And according to V C and V SENSE Generate detection result signal TRIG_T ON Among them, TRIG_T ON These are the control signals for the positive terminal conduction time generation module and the negative terminal conduction time generation module. For example... Figure 1 As shown, the valley current sampler, slope compensation circuit, adder, and comparator constitute the valley current detection module. The circle at the drain of M3 represents the valley current sampler. Figure 1 As shown, the output of the valley current sampler outputs the sampled V. SENSE Furthermore, the output terminals of the valley current sampler and the ramp compensation circuit are respectively connected to one end of the adder, the output terminal of the adder is connected to the positive input terminal of the comparator, and the negative input terminal of the comparator is connected to V. C The comparator outputs TRIG_T. ON.

[0021] The SIBO converter of this invention employs a valley-constant on-time control architecture and introduces a cross-modulation mechanism on this basis. Its core is implemented by an adaptive current distribution module and a variable on-time generation circuit. In this invention, the adaptive current distribution module is used to adjust the current according to V... DM_FB Sum and difference mode reference voltage V DM_REF The total bias current is adaptively allocated to the forward charging current I. P With negative circuit charging current I N The adaptive current distribution module detects V... DM_FB With V DM_REF To mitigate the bias, a pair of voltage-controlled current mirrors are dynamically controlled to adaptively distribute the total bias current as the forward charging current I. P With negative circuit charging current I N When the load is mismatched, I P with I N Complementary changes reflect positive and negative outputs V in real time. OP V ON Energy requirements. Specifically, such as... Figure 2 As shown, the adaptive current distribution module includes: power switching transistors M7~M 18 Resistance R 01 ~ R 03 Capacitor C 01 R 01 one end, R 02 One end and the gate of M7 are both connected to V. DM_FB R 01 The other end is connected to V OP R 02 The other end is connected to V ON The source of M7 and M 11 The drain and source of M8 are connected, M 11 The source is grounded, M 11 The gate of M7 is connected to the current bias signal, the drain of M7 is connected to the drain of M9, the gate of M9, and M... 10 The gate of M9 is connected to the source of M9. 10 The source terminals are all connected to a power supply voltage V. DD M 10 The drain of M8 and the drain of R 03 One end, M 12 The gate connection of M8 is connected to V. DM_REF R 03 The other end and C 01 One end is connected, C 01 The other end is grounded, M 12 The drain and M 15 Drain, M 15 gate, M14 gate connection, M 14 The source and M 15 The source is connected to V. DD M 14 The drain output negative circuit charging current I N M 12 The source and M 18 Drain, M 13 The source connection, M 18 The source is grounded, M 18 The gate is connected to the current bias signal, M 13 The gate is connected to the differential mode reference voltage V DM_REF M 13 The drain and M 16 Drain, M 16 gate, M 17 gate connection, M 16 The source and M 17 The source is connected to V. DD M 17 The drain output positive circuit charging current I P It should be noted that the current bias signal is generated by the bias circuit inside the SIBO converter. Since the bias circuit is a conventional circuit, this invention... Figure 1 Not yet released.

[0022] In this invention, both the positive terminal conduction time generation module and the negative terminal conduction time generation module are implemented using a variable conduction time generation circuit. The positive terminal conduction time generation module is used to generate the conduction time based on the positive circuit charging current I. P and TRIG_T ON Generation forward conduction time T OP The negative terminal conduction time generation module is used to generate the negative circuit charging current I. N and TRIG_T ON Generation negative path conduction time T ON Specifically, such as Figure 3 As shown, the variable on-time generation circuit includes: a power switch M 19 ~ M 24 Inverters T1~T4, ramp capacitor C ramp Capacitor C 02 1. Latch D, comparator B, resistor R3. Where M... 19 The gate and M 19 Drain, M 20 gate connection, M 19 The source and M 20 The source terminals are all connected to a power supply voltage V. DD The drain output reference charging current I of M19 B M 20The drain and M 21 The source connection, M 21 The gate of D is connected to the output of T3, the input of T3 is connected to the output Q of D, and the set input S of D is connected to the control signal TRIG_T. ON The reset terminal R of D is connected to the output terminal of T4, and the output terminal of D is... Connect the input terminal of T1 to the input terminal of T1, connect the output terminal of T1 to the input terminal of T2, and connect the output terminal of T2 to M. 22 gate connection, M 22 The source is grounded, M 22 The drain and M 21 Drain, C ramp One end of B is connected to the negative input of C. ramp The other end of B is grounded, and the positive input terminal of B is connected to the reference voltage V. REF The output of B is connected to M. 23 gate, M 24 gate connection, M 23 Source access V DD M 23 The drain of R3 and one end of C 02 One end of R3 is connected to the input of T4, and the other end of R3 is connected to M. 24 The drain connection, M 24 The source is grounded, C 02 The other end is grounded. It should be noted that when the variable on-time generation circuit is used as the positive on-time generation module, such as... Figure 3 As shown, M 21 The source terminal is connected to the positive circuit charging current I P Furthermore, the output of T1 outputs the positive conduction time T. OP When the variable on-time generation circuit is used as the negative on-time generation module, such as... Figure 3 As shown, M 21 The source terminal is connected to the negative circuit charging current I N Furthermore, the output of T1 has a negative conduction time T. ON It should be noted that, Figure 3 The latch D in the diagram is an SR latch, and the circles in the S and R terminals represent active low (i.e., low-level triggered).

[0023] According to the above Figure 3 It can be seen that the variable on-time generation circuit operates based on the principle of constant current charging of the capacitor. Taking the forward path as an example, the on-time T... OP From the charging current ( For the ramp capacitor C ramp Charge to reference voltage V REF The duration is determined by the following formula: Similarly, the negative path conduction time T ON The calculation formula is: When the differential error changes, I P with I N Reverse adjustment, so that T OP With T ON The duration variation in the opposite direction is generated, and this duration difference is converted into dynamic modulation of the pulse overlap width through a simple logic gate, ultimately realizing V. OP and V ON The adaptive energy allocation completes the control loop for cross-modulation conduction time.

[0024] In this invention, according to V OP With V ON The degree of load imbalance between the two components determines the operating phase of the SIBO converter's dual-capacitor hybrid topology, which has four main operating phases: Phase I, Phase II, Phase III, and Phase IV. For example... Figure 4 As shown, when the dual-capacitor hybrid topology of the SIBO converter operates at phase I, the corresponding Figure 4 In stage A, the current path is as follows: Figure 4 The path shown by the yellow line in the diagram corresponds to the phase II operation of the SIBO converter's dual-capacitor hybrid topology. Figure 4 In stage B, the current path is as follows: Figure 4 The path shown by the green line in the diagram corresponds to the phase III operation of the SIBO converter's dual-capacitor hybrid topology. Figure 4 In stage C, the current path is as follows Figure 4 The path shown by the red line in the diagram corresponds to the phase IV operation of the SIBO converter's dual-capacitor hybrid topology. Figure 4 In stage D, the current path is as follows Figure 4 The path is shown by the blue line in the image. Specifically, as shown... Figure 5 As shown, T OP With T ON They are D P and D N The pulse width, I OP I ON V OP V ON The current, I L Represents inductor current, such as Figure 5 As shown, when V OP With V ON When the load is balanced, the dual-capacitor hybrid topology mainly operates alternately between phase I and phase II, thus alternating between stage A and stage B, with positive and negative outputs V. OP With V ONIt alternately draws energy from the power inductor L; while when V OP With V ON Load mismatch and voltage deviation occur between them, that is, when I OP >I ON At that time, phase I, phase III, and phase II work alternately, and when I OP <I ON At that time, phase I, phase IV, and phase II work alternately, so that it can be determined according to V. DM_REF Selectively insert phase III or phase IV to supplement the corresponding output energy and achieve optimal energy distribution.

[0025] In this invention, the driving module is used based on T OP T ON Generate gate drive signals V for power switches M1~M6 in a dual-capacitor hybrid topology. DR1~6 To control the total energy transferred by the power inductor L, and V OP and V ON Adaptive energy allocation. Specifically, for example... Figure 1 As shown, the drive module consists of a logic control circuit, a dead-time control and gate drive circuit, and an internal linear voltage regulator circuit. The logic control circuit is used to control the dead time according to T. OP T ON Together with the externally provided enable signal EN, it generates gate drive signals V for M1~M3. DR1~3 Control signal D P Gate drive signals V of M4~M6 DR4~6 Control signal D N The internal linear regulator circuit provides a voltage of 1.8V (i.e., V) for both the dead-time control and the gate drive circuit. DD_1.8V The power supply voltage and voltage value are V. IN A voltage source of -1.8V, with a voltage value of V. OP A -1.8V voltage source. Dead-time control and gate drive circuitry are used to control the gate based on D. P and D N Generate gate drive signals V for M1 to M6 respectively. DR1~6 It should be noted that the implementation logic of the logic control circuit, dead time control and gate drive circuit, and internal linear voltage regulator circuit are all conventional implementation logics in this field. Therefore, the specific implementation logic of these circuits will not be described in detail in this invention.

[0026] To address the issue of low-voltage transistor overvoltage breakdown during startup, the SIBO converter of this invention further includes a pre-charge and startup circuit module. This module sequentially places the converter into a pre-charge phase and a soft-start phase during startup. During the pre-charge phase, at least one end of the power inductor is at a high-resistance node. Furthermore, after the pre-charge phase ends, the voltage stress across each low-voltage power switch (M4~M6) in the dual-capacitor hybrid topology does not exceed V. IN / 2. Specifically, the pre-charging and startup circuit module includes: current sources S1~S3, resistors R4~R5, and power switch M. 25 ~ M 27 R4 and R5 are connected in series, and the end of R4 not connected to R5 is connected to the input voltage signal V. IN The end of R5 not connected to R4 is grounded, and the end where R4 and R5 are connected together is connected to the drain of M5; the output of S1 is connected to C. OP The ungrounded end is connected; the input of S2 is connected to the drain of M4; the output of S3 is connected to the drain of M1; M... 25 The source of M25 is connected to the source of M1, the drain of M25 is connected to the drain of M1, the source of M26 is connected to the source of M6, the drain of M26 is connected to the drain of M6, the source of M27 is connected to the source of M5, and the drain of M27 is connected to the drain of M5. 25 The gates of M1, M26, and M27 are all connected to the gate control signal; among them, R4 and R5 form a second resistor voltage divider network, which is used to control the voltage between the drain of M5 and the capacitor C when M1~M6 are all turned off. F2 The voltage is set at node SW4, which is the common connection point; S1 is used to set the voltage of C when M1~M6 are all off. OP Charging is performed, and C is charged when M1~M4 and M6 are all off but M5 is on. OP Charging is performed; S2 is used to connect the drain of M4 to the capacitor C when M1~M4 and M6 are all off but M5 is on. F2 Current is drawn from node SW3 at the common connection point; S3 is used to control C when M1 and M3~M6 are all off but M2 is on. F1 Charging; M 25 ~ M 27 When M2, M3, and M4 are all on but M5 through M6 are all off, all are in the on state, used to gradually increase the output voltage. It should be noted that the control signals for current sources S1 through S3, and the power switching transistors M... 25 ~ M 27 The gate drive signals can all be implemented by the logic control circuits described above.

[0027] The SIBO converter's startup process can be divided into two stages: a pre-charge stage and a soft-start stage, based on the aforementioned charging and startup circuit modules. Figure 6 This is a schematic diagram showing the circuit switching states and node voltage changes during the pre-charging and soft-start phases in chronological order, as shown below. Figure 6 As shown: (1) Pre-charging stage Phase 1: Specifically as follows Figure 6 As shown in Figure (a), all power switching transistors ( Figure 6 (The gray devices in the diagram represent inactive components, while the black devices represent active components.) Completely off, the voltage at node SW4 is set through a resistor divider network consisting of R4 and R5, while the output capacitor C is connected to the current source S1. OP Charge it.

[0028] Phase 2: Specifically as follows Figure 6 As shown in Figure (b), only switch M5 is turned on, which will reduce the voltage V at node SW4. SW4 Continuously stable at V IN / 2; Simultaneously, current is drawn from node SW3 through constant current source S2 until the second flying capacitor C. F2 The voltage across the terminals reaches V IN / 2.

[0029] Phase 3: Specifically as follows Figure 6 As shown in Figure (c), when the switch M2 is turned on, the first flying capacitor C is powered through the constant current source S3. F1 Charge until the voltage across its terminals reaches V. IN / 2.

[0030] During the entire pre-charging phase, at least one end of the power inductor L is at a high-resistance node, preventing abnormal inductor current build-up and suppressing surge current at its source. After the pre-charging phase is complete, the three 1.8V low-voltage transistors (i.e., M...)... 4~6 The voltage stress at both ends does not exceed V. IN / 2, thus completely eliminating the risk of overvoltage breakdown.

[0031] (2) Soft start phase After the pre-charge phase is completed, the SIBO converter enters the soft-start phase, specifically as follows: Figure 6 As shown in Figure (d), through auxiliary switch M 25 ~M 27 The output voltage is gradually increased to further suppress the inrush current during startup, eventually reaching normal regulated operating condition. It should be noted that M... 25 ~M 27 These are power switching transistors with dimensions smaller than M1 to M6, referred to as miniature auxiliary switches in this invention.

[0032] According to the above Figure 6 It can be seen that the startup control method for the SIBO converter containing the charging and startup circuit modules is implemented through steps S1 to S4: S1. By controlling M1~M6 to be turned off and S1 to be activated, the SIBO converter enters the first stage of the pre-charge phase. In this first stage, the second resistor divider network is used to connect the drain of M5 to the capacitor C. F2 The voltage at node SW4, the common connection point, is set to V. IN / 2, S1 is used for C OP Charge it.

[0033] S2. By controlling M1~M4 and M6 to be turned off, and M5, S1, and S2 to be activated, the SIBO converter enters the second stage of the pre-charge phase. In this second stage, the voltage at node SW4 is V. IN / 2, and S2 is used to connect the drain located at M4 with C F2 Current is drawn from node SW3 at the common connection point until C. F2 The voltage across the terminals reaches V IN / 2.

[0034] S3, by controlling M1 and M3~M6 to be turned off while M2 is turned on, and with S3 operating, the SIBO converter enters the third stage of the pre-charge phase. In this third stage, S3 is used to charge C... F1 Charge until C F1 The voltage across the terminals reaches V IN / 2, after the third stage is completed, the pre-charging stage ends.

[0035] S4, by controlling M2, M3, and M4 to be turned on while M5~M6 are turned off, and M... 25 ~ M 27 All are turned on, causing the SIBO converter to enter the soft-start phase. During the soft-start phase, M... 25 ~ M 27 This is used to gradually increase the output voltage until the converter enters normal voltage regulation operation.

[0036] This invention dynamically modulates the conduction duration of both positive and negative paths based on the differential-mode voltage error of dual outputs. By adjusting the power transistor timing and pulse overlap width through control logic, it achieves adaptive energy distribution and transient decoupling of the dual outputs at the pure control level, requiring no additional power stage components. The common-mode loop controls the total transmitted energy of the system by adjusting the inductor valley current, while the differential-mode loop achieves dual-output energy distribution by adjusting the conduction time ratio of the two paths. Together, they achieve high-precision voltage regulation and fast transient response for both outputs. This invention gradually stabilizes the voltage of the flying capacitor and key nodes to half of the input voltage in three stages, ensuring that the voltage across the low-voltage power transistor does not exceed its withstand voltage limit throughout the startup process, while simultaneously preventing inductor current buildup and suppressing startup inrush current. Based on an adaptive current distribution circuit structure using a voltage-controlled current mirror, and combined with a constant-current charging variable conduction time generation circuit, this invention achieves continuous and complementary dynamic modulation of the conduction time, resulting in a simple circuit structure and low hardware overhead. The proposed dual-flying capacitor hybrid SIBO topology combined with the above-mentioned control and startup scheme is an architecture adapted to low-voltage transistor processes, taking into account low ripple, high efficiency, high reliability and fast transient performance.

[0037] Compared with the existing best-performing dual-capacitor SIBO scheme and low overshoot scheme, the present invention has the following significant advantages: 1) Significantly improved transient performance: Under the same test conditions of 30mA~300mA load switching (switching time 1μs), the maximum transient overshoot of the positive output of this invention is only 31mV, which is far better than the 82mV of the traditional PWM solution and also better than the 48mV of the solution with auxiliary current source. It is the lowest transient overshoot level under the same architecture, which can fully meet the low noise power supply requirements of high-end AMOLED displays and effectively suppress brightness flicker.

[0038] 2) Significantly optimized hardware efficiency: This invention achieves transient performance improvement entirely through control logic and small-signal circuits, without the need to add auxiliary current sources or other devices to the power stage. Compared with existing low overshoot solutions, it significantly saves chip area, while reducing static power consumption and improving power density and conversion efficiency, making it more suitable for highly integrated mobile terminal applications.

[0039] 3) Enhanced startup reliability: This invention uses dedicated multi-stage pre-charge startup logic to precisely clamp the voltage at critical nodes at V. IN / 2 eliminates the risk of overvoltage breakdown of the 1.8V low-voltage tube during startup in principle; at the same time, it avoids abnormal inductor current build-up throughout the process, and effectively suppresses surge current with the soft-start mechanism, significantly improving the long-term reliability of the circuit and the lifespan of the components.

[0040] 4) Excellent steady-state performance: This invention maintains the low ripple advantage of the dual-capacitor topology. Under a 300mA load, the steady-state ripple of both the positive and negative outputs is only 8mV, reaching the advanced level in the industry, which can ensure the image quality stability of AMOLED displays.

[0041] 5) Enhanced load adaptability: The cross-modulation mechanism can adaptively adjust energy distribution according to the load difference between the two outputs. Even when the load is unbalanced, it can still quickly maintain the voltage regulation of the two outputs. The collaborative performance of the two outputs is better, adapting to more complex display load scenarios.

[0042] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0043] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A single-inductor bipolar output converter, characterized in that, include: The dual-flying capacitor hybrid topology includes a power inductor, a first flying capacitor, a second flying capacitor, and multiple power switching transistors. This hybrid topology is used to generate a positive output voltage signal V. OP and negative output voltage signal V ON ; A common-mode control structure is used to control the output voltage signal V according to the given positive output voltage signal V. OP With the negative output voltage signal V ON Common-mode component and common-mode reference voltage V CM_REF Generate the valley current signal V of the power inductor. SENSE Detection threshold voltage V C And according to the detection threshold voltage V C Adjust the valley current signal V SENSE To control the total energy transmitted by the power inductor; Differential control structure, used to control the output voltage signal V according to the positive output voltage signal V OP With the negative output voltage signal V ON The differential-mode component and the differential-mode reference voltage V DM_REF Determine the positive output voltage signal V OP With the negative output voltage signal V ON The total bias current is adaptively distributed as the forward charging current I based on the degree of load imbalance. P With negative circuit charging current I N According to the forward charging current I P Generation forward conduction time T OP According to the negative circuit charging current I N Generation negative path conduction time T ON So that the normal conduction time T is passed OP and negative path conduction time T ON Control V OP and V ON Adaptive energy allocation.

2. The single-inductor bipolar output converter according to claim 1, characterized in that, The dual-flying capacitor hybrid topology includes: a power inductor L and a first flying capacitor C. F1 Second flying capacitor C F2 Power switching transistors M1~M6, capacitor C OP Capacitor C ON In this configuration, the source of M1 is connected to the drain of M6 and one end of the input signal source. The other end of the input signal source is grounded, as is the drain of M2. The input signal source is used to provide the input voltage signal V. IN The source of M2 and C F1 One end, the drain of M3, is connected, C F1 The other end is connected to the drain of M1 and one end of the power inductor L, and the other end of the power inductor L is connected to the drain of M4 and C. F2 One end is connected, the source of M4 is grounded, C F2 The other end is connected to the source of M6 and the drain of M5, with the source of M5 serving as the positive output terminal to output the positive output voltage signal V. OP The source of M3 serves as the negative output terminal to output the negative output voltage signal V. ON The gates of M1~M6 are connected to their respective gate drive signals; C OP One end is connected to the source of M5, C OP The other end is grounded, C ON One end is connected to the source of M3, C ON The other end is grounded.

3. The single-inductor bipolar output converter according to claim 2, characterized in that, The single-inductor bipolar output converter includes a first resistor voltage divider network, a threshold voltage generation module, a valley current detection module, an adaptive current distribution module, a positive terminal conduction time generation module, a negative terminal conduction time generation module, and a drive module that are electrically connected to each other. The first resistor voltage divider network, the threshold voltage generation module, the valley current detection module, the adaptive current distribution module, the positive terminal conduction time generation module, the negative terminal conduction time generation module, and the driving module constitute the common-mode control structure; the first resistor voltage divider network, the adaptive current distribution module, the positive terminal conduction time generation module, the negative terminal conduction time generation module, and the driving module constitute the differential-mode control structure. The first resistor divider network is used to generate the positive output voltage signal V. OP With the negative output voltage signal V ON The differential mode feedback signal V of the differential mode component DM_FB ; The threshold voltage generation module is used to generate a signal V representing the positive output voltage. OP With the negative output voltage signal V ON The common-mode feedback signal V of the common-mode component CM_FB According to the common-mode feedback signal V CM_FB Generate the detection threshold voltage V C ; The valley current detection module is used to sample and obtain the valley current signal V from the dual-capacitor hybrid topology. SENSE And according to the detection threshold voltage V C and the valley current signal V SENSE Generate detection result signal TRIG_T ON The detection result signal TRIG_T ON These are the control signals for the positive terminal conduction time generation module and the negative terminal conduction time generation module; The adaptive current distribution module is used to adjust the differential feedback signal V based on the differential current distribution signal V. DM_FB and the differential mode reference voltage V DM_REF The total bias current is adaptively allocated to the forward charging current I. P With negative circuit charging current I N ; The positive terminal conduction time generation module is used to generate the positive terminal conduction time based on the positive circuit charging current I. P and the detection result signal TRIG_T ON Generation forward conduction time T OP ; The negative terminal conduction time generation module is used to generate the negative terminal conduction time based on the negative circuit charging current I. N and the detection result signal TRIG_T ON Generation negative path conduction time T ON ; The driving module is used to base the forward conduction time T on the forward conduction time T. OP The negative path conduction time T ON Generate gate drive signals for M1 to M6 to control the total energy transferred by the power inductors, and V. OP and V ON Adaptive energy allocation.

4. The single-inductor bipolar output converter according to claim 3, characterized in that, The adaptive current distribution module includes: power switching transistors M7~M 18 Resistance R 01 ~ R 03 Capacitor C 01 ; Among them, R 01 one end, R 02 One end of M7 and the gate of M7 are both connected to the positive output voltage signal V. OP With the negative output voltage signal V ON The differential mode feedback signal V of the differential mode component DM_FB R 01 The other end is connected to the positive output voltage signal V OP R 02 The other end is connected to the negative output voltage signal V ON The source of M7 and M 11 The drain and source of M8 are connected, M 11 The source is grounded, M 11 The gate of M7 is connected to the current bias signal, the drain of M7 is connected to the drain of M9, the gate of M9, and M... 10 The gate of M9 is connected to the source of M9. 10 The source terminals are all connected to a power supply voltage V. DD M 10 The drain of M8 and the drain of R 03 One end, M 12 The gate connection of M8 is such that the gate of M8 is connected to the differential mode reference voltage V. DM_REF R 03 The other end and C 01 One end is connected, C 01 The other end is grounded, M 12 The drain and M 15 Drain, M 15 gate, M 14 gate connection, M 14 The source and M 15 The source is connected to V. DD M 14 The drain outputs the negative circuit charging current I. N M 12 The source and M 18 Drain, M 13 The source connection, M 18 The source is grounded, M 18 The gate is connected to the current bias signal, M 13 The gate is connected to the differential mode reference voltage V. DM_REF M 13 The drain and M 16 Drain, M 16 gate, M 17 gate connection, M 16 The source and M 17 The source is connected to V. DD M 17 The drain outputs the positive charging current I. P 。 5. The single-inductor bipolar output converter according to claim 3, characterized in that, Both the positive terminal conduction time generation module and the negative terminal conduction time generation module employ a variable conduction time generation circuit. The variable conduction time generation circuit includes a power switch M. 19 ~ M 24 Inverters T1~T4, ramp capacitor C ramp Capacitor C 02 Latch D, comparator B, resistor R3; Among them, M 19 The gate and M 19 Drain, M 20 gate connection, M 19 The source and M 20 The source terminals are all connected to a power supply voltage V. DD The drain output reference charging current I of M19 B M 20 The drain and M 21 The source connection, M 21 The gate of D is connected to the output of T3, the input of T3 is connected to the output Q of D, and the set input S of D is connected to the signal TRIG_T. ON The reset terminal R of D is connected to the output terminal of T4, and the output terminal of D is... Connect the input terminal of T1 to the input terminal of T1, connect the output terminal of T1 to the input terminal of T2, and connect the output terminal of T2 to M. 22 gate connection, M 22 The source is grounded, M 22 The drain and M 21 Drain, C ramp One end of B is connected to the negative input of C. ramp The other end of B is grounded, and the positive input terminal of B is connected to the reference voltage V. REF The output of B is connected to M. 23 gate, M 24 gate connection, M 23 Source access V DD M 23 The drain of R3 and one end of C 02 One end of R3 is connected to the input of T4, and the other end of R3 is connected to M. 24 The drain connection, M 24 The source is grounded, C 02 The other end is grounded; Wherein, when the variable conduction time generation circuit is used as the positive terminal conduction time generation module, M 21 The source terminal is connected to the positive circuit charging current I. P Furthermore, the output of T1 outputs the forward conduction time T. OP When the variable on-time generation circuit is used as the negative terminal on-time generation module, M 21 The source terminal is connected to the negative circuit charging current I N Furthermore, the output of T1 outputs the negative path conduction time T. ON .

6. The single-inductor bipolar output converter according to claim 5, characterized in that, T OP and T ON The calculation formulas are as follows: ； 。 7. The single-inductor bipolar output converter according to claim 3, characterized in that, The threshold voltage generation module includes: an inverting amplifier circuit, an error amplifier, and a type-II compensation network, wherein the negative terminal of the inverting amplifier circuit is connected to the negative output voltage signal V. ON The positive terminal of the inverting amplifier circuit is connected to the positive output voltage signal V. OP The common-mode feedback signal V is output from the output terminal of the inverting amplifier circuit. CM_FB Furthermore, the output terminal of the inverting amplifier circuit is connected to the negative input terminal of the error amplifier and the input terminal of the type-II compensation network, the output terminal of the type-II compensation network is connected to the output terminal of the error amplifier, and the positive input terminal of the error amplifier is connected to the common-mode reference voltage V. CM_REF The error amplifier outputs the detection threshold voltage V. C ; The valley current detection module includes: a valley current sampler, a slope compensation circuit, an adder, and a comparator, wherein the output terminal of the valley current sampler outputs the sampled valley current signal V. SENSE Furthermore, the output terminals of the valley current sampler and the ramp compensation circuit are respectively connected to one end of the adder, the output terminal of the adder is connected to the positive input terminal of the comparator, and the negative input terminal of the comparator is connected to the detection threshold voltage V. C The comparator outputs the detection result signal TRIG_T. ON .

8. The single-inductor bipolar output converter according to claim 2, characterized in that, The converter also includes: The pre-charge and startup circuit module is used to sequentially put the converter into a pre-charge phase and a soft-start phase when starting the converter. During the pre-charge phase, at least one end of the power inductor is at a high-resistance node. Furthermore, after the pre-charge phase ends, the voltage stress across each low-voltage power switch in the dual-flying capacitor hybrid topology does not exceed V. IN / 2.

9. The single-inductor bipolar output converter according to claim 8, characterized in that, The pre-charging and startup circuit module includes: current sources S1~S3, resistors R4~R5, and a power switch M. 25 ~ M 27 ; R4 and R5 are connected in series, and the end of R4 that is not connected to R5 is connected to the input voltage signal V. IN The end of R5 not connected to R4 is grounded, and the end where R4 and R5 are connected together is connected to the drain of M5; the output of S1 is connected to C. OP The ungrounded end is connected; the input of S2 is connected to the drain of M4; the output of S3 is connected to the drain of M1; M... 25 The source of M25 is connected to the source of M1, the drain of M25 is connected to the drain of M1, the source of M26 is connected to the source of M6, the drain of M26 is connected to the drain of M6, the source of M27 is connected to the source of M5, and the drain of M27 is connected to the drain of M5. 25 The gates of M26 and M27 are all connected to the gate control signal; R4 and R5 form a second resistor voltage divider network, which is used to divide the voltage between the drain of M5 and C when M1 to M6 are all turned off. F2 Voltage settings are configured at node SW4, the common connection point. S1 is used to control C when M1~M6 are all off. OP Charging is performed, and C is charged when M1~M4 and M6 are all off but M5 is on. OP Charge; S2 is used to connect the drain of M4 to C when M1~M4 and M6 are all off but M5 is on. F2 Current is drawn from node SW3 at the common connection point; S3 is used to control C when M1 and M3~M6 are all off but M2 is on. F1 Charge; M 25 ~ M 27 When M2, M3, and M4 are all turned on but M5 to M6 are all turned off, all are in the on state, which is used to gradually increase the output voltage.

10. A startup control method for a single-inductor bipolar output converter, characterized in that, The method, applied to the single-inductor bipolar output converter of claim 9, comprises: By controlling M1~M6 to be turned off and S1 to be activated, the converter enters the first stage of the pre-charge phase. In this first stage, the second resistor divider network is used to connect the drain of M5 to C. F2 The voltage at node SW4, the common connection point, is set to V. IN / 2, S1 is used for C OP Charge; By controlling M1~M4 and M6 to be turned off, and M5, S1 and S2 to be activated, the converter enters the second stage of the pre-charge phase, wherein, in the second stage, the voltage of node SW4 is V. IN / 2, and S2 is used to connect the drain located at M4 with C F2 Current is drawn from node SW3 at the common connection point until C. F2 The voltage across the terminals reaches V IN / 2; By controlling M1 and M3~M6 to be turned off while M2 is turned on, and S3 is activated, the converter enters the third stage of the pre-charging phase. In this third stage, S3 is used to charge C... F1 Charge until C F1 The voltage across the terminals reaches V IN / 2, after the third stage is completed, the pre-charging stage ends; By controlling M2, M3, and M4 to be turned on while M5~M6 are turned off, and M... 25 ~ M 27 All are turned on, causing the converter to enter the soft-start phase, wherein, in the soft-start phase, M 25 ~ M 27 This is used to gradually increase the output voltage until the converter enters normal voltage regulation operation.

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