A voltage source inverter calibration method, medium, and apparatus

Abstract

This application discloses a voltage source inverter calibration method, medium, and equipment, relating to the field of inverter technology. The method includes the following steps: when the output relay is open and the DC bus is voltage-built, the inverter bridge is controlled to generate an open-loop waveform, extracting the DC component of the calculated inverter voltage value and back-calculating the sampled zero drift, which is then permanently written into the sampling calculation equation as the first compensation amount. After the output relay is closed, the DC component of the generated waveform value is used as indirect feedback, compared with a zero reference, and a second compensation amount is generated by a closed-loop regulator and added to the sampling calculation equation. Based on the sampling calculation equation, the target voltage is calculated, and the inverter voltage is replaced with this target voltage to obtain the corrected inverter voltage. The medium and equipment are used to implement the above method. This application requires no additional hardware, can quickly and accurately compensate for zero drift, suppress residual zero drift and DC components introduced by the load, avoid DC impact during initial load connection, and also consider the stability of multiple units in parallel.

Description

Technical Field

[0001] This application relates to the field of inverter technology, and in particular to a voltage source inverter calibration method, medium, and device. Background Technology

[0002] In voltage source inverters, the sampling accuracy of the output voltage directly affects the closed-loop control performance and power quality. After the inverter output voltage is converted to an AD sample value by the sampling circuit, the inverter voltage is generally calculated linearly. However, the actual sampling channel inevitably has DC zero drift, causing a DC component to be superimposed on the calculated inverter voltage value. The closed-loop control may mistakenly identify this sampled value containing DC error as the true voltage, thus injecting a reverse DC component into the generated value, ultimately leading to a DC bias in the actual output voltage.

[0003] In engineering practice, online calibration is commonly used to address this issue. During voltage source operation, the DC component of the output voltage or emitted waveform is extracted in real time as a feedback quantity. This feedback is compared with a zero reference and then processed by a PI or pure integral regulator to generate a compensation quantity, which corrects the sampling calculation equation. Online calibration can suppress zero drift and DC components introduced by the load to a certain extent, and requires no additional hardware circuitry. However, to avoid circulating current oscillations caused by excessively fast adjustment speeds when multiple units are connected in parallel, online calibration must maintain a relatively slow adjustment speed, and the compensation quantity must be set with a small limit. When zero drift is large, a small limit and slow adjustment are insufficient to complete effective compensation within a limited time. Increasing the adjustment speed can easily cause wide-amplitude oscillations in the output voltage and current.

[0004] Meanwhile, if a load is applied to the inverter before online calibration is completed during the initial operation phase, residual zero drift will generate a significant DC component in the output current. This DC component in the output voltage can also cause problems such as half-bus midpoint potential shift, magnetic load bias, and failure to meet three-phase voltage symmetry requirements. Summary of the Invention

[0005] One objective of this application is to provide a voltage source inverter calibration method that can solve at least one of the defects in the aforementioned background art.

[0006] Another object of this application is to provide a computer-readable storage medium for implementing the above-described voltage source inverter calibration method.

[0007] Another object of this application is to provide an electronic device for implementing the above-described voltage source inverter calibration method.

[0008] To achieve at least one of the above objectives, one aspect of this application provides a voltage source inverter calibration method, comprising the following steps: during the startup phase when the output relay is not closed and the DC bus voltage has been built up, controlling the inverter bridge to perform open-loop waveform generation; acquiring the AD sampling value of the inverter output voltage and calculating the inverter voltage based on the sampling calculation equation; extracting a first DC component from the inverter voltage and back-calculating the sampling zero drift as a first compensation amount and adding it to the sampling calculation equation; during the off-grid operation phase when the output relay is closed, acquiring the waveform value of the inverter bridge and extracting a second DC component from it; comparing the second DC component with a zero reference value, generating a second compensation amount through closed-loop adjustment and adding it to the sampling calculation equation; calculating a target voltage based on the sampling calculation equation after adding the first and second compensation amounts, replacing the inverter voltage with the target voltage, and obtaining the corrected inverter voltage.

[0009] Preferably, the specific process for obtaining the sampling zero drift is as follows: the inverter voltage is subjected to mean filtering and deep low-pass filtering to obtain the first DC component; the ratio of the first DC component to the sampling amplification factor is negative to obtain the required sampling zero drift.

[0010] Preferably, the acquisition and correction step for sampling zero drift includes the following process: controlling the inverter bridge to output two modulation waves with different amplitudes, extracting the first DC component from the inverter voltage corresponding to the two modulation waves and back-calculating the corresponding sampling zero drift; if the absolute value of the difference between the two sampling zero drifts is less than a preset error threshold, taking the average value of the two sampling zero drifts as the first compensation amount; otherwise, prohibiting the closing of the output relay and triggering an alarm; or, during the open-loop waveform generation process of the inverter bridge, controlling the front-stage DC / DC unit to adjust the DC bus voltage to change; if the first DC component does not change with the DC bus voltage, using the first DC component for back-calculation of sampling zero drift; otherwise, prohibiting the closing of the output relay and triggering an alarm.

[0011] Preferably, the specific process for obtaining the second compensation amount is as follows: the emitted wave value is subjected to mean filtering and deep low-pass filtering to obtain the second DC component; the second DC component and the zero reference value are input into the closed-loop controller, so that the closed-loop controller outputs the corresponding second compensation amount.

[0012] Preferably, the closed-loop controller is a PI controller or a pure I controller.

[0013] Preferably, the second compensation amount is limited in amplitude and speed, such that the amplitude of the second compensation amount is less than the amplitude of the first compensation amount, and the adjustment speed of the second compensation amount is less than the adjustment speed of the first compensation amount.

[0014] Preferably, after obtaining the first compensation amount, before the output relay is closed, the AD sampling value of the inverter output voltage is obtained again, and the residual DC component is calculated by the sampling calculation equation after adding the first compensation amount. The residual zero drift is obtained by back calculation as the soft-start initial value of the second compensation amount.

[0015] Preferably, the expression for the sampling calculation equation of the inverter voltage after the addition of the first compensation amount and the second compensation amount is as follows: ; In the formula, This represents the inverter voltage, and k represents the sampling amplification factor. This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero. This indicates the first compensation amount. This indicates the second compensation amount.

[0016] Another aspect of this application provides a computer-readable storage medium storing a computer program; when the computer program is executed by a processor, it implements the above-described voltage source inverter calibration method.

[0017] Another aspect of this application provides an electronic device including a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the voltage source inverter calibration method described above.

[0018] Compared with the prior art, the beneficial effects of this application are as follows: (1) This application extracts the DC component from the inverter voltage calculation value and calculates the sampling zero drift by utilizing the inverter's own open-loop waveform generation and existing hardware filter under the condition that the output relay is disconnected and the DC bus voltage has been established. This sampled zero drift is then permanently written into the sampling calculation equation as the first compensation amount. Since the load is not connected at this time, the actual inverter output voltage is symmetrical and does not contain a DC component, the DC component in the sampled calculation value can be uniquely attributed to the sampling zero drift. Therefore, the compensation amount is accurate and reliable.

[0019] (2) This application extracts the DC component of the emitted waveform value as a feedback quantity after the output relay is closed. This feedback quantity is then compared with the zero reference value and a second compensation quantity is generated by the closed-loop regulator. Since the DC component of the emitted waveform value is a reverse DC quantity actively injected by the controller to offset the sampling zero drift, monitoring the DC component of the emitted waveform value can indirectly reflect the residual zero drift without directly relying on the sampling voltage or output voltage that has been contaminated by zero drift. This indirect feedback method can further suppress the residual zero drift and the DC component introduced by the load in actual operation, thereby improving the symmetry of the output voltage. Attached Figure Description

[0020] Figure 1This is a schematic diagram of the working steps of this application; Figure 2 This is a schematic diagram of the modulation waveform structure of a voltage source inverter without zero-drift calibration. Figure 3 This is a schematic diagram of the inverter voltage waveform structure without zero-drift calibration in a voltage source inverter. Figure 4 A schematic diagram of the modulation waveform structure of a voltage source inverter using the two-stage calibration method of this application; Figure 5 A schematic diagram of the inverter voltage waveform structure using the two-stage calibration method of this application for a voltage source inverter. Detailed Implementation

[0021] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0022] In the description of this application, it should be noted that the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., which indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and should not be construed as limiting the specific protection scope of this application.

[0023] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0024] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0025] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0026] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0027] To facilitate understanding of the technical solution of this application, a brief introduction to the topology of a voltage source inverter can be given first. A voltage source inverter mainly includes a power supply unit, a front-end DC / DC unit, a DC bus, an inverter unit, output relays, and a voltage sampling circuit. The power supply unit is connected to the front-end DC / DC unit, and the front-end DC / DC unit and the inverter unit are connected via a DC bus. The output relay is located between the inverter bridge output and the load, used to isolate the load from the inverter output during inverter startup and to close during off-grid operation to supply power to the load. The voltage sampling circuit is used to acquire the inverter output voltage from the inverter bridge of the inverter unit.

[0028] Depending on the type of voltage source inverter, for example, if the voltage source inverter is a photovoltaic inverter, then the power supply unit is a photovoltaic array; or if the voltage source inverter is a photovoltaic-storage inverter, then the power supply unit includes a photovoltaic array and an energy storage battery; wherein, the photovoltaic array is connected to the DC bus through a unidirectional DC / DC unit, and the energy storage battery is connected to the DC bus through a bidirectional DC / DC unit.

[0029] Based on the aforementioned voltage source inverter topology, one aspect of this application provides a voltage source inverter calibration method, such as... Figure 1 As shown, one preferred embodiment includes the following steps: S100: During the startup phase when the output relay is not closed and the DC bus voltage has been built up, the inverter bridge is controlled to generate open-loop waveforms.

[0030] It should be understood that "DC bus voltage established" means that the upstream DC / DC unit has established a stable DC voltage on the DC bus through the power supply unit. "Open-loop waveform generation" means that the voltage source inverter controller does not rely on a closed-loop output voltage, but instead controls the inverter bridge switches to turn on and off according to a given modulation ratio, outputting a symmetrical AC waveform without DC components, including but not limited to sine waves and saddle waves; for example, using SPWM or continuous SVPWM, after passing through a hardware filtering circuit, it outputs a sine wave or a saddle wave respectively.

[0031] S200: Obtain the AD sample value of the inverter output voltage and calculate the inverter voltage based on the sampling calculation equation.

[0032] Specifically, in this step, the inverter voltage The sampling calculation equation is as follows: .

[0033] Where k represents the sampling amplification factor, This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero. The value of the sampling amplification factor k is determined by the voltage division ratio and amplification factor of the sampling circuit, as well as the reference voltage and bit depth of the AD converter. AD Reference Value The ideal value is the midpoint of the AD range, and the specific value can be determined by the production line calibration.

[0034] In a specific example, if the AD converter is 12-bit, the reference voltage is 3.3V, and the voltage division ratio of the sampling circuit is approximately 1 / 250, then the value of the sampling amplification factor k is approximately 0.2V / LSB; simultaneously, the AD reference value... The theoretical value is 2048 LSB.

[0035] S300: Extract the first DC component from the inverter voltage and back-calculate the zero drift of the sample as the first compensation quantity and add it to the sampling calculation equation.

[0036] It should be noted that when zero drift exists in the sampling channel of the inverter output voltage, the inverter voltage... The sampling calculation equation can be transformed into: ;in, This indicates zero sampling drift.

[0037] As can be seen from the above expression, due to the existence of sampling zero drift, the inverter voltage calculated from the sampling will contain a DC component, namely the first DC component. .

[0038] The first DC component With sampling zero drift The relationship is: .

[0039] Therefore, in this step, the required sampling zero drift can be calculated by extracting the first DC component.

[0040] S400: During the off-grid operation phase when the output relay is closed, the waveform value of the inverter bridge is obtained and the second DC component is extracted from it.

[0041] It should be understood that the waveform value generated by the inverter bridge refers to the modulation waveform value used to generate the PWM drive signal in closed-loop control, which can be expressed as a per-unit value, voltage value, or duty cycle. The second DC component can indirectly reflect the reverse DC component actively injected by the controller to offset residual zero drift.

[0042] S500: The second DC component is compared with the zero reference value, and the second compensation quantity is generated through closed-loop adjustment and added to the sampling calculation equation.

[0043] S600: The target voltage is calculated based on the sampling calculation equation after adding the first compensation amount and the second compensation amount. The inverter voltage is replaced with the target voltage to obtain the corrected inverter voltage.

[0044] It is understood that in the technical solution of this application, steps S100 to S300 belong to the first-level power-on open-loop pre-calibration stage, and steps S400 to S600 belong to the second-level online slow closed-loop calibration stage.

[0045] In the first-stage open-loop pre-calibration stage, this application extracts the DC component from the inverter voltage calculation value and calculates the sampling zero drift using the inverter's own open-loop waveform generation and existing hardware filters, under the condition that the output relay is disconnected and the DC bus voltage has been established. This zero drift is then permanently written into the sampling calculation equation as the first compensation amount. Since the load is not connected at this time, the actual inverter output voltage is symmetrical and does not contain a DC component, the DC component in the sampling calculation value can be uniquely attributed to the sampling zero drift, thus ensuring the accuracy and reliability of the compensation amount.

[0046] In the second-stage online slow closed-loop calibration stage, this application extracts the DC component of the emitted waveform value as a feedback quantity after the output relay is closed. This feedback quantity is compared with the zero reference value and then used by the closed-loop regulator to generate a second compensation quantity. Since the DC component of the emitted waveform value is a reverse DC component actively injected by the controller to offset sampling zero drift, monitoring the DC component of the emitted waveform value can indirectly reflect residual zero drift without directly relying on the sampling voltage or output voltage that has been contaminated by zero drift. This indirect feedback method can further suppress residual zero drift and the DC component introduced by the load during actual operation, improving the symmetry of the output voltage.

[0047] By coordinating the first-stage open-loop pre-calibration stage and the second-stage online slow closed-loop calibration stage, most of the sampling zero drift can be eliminated first, followed by processing residual and load-introduced DC components. The calibration effect is significantly better than traditional single online regulation schemes. The overall technical solution has clear control logic, simple implementation, and is easy to embed into the control code of existing digital signal processors (DSPs) without requiring additional hardware, thus effectively reducing costs. The entire technical solution is not dependent on specific topologies and is applicable to single-phase, split-phase, and three-phase voltage source inverters, and each output channel can be implemented independently.

[0048] In a specific embodiment, when executing step S300, since the inverter voltage sampling calculation value may contain power frequency ripple, switching noise, and harmonics in addition to DC zero drift, it is difficult to accurately obtain the DC component caused by sampling zero drift if the instantaneous value or short-time average value is directly taken as the first DC component. Therefore, this embodiment can extract the first DC component by performing mean filtering and deep low-pass filtering on the inverter voltage. After obtaining the first DC component, the ratio of the first DC component to the sampling amplification factor is negatively taken to obtain the required sampling zero drift.

[0049] Specifically, zero sampling drift ;in, This represents the first DC component, and k represents the sampling amplification factor. Zero drift in the sampling is then achieved. As the first compensation amount After incorporating the sampling calculation equation, the specific calculation expression for the inverter voltage is as follows: .

[0050] In the formula, This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero.

[0051] It should be understood that mean filtering refers to calculating the arithmetic mean of the inverter voltage samples within a set window to suppress random noise and power frequency interference; deep low-pass filtering refers to low-pass filtering with a cutoff frequency much lower than the power frequency, for example, a cutoff frequency of 0.1Hz to 1Hz, used to extract slowly varying or approximately constant DC components. The mean filtering window can be an integer multiple of the power frequency cycle, such as 1, 2, 5, or 10 power frequency cycles, to eliminate the influence of the power frequency and its integer harmonics on DC extraction. Deep low-pass filtering can use a first-order low-pass, second-order low-pass, or moving average combined with a low-pass filter. The specific implementation methods of mean filtering and deep low-pass filtering are well-known techniques to those skilled in the art, and therefore will not be described in detail here.

[0052] It is important to understand that during the first-stage open-loop pre-calibration phase, if the sampling zero drift is calculated solely based on the first DC component under a single transmitted amplitude, the gain error of the sampling channel, voltage divider network faults, or reference anomalies may be misjudged as zero drift, leading to the writing of incorrect first compensation values. Therefore, a correction step needs to be added to the first-stage open-loop pre-calibration phase to distinguish between actual sampling zero drift and sampling channel hardware faults. For ease of understanding, two specific examples will be described in detail below.

[0053] Example 1: The specific process of adding a correction stage in the first-stage open-loop pre-calibration stage is as follows: control the inverter bridge to output two modulation waves with different amplitudes respectively, extract the first DC component from the inverter voltage corresponding to the two modulation waves respectively, and back-calculate the corresponding sampling zero drift; if the absolute value of the difference between the two sampling zero drifts is less than the preset error threshold, take the average value of the two sampling zero drifts as the first compensation amount; otherwise, prohibit the closing of the output relay and alarm.

[0054] It should be understood that the specific value of the error threshold can be set according to the actual needs of those skilled in the art, for example, the value can be 0.5~1 LSB.

[0055] In a specific example, two modulated waves can be defined as the first modulated wave and the second modulated wave, and the corresponding sampling zero drift can be the first sampling zero drift and the second sampling zero drift. Assuming that the amplitudes of the first modulated wave and the second modulated wave, represented by the modulation ratio, are 0.8 and 0.6 respectively, the first DC component extracted from the inverter voltage corresponding to the first modulated wave is 0.6V, and the first DC component extracted from the inverter voltage corresponding to the second modulated wave is 0.56V.

[0056] Let the sampling amplification factor k = 0.2V / LSB, and the error threshold be 0.5 LSB. The first sampling zero drift is -0.6 / 0.2 = -3 LSB, and the second sampling zero drift is -0.56 / 0.2 = -2.8 LSB. The difference between the first and second sampling zero drifts is calculated to be 0.2 LSB. Since the absolute value of the difference between the first and second sampling zero drifts is less than 0.5 LSB, it is determined that the first and second sampling zero drifts are independent of the transmitted amplitude and are true sampling zero drifts; their average value, -2.9 LSB, can be taken as the first compensation amount.

[0057] Example 2: The specific process of adding a correction step in the first-stage open-loop pre-calibration stage is as follows: During the open-loop waveform generation process of the inverter bridge, the control of the front-stage DC / DC unit adjusts the DC bus voltage to change; if the first DC component does not change with the DC bus voltage, the first DC component is used for the inverse calculation of zero drift sampling; otherwise, the output relay is prohibited from closing and an alarm is triggered.

[0058] It should be understood that sampling zero drift is an inherent bias of the sampling channel based on hardware conditions and does not change with the DC bus voltage. Therefore, its authenticity can be determined by analyzing the change of the first DC component with the DC bus voltage. That is, if the first DC component does not change with the DC bus voltage, it reflects the true existence of sampling zero drift; if the first DC component changes with the DC bus voltage, it may be a fault drift caused by a fault in the voltage divider network or the sampling reference.

[0059] Understandably, since the output relay is disconnected and the load is not connected during the first-stage open-loop pre-calibration phase, it is safe to implement Embodiments 1 and 2 by changing the amplitude waveform or the bus voltage disturbance. Through the variable amplitude dual-point correction in Embodiment 1 and the bus voltage disturbance correction in Embodiment 2, it is possible to distinguish between true sampling zero drift and anomalies such as sampling channel gain nonlinearity, voltage divider network faults, and reference drift, thus avoiding the miscompensation of hardware faults as zero drift.

[0060] In a specific embodiment, when performing step S400, similar to the process of acquiring the first DC component, the second DC component needs to be acquired by mean filtering and deep low-pass filtering of the emitted value to eliminate the influence of power frequency ripple, switching noise, and harmonics on the sampling result. Therefore, in step S500, the obtained second DC component is input into the closed-loop controller as an indirect feedback value along with the zero reference value, and the closed-loop controller outputs the required second compensation amount.

[0061] It should be understood that a closed-loop controller refers to a controller capable of generating a compensation quantity based on the input error, such as a PI controller or a pure I controller. A PI controller, or proportional-integral controller, has an output consisting of both proportional and integral terms, enabling rapid response to errors and elimination of steady-state errors. A pure I controller, or pure integral controller, has an output consisting only of an integral term, exhibiting slower adjustment speed but higher steady-state accuracy. The specific process by which these closed-loop controllers generate the second compensation quantity is well-known to those skilled in the art and will not be elaborated upon here.

[0062] It is understood that this embodiment uses the DC component of the emitted waveform value as indirect feedback, without directly relying on the sampled voltage or output voltage that has been contaminated by zero drift, thus effectively suppressing residual sampling zero drift and the DC component introduced by the load. Since the emitted waveform value itself is an internal variable of the controller, extracting its DC component requires no additional hardware, making implementation simple.

[0063] In a specific embodiment, for a scenario with multiple inverters connected in parallel, if the adjustment speed of the second-stage online slow closed-loop calibration stage is too fast or the compensation amount is too large, it may cause circulating current oscillations between the inverters; however, if the limiting is too small or the speed is too slow, it may be unable to suppress residual zero drift and DC components introduced by the load. Therefore, this embodiment needs to reasonably set the limiting and speed while ensuring calibration capability. Specifically, the second compensation amount is limited to a value less than the first compensation amount, and the adjustment speed of the second compensation amount is set to be less than the adjustment speed of the first compensation amount.

[0064] It should be understood that the specific settings for the limiting range and adjustment speed of the second compensation amount can be made by those skilled in the art according to their actual needs. For example, the limiting range of the second compensation amount can be 5% to 20% of the amplitude of the first compensation amount; the adjustment speed of the second compensation amount can be set to a maximum change of 10 per cycle. -5 ~10 -3 LSB.

[0065] Of course, the limit of the second compensation amount can also be adaptively adjusted according to the number of inverters connected in parallel. For example, when a single unit is running, the upper limit of the second compensation amount is 20% of the amplitude of the first compensation amount; when two inverters are connected in parallel, the upper limit of the second compensation amount is 10% of the amplitude of the first compensation amount; and when three inverters are connected in parallel, the upper limit of the second compensation amount is 5% of the amplitude of the first compensation amount.

[0066] It is important to understand that the first-stage open-loop pre-calibration stage is limited by accuracy, and different loads may introduce additional DC components during actual operation. The second-stage online slow closed-loop calibration stage requires slow, low-limit operation; if integration starts from zero, the convergence time is relatively long. During convergence, the actual output voltage may still have a DC bias, causing problems such as transformer magnetization, bus midpoint offset, and parallel circulating current. Therefore, the technical solution in this application needs to provide a soft-start initial value for the second-stage online slow closed-loop calibration stage that approximates the actual residual zero drift to shorten the convergence time.

[0067] In a specific embodiment, after obtaining the first compensation amount, before the output relay is closed, the AD sampling value of the inverter output voltage is obtained again, and the residual DC component is calculated by the sampling calculation equation after adding the first compensation amount. The residual zero drift is obtained by back calculation as the soft-start initial value of the second compensation amount.

[0068] Specifically, after completing the first-stage power-on open-loop pre-calibration, the sampling calculation equation is as follows: .

[0069] In the formula, This represents the inverter voltage, and k represents the sampling amplification factor. This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero. This indicates the first compensation amount.

[0070] The calculated inverter voltage value obtained through the above expression is subjected to mean filtering and deep low-pass filtering to obtain the residual DC component. The residual zero drift can be obtained through inverse calculation. The specific expression is: .

[0071] The calculated residual zero drift The initial value for soft start as the second compensation amount .

[0072] When performing the second-stage online slow closed-loop calibration after the output relay is closed, the second compensation value starts from the soft-start initial value. Initiate slow adjustment. The entire soft-start duration of the second-stage online slow closed-loop calibration can be set to 1~10s; during the soft-start process, the second compensation amount can be gradually released to the regulator output target value according to the set slope. The expression for the second compensation amount during this process is: .

[0073] In the formula, This represents the second compensation amount corresponding to the nth adjustment cycle. This represents the second compensation amount corresponding to the (n-1)th adjustment cycle. This represents the maximum change in the second compensation amount for each adjustment cycle.

[0074] Understandably, this embodiment measures the residual zero drift again after the first-stage open-loop pre-calibration is completed and before the output relay closes, and uses this measurement as the initial soft-start value for the second compensation. This allows the second-stage online slow closed-loop calibration to start adjusting from an operating point close to the actual residual zero drift. Thus, without increasing the adjustment speed or the limiting amplitude of the second-stage online slow closed-loop calibration, the convergence time of the second-stage online slow closed-loop calibration is shortened, the risk of integrator saturation is reduced, the consistency of multi-machine parallel operation is improved, and DC surges during initial load loading are further avoided.

[0075] In a specific embodiment, the expression for the sampling calculation equation of the inverter voltage after the addition of the first compensation amount and the second compensation amount is as follows: .

[0076] In the formula, This represents the inverter voltage, and k represents the sampling amplification factor. This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero. This indicates the first compensation amount. This indicates the second compensation amount.

[0077] For ease of understanding, the technical solution of this application will be described in detail below using a single-phase voltage source inverter as an example, combined with specific parameters.

[0078] During inverter startup, the DC bus voltage has been built up to 700V, the output relay remains open, and no load is connected. After the controller confirms that the bus voltage is stable, fault-free, and the AD sampling channel is valid, it controls the inverter bridge to perform open-loop waveform generation. The generated modulation wave has an amplitude of 0.91, expressed by the modulation ratio. The waveform structure of the modulation wave before zero-drift calibration is as follows: Figure 2 As shown, the blue curve represents the modulated wave, and the red dashed line represents the extracted DC component per-unit value, specifically 0.043. Since the half-voltage of the split bus is 350 V, the actual output voltage DC bias generated by this DC component is: 0.043 × 350 ≈ 15 V; that is, as... Figure 3 As shown, the center of the actual voltage output by the inverter without zero-drift calibration is not on the zero axis, but rather generates a +15V bias. The specific location is as follows: Figure 3 As shown by the black dashed line in the middle; and the center of the sampled voltage obtained by the controller through the sampling calculation equation is exactly located on the zero axis.

[0079] This phenomenon indicates that DC zero drift exists in the sampling channel, causing a false DC component to be superimposed on the sampled voltage "observed" by the controller. To maintain the symmetry of the observed sampled voltage, the closed-loop control actively injects a reverse DC component of 0.043 into the emitted value. This emitted DC component, after being amplified by the bus voltage, causes a +15V DC bias in the actual inverter output voltage. Simultaneously, the sampling zero drift and the actual DC bias cancel each other out, resulting in a symmetrical sampled voltage, thus masking the DC component in the actual output.

[0080] When implementing the two-stage calibration method of this application, the sampling amplification factor k = 0.2V / LSB can be used, and a 12-bit AD converter can be employed. For the first-stage open-loop pre-calibration stage, as mentioned above, the value of the first DC component is +15V, which can be used to calculate the sampling zero drift as -75LSB, i.e., the first compensation amount is -75LSB. In the second-stage online slow closed-loop calibration stage, assuming the extracted second DC component is +2V, it is input into the closed-loop regulator along with the zero reference value, generating a second compensation amount of -10LSB. Assuming the upper limit of the second compensation amount's amplitude is 10% of the first compensation amount, the amplitude of the second compensation amount is limited to 7.5LSB, hence the second compensation amount is -7.5LSB.

[0081] The first and second compensation values ​​are added to the sampling calculation equation to calibrate the modulated wave. The calibrated waveform structure is as follows: Figure 4 As shown in the figure, the blue curve represents the modulation wave, and the red dashed line represents the extracted DC component per-unit value, which coincides with the zero axis. The calibrated inverter voltage waveform structure is as follows. Figure 5 As shown, the actual voltage output by the inverter completely coincides with the sampled voltage obtained by the controller through the sampling calculation equation, and the centers of both are located on the zero axis, as shown in the figure. Figure 5 As shown by the black dashed line in the middle.

[0082] Another aspect of this application provides a computer-readable storage medium, in a preferred embodiment of which a computer program is stored on the storage medium; when the computer program is executed by a processor, the above-described voltage source inverter calibration method is implemented.

[0083] Another aspect of this application provides an electronic device, in one preferred embodiment of which includes a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the voltage source inverter calibration method described above.

[0084] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.

Claims

1. A voltage source inverter calibration method, characterized in that, Includes the following steps: During the startup phase when the output relay is not closed and the DC bus voltage has been built up, the inverter bridge is controlled to generate open-loop waveforms. Obtain the AD sampling value of the inverter output voltage, and calculate the inverter voltage based on the sampling calculation equation; The first DC component is extracted from the inverter voltage, and the zero drift of the sample is calculated and added to the sampling calculation equation as the first compensation amount. During the off-grid operation phase when the output relay is closed, the waveform value of the inverter bridge is obtained and the second DC component is extracted from it. The second DC component is compared with the zero reference value, and the second compensation quantity is generated through closed-loop adjustment and added to the sampling calculation equation. The target voltage is calculated based on the sampling calculation equation after adding the first and second compensation amounts. The inverter voltage is then replaced with the target voltage to obtain the corrected inverter voltage.

2. The voltage source inverter calibration method as described in claim 1, characterized in that, The specific process for obtaining zero drift in sampling is as follows: The inverter voltage is subjected to mean filtering and deep low-pass filtering to obtain the first DC component; The ratio of the first DC component to the sampling amplification factor is negative to obtain the required sampling zero drift.

3. The voltage source inverter calibration method as described in claim 1, characterized in that, The process of setting up a correction step for obtaining zero drift in sampling includes the following steps: The inverter bridge is controlled to output two modulation waves with different amplitudes. The first DC component is extracted from the inverter voltage corresponding to the two modulation waves and the corresponding sampling zero drift is calculated. If the absolute value of the difference between the two sampling zero drifts is less than the preset error threshold, the average value of the two sampling zero drifts is taken as the first compensation amount. Otherwise, the output relay should not be closed and an alarm should be triggered; Alternatively, during the open-loop waveform generation process of the inverter bridge, the control of the preceding DC / DC unit adjusts the DC bus voltage to change; if the first DC component does not change with the DC bus voltage, the first DC component is used for the inverse calculation of zero drift sampling; otherwise, the output relay is prohibited from closing and an alarm is triggered.

4. The voltage source inverter calibration method as described in claim 1, characterized in that, The specific process for obtaining the second compensation amount is as follows: The emitted waveform is subjected to mean filtering and deep low-pass filtering to obtain the second DC component. The second DC component and the zero reference value are input into the closed-loop regulator, causing the closed-loop regulator to output the corresponding second compensation value.

5. The voltage source inverter calibration method as described in claim 4, characterized in that, The closed-loop controller uses a PI controller or a pure I controller.

6. The voltage source inverter calibration method according to any one of claims 1-5, characterized in that, The expression for the sampling calculation equation of the inverter voltage after the addition of the first and second compensation amounts is as follows: ； In the formula, This represents the inverter voltage, and k represents the sampling amplification factor. This represents the AD sample value of the inverter output voltage. This represents the AD reference value when the inverter voltage crosses zero. This indicates the first compensation amount. This indicates the second compensation amount.

7. The voltage source inverter calibration method as described in claim 1, characterized in that, The second compensation amount is limited in amplitude and speed, so that the amplitude of the second compensation amount is less than the amplitude of the first compensation amount, and the adjustment speed of the second compensation amount is less than the adjustment speed of the first compensation amount.

8. The voltage source inverter calibration method as described in claim 7, characterized in that, After obtaining the first compensation amount, before the output relay is closed, the AD sampling value of the inverter output voltage is obtained again, and the residual DC component is calculated by the sampling calculation equation after adding the first compensation amount. The residual zero drift is obtained by back calculation as the soft start initial value of the second compensation amount.

9. An electronic device, characterized in that, It includes a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program to implement the voltage source inverter calibration method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The storage medium stores a computer program; when the computer program is executed by a processor, it implements the voltage source inverter calibration method as described in any one of claims 1-8.

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