vibrating device

Abstract

The present application provides a vibration device, which has: a semiconductor substrate having a through electrode; a wiring layer provided on a lower surface of the semiconductor substrate, including at least 4 conductive layers stacked through an insulating film, the conductive layers having a conductive portion in communication with the through electrode, a conductive portion in communication with the through electrode, and a conductive portion; a terminal group provided on a side of the wiring layer opposite the semiconductor substrate, having a terminal supplied with VDD and connected to the conductive portion, a terminal supplied with VSS and connected to the conductive portion, a terminal input with a control signal and connected to the conductive portion, and a terminal output with an output signal and connected to the conductive portion; and a vibration element on a side of an upper surface of the semiconductor substrate, connected to the through electrode via a bonding member.

Description

Technical Field

[0001] This invention relates to vibration devices. Background Technology

[0002] Patent Document 1 describes a piezoelectric oscillator comprising a piezoelectric vibrator having excitation electrodes formed on a piezoelectric mother plate and a semiconductor integrated component having an oscillation circuit. In this piezoelectric oscillator, the piezoelectric vibrator is directly mounted on and connected to the semiconductor integrated component, and a cover is configured to cover the piezoelectric vibrator from above the semiconductor integrated component. The piezoelectric vibrator is mounted on a user's mounting substrate via connecting electrodes disposed on the surface of the semiconductor integrated component opposite to the mounting surface of the piezoelectric vibrator.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2004-128591

[0004] For such oscillators, there is a need to further develop techniques for miniaturization. Summary of the Invention

[0005] One aspect of the vibration device of the present invention comprises: a semiconductor substrate having a first side and a second side opposite to each other, and having a first through electrode and a second through electrode penetrating the first side and the second side; a wiring layer disposed on the second side of the semiconductor substrate, comprising at least four conductive layers stacked with an insulating film layer between them, wherein the at least four conductive layers have a first conductive portion connected to the first through electrode, a second conductive portion connected to the second through electrode, a third conductive portion, a fourth conductive portion, a fifth conductive portion, and a sixth conductive portion; a terminal group disposed on the side of the wiring layer opposite to the semiconductor substrate, and having: a first terminal supplied with a first potential and connected to the third conductive portion; a second terminal supplied with a second potential different from the first potential and connected to the fourth conductive portion; a third terminal inputting a control signal and connected to the fifth conductive portion; and a fourth terminal outputting an output signal and connected to the sixth conductive portion; and a vibration element located on the first side of the semiconductor substrate and connected to the first through electrode and the second through electrode via a bonding member. Attached Figure Description

[0006] Figure 1 This is a top perspective view of the vibration device in this embodiment.

[0007] Figure 2 This is a three-dimensional view of the vibrating device from below.

[0008] Figure 3 It is along Figure 1 A cross-sectional view of the AA-line vibrating device.

[0009] Figure 4 It is along Figure 1 A cross-sectional view of a BB wire vibrating device.

[0010] Figure 5 This is a top view showing the wiring and wiring layers of the base substrate of the vibrating device.

[0011] Figure 6 This is a block diagram showing the circuit structure of the vibrating device.

[0012] Figure 7 This is a flowchart illustrating the manufacturing process of the vibrating device.

[0013] Figure 8 This is a cross-sectional view showing one method of manufacturing a vibrating device.

[0014] Figure 9 This is a cross-sectional view showing one method of manufacturing a vibrating device.

[0015] Figure 10 This is a cross-sectional view showing one method of manufacturing a vibrating device.

[0016] Label Explanation

[0017] 1: Vibrating device; 2: Base substrate; 2p: Outer periphery; 3: Vibrating element; 31: Vibrating substrate; 321, 322: Excitation electrodes; 4: Cover; 40: Bonding material; 41: Recess; 5: Semiconductor substrate; 5a: Upper surface; 5b: Lower surface; 51, 52: Through electrodes; 55: Seed layer; 57, 58: Conductive layer; 500: Terminal group; 510, 520, 530, 540: Terminals; 61, 62, 63, 64, 65: Insulating film; 66, 67, 68: Passivation film; 7: Wiring layer; 7a, 7b, 7c, 7d: Conductive layer; 7 1, 72, 73, 74, 75, 76: Conductive parts; 77, 78: Wiring; 700: Transistor; 8: Integrated circuit; 81: Oscillator circuit; 82: Control circuit; 83: Storage unit; 84: Temperature compensation circuit; 85: Temperature sensor; 86: Reference voltage generation circuit; 87: Clock signal output circuit; 9: Support substrate; 100: Substrate; 110, 120, 130, 140: Mounting terminals; B1, B2: Connecting components; th1, th2: Through holes; Va: Through hole; Ch: Contact hole; Dd: Divider line; P: Package; S: Storage space. Detailed Implementation

[0018] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0019] In addition, in the following figures, the scale of the dimensions is sometimes different depending on the constituent elements so as to facilitate observation of each constituent element.

[0020] In addition, for ease of explanation, the three mutually orthogonal axes will be designated as the X-axis, Y-axis, and Z-axis. The direction parallel to the X-axis will be called the "X-axis direction", the direction parallel to the Y-axis will be called the "Y-axis direction", and the direction parallel to the Z-axis will be called the "Z-axis direction".

[0021] In addition, the front side of the arrow direction of each axis is called the "positive side", and the opposite side is called the "negative side".

[0022] In addition, viewing from the positive side of the Z-axis towards the negative side of the Z-axis is called "top-down viewing".

[0023] In addition, the surface on the positive side of the Z-axis is called the "upper surface", and the surface on the negative side of the Z-axis is called the "lower surface".

[0024] 1. Implementation Method 1

[0025] 1.1. General Structure of Vibration Devices

[0026] Figures 1 to 6 The structure of the vibration device 1 in this embodiment is shown.

[0027] Figure 1 This is a top perspective view of the vibration device 1 in this embodiment. Figure 2 This is a three-dimensional view of the vibrating device 1 from below. Figure 3 It is along Figure 1 A cross-sectional view of the AA-line vibrating device 1. Figure 4 It is along Figure 1 A cross-sectional view of the BB wire vibrating device 1. Figure 5 This is a top view showing the wiring 77, 78 and wiring layer 7 of the base substrate 2 of the vibrating device 1. Figure 6 This is a block diagram showing the circuit structure of the vibrating device 1.

[0028] The vibration device 1 in this embodiment is a WLP (Wafer Level Packaging) vibration device. Since the WLP vibration device 1 encapsulates the IC itself, the area of ​​the integrated circuit 8 (which is the IC) can be maximized, enabling the realization of a small and high-performance oscillator. Compared to ceramic-packaged vibration devices, the area of ​​the IC in a ceramic-packaged vibration device, when viewed from above, is, for example, 50% to 60% or less of the area of ​​the ceramic package. In contrast, according to the WLP vibration device 1, the area of ​​the integrated circuit 8 when viewed from above can be 50% to 60% larger than the area of ​​the base substrate 2. Therefore, circuit blocks for improving the performance of the vibration device 1 can be provided on the integrated circuit 8.

[0029] like Figure 1 As shown, the vibrating device 1 includes a base substrate 2, a vibrating element 3, and a cover 4. In this embodiment, the vibrating device 1 is an oscillator. More specifically, it is a quartz oscillator that packages the vibrating element 3, made of quartz, and an integrated circuit 8 containing an oscillation circuit 81 into a single package. The vibrating device 1 is mounted, for example, on the substrate 100 of an electronic device such as a mobile phone, and outputs a reference signal to the substrate 100. Alternatively, the vibrating device 1 can also be a MEMS (Micro Electro Mechanical Systems) oscillator. Furthermore, the vibrating device 1 can also be a sensor such as a gyroscope sensor, an inertial sensor such as an accelerometer, or a force sensor such as a tilt sensor.

[0030] 1.2. Structure of base plate 2

[0031] like Figure 3 and Figure 4 As shown, the base substrate 2 includes: a semiconductor substrate 5 having an upper surface 5a and a lower surface 5b that are opposite to each other; a wiring layer 7 disposed on the lower surface 5b of the semiconductor substrate 5; and a terminal group 500 disposed on the lower surface of the wiring layer 7. In this embodiment, the upper surface 5a of the semiconductor substrate 5 is an example of a first surface, and the lower surface 5b of the semiconductor substrate 5 is an example of a second surface.

[0032] Terminal group 500 is an external connection terminal of the vibrating device 1. In this embodiment, as shown... Figure 2 As shown, it includes four terminals 510, 520, 530, and 540. In this embodiment, terminal 510 is an example of a first terminal, terminal 520 is an example of a second terminal, terminal 530 is an example of a third terminal, and terminal 540 is an example of a fourth terminal.

[0033] 1.2.1. Regarding semiconductor substrate 5

[0034] Semiconductor substrate 5 is a silicon substrate. Semiconductor substrate 5 may also be a substrate made of semiconductor materials other than silicon, such as Ge, GaP, GaAs, InP, etc.

[0035] like Figure 3 as well as Figure 4 As shown, a plurality of transistors 700 are disposed on the wiring layer 7 side of the semiconductor substrate 5. The plurality of transistors 700 and the wiring layer 7 form an integrated circuit 8 comprising a plurality of circuit blocks.

[0036] The semiconductor substrate 5 has through electrodes 51 and 52 disposed in through-holes th1 and th2 that penetrate the upper surface 5a and the lower surface 5b. In this embodiment, through electrode 51 is an example of a first through electrode, and through electrode 52 is an example of a second through electrode.

[0037] A passivation film 67 is provided on the upper surface 5a of the semiconductor substrate 5. The passivation film 67 is also provided on the inner peripheral surface of the through holes th1 and th2. A passivation film 68 is provided on the lower surface 5b of the semiconductor substrate 5. The passivation films 67 and 68 are, for example, silicon oxide (SiO2). The passivation film 67 can also be a resin such as polyimide.

[0038] The through electrodes 51 and 52 are copper (Cu) plated electrodes formed by electroplating. In this embodiment, the through electrodes 51 and 52 are embedded in the through holes for plating, but they can also be conformally plated.

[0039] A seed layer 55 is provided between the through electrodes 51 and 52 and the passivation film 67. The seed layer 55 has a two-layer stacked structure consisting of a sputtered titanium Ti film and a sputtered copper film.

[0040] like Figure 5 As shown, wiring 77 and wiring 78 are provided on the upper surface 5a of the semiconductor substrate 5. Wiring 77 is provided at positions corresponding to the through electrode 51 and the bonding member B1, electrically connecting the through electrode 51 and the bonding member B1. Wiring 78 is provided at positions corresponding to the through electrode 52 and the bonding member B2, electrically connecting the through electrode 52 and the bonding member B2.

[0041] The bonding components B1 and B2 are conductive and bond the vibrating element 3 to the wiring 77 and 78. In this embodiment, the bonding components B1 and B2 are bumps formed by electroless plating.

[0042] 1.2.2. Regarding wiring layer 7

[0043] Wiring layer 7 includes insulating films 61, 62, 63, 64, and 65, and four conductive layers 7a, 7b, 7c, and 7d respectively disposed between the insulating films 61, 62, 63, 64, and 65. The conductive layers 7a, 7b, 7c, and 7d are electrically connected through through-holes Va disposed between the insulating films 62, 63, and 64. The conductive layers 7a, 7b, 7c, and 7d are, for example, aluminum metal layers.

[0044] Conductive layers 7a, 7b, 7c, and 7d are stacked sequentially starting from the lower surface 5b of the semiconductor substrate 5. That is, in the wiring layer 7, conductive layer 7a is the first conductive film formed (hereinafter referred to as the lowermost conductive film) and is disposed at the position closest to the semiconductor substrate 5. In addition, conductive layer 7d is the conductive layer of the last conductive film formed (hereinafter referred to as the uppermost conductive film) and is disposed at the position closest to the terminal group 500.

[0045] Wiring layer 7 is used for signal transmission and power supply within integrated circuit 8. To achieve miniaturization based on three-dimensional crossover, it is preferable to have at least 4 conductive layers. Furthermore, in wiring layer 7, the preferred number of conductive layers is 4 or 5, but if the number of circuit blocks in integrated circuit 8 is increased by further multifunctionalizing or increasing the functionality of integrated circuit 8, the number of conductive layers may be set to 6 or more.

[0046] In wiring layer 7, the topmost conductive layer is used for long-distance signal transmission and power supply, while the bottommost conductive layer is used for short-distance signal transmission and power supply. For example, the bottommost conductive layer on the transistor 700 side is used as local wiring, connecting the source, drain, and gate of transistor 700. The conductive layer above it serves as intermediate wiring, connecting the local wiring to the global wiring for medium-distance signal transmission and power supply. Intermediate wiring may also include conductive layers primarily containing wiring extending along the X-axis and conductive layers primarily containing wiring extending along the Y-axis. The topmost conductive layer serves as global wiring for long-distance signal transmission. For example, intermediate wiring may be wiring within each circuit block of integrated circuit 8, and global wiring may be wiring between circuit blocks. Alternatively, low-potential power wiring may be formed between two adjacent conductive layers, and high-potential power wiring may be formed between two other different layers. By forming power wiring with multiple conductive layers, power supply stabilization can be achieved. An inductor may also be formed on the bottommost conductive layer.

[0047] The conductive layer 7a has a conductive portion 71 and a conductive portion 72. The conductive portion 71 is electrically connected to the excitation electrode 321 of the vibrating element 3 via a through electrode 51, a wiring 77, and a bonding member B1. The conductive portion 72 is electrically connected to the excitation electrode 322 of the vibrating element 3 via a through electrode 52, a wiring 78, and a bonding member B2. In this embodiment, the conductive portion 71 is an example of a first conductive portion, and the conductive portion 72 is an example of a second conductive portion.

[0048] In this embodiment, the thickness of the bottom conductive layer 7a is made thicker than that of the other conductive layers 7b, 7c, and 7d. The conductive layer 7a has conductive portions 71 and 72, and in top view, through-holes th1 and th2 are provided at corresponding positions of the conductive portions 71 and 72. That is, by thickening the conductive layer 7a, the possibility that the through-holes th1 and th2 would penetrate the conductive portions 71 and 72 during etching to expose them can be suppressed. Therefore, the formation of the through-holes th1 and th2 becomes easier, improving productivity.

[0049] The conductive layer 7d has conductive portions 73, 74, 75, and 76. Conductive portion 73 is electrically connected to terminal 510 via contact hole Ch. Conductive portion 74 is electrically connected to terminal 520 via contact hole Ch. Conductive portion 75 is electrically connected to terminal 530 via contact hole Ch. Conductive portion 76 is electrically connected to terminal 540 via contact hole Ch. In this embodiment, conductive portion 73 is an example of a third conductive portion, conductive portion 74 is an example of a fourth conductive portion, conductive portion 75 is an example of a fifth conductive portion, and conductive portion 76 is an example of a sixth conductive portion.

[0050] Terminals 510, 520, 530, and 540 are external connection terminals of the vibrating device 1. Terminals 510, 520, 530, and 540 are respectively connected to the mounting terminals 110, 120, 130, and 140 of the substrate 100 of the electronic device.

[0051] Terminal 510 is a terminal supplied with a high-potential power supply (VDD). Terminal 520 is a terminal supplied with a low-potential power supply (VSS). Terminal 530 is a terminal for input / output enable signal OE. Terminal 540 is a terminal for output clock signal CK. Terminals 510, 520, 530, and 540 include conductive layer 57 and conductive layer 58. Conductive layer 57 contains titanium and copper, and conductive layer 58 contains titanium and gold. Furthermore, the number of external connection terminals is not limited to four. In this embodiment, VDD is an example of a first potential, and VSS is an example of a second potential.

[0052] 1.2.3. Regarding Integrated Circuits 8

[0053] The base substrate 2 has an integrated circuit 8. The integrated circuit 8 is disposed on the lower surface 5b side of the semiconductor substrate 5. In other words, the integrated circuit 8 is disposed between the semiconductor substrate 5 and the terminal group 500. Thus, in this embodiment, the structure in which the integrated circuit 8 is disposed on the lower surface 5b side of the semiconductor substrate 5 is called the downward-facing configuration, and conversely, the structure in which the integrated circuit 8 is disposed on the upper surface 5a side of the semiconductor substrate 5 is called the upward-facing configuration.

[0054] like Figure 6As shown, integrated circuit 8 includes an oscillation circuit 81, a control circuit 82, a storage unit 83, a temperature compensation circuit 84, a temperature sensor 85, a reference voltage generation circuit 86, and a clock signal output circuit 87.

[0055] The oscillation circuit 81 is a circuit that generates an oscillation signal using the vibrating element 3. The oscillation circuit 81 is electrically connected to the vibrating element 3 via a conductive part 71, wiring 77, wiring 78, and a conductive part 72. The oscillation circuit 81 generates an oscillation signal by causing the vibrating element 3 to oscillate. For example, in a TCXO (Temperature Compensated Crystal Oscillator) or OCXO (Oven Controlled Crystal Oscillator), a control voltage VCOMP corresponding to the detected temperature is input to the oscillation circuit 81, and the oscillation circuit 81 causes the vibrating element 3 to oscillate at an oscillation frequency corresponding to the control voltage VCOMP. The control voltage VCOMP is a temperature compensation voltage used to compensate for the temperature characteristics of the oscillation frequency.

[0056] The clock signal output circuit 87 outputs a clock signal to terminal 540 via conductive part 76 based on the oscillation signal OSQ of oscillation circuit 81. The clock signal output circuit 87 buffers the oscillation signal OSQ or a signal after dividing the oscillation signal OSQ, and outputs the buffered signal as a clock signal. In this embodiment, the clock signal is an example of an output signal.

[0057] The control circuit 82 controls various parts of the integrated circuit 8. Additionally, the control circuit 82 handles interface processing with external devices such as CPUs. The control circuit 82 is implemented, for example, using logic circuits such as gate arrays.

[0058] The storage unit 83 stores various information required for the operation of the integrated circuit 8. For example, it stores the coefficients of the temperature compensation polynomial required for the temperature compensation circuit 84 to perform temperature compensation processing. The storage unit 83 is, for example, a non-volatile memory.

[0059] The temperature compensation circuit 84 outputs a control voltage VCOMP based on the temperature detection signal VT from the temperature sensor 85 and the control signal of the oscillation frequency input from the outside via the terminal 530 and the conductive part 75.

[0060] Temperature sensor 85 is a sensor that detects the temperature of the vibrating device 1. For example, temperature sensor 85 can be constructed from a diode or the like. Temperature sensor 85 constructed from a diode uses the temperature dependence of the diode's forward voltage to detect temperature and outputs a temperature detection signal VT.

[0061] The reference voltage generation circuit 86 generates power supplies or reference voltages, bias voltages, bias currents, etc., for supplying to various parts of the integrated circuit 8. In the reference voltage generation circuit 86, VDD is input via terminal 510 and conductive part 73, and VSS is input via terminal 520 and conductive part 74. The reference voltage generation circuit 86 supplies a reference voltage to the temperature compensation circuit 84 or a power supply voltage to the oscillation circuit 81.

[0062] 1.3. Structure of Vibration Element 3

[0063] like Figure 3 and Figure 4 As shown, the vibration element 3 has a vibration substrate 31 and excitation electrodes 321 and 322.

[0064] The vibrating substrate 31 has a thickness shear vibration mode and is formed from an AT-cut quartz substrate in this embodiment. Since the AT-cut quartz substrate has a third-order temperature characteristic, it becomes a vibrating element 3 with excellent temperature characteristics.

[0065] Excitation electrode 321 is disposed on the lower surface of vibration substrate 31 and is electrically connected to conductive portion 71 via bonding member B1, wiring 77 and through electrode 51. Excitation electrode 322 is disposed on the upper surface of vibration substrate 31, a portion of which is wound around the lower surface of vibration substrate 31 and is electrically connected to conductive portion 72 via bonding member B2, wiring 78 and through electrode 52.

[0066] Furthermore, the structure of the vibration element 3 is not limited to the structure described above. For example, the vibration element 3 can be a mesa type where the vibration region sandwiched by the excitation electrodes 321 and 322 protrudes from its surroundings; conversely, it can also be an inverted mesa type where the vibration region is recessed from its surroundings. Additionally, it can be subjected to bevel machining by grinding around the vibrating substrate 31, or convex machining to make the upper and lower surfaces convex curved surfaces. Furthermore, the vibration element 3 is not limited to vibrating in a thickness shear vibration mode; for example, it can be a vibration element in which multiple vibrating arms perform bending vibration in the in-plane direction. That is, the vibrating substrate 31 is not limited to being formed from an AT-cut quartz substrate, but can also be formed from quartz substrates other than AT-cut quartz substrates, such as X-cut quartz substrates, Y-cut quartz substrates, Z-cut quartz substrates, BT-cut quartz substrates, SC-cut quartz substrates, ST-cut quartz substrates, etc. Furthermore, in this embodiment, the vibrating substrate 31 is made of quartz, but is not limited to this. For example, it can be made of piezoelectric single crystals such as lithium niobate, lithium tantalate, lithium tetraborate, lanthanum gallium silicate, potassium niobate, and gallium phosphate, or it can be made of other piezoelectric single crystals. In addition, the vibrating element 3 is not limited to a piezoelectrically driven vibrating element, but can also be an electrostatically driven vibrating element that uses electrostatic force.

[0067] 1.4. Structure of Cover 4

[0068] The cover 4, like the semiconductor substrate 5, is a silicon substrate. Therefore, the semiconductor substrate 5 and the cover 4 have the same coefficient of linear expansion, suppressing the generation of thermal stress caused by thermal expansion, resulting in a vibrating device 1 with excellent vibration characteristics. Furthermore, since the vibrating device 1 can be formed using semiconductor processes, it can be manufactured with high precision and efficiency, and miniaturization of the vibrating device 1 can be achieved. However, the cover 4 is not particularly limited; for example, a substrate made of semiconductor materials other than silicon, such as Ge, GaP, GaAs, or InP, can also be used.

[0069] like Figure 3 as well as Figure 4 As shown, the cover 4 has a recess 41 and is joined to the outer periphery 2p of the base substrate 2, thereby forming a package P. A vibrating element 3 is housed in a storage space S within the package P. The storage space S is airtight and in a depressurized state, preferably closer to a vacuum. This reduces viscous resistance and improves the oscillation characteristics of the vibrating element 3. However, the atmosphere of the storage space S is not particularly limited.

[0070] 1.5. Manufacturing method of vibration device 1

[0071] Next, refer to Figures 7 to 10 The manufacturing method of the vibration device 1 in this embodiment will be described. Figure 7 This is a flowchart illustrating the manufacturing process of the vibration device 1 in this embodiment. Figures 8 to 10 These are cross-sectional views illustrating one method of the manufacturing process, with each cross-section showing the relationship with... Figure 1 The cross-section at the location corresponding to line AA.

[0072] like Figure 7 As shown, the manufacturing method of the vibration device 1 includes an IC manufacturing process S1, a wiring layer formation process S2, a support substrate bonding process S3, a semiconductor substrate thinning process S4, a through electrode formation process S5, a vibration element mounting process S6, a cover bonding process S7, a support substrate peeling process S8, a cover thinning process S9, and a monolithic process S10. In the manufacturing method of the vibration device 1, the vibration device 1 is formed using a semiconductor wafer.

[0073] In IC manufacturing process S1, such as Figure 8 As shown, a transistor 700 and a passivation film 68 are formed on the lower surface 5b side of the semiconductor substrate 5.

[0074] In the wiring layer formation process S2, a wiring layer 7, consisting of conductive layers 7a, 7b, 7c, 7d, insulating films 61, 62, 63, 64, 65, a passivation film 66, and through-hole Va, is formed on the lower surface 5b of the semiconductor substrate 5, thereby forming an integrated circuit 8 composed of multiple transistors 700 and the wiring layer 7. Next, contact holes Ch are formed to expose conductive portions 73, 74, 75, and 76, conductive layers 57 and 58 are formed and patterned to form terminals 510, 520, 530, and 540.

[0075] The support substrate bonding process S3 is a WSS (Wafer Support System) process. In this process, the support substrate 9 is bonded to the lower surface of the substrate 2, which serves as the base of the wafer, using an adhesive. By bonding the support substrate 9, the mechanical strength of the wafer is maintained, thereby enabling the thinning of the semiconductor substrate 5.

[0076] In the semiconductor substrate thinning process S4, such as Figure 9 As shown, the semiconductor substrate 5 is ground and polished from the upper surface 5a side to reduce the thickness of the semiconductor substrate 5 to about 70μm.

[0077] In the through-electrode formation process S5, through electrodes 51 and 52 are formed between the upper surface 5a and the lower surface 5b of the semiconductor substrate 5. First, through holes th1 and th2 are formed in the conductive layer 7a at positions corresponding to the conductive portions 71 and 72. The conductive layer 7a, where the conductive portions 71 and 72 are provided, is thicker than the other conductive layers 7b, 7c, and 7d. Therefore, it is possible to suppress the through holes th1 and th2 from penetrating the conductive portions 71 and 72 due to etching during the formation of the through holes th1 and th2.

[0078] Next, a passivation film 67 is formed on the upper surface 5a of the semiconductor substrate 5 and the inner surfaces of the through holes th1 and th2. Then, the passivation film 67 at the bottom of the through holes th1 and th2 is removed, exposing the conductive portions 71 and 72 at the bottom of the through holes th1 and th2. Next, a seed layer 55 is formed to cover the passivation film 67 on the upper surface 5a of the semiconductor substrate 5 and the inner surfaces of the through holes th1 and th2. Then, through electrodes 51 and 52 are formed in the through holes th1 and th2.

[0079] In the vibration element installation process S6, such as Figure 10 As shown, the vibration element 3 is mounted on the upper surface 5a of the semiconductor substrate 5. In this process, wirings 77 and 78 and bonding members B1 and B2 are first formed, and the vibration element 3 is mounted on the bonding members B1 and B2.

[0080] In the cover bonding process S7, under depressurization, the cover 4 is bonded to the outer periphery 2p of the upper surface 5a of the semiconductor substrate 5 via the bonding material 40, and the vibrating element 3 is vacuum sealed in the storage space S.

[0081] In the support substrate peeling process S8, the support substrate 9 is peeled off.

[0082] In the thinning process S9, the cover 4 is ground and polished from the upper surface side to reduce the thickness of the cover 4 to about 150μm.

[0083] In the monolithization process S10, the semiconductor wafer is cut at the dividing line Dd using a cutting saw or the like, and monolithically formed into individual vibrating devices 1. The length of the long side of the vibrating device 1 when viewed from above is approximately 1.2 mm to 1.0 mm, and the length of the short side is approximately 1.0 mm to 0.8 mm.

[0084] As described above, the vibration device 1 of this embodiment includes: a semiconductor substrate 5 having an upper surface 5a as a first surface and a lower surface 5b as a second surface, which are opposite to each other, and having a through electrode 51 as a first through electrode and a through electrode 52 as a second through electrode, which penetrate the upper surface 5a and the lower surface 5b; a wiring layer 7 disposed on the lower surface 5b of the semiconductor substrate 5, comprising at least four conductive layers 7a, 7b, 7c, and 7d stacked with an insulating film layer between them, wherein the at least four conductive layers 7a, 7b, 7c, and 7d have a conductive portion 71 as a first conductive portion that is conductive to the through electrode 51, a conductive portion 72 as a second conductive portion that is conductive to the through electrode 52, a conductive portion 73 as a third conductive portion, a conductive portion 74 as a fourth conductive portion, and a wiring layer 75 as a third conductive portion. The fifth conductive part 75, the sixth conductive part 76; the terminal group 500, which is disposed on the side of the wiring layer 7 opposite to the semiconductor substrate 5, and has: a terminal 510 as a first terminal, which is supplied with VDD as a first potential and is connected to the conductive part 73; a terminal 520 as a second terminal, which is supplied with VSS as a second potential different from VDD and is connected to the conductive part 74; a terminal 530 as a third terminal, which is input with a control signal and is connected to the conductive part 75; and a terminal 540 as a fourth terminal, which is output with an output signal and is connected to the conductive part 76; and a vibration element 3, which is located on the upper surface 5a side of the semiconductor substrate 5 and is connected to the through electrode 51 and through electrode 52 via bonding members B1 and B2.

[0085] Thus, the vibration device 1 of this embodiment is configured such that the wiring layer 7 includes at least four conductive layers 7a, 7b, 7c, and 7d, and each of the at least four conductive layers 7a, 7b, 7c, and 7d has conductive portions 71 and 72 that are electrically connected to the vibration element 3, and conductive portions 73, 74, 75, and 76 that are connected to the terminal group 500. Therefore, it can be a structure that enables miniaturization. In addition, it is possible to maximize the area of ​​the integrated circuit 8 of the vibration device 1.

[0086] In the vibration device 1 of this embodiment, a transistor 700 is provided on the lower surface 5b side of the semiconductor substrate 5, and conductive parts 71 and 72 are provided on the conductive layer 7a closest to the transistor 700 among at least four conductive layers 7a, 7b, 7c, and 7d.

[0087] Thus, in the vibration device 1 of this embodiment, the conductive portion 71 and the conductive portion 72 are disposed on the conductive layer 7a closest to the transistor 700. Therefore, a miniaturized structure can be achieved. Furthermore, the area of ​​the integrated circuit 8 of the vibration device 1 can be maximized.

[0088] In the vibration device 1 of this embodiment, the conductive layer 7a, which is provided with conductive parts 71 and 72, is thicker than the other conductive layers 7b, 7c, and 7d.

[0089] Thus, in the vibration device 1 of this embodiment, the conductive layer 7a is thicker than the other conductive layers 7b, 7c, and 7d. Therefore, the formation of the through electrodes 51 and 52 becomes easier, and productivity can be improved.

[0090] In the vibration device 1 of this embodiment, conductive parts 73, 74, 75 and 76 are disposed in the conductive layer 7d that is furthest from the transistor 700 among at least four conductive layers 7a, 7b, 7c and 7d.

[0091] Thus, in the vibration device 1 of this embodiment, conductive parts 73, 74, 75, and 76 are disposed on the conductive layer 7d furthest from the transistor 700. Therefore, a miniaturized structure can be achieved. Furthermore, the area of ​​the integrated circuit 8 of the vibration device 1 can be maximized.

[0092] The vibration device 1 of this embodiment has a cover 4, which is bonded to a semiconductor substrate 5, and a storage space S for accommodating the vibration element 3 is formed between the cover 4 and the semiconductor substrate 5.

[0093] Therefore, the vibration device 1 according to this embodiment can realize a vibration device 1 with a structure suitable for miniaturization. In addition, it is also possible to maximize the area of ​​the integrated circuit 8 of the vibration device 1.

[0094] The present invention has been described above based on preferred embodiments, but the present invention is not limited to the above-described embodiments. Furthermore, the structure of each part of the present invention can be replaced with any structure that performs the same function as the foregoing embodiments, and additional arbitrary structures can be added.

Claims

1. A vibrating device, comprising: A semiconductor substrate having a first side and a second side that are opposite to each other, and having a first through electrode and a second through electrode that penetrate the first side and the second side. A wiring layer disposed on the second surface of the semiconductor substrate includes at least four conductive layers stacked with an insulating film layer between them. The at least four conductive layers have a first conductive portion connected to the first through electrode, a second conductive portion connected to the second through electrode, a third conductive portion, a fourth conductive portion, a fifth conductive portion, and a sixth conductive portion. A terminal group is disposed on the side of the wiring layer opposite to the semiconductor substrate, and has: a first terminal that is supplied with a first potential and is electrically connected to the third conductive portion; The second terminal is supplied with a second potential different from the first potential and is electrically connected to the fourth conductive part; The third terminal receives a control signal and is electrically connected to the fifth conductive part; and a fourth terminal, which outputs an output signal and is electrically connected to the sixth conductive part; and A vibrating element is located on the first surface side of the semiconductor substrate and is electrically connected to the first through electrode and the second through electrode via a bonding member.

2. The vibration device according to claim 1, wherein, A transistor is disposed on the second side of the semiconductor substrate. The first conductive portion and the second conductive portion are disposed in the conductive layer closest to the transistor among the at least four conductive layers.

3. The vibration device according to claim 2, wherein, The conductive layer having the first conductive portion and the second conductive portion is thicker than other conductive layers.

4. The vibration device according to claim 2, wherein, The third conductive portion, the fourth conductive portion, the fifth conductive portion, and the sixth conductive portion are disposed in the conductive layer farthest from the transistor among the at least four conductive layers.

5. The vibration device according to claim 1, wherein, The vibrating device has a cover that is bonded to the semiconductor substrate, forming a storage space for accommodating the vibrating element between the cover and the semiconductor substrate.

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