Amplifier control circuit with error current compensation

Abstract

An amplifier control circuit with error current compensation is disclosed. A circuit (106) includes a first transistor (142), a second transistor (144), a third transistor (146), and a fourth transistor (148). The first transistor has a collector, an emitter, and a base. The second transistor has a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base. The third transistor has a first terminal coupled to the base of the first transistor and a second terminal coupled to the collector of the first transistor and the emitter of the second transistor. The fourth transistor has a first terminal coupled to the base of the second transistor and a second terminal coupled to the collector of the second transistor and the emitter of the first transistor.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 797,270, filed April 30, 2025, which is incorporated herein by reference in its entirety. Technical Field

[0003] This application generally relates to electronic circuits, and more specifically, to amplifier control circuits with error current compensation. Background Technology

[0004] Amplifier circuits are used in various electronic systems to amplify input signals, such as those from one or more sensor circuits, to facilitate further processing within the system. Some amplifier circuits may contain one or more gain stages between the input and output stages to increase the open-loop gain of the amplifier circuit. However, the trade-offs in achieving this increased gain may include reduced amplifier bandwidth and slew rate and / or increased size, power consumption, and design complexity of the amplifier circuit. Summary of the Invention

[0005] In one example, a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor has a collector, an emitter, and a base. The second transistor has a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base. The third transistor has a first terminal coupled to the base of the first transistor and a second terminal coupled to the collector of the first transistor and the emitter of the second transistor. The fourth transistor has a first terminal coupled to the base of the second transistor and a second terminal coupled to the collector of the second transistor and the emitter of the first transistor.

[0006] In another example, a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first transistor has a collector, an emitter, and a base. The second transistor has a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base. The third transistor has a first terminal coupled to the base of the first transistor and a second terminal coupled to the emitter of the first transistor and the collector of the second transistor. The fourth transistor has a first terminal coupled to the base of the second transistor and a second terminal coupled to the emitter of the second transistor and the collector of the first transistor.

[0007] In another example, the circuit includes a control circuit system and an error current compensation circuit system. The control circuit system includes a first transistor coupled in parallel with a second transistor, wherein the first and second transistors have corresponding control terminals. The first transistor generates a first current based on an input voltage, and the second transistor generates a second current based on the input voltage. The error current compensation circuit system includes a third transistor having a first terminal coupled to the control terminal of the first transistor and a second terminal coupled to the first and second transistors, wherein the third transistor redirects the third current generated at the control terminal of the first transistor. The error current compensation circuit system further includes a fourth transistor having a first terminal coupled to the control terminal of the second transistor and a second terminal coupled to the second and second transistors, wherein the fourth transistor redirects the fourth current generated at the control terminal of the second transistor. Attached Figure Description

[0008] Figure 1 This is a circuit diagram showing an example amplifier circuit that includes control circuitry with error current compensation.

[0009] Figure 2 This illustrates the open-loop gain (A) of amplifier circuits with different control transistor current gains. OL Example signal diagram.

[0010] Figure 3 This illustrates small-signal A of an amplifier circuit without error current compensation and an amplifier circuit with error current compensation. OL Signal diagram of gain.

[0011] Figure 4 This is a circuit diagram illustrating another example amplifier circuit that includes control circuitry with error current compensation.

[0012] Figure 5 This is a circuit diagram illustrating another example amplifier circuit that includes control circuitry with error current compensation.

[0013] Figure 6 This is a circuit diagram illustrating another example amplifier circuit that includes control circuitry with error current compensation.

[0014] Figure 7 This is a circuit diagram illustrating another example amplifier circuit that includes control circuitry with error current compensation. Detailed Implementation

[0015] This specification relates to amplifier circuits. More specifically, the circuit systems described herein relate to control circuits for amplifier circuits with error current compensation, also referred to herein as amplifier control circuits.

[0016] A two-stage amplifier circuit design includes an input stage coupled to the output stage, where the output stage contains the output driver and control circuitry for the output driver. A three-stage amplifier circuit design includes an input stage and an output stage, and also includes an intermediate stage coupled between the input and output stages. Including an intermediate stage in a three-stage amplifier circuit design improves the open-loop gain of the amplifier circuit, but at the cost of reduced bandwidth and slew rate due to a slower external compensation loop. The reduced slew rate slows down the amplifier circuit, which is at least partially compensated for by increased power consumption. Adding an intermediate gain stage also increases the size and design complexity of the three-stage amplifier circuit design.

[0017] The described solution example includes a control circuit with error current compensation, which can be used in an amplifier circuit comprising a two-stage amplifier circuit. Including error current compensation allows for an increase in the open-loop gain of the amplifier circuit without using an intermediate gain stage. Furthermore, a two-stage amplifier circuit design with the described error current compensation can have increased open-loop gain compared to other two-stage amplifier circuit designs, while also having increased bandwidth and speed compared to some three-stage (or more) amplifier circuit designs, as well as reduced size, power consumption, and design complexity.

[0018] Figure 1This is a circuit diagram illustrating an example amplifier circuit 100 including control circuitry with error current compensation. Amplifier circuit 100 includes an example input stage 102 coupled to an example output stage 104. Input stage 102 includes an example transconductance circuit 136. Output stage 104 includes an example control circuit 106, an output driver 108, driver circuitry 110, driver circuitry 112, capacitor 132, and capacitor 134. The driver circuitry is referred to herein as a base driver when configured to drive the base of a bipolar junction transistor (BJT). Control circuitry 106 includes an example control circuitry system 114, an example error current compensation circuitry system 116, and example current source circuitry systems 118, 120, and 122. Current source circuitry systems 118, 120, and 122 may also be referred to herein as bias current generators or current sources. Control circuitry system 114 includes transistors 142 and 144, which may also be referred to herein as control transistors. Error current compensation circuitry 116 includes transistors 146 and 148, which may also be referred to herein as compensation or recirculation transistors. Output driver 108 includes transistors 138 and 140, which may also be referred to herein as output transistors. In example amplifier circuit 100, transistors 140, 142, and 146 are NPN BJTs, and transistors 138, 144, and 148 are PNP BJTs.

[0019] Figure 1 also shows that the amplifier circuit 100 includes a first voltage supply terminal 124 (also referred to as a voltage "rail") providing a first power supply voltage VCC, a second voltage supply terminal 126 (also referred to as a voltage "rail") providing a second power supply voltage VEE, a first base drive node 128, a second base drive node 130, a first input terminal 152 and a second input terminal 154 providing a differential voltage (VINP - VINM), and an output terminal 150 providing an output voltage VOUT. Base drive node 128 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 110. Base drive node 130 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 112.

[0020] In one example, the transconductance circuit includes differential pairs of transistors, such as differential pairs of PNP BJTs. In another example, the transconductance circuit is or includes an operational transconductance amplifier. Transconductance circuit 136 has a first (positive) input terminal coupled to input terminal 152, a second (negative) input terminal coupled to input terminal 154, a first (negative) output terminal coupled to base drive node 128, and a second (negative) output terminal coupled to base drive node 130. Current source circuit system 118 has a first terminal coupled to voltage supply terminal 124, a second terminal coupled to base drive node 128, a third terminal coupled to base drive node 130, and a fourth terminal coupled to voltage supply terminal 126. Current source circuit system 118 provides bias currents IBIAS1A and IBIAS1B.

[0021] Transistor 142 has a first terminal (collector) coupled to base drive node 128, a second terminal (emitter) coupled to base drive node 130, and a control terminal (base). Transistor 144 has a first terminal (collector) coupled to base drive node 130, a second terminal (emitter) coupled to base drive node 128, and a control terminal (base). Transistor 146 has a first terminal (collector) coupled to base drive node 128, a second terminal (emitter) coupled to the base of transistor 142, and a control terminal (base) receiving bias voltage VBIAS1B. Transistor 148 has a first terminal (collector) coupled to base drive node 130, a second terminal (emitter) coupled to the base of transistor 144, and a control terminal (base) receiving bias voltage VBIAS1A.

[0022] Current source circuit system 120 has a first terminal coupled to voltage supply terminal 124 and a second terminal coupled to the base of transistor 144 and the emitter of transistor 148. Current source circuit system 122 has a first terminal coupled to voltage supply terminal 126 and a second terminal coupled to the base of transistor 142 and the emitter of transistor 146. Current source circuit system 120 provides a bias current IBIAS1C. Current source circuit system 122 provides a bias current IBIAS1D.

[0023] Base driver 110 has an input terminal coupled to base driver node 128 and an output terminal. Base driver 112 has an input terminal coupled to base driver node 130 and an output terminal. Capacitor 132 has a first terminal coupled to base driver node 128 and a second terminal coupled to output terminal 150. Capacitor 134 has a first terminal coupled to base driver node 130 and a second terminal coupled to output terminal 150. Transistor 138 has a first terminal (collector) coupled to output terminal 150, a second terminal (emitter) coupled to voltage supply terminal 124, and a control terminal (base) coupled to the output terminal of base driver 110. Transistor 140 has a first terminal (collector) coupled to output terminal 150, a second terminal (emitter) coupled to voltage supply terminal 126, and a control terminal (base) coupled to the output terminal of base driver 112.

[0024] During operation, transconductance circuit 136 receives differential input voltages VINP and VINM at input terminals 152 and 154, and generates current at the output terminal of transconductance circuit 136. For example, the current may include a common-mode current (e.g., a current with the same polarity and magnitude) proportional to the voltage difference between VINP and VINM. Specifically, transconductance circuit 136 converts the differential input voltage (VINP−VINM) into a corresponding common-mode output current delivered to class AB control circuit 106. The magnitude of the generated common-mode current is proportional to the transconductance of transconductance circuit 136 and the differential input voltage.

[0025] In response to the common-mode current generated by transconductance circuit 136, the conduction of transistors 142 and 144 is regulated. Specifically, when VINP exceeds VINM, the current in transistor 142 increases, and when VINM exceeds VINP, the current in transistor 144 increases. Therefore, in response to the common-mode current from transconductance circuit 136, a current is directed between transistors 144 and 142 flowing between base drive nodes 128 and 130. This current direction regulates the base-emitter voltages of transistors 144 and 142, thereby regulating the voltages at base drive nodes 128 and 130, thus controlling output transistors 138 and 140, and consequently controlling VOUT.

[0026] The current source circuit system 118 establishes static operating conditions for the Class AB control circuit 106. Bias current IBIAS1A flows through the upper bias branch of the Class AB control circuit 106, and bias current IBIAS1B flows through the lower bias branch. Bias currents IBIAS1A and IBIAS1B establish stable currents in the signal paths, causing transistors 142 and 144 to remain partially conductive even without a differential input signal. Because both conduction paths remain slightly active under static conditions, the control circuit operates in Class AB mode instead of Class B mode. Class AB operation reduces crosstalk by maintaining a small amount of conduction in both signal paths even when the differential input signal is close to zero.

[0027] The signal current generated within the Class AB control circuit 106 (e.g., bias currents IBIAS1A and IBIAS1B regulated by the common-mode currents of control transistors 142 and 144) produces voltages at base drive nodes 128 and 130. The voltage variations at base drive nodes 128 and 130 are proportional to the common-mode current generated across conduction circuit 136. These voltage variations constitute the base drive signals that control base drivers 110 and 112.

[0028] Base drivers 110 and 112 buffer the voltage signals present at base drive nodes 128 and 130 to provide relatively high input impedance base voltage drive for output transistors 138 and 140, thereby generating relatively high amplifier open-loop gain A. OL Base driver 110 receives a control voltage at base driver node 128 and generates a corresponding drive signal for transistor 138. Similarly, base driver 112 receives a control voltage at base driver node 130 and generates a corresponding drive signal for transistor 140. High A is achieved at least in part through high input impedance looking from base driver nodes 128 and 130 to base drivers 110 and 112. OL .

[0029] Transistors 138 and 140 form a complementary push-pull topology, which, together with base drivers 110 and 112 within output stage 104 and class AB control circuitry 106, can be considered a Monticelli-type output stage structure. When a signal at base drive node 128 causes base driver 110 to increase the base drive of transistor 138, transistor 138 conducts additional current from VCC toward output terminal 150, thereby increasing the voltage at VOUT. Conversely, when a signal at base drive node 130 causes base driver 112 to increase the base drive of transistor 140, transistor 140 conducts current from output terminal 150 toward VEE, thereby decreasing the voltage at VOUT. In this way, the output stage generates a voltage VOUT at output terminal 150, which is an amplified representation of the differential input signals (VINP-VINM) applied to input terminals 152 and 154. Compared to some amplifier circuits that do not have a Monticelli-type output stage structure, the Monticelli-type output stage structure offers relatively lower quiescent current, improved large-signal drive, lower crossover distortion, increased rail-to-rail swing, and higher efficiency.

[0030] Capacitors 132 and 134 provide frequency compensation and stabilization for the output stage 104. Specifically, capacitors 132 and 134 introduce dominant pole behavior and provide local feedback that improves the stability of amplifier 100 and prevents oscillations when driving capacitive loads. Capacitors 132 and 134 also help control the slew rate and maintain stable operation across a range of load conditions.

[0031] While the described architecture provides effective voltage amplification, it is a source of signal inefficiency due to the finite current gain (β) of transistors 142 and 144. The current gain (β) of the BJT is the collector-emitter current (Ig). CE By controlling the signal current of the transistor and the base-emitter current (Ie), BE This is the ratio of signal loss (also known as error current) at the base of the control transistor. Therefore, β = (I CE / I BE Ideally, β would be infinite, resulting in no signal loss at the base of the control transistor. However, in practice, β is a process-dependent parameter that can vary widely across different process technologies. Therefore, for a given signal current (I... CE The lower the β, the greater the signal loss (I). BE The larger the β, the greater the signal current (I). In many process technologies, β is approximately 100, resulting in a higher signal current (I). CE ) to base current (I BE This results in approximately 1 / 100 of the signal loss.

[0032] Without the error current compensation circuitry 116 (containing transistors 146 and 148), the signal current shunted to the bases of transistors 142 and 144 could result in signal current losses that would otherwise contribute to the impedance and voltage generation at base-driven nodes 128 and 130. Consequently, the open-loop gain and linearity of amplifier 100 deteriorate. Figure 2 A is an amplifier circuit, such as amplifier circuit 100. OL Example signal diagram 200 shows an amplifier circuit containing control transistors, such as 142 and 144, with different current gains β. Waveform 202 represents the open-loop gain (A) in decibels (dB) at different frequencies for amplifier operation with β=400. OL Waveform 204 represents A at different frequencies for amplifier operation with β=200. OL Waveform 206 represents A at different frequencies for amplifier operation with β=100. OL Waveform 208 represents the A at different frequencies for amplifier operation with β=50. OL Waveform 210 represents A at different frequencies for amplifier operation with β=25. OL For every halving of β, A OL A reduction of approximately six dB.

[0033] An error current compensation circuit system 116, comprising transistors 146 and 148, is included within a class AB control circuit 106 to mitigate signal loss (error current) at the bases of transistors 142 and 144. Each of transistors 146 and 148 operates to redirect the error current from the bases of control transistors 142 and 144, to which each of transistors 146 and 148 is coupled, toward the base drive node. More specifically, transistor 146 is coupled such that the base current drawn by transistor 142 generates a corresponding conduction current between the emitter and collector of transistor 146. Instead of allowing this current to dissipate locally within control circuit 106, transistor 146 redirects the recovered current into the signal path coupled to base drive node 128, as shown by solid line 101. Similarly, transistor 148 is coupled such that the base current drawn by transistor 144 causes conduction from the emitter to the collector of transistor 148, which is redirected to base drive node 130, as shown by dashed line 103. In some examples, the BJTs in the error current compensation circuitry system, such as transistors 146 and 148, are replaced by field-effect transistors (FETs), such as metal-oxide-semiconductor field-effect transistors (MOSFETs), or a combination of BJTs and MOSFETs. Depending on the process technology, using one or more MOSFETs can result in a smaller circuit area. Using one or more MOSFETs also allows operation at lower supply voltages because the minimum Vds (drain-source voltage) of a MOSFET is typically smaller than the minimum Vce (collector-emitter voltage) of a BJT.

[0034] Transistors 146 and 148 restore and redirect the base currents of transistors 142 and 144 back to the signal paths at base drive nodes 128 and 130, resulting in an increase in the open-loop gain of amplifier circuit 100. Figure 3 This is signal diagram 300, showing waveforms 302 and 304. Waveform 304 shows a small signal A in dB, varying with frequency (in Hz), in a two-stage amplifier circuit without error current compensation. OL Waveform 302 shows the small signal A varying with frequency in, for example, amplifier circuit 100 with error current compensation. OL Compared to amplifier circuits without transistors 146 and 148, some implementations of amplifier circuit 100 including compensation or recirculation transistors 146 and 148 have an A value approximately 30 dB greater. OL Therefore, compared to a three-stage amplifier circuit design, a higher A value can be achieved. OL It maintains high bandwidth and conversion rate, low power consumption, small size and low design complexity.

[0035] Figure 4This is a circuit diagram illustrating another example amplifier circuit 400 including control circuitry with error current compensation. Amplifier circuit 400 includes an example input stage 402 coupled to an example output stage 404. Input stage 402 includes an example transconductance circuit 436. Output stage 404 includes an example control circuit 406, an output driver 408, a base driver 410, a base driver 412, a capacitor 432, and a capacitor 434. Control circuitry 406 includes an example control circuit system 414, an example error current compensation circuit system 416, example current source circuit systems 418, 420, and 422, and example bias voltage generators 460 and 470. Current source circuit systems 418, 420, and 422 may also be referred to herein as bias current generators.

[0036] Control circuit system 414 includes transistors 442 and 444, which may also be referred to herein as control transistors. Error current compensation circuit system 416 includes transistors 446 and 448, which may also be referred to herein as compensation or recirculation transistors. Output driver 408 includes transistors 438 and 440, which may also be referred to herein as output transistors. Current source circuit system 418 includes diode-coupled transistors 405, 407, 413, 415, 417, 419, resistors 401, 403, 421, and 423, and current source circuit systems 409 and 411. Bias voltage generator 460 includes diode-coupled transistors 462, 464, and 466, and current source circuit system 468. Bias voltage generator 470 includes current source circuit system 472, and diode-coupled transistors 474, 476, and 478.

[0037] In the example amplifier circuit 400, transistors 413, 415, 417, 419, 440, 442, 446, 474, 476, and 478 are NPN BJTs, and transistors 405, 407, 438, 444, 448, 462, 464, and 466 are PNP BJTs. Furthermore, diode-coupled transistors are transistors constructed with terminals coupled to the control terminals of the transistor. In the example amplifier circuit 400, diode-coupled transistors 405, 413, 419, 462, 464, 466, 474, 476, and 478 have a first terminal (collector) directly connected to the base of the transistor.

[0038] exist Figure 4The diagram further illustrates a first voltage supply terminal 424 providing a first power supply voltage VCC, a second voltage supply terminal 426 providing a second power supply voltage VEE, a first base driver node 428, a second base driver node 430, a first input terminal 452 and a second input terminal 454 providing a differential voltage (VINP - VINM), and an output terminal 450 providing an output voltage VOUT. Base driver node 428 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 410. Base driver node 430 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 412.

[0039] Transconducting circuit 436 has a first (positive) input coupled to input terminal 452, a second (negative) input coupled to input terminal 454, a first (positive) output, and a second (negative) output. Therefore, transconducting circuit 436 generates differential currents at its outputs, which have the same magnitude but different polarities. Transistors 405 and 407 are configured as current mirrors, reversing the polarity of one of these output currents, such that a common-mode current proportional to the voltage difference between VINP and VINM is directed through control transistors 442 and 444. Current source circuit system 409, diode-coupled transistor 413, and resistor 421 are coupled in series between voltage supply terminals 424 and 426. Current source circuit system 411, diode-coupled transistor 419, and resistor 423 are coupled in series between voltage supply terminals 424 and 426. Resistor 401 and diode-coupled transistor 405 are coupled in series between voltage supply terminal 424 and the first terminal (collector) of transistor 415. The second terminal (emitter) of transistor 415 is coupled to the second terminal (emitter) of diode-coupled transistor 419, the terminal of resistor 423, and the positive output terminal of transconductance circuit 436. The control terminal (base) of transistor 415 is coupled to the collector and base of diode-coupled transistor 413 and the terminal of current source circuit system 409. Resistor 403 and transistor 407 are coupled in series between voltage supply terminal 424 and base drive node 428. Transistor 417 has a first terminal (collector) coupled to base drive node 430 and a control terminal (base) coupled to the base and collector of diode-coupled transistor 419. Transistor 417 has a second terminal (emitter) coupled to the second terminal (emitter) of diode-coupled transistor 413, the terminal of resistor 421, and the second terminal (emitter) of negative output terminal of transconductance circuit 436. Current source circuit system 418 provides a bias current IBIAS4A at the collector of transistor 407 and a bias current IBIAS4B at the collector of transistor 417.

[0040] Transistor 442 has a first terminal (collector) coupled to base drive node 428, a second terminal (emitter) coupled to base drive node 430, and a control terminal (base). Transistor 444 has a first terminal (collector) coupled to base drive node 430, a second terminal (emitter) coupled to base drive node 428, and a control terminal (base). Transistor 446 has a first terminal (collector) coupled to base drive node 428, a second terminal (emitter) coupled to the base of transistor 442, and a control terminal (base). Transistor 448 has a first terminal (collector) coupled to base drive node 430, a second terminal (emitter) coupled to the base of transistor 444, and a control terminal (base).

[0041] Current source circuit system 420 has a first terminal coupled to voltage supply terminal 424 and a second terminal coupled to the base of transistor 444 and the emitter of transistor 448. Current source circuit system 422 has a first terminal coupled to voltage supply terminal 426 and a second terminal coupled to the base of transistor 442 and the emitter of transistor 446. Current source circuit system 420 provides a bias current IBIAS4C. Current source circuit system 422 provides a bias current IBIAS4D.

[0042] Current source circuit system 472 and diode-coupled transistors 474, 476, and 478 are coupled in series between voltage supply terminals 424 and 426. The base of transistor 446 is coupled to the base and collector of diode-coupled transistor 474 and to the terminals of current source circuit system 472 to receive the bias voltage VBIAS4B generated by bias voltage generator 470. Current source circuit system 468 and diode-coupled transistors 462, 464, and 466 are coupled in series between voltage supply terminals 424 and 426. The base of transistor 448 is coupled to the base and collector of diode-coupled transistor 466 and to the terminals of current source circuit system 468 to receive the bias voltage VBIAS4A generated by bias voltage generator 460.

[0043] Base driver 410 has an input terminal coupled to base driver node 428 and an output terminal. Base driver 412 has an input terminal coupled to base driver node 430 and an output terminal. Capacitor 432 has a first terminal coupled to base driver node 428 and a second terminal coupled to output terminal 450. Capacitor 434 has a first terminal coupled to base driver node 430 and a second terminal coupled to output terminal 450. Transistor 438 has a first terminal (emitter) coupled to voltage supply terminal 424, a second terminal coupled to output terminal 450, and a control terminal (base) coupled to the output terminal of base driver 410. Transistor 440 has a first terminal (emitter) coupled to voltage supply terminal 426, a second terminal coupled to output terminal 450, and a control terminal (base) coupled to the output terminal of base driver 412.

[0044] Amplifier circuit 400 operates similarly to amplifier circuit 100 to generate an amplified output voltage VOUT in response to the differential input voltage (VINP-VINM), wherein transistors 446 and 448 redirect error current from the bases of transistors 442 and 444 to base drive nodes 428 and 430, thereby resulting in an increased A OL Furthermore, in the example amplifier circuit 400, current source circuit systems 420 and 422 generate fixed bias currents IBIAS4C and IBIAS4D at the emitters of transistors 448 and 446. In some examples, IBIAS4C and IBIAS4D have smaller values, such as one-sixth of the values ​​of IBIAS4A and IBIAS4B, to reduce their contribution to signal noise and power consumption. The current source circuits that generate the fixed bias currents may also be referred to herein as fixed current source circuits or fixed current sources. Bias voltage generators 460 and 470 generate fixed bias voltages VBIAS4A and VBIAS4B at the bases of transistors 448 and 446.

[0045] Figure 5 This is a circuit diagram illustrating another example amplifier circuit 500 including control circuitry with error current compensation. Amplifier circuit 500 includes an example input stage 502 coupled to an example output stage 504. Input stage 502 includes an example transconductance circuit 536. Output stage 504 includes an example control circuit 506, an output driver 508, a base driver 510, a base driver 512, a capacitor 532, and a capacitor 534. Control circuitry 506 includes an example control circuit system 514, an example error current compensation circuit system 516, example current source circuit systems 518, 520, and 522, and example bias voltage generators 560 and 570. Current source circuit systems 518, 520, and 522 may also be referred to herein as bias current generators.

[0046] Control circuit system 514 includes transistors 542 and 544, which may also be referred to herein as control transistors. Error current compensation circuit system 516 includes transistors 546 and 548, which may also be referred to herein as compensation or recirculation transistors. Output driver 508 includes transistors 538 and 540, which may also be referred to herein as output transistors. Current source circuit system 518 includes diode-coupled transistors 505, 507, 513, 515, 517, and 519, resistors 501, 503, 521, and 523, and current source circuit systems 509 and 511. Current source circuit system 520 includes transistor 580. Current source circuit system 522 includes transistor 582. Bias voltage generator 560 includes diode-coupled transistors 562, 564, and 566, and current source circuit system 568. Bias voltage generator 570 includes current source circuitry 572 and diode-coupled transistors 574, 576, and 578. Base driver 510 includes diode-coupled transistors 535 and 539, transistors 533 and 541, capacitor 537, and current source circuitry 531 and 543. Base driver 512 includes diode-coupled transistors 529 and 547, transistors 549 and 551, capacitor 527, and current source circuitry 525 and 545.

[0047] In example amplifier circuit 500, transistors 513, 515, 517, 519, 533, 535, 540, 542, 546, 547, 549, 574, 576, 578, and 582 are NPN BJTs, and transistors 505, 507, 529, 538, 539, 541, 544, 548, 551, 562, 564, 566, and 580 are PNP BJTs. In example amplifier circuit 500, diode-coupled transistors 505, 513, 519, 529, 535, 539, 547, 562, 564, 566, 574, 576, and 578 have a first terminal (collector) directly connected to the base of the transistor.

[0048] exist Figure 5The diagram further illustrates a first voltage supply terminal 524 providing a first power supply voltage VCC, a second voltage supply terminal 526 providing a second power supply voltage VEE, a first base driver node 528, a second base driver node 530, a first input terminal 552 and a second input terminal 554 providing a differential voltage (VINP - VINM), and an output terminal 550 providing an output voltage VOUT. Base driver node 528 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 510. Base driver node 530 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 512.

[0049] Transconducting circuit 536 has a first (positive) input coupled to input terminal 552, a second (negative) input coupled to input terminal 554, a first (positive) output, and a second (negative) output. Therefore, transconducting circuit 536 generates differential currents at its outputs, which have the same magnitude but different polarities. Transistors 505 and 507 are configured as current mirrors, reversing the polarity of one of these output currents, such that a common-mode current proportional to the voltage difference between VINP and VINM is directed through control transistors 542 and 544. Current source circuit system 509, diode-coupled transistor 513, and resistor 521 are coupled in series between voltage supply terminals 524 and 526. Current source circuit system 511, diode-coupled transistor 519, and resistor 523 are coupled in series between voltage supply terminals 524 and 526. Resistor 501 and diode-coupled transistor 505 are coupled in series between voltage supply terminal 524 and the first terminal (collector) of transistor 515. The second terminal (emitter) of transistor 515 is coupled to the second terminal (emitter) of diode-coupled transistor 519, the terminal of resistor 523, and the positive output terminal of transconductance circuit 536. The control terminal (base) of transistor 515 is coupled to the collector and base of diode-coupled transistor 513 and the terminal of current source circuit system 509. Resistor 503 and transistor 507 are coupled in series between voltage supply terminal 524 and base drive node 528. Transistor 517 has a first terminal (collector) coupled to base drive node 530 and a control terminal (base) coupled to the base and collector of diode-coupled transistor 519. Transistor 517 has a second terminal (emitter) coupled to the second terminal (emitter) of transistor 513, the terminal of resistor 521, and the second terminal (emitter) of negative output terminal of transconductance circuit 536. Current source circuit system 518 provides a bias current IBIAS5A at the collector of transistor 507 and a bias current IBIAS5B at the collector of transistor 517.

[0050] Transistor 542 has a first terminal (collector) coupled to base drive node 528, a second terminal (emitter) coupled to base drive node 530, and a control terminal (base). Transistor 544 has a first terminal (collector) coupled to base drive node 530, a second terminal (emitter) coupled to base drive node 528, and a control terminal (base). Transistor 546 has a first terminal (collector) coupled to base drive node 528, a second terminal (emitter) coupled to the base of transistor 542, and a control terminal (base). Transistor 548 has a first terminal (collector) coupled to base drive node 530, a second terminal (emitter) coupled to the base of transistor 544, and a control terminal (base).

[0051] Transistor 580 has a first terminal (collector) coupled to the base of transistor 544 and the emitter of transistor 548, a second terminal (emitter) coupled to the emitter of transistor 507, and a control terminal (base) coupled to the base of transistor 507. Transistor 582 has a first terminal (collector) coupled to the base of transistor 542 and the emitter of transistor 546, a second terminal (emitter) coupled to the emitter of transistor 517, and a control terminal (base) coupled to the base of transistor 517. Current source circuit system 520 provides a bias current IBIAS5C at the collector of transistor 580. Current source circuit system 522 provides a bias current IBIAS5D at the collector of transistor 582.

[0052] Current source circuit system 572 and diode-coupled transistors 574, 576, and 578 are coupled in series between voltage supply terminals 524 and 526. The base of transistor 546 is coupled to the base and collector of diode-coupled transistor 574 and to the terminals of current source circuit system 572 to receive the bias voltage VBIAS5B generated by bias voltage generator 570. Current source circuit system 568 and diode-coupled transistors 562, 564, and 566 are coupled in series between voltage supply terminals 524 and 526. The base of transistor 548 is coupled to the base and collector of diode-coupled transistor 566 and to the terminals of current source circuit system 568 to receive the bias voltage VBIAS5A generated by bias voltage generator 560.

[0053] In base driver 510, transistor 533, diode-coupled transistor 539, and current source circuit system 543 are coupled in series between voltage supply terminals 524 and 526. Current source circuit system 531, diode-coupled transistor 535, and transistor 541 are coupled in series between voltage supply terminals 524 and 526. The base of transistor 541 is coupled to the base and collector of diode-coupled transistor 539 and the terminals of current source circuit system 543. Capacitor 537 has a first terminal coupled to the base of transistor 533 and base drive node 528. Capacitor 537 has a second terminal coupled to the base and collector of diode-coupled transistor 535, the terminals of current source circuit system 531, and the control terminal (base) of transistor 538.

[0054] In base driver 512, transistor 549, diode-coupled transistor 529, and current source circuit system 525 are coupled in series between voltage supply terminals 524 and 526. Current source circuit system 545, diode-coupled transistor 547, and transistor 551 are coupled in series between voltage supply terminals 524 and 526. The base of transistor 549 is coupled to the base and collector of diode-coupled transistor 547 and the terminals of current source circuit system 545. Capacitor 527 has a first terminal coupled to the base of transistor 551 and base drive node 530. Capacitor 527 has a second terminal coupled to the base and collector of diode-coupled transistor 529, the terminals of current source circuit system 525, and the control terminal (base) of transistor 540.

[0055] Capacitor 532 has a first terminal coupled to base drive node 528 and a second terminal coupled to output terminal 550. Capacitor 534 has a first terminal coupled to base drive node 530 and a second terminal coupled to output terminal 550. Transistor 538 has a first terminal (emitter) coupled to voltage supply terminal 524 and a second terminal (collector) coupled to output terminal 550. Transistor 540 has a first terminal (emitter) coupled to voltage supply terminal 526 and a second terminal (collector) coupled to output terminal 550.

[0056] Amplifier circuit 500 operates similarly to amplifier circuit 100 to generate an amplified output voltage VOUT in response to the differential input voltage (VINP-VINM), wherein transistors 546 and 548 redirect error current from the bases of transistors 542 and 544 to base drive nodes 528 and 530, thereby resulting in an increased A OLFurthermore, bias voltage generators 560 and 570 generate fixed bias voltages VBIAS5A and VBIAS5B at the bases of transistors 548 and 546. However, in the example amplifier circuit 500, current source circuit systems 520 and 522 generate bias currents based on bias currents IBIAS5A and IBIAS5B generated by current source circuit system 518. That is, transistor 580 of current source circuit system 520 forms a current mirror with transistor 507 of current source circuit system 518, wherein a portion of the bias current IBIAS5A conducted through transistor 507 is conducted through transistor 580 as bias current IBIAS5C. Similarly, transistor 582 of current source circuit system 522 forms a current mirror with transistor 517 of current source circuit system 518, wherein a portion of the bias current IBIAS5B conducted through transistor 517 is conducted through transistor 582 as bias current IBIAS5D. In some examples, given the emitter area size of transistors 507 and 517 as 1x (where x is an integer value), the emitter area size of transistors 580 and 582 is (1 / n)*x, where n is 5 or greater. Therefore, IBIAS5C is a scaled-down version of IBIAS5A (1 / n in this example), and IBIAS5D is a scaled-down version of IBIAS5B (1 / n in this case). This structure used to generate IBIAS5C and IBIAS5D reduces amplifier noise and design complexity.

[0057] Furthermore, the structures of base drivers 510 and 512 allow for additional efficiency. For example, these two-rank base driver structures offer higher input impedance than other single-rank base driver designs, resulting in higher amplifier gain and linearity. Additionally, unlike other base driver designs, these structures have zero offset voltage between their input and output, allowing for a minimum supply voltage as low as 2.7 V for implementing amplifier circuit 500. In some examples, the structures of base drivers 510 and 512 can be implemented in amplifier circuits 100, 400, 600, and 700. Other base driver structures can be implemented, and they can provide similar efficiency, such as the base driver structures described in U.S. Patent Application No. 19 / 345,404, which is incorporated herein by reference in its entirety.

[0058] Figure 6This is a circuit diagram illustrating another example amplifier circuit 600 including control circuitry with error current compensation. Amplifier circuit 600 includes an example input stage 602 coupled to an example output stage 604. Input stage 602 includes an example transconductance circuit 636. Output stage 604 includes an example control circuit 606, an output driver 608, a base driver 610, a base driver 612, a capacitor 632, and a capacitor 634. Control circuit 606 includes an example control circuit system 614, an example error current compensation circuit system 616, and example current source circuit systems 618, 620, 622, 656, and 658. Current source circuit systems 618, 620, 622, 656, and 658 may also be referred to herein as bias current generators. Control circuit system 614 includes transistors 642 and 644, which may also be referred to herein as control transistors. Error current compensation circuit system 616 includes transistors 646 and 648, which may also be referred to herein as compensation or recirculation transistors. The output driver 608 includes transistors 638 and 640, which may also be referred to as output transistors. In the example amplifier circuit 600, transistors 640, 642, and 648 are NPN BJTs, and transistors 638, 644, and 646 are PNP BJTs.

[0059] Figure 6 The diagram also shows a first voltage supply terminal 624 providing a first power supply voltage VCC, a second voltage supply terminal 626 providing a second power supply voltage VEE, a first base drive node 628, a second base drive node 630, a first input terminal 652 and a second input terminal 654 providing a differential voltage (VINP - VINM), and an output terminal 650 providing an output voltage VOUT. Base drive node 628 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 610. Base drive node 630 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 612.

[0060] Transconducting circuit 636 has a first (positive) input terminal coupled to input terminal 652, a second (negative) input terminal coupled to input terminal 654, a first (negative) output terminal coupled to base drive node 628, and a second (negative) output terminal coupled to base drive node 630. Current source circuit system 618 has a first terminal coupled to voltage supply terminal 624, a second terminal coupled to base drive node 628, a third terminal coupled to base drive node 630, and a fourth terminal coupled to voltage supply terminal 626. Current source circuit system 618 provides bias current IBIAS6A and bias current IBIAS6B.

[0061] Transistor 642 has a first terminal (collector) coupled to base drive node 628, a second terminal (emitter) coupled to base drive node 630, and a control terminal (base). Transistor 644 has a first terminal (collector) coupled to base drive node 630, a second terminal (emitter) coupled to base drive node 628, and a control terminal (base). Transistor 646 has a first terminal (collector) coupled to base drive node 630, a second terminal (emitter) coupled to the base of transistor 642, and a control terminal (base) receiving bias voltage VBIAS6A. Transistor 648 has a first terminal (collector) coupled to base drive node 628, a second terminal (emitter) coupled to the base of transistor 644, and a control terminal (base) receiving bias voltage VBIAS6B.

[0062] Current source circuit system 620 has a first terminal coupled to voltage supply terminal 626 and a second terminal coupled to the base of transistor 644 and the emitter of transistor 648. Current source circuit system 622 has a first terminal coupled to voltage supply terminal 624 and a second terminal coupled to the base of transistor 642 and the emitter of transistor 646. Current source circuit system 656 is coupled between base drive node 630 and voltage supply terminal 626. Current source circuit system 658 is coupled between base drive node 628 and voltage supply terminal 624. Current source circuit system 620 provides a bias current IBIAS6C. Current source circuit system 622 provides a bias current IBIAS6D. Current source circuit system 658 provides a bias current IBIAS6E. Current source circuit system 656 provides a bias current IBIAS6F.

[0063] Base driver 610 has an input terminal coupled to base driver node 628 and an output terminal. Base driver 612 has an input terminal coupled to base driver node 630 and an output terminal. Capacitor 632 has a first terminal coupled to base driver node 628 and a second terminal coupled to output terminal 650. Capacitor 634 has a first terminal coupled to base driver node 630 and a second terminal coupled to output terminal 650. Transistor 638 has a first terminal (collector) coupled to output terminal 650, a second terminal (emitter) coupled to voltage supply terminal 624, and a control terminal (base) coupled to the output terminal of base driver 610. Transistor 640 has a first terminal (collector) coupled to output terminal 650, a second terminal (emitter) coupled to voltage supply terminal 626, and a control terminal (base) coupled to the output terminal of base driver 612.

[0064] Amplifier circuit 600 operates similarly to amplifier circuit 100 to generate an amplified output voltage VOUT in response to the differential input voltage (VINP-VINM), wherein transistors 646 and 648 redirect error current from the bases of transistors 642 and 644 to base drive nodes 628 and 630, thereby resulting in an increased A OL However, amplifier circuit 600 may include two additional current source circuits supplying IBIAS6E and IBIAS6F to provide sufficient quiescent current to meet the switching requirements of amplifier circuit 600. Furthermore, in amplifier circuit 600, the recirculating transistor in error current compensation circuit system 616 is of a complementary type to the control transistor in control circuit system 614. Specifically, control transistor 642 is an NPN BJT, and recirculating transistor 646 is a PNP BJT. Additionally, control transistor 644 is a PNP BJT, and recirculating transistor 648 is an NPN BJT. In amplifier circuit 100, the recirculating transistor in error current compensation circuit system 116 is of the same type as the control transistor in control circuit system 114. Specifically, control transistor 142 is an NPN BJT, and recirculating transistor 146 is an NPN BJT. Additionally, control transistor 144 is a PNP BJT, and recirculating transistor 148 is a PNP BJT. In operation, transistor 646 is coupled such that the base current drawn by transistor 642 generates a corresponding conduction current between the emitter and collector of transistor 646. Instead of allowing this current to dissipate locally within control circuitry 606, transistor 646 redirects the recovered current into a signal path coupled to base drive node 630, as shown by solid line 601. Similarly, transistor 648 is coupled such that the base current drawn by transistor 644 causes conduction from the emitter to the collector of transistor 648, which is redirected to base drive node 628, as shown by dashed line 603.

[0065] Using complementary recirculating transistors to deliver error current at the base of the control transistor reduces margin requirements, enabling amplifier circuit 600 to operate at a lower supply voltage compared to amplifier circuits 100, 400, and 500. For example, amplifier circuit 100 can operate with a minimum supply voltage of VBE of transistor 140 plus VBE of transistor 142 (or 144) plus VCE of transistor 146 (or 148) plus VBE of transistor 138, which may be approximately 2.7 V. Amplifier circuit 600 can operate with a minimum supply voltage of VBE of transistor 640 plus VCE of transistor 642 (or 644) plus VBE of transistor 638, which may be approximately 2.0 V.

[0066] Figure 7This is a circuit diagram illustrating another example amplifier circuit 700 including control circuitry with error current compensation. Amplifier circuit 700 includes an example input stage 702 coupled to an example output stage 704. Input stage 702 includes an example transconductance circuit 736. Output stage 704 includes an example control circuit 706, an output driver 708, a base driver 710, a base driver 712, a capacitor 732, and a capacitor 734. Control circuitry 706 includes an example control circuit system 714, an example error current compensation circuit system 716, example current source circuit systems 718, 720, 722, 756, and 758, and example bias voltage generators 760 and 770. Current source circuit systems 718, 720, and 722 may also be referred to herein as bias current generators.

[0067] Control circuit system 714 includes transistors 742 and 744, which may also be referred to herein as control transistors. Error current compensation circuit system 716 includes transistors 746 and 748, which may also be referred to herein as compensation or recirculation transistors. Output driver 708 includes transistors 738 and 740, which may also be referred to herein as output transistors. Current source circuit system 718 includes diode-coupled transistors 705, 707, 713, 715, 717, 719, resistors 701, 703, 721, and 723, and current source circuit systems 709 and 711. Bias voltage generator 760 includes diode-coupled transistors 762, 764, and 766, and current source circuit systems 768 and 782. Bias voltage generator 770 includes current source circuit systems 772 and 780, and diode-coupled transistors 774, 776, and 778.

[0068] In the example amplifier circuit 700, transistors 713, 715, 717, 719, 740, 742, 748, 766, 774, and 776 are NPN BJTs, and transistors 705, 707, 738, 744, 746, 762, 764, and 778 are PNP BJTs. In the example amplifier circuit 700, diode-coupled transistors 705, 713, 719, 762, 764, 766, 774, 776, and 778 have a first terminal (collector) directly connected to the base of the transistor.

[0069] exist Figure 7The diagram also shows a first voltage supply terminal providing a first power supply voltage VCC, a second voltage supply terminal providing a second power supply voltage VEE, a first base driver node 728, a second base driver node 730, a first input terminal 752 and a second input terminal 754 providing a differential voltage (VINP - VINM), and an output terminal 750 providing an output voltage VOUT. Base driver node 728 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 710. Base driver node 730 represents a logic electrical point where terminals of multiple components are coupled to the input terminals of base driver 712.

[0070] Transconducting circuit 736 has a first (positive) input coupled to input terminal 752, a second (negative) input coupled to input terminal 754, a first (positive) output, and a second (negative) output. Therefore, transconducting circuit 736 generates differential currents at its outputs, which have the same magnitude but different polarities. Transistors 705 and 707 are configured as current mirrors, reversing the polarity of one of these output currents, such that a common-mode current proportional to the voltage difference between VINP and VINM is directed through control transistors 742 and 744. Current source circuit system 709, diode-coupled transistor 713, and resistor 721 are coupled in series between voltage supply terminals 724 and 726. Current source circuit system 711, diode-coupled transistor 719, and resistor 723 are coupled in series between voltage supply terminals 724 and 726. Resistor 701 and diode-coupled transistor 705 are coupled in series between voltage supply terminal 724 and the first terminal (collector) of transistor 715. The second terminal (emitter) of transistor 715 is coupled to the second terminal (emitter) of diode-coupled transistor 719, the terminal of resistor 723, and the positive output terminal of transconductance circuit 736. The control terminal (base) of transistor 715 is coupled to the collector and base of diode-coupled transistor 713 and the terminal of current source circuit system 709. Resistor 703 and transistor 707 are coupled in series between voltage supply terminal 724 and base drive node 728. Transistor 717 has a first terminal (collector) coupled to base drive node 730 and a control terminal (base) coupled to the base and collector of diode-coupled transistor 719. Transistor 717 has a second terminal (emitter) coupled to the second terminal (emitter) of transistor 713, the terminal of resistor 721, and the second terminal (emitter) of negative output terminal of transconductance circuit 736. Current source circuit system 718 provides a bias current IBIAS7A at the collector of transistor 707 and a bias current IBIAS7B at the collector of transistor 717.

[0071] Transistor 742 has a first terminal (collector) coupled to base drive node 728, a second terminal (emitter) coupled to base drive node 730, and a control terminal (base). Transistor 744 has a first terminal (collector) coupled to base drive node 730, a second terminal (emitter) coupled to base drive node 728, and a control terminal (base). Transistor 746 has a first terminal (collector) coupled to base drive node 730, a second terminal (emitter) coupled to the base of transistor 742, and a control terminal (base). Transistor 748 has a first terminal (collector) coupled to base drive node 728, a second terminal (emitter) coupled to the base of transistor 744, and a control terminal (base).

[0072] Current source circuit system 720 has a first terminal coupled to voltage supply terminal 726 and a second terminal coupled to the base of transistor 744 and the emitter of transistor 748. Current source circuit system 722 has a first terminal coupled to voltage supply terminal 724 and a second terminal coupled to the base of transistor 742 and the emitter of transistor 746. Current source circuit system 756 is coupled between the collector of transistor 746 and voltage supply terminal 726. Current source circuit system 758 is coupled between the collector of transistor 748 and voltage supply terminal 724. Current source circuit system 720 provides a bias current IBIAS7C. Current source circuit system 722 provides a bias current IBIAS7D. Current source circuit system 758 provides a bias current IBIAS7E. Current source circuit system 756 provides a bias current IBIAS7F.

[0073] Current source circuit system 772 and diode-coupled transistors 774 and 776 are coupled in series between voltage supply terminals 724 and 726. Diode-coupled transistor 778 and current source circuit 780 are coupled in series between the base of diode-coupled transistor 774 and voltage supply terminal 726. The base of transistor 746 is coupled to the base and collector of diode-coupled transistor 778 and to a terminal of current source circuit system 780 to receive the bias voltage VBIAS7A generated by bias voltage generator 770. Current source circuit system 768 and diode-coupled transistors 762 and 764 are coupled in series between voltage supply terminals 724 and 726. Current source circuit system 782 and diode-coupled transistor 766 are coupled in series between voltage supply terminal 724 and the base of diode-coupled transistor 764. The base of transistor 748 is coupled to the base and collector of diode-coupled transistor 766, and to the terminals of current source circuit system 782 to receive the bias voltage VBIAS7B generated by bias voltage generator 760.

[0074] Base driver 710 has an input terminal coupled to base driver node 728 and an output terminal. Base driver 712 has an input terminal coupled to base driver node 730 and an output terminal. Capacitor 732 has a first terminal coupled to base driver node 728 and a second terminal coupled to output terminal 750. Capacitor 734 has a first terminal coupled to base driver node 730 and a second terminal coupled to output terminal 750. Transistor 738 has a first terminal (emitter) coupled to voltage supply terminal 724, a second terminal coupled to output terminal 750, and a control terminal (base) coupled to the output terminal of base driver 710. Transistor 740 has a first terminal (emitter) coupled to voltage supply terminal 726, a second terminal coupled to output terminal 750, and a control terminal (base) coupled to the output terminal of base driver 712.

[0075] Amplifier circuit 700 operates similarly to amplifier circuit 100 to generate an amplified output voltage VOUT in response to the differential input voltage (VINP-VINM), wherein transistors 746 and 748 redirect the lost current from the bases of transistors 742 and 744 to base drive nodes 728 and 730, thereby resulting in an increased A OL However, amplifier circuit 700, like amplifier circuit 600, uses complementary recirculating transistors, which enables a lower operating supply voltage compared to amplifier circuit 100.

[0076] Various examples of this specification can be described as follows.

[0077] Example 1. A circuit includes: a first transistor having a collector, an emitter, and a base; a second transistor having a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base; a third transistor having a first terminal coupled to the base of the first transistor and a second terminal coupled to the collector of the first transistor and the emitter of the second transistor; and a fourth transistor having a first terminal coupled to the base of the second transistor and a second terminal coupled to the collector of the second transistor and the emitter of the first transistor.

[0078] Example 2. The circuit according to Example 1, wherein the first terminal of the third transistor and the fourth transistor is the emitter, and the second terminal of the third transistor and the fourth transistor is the collector.

[0079] Example 3. The circuit according to any one of Examples 1 and 2, wherein the first transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the second transistor and the fourth transistor are PNP BJTs.

[0080] Example 4. The circuit according to any one of Examples 1 to 3 further comprises: a first current source coupled to the first terminal of the third transistor; and a second current source coupled to the first terminal of the fourth transistor.

[0081] Example 5. The circuit according to Example 4, wherein the first current source and the second current source are fixed current sources.

[0082] Example 6. According to the circuit described in Example 4, wherein the first current source generates a first current, which is a portion of a first bias current at the emitter of the first transistor and the collector of the second transistor, and the second current source generates a second current, which is a portion of a second bias current at the collector of the first transistor and the emitter of the second transistor.

[0083] Example 7. The circuit according to Example 4 further includes a bias current generator having a fifth transistor and a sixth transistor, the fifth transistor being coupled to the emitter of the first transistor and the collector of the second transistor, the sixth transistor being coupled to the collector of the first transistor and the emitter of the second transistor, wherein the first current source includes a seventh transistor forming a first current mirror with the fifth transistor, and the second current source includes an eighth transistor forming a second current mirror with the sixth transistor.

[0084] Example 8. The circuit according to Example 7, wherein the bias current generator generates a first bias current in the fifth transistor and a second bias current in the sixth transistor, the first current source generates a first current in the seventh transistor, the first current being a portion of the first bias current, and the second current source generates a second current in the eighth transistor, the second current being a portion of the second bias current.

[0085] Example 9. A circuit according to any one of the foregoing examples further comprises: a first driver circuit having an input terminal coupled to the collector of the first transistor and the third transistor and the emitter of the second transistor, and having an output terminal; a second driver circuit having an input terminal coupled to the collector of the second transistor and the fourth transistor and the emitter of the first transistor, and having an output terminal; a fifth transistor and a sixth transistor, the fifth transistor and the sixth transistor being coupled in series between a first voltage supply terminal and a second voltage supply terminal, the fifth transistor having a control terminal coupled to the output terminal of the first driver circuit, and the sixth transistor having a control terminal coupled to the output terminal of the second driver circuit.

[0086] Example 10. A circuit includes: a first transistor having a collector, an emitter, and a base; a second transistor having a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base; a third transistor having a first terminal coupled to the base of the first transistor and a second terminal coupled to the emitter of the first transistor and the collector of the second transistor; and a fourth transistor having a first terminal coupled to the base of the second transistor and a second terminal coupled to the emitter of the second transistor and the collector of the first transistor.

[0087] Example 11. The circuit according to Example 10, wherein the first terminal of the third transistor and the fourth transistor is the emitter, and the second terminal of the third transistor and the fourth transistor is the collector.

[0088] Example 12. A circuit according to any one of Examples 10 and 11, wherein the second transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the first transistor and the fourth transistor are PNP BJTs.

[0089] Example 13. A circuit according to any one of Examples 10 to 12, further comprising: a first current source coupled to the first terminal of the third transistor; a second current source coupled to the first terminal of the fourth transistor; a third current source coupled to the second terminal of the third transistor; and a fourth current source coupled to the second terminal of the fourth transistor.

[0090] Example 14. A circuit according to any one of Examples 10 to 13, further comprising: a first driver circuit having an input terminal coupled to the collector of the second transistor and the third transistor and the emitter of the first transistor, and having an output terminal; a second driver circuit having an input terminal coupled to the collector of the first transistor and the fourth transistor and the emitter of the second transistor, and having an output terminal; a fifth transistor and a sixth transistor, the fifth transistor and the sixth transistor being coupled in series between a first voltage supply terminal and a second voltage supply terminal, the fifth transistor having a control terminal coupled to the output terminal of the first driver circuit, and the sixth transistor having a control terminal coupled to the output terminal of the second driver circuit.

[0091] Example 15. A circuit includes: a control circuit system comprising a first transistor coupled in parallel to a second transistor, the first transistor and the second transistor having respective control terminals, wherein the first transistor generates a first current based on an input voltage, and the second transistor generates a second current based on the input voltage; and an error current compensation circuit system comprising: a third transistor having a first terminal coupled to the control terminal of the first transistor and a second terminal coupled to the first terminal of both the first transistor and the second transistor, wherein the third transistor redirects a third current generated at the control terminal of the first transistor; and a fourth transistor having a first terminal coupled to the control terminal of the second transistor and a second terminal coupled to the second terminal of both the first transistor and the second transistor, wherein the fourth transistor redirects a fourth current generated at the control terminal of the second transistor.

[0092] Example 16. According to the circuit described in Example 15, the error current compensation circuit system includes: a first current source coupled to the first terminal of the third transistor; and a second current source coupled to the first terminal of the fourth transistor.

[0093] Example 17. The circuit according to Example 16, wherein the first current source and the second current source are fixed current sources.

[0094] Example 18. The circuit according to Example 16, wherein the control circuit system includes a third current source, the third current source including a fifth transistor coupled to the first transistor and the second transistor and a sixth transistor coupled to the first transistor and the second transistor, wherein the first current source includes a seventh transistor forming a first current mirror with the fifth transistor, and the second current source includes an eighth transistor forming a second current mirror with the sixth transistor.

[0095] Example 19. The circuit according to Example 16 further includes: a third current source coupled to the second terminal of the third transistor; and a fourth current source coupled to the second terminal of the fourth transistor.

[0096] Example 20. A circuit according to any one of Examples 15 to 18, wherein the first transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the second transistor and the fourth transistor are PNP BJTs.

[0097] Example 21. A circuit according to any one of Examples 15 to 17 and 20, wherein the second transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the first transistor and the fourth transistor are PNPBJTs.

[0098] In addition to the content described herein, various modifications may be made to disclose implementation schemes and their implementation schemes without departing from their scope. Therefore, the descriptions of implementation schemes herein should be interpreted as examples and not as limitations on the scope of this disclosure.

[0099] In this specification, the term "coupling" may encompass a connection, transmission, or signal path that achieves a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is coupled to device B via a direct connection; or (b) in a second example, if intermediate component C does not alter the functional relationship between device A and device B, then device A is coupled to device B via intermediate component C, such that device B is controlled by the control signal generated by device A.

[0100] Furthermore, in this specification, the term "based on" means "at least partially based on". Therefore, if X is based on Y, then X can depend on Y and any number of other factors.

[0101] A device "configured to" or "configurable to" perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function during manufacturing by the manufacturer, and / or may be configured (or reconfigurable) by the user after manufacturing to perform the function and / or other additional or alternative functions. The configuration may be achieved through firmware and / or software programming of the device, through the construction and / or layout of hardware components and the interconnection of the device, or a combination thereof.

[0102] As used herein, the terms “terminal,” “node,” “interconnect,” “pin,” and “lead” are used interchangeably. Unless otherwise specified, these terms are generally used to refer to interconnects or terminals between device elements, circuit elements, integrated circuits, devices, or other electronic or semiconductor components. Furthermore, unless otherwise specified, the terms “input” and “input terminal” are used interchangeably, and the terms “output” and “output terminal” are used interchangeably.

[0103] The circuits or devices described herein that include certain components may alternatively be adapted to be coupled to those components to form the described circuits or devices. For example, the described circuits or devices that include one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors and / or inductors) and / or one or more sources (such as voltage sources and / or current sources) may, conversely, include semiconductor elements within only a single physical device (e.g., semiconductor dies and / or integrated circuit (IC) packages) and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure, for example, during or after manufacture by an end user and / or a third party.

[0104] While the use of specific transistors is described herein, other transistors (or equivalent devices) may be used alternatively with little or no change to the rest of the circuitry. For example, field-effect transistors (“FETs”) (such as n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs, such as NPN or PNP transistors), insulated-gate bipolar transistors (IGBTs), and / or junction field-effect transistors (JFETs) may be used in place of or in combination with the devices described herein. The transistor may be a depletion-mode device, a drain-extended device, a enhancement-mode device, a natural transistor, or other type of device structure transistor. Furthermore, the device may be implemented on / above a silicon (Si) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate.

[0105] The circuits described herein can be reconfigured to include additional or different components to provide functionality at least partially similar to that available before the component replacement. Unless otherwise stated, components shown as resistors generally represent one or more elements coupled in series and / or parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may alternatively be multiple resistors or capacitors coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors coupled in series between the same two nodes as the single resistor or capacitor.

[0106] While some elements of the described examples are contained within the integrated circuit and others are external to the integrated circuit, in other examples, additional or fewer features may be incorporated into the integrated circuit. Additionally, some or all features shown as external to the integrated circuit may be contained within the integrated circuit, and / or some features shown as internal to the integrated circuit may be external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are: (i) incorporated in / on a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated in the same module; and / or (iv) incorporated in / on the same printed circuit board.

[0107] The use of the phrase "grounding" in the foregoing description includes chassis grounding, ground wire grounding, floating grounding, virtual grounding, digital grounding, general grounding, and / or any other form of grounding connection applicable to or suited to the teachings herein. In this specification, unless otherwise stated, "about," "approximately," or "substantially" preceding a parameter means within + / - 10% of the parameter, or, if the parameter is zero, within a reasonable range of approximately zero.

[0108] Within the scope of the claims, modifications to the described examples are possible, and other examples are also possible.

Claims

1. A circuit comprising: The first transistor has a collector, an emitter, and a base; The second transistor has a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base; The third transistor has a first terminal coupled to the base of the first transistor and a second terminal coupled to the collector of the first transistor and the emitter of the second transistor. as well as A fourth transistor having a first terminal coupled to the base of the second transistor and a second terminal coupled to the collector of the second transistor and the emitter of the first transistor.

2. The circuit according to claim 1, wherein the first terminal of the third transistor and the fourth transistor is an emitter, and the second terminal of the third transistor and the fourth transistor is a collector.

3. The circuit according to claim 2, wherein the first transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the second transistor and the fourth transistor are PNP BJTs.

4. The circuit according to claim 1, further comprising: A first current source is coupled to the first terminal of the third transistor; as well as A second current source is coupled to the first terminal of the fourth transistor.

5. The circuit according to claim 4, wherein the first current source and the second current source are fixed current sources.

6. The circuit of claim 4, wherein the first current source is configured to generate a first current, the first current being a portion of a first bias current at the emitter of the first transistor and the collector of the second transistor, and the second current source is configured to generate a second current, the second current being a portion of a second bias current at the collector of the first transistor and the emitter of the second transistor.

7. The circuit of claim 4, further comprising a bias current generator having a fifth transistor and a sixth transistor, the fifth transistor being coupled to the emitter of the first transistor and the collector of the second transistor, the sixth transistor being coupled to the collector of the first transistor and the emitter of the second transistor, wherein the first current source includes a seventh transistor forming a first current mirror with the fifth transistor, and the second current source includes an eighth transistor forming a second current mirror with the sixth transistor.

8. The circuit of claim 7, wherein the bias current generator is configured to generate a first bias current in the fifth transistor and a second bias current in the sixth transistor, the first current source is configured to generate a first current in the seventh transistor, the first current being a portion of the first bias current, and the second current source is configured to generate a second current in the eighth transistor, the second current being a portion of the second bias current.

9. The circuit according to claim 1, further comprising: A first driver circuit has an input terminal coupled to the collector of the first transistor and the third transistor and the emitter of the second transistor, and has an output terminal. The second driver circuit has an input terminal coupled to the collector of the second transistor and the fourth transistor and the emitter of the first transistor, and has an output terminal. A fifth transistor and a sixth transistor are coupled in series between a first voltage supply terminal and a second voltage supply terminal. The fifth transistor has a control terminal coupled to the output terminal of the first driver circuit, and the sixth transistor has a control terminal coupled to the output terminal of the second driver circuit.

10. A circuit comprising: The first transistor has a collector, an emitter, and a base; The second transistor has a collector coupled to the emitter of the first transistor, an emitter coupled to the collector of the first transistor, and a base; The third transistor has a first terminal coupled to the base of the first transistor and a second terminal coupled to the emitter of the first transistor and the collector of the second transistor. as well as A fourth transistor having a first terminal coupled to the base of the second transistor and a second terminal coupled to the emitter of the second transistor and the collector of the first transistor.

11. The circuit of claim 10, wherein the first terminal of the third transistor and the fourth transistor is an emitter, and the second terminal of the third transistor and the fourth transistor is a collector.

12. The circuit of claim 11, wherein the second transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the first transistor and the fourth transistor are PNP BJTs.

13. The circuit of claim 10, further comprising: A first current source is coupled to the first terminal of the third transistor; A second current source is coupled to the first terminal of the fourth transistor; A third current source is coupled to the second terminal of the third transistor; as well as A fourth current source, which is coupled to the second terminal of the fourth transistor.

14. The circuit of claim 10, further comprising: A first driver circuit has an input terminal coupled to the collector of the second transistor and the third transistor and the emitter of the first transistor, and has an output terminal. The second driver circuit has an input terminal coupled to the collector of the first transistor and the fourth transistor and the emitter of the second transistor, and has an output terminal. A fifth transistor and a sixth transistor are coupled in series between a first voltage supply terminal and a second voltage supply terminal. The fifth transistor has a control terminal coupled to the output terminal of the first driver circuit, and the sixth transistor has a control terminal coupled to the output terminal of the second driver circuit.

15. A circuit comprising: A control circuit system includes a first transistor coupled in parallel to a second transistor, the first transistor and the second transistor having corresponding control terminals, wherein the first transistor is configured to generate a first current based on an input voltage, and the second transistor is configured to generate a second current based on the input voltage. as well as An error current compensation circuit system includes: A third transistor has a first terminal coupled to the control terminal of the first transistor and a second terminal coupled to the first terminal of both the first transistor and the second transistor, wherein the third transistor is configured to redirect a third current generated at the control terminal of the first transistor. as well as A fourth transistor having a first terminal coupled to the control terminal of the second transistor and a second terminal coupled to the second terminals of the first transistor and the second transistor, wherein the fourth transistor is configured to redirect a fourth current generated at the control terminal of the second transistor.

16. The circuit of claim 15, wherein the error current compensation circuit comprises: A first current source, coupled to the first terminal of the third transistor; and A second current source is coupled to the first terminal of the fourth transistor.

17. The circuit of claim 16, wherein the first current source and the second current source are fixed current sources.

18. The circuit of claim 16, wherein the control circuit includes a third current source, the third current source including a fifth transistor coupled to the first transistor and the second transistor and a sixth transistor coupled to the first transistor and the second transistor, wherein the first current source includes a seventh transistor forming a first current mirror with the fifth transistor, and the second current source includes an eighth transistor forming a second current mirror with the sixth transistor.

19. The circuit of claim 16, further comprising: A third current source is coupled to the second terminal of the third transistor; as well as A fourth current source, which is coupled to the second terminal of the fourth transistor.

20. The circuit of claim 15, wherein the first transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the second transistor and the fourth transistor are PNP BJTs.

21. The circuit of claim 15, wherein the second transistor and the third transistor are NPN bipolar junction transistors (BJTs), and the first transistor and the fourth transistor are PNP BJTs.

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