Input buffer constant current source load dual loop feedback current feedback type audio amplifier

Abstract

The application discloses an input buffer constant current source load double-loop feedback current feedback type audio amplifier topology structure and belongs to the technical field of audio amplification. In order to stabilize the input buffer complementary tube static current, the existing current feedback type amplifier needs to be connected with a static stabilizing resistor in series at the emitter, but the equivalent output internal resistance is raised, the bandwidth and distortion performance are deteriorated, and the two exist a technical contradiction that cannot be reconciled. The application completely cancels the static stabilizing resistor connected in series at the emitter of the input buffer complementary tube: the emitter follower load is respectively provided with a constant current source, the static current is accurately limited through the independent constant current source; the connection nodes of the two tubes and the constant current source are respectively provided with independent feedback networks, and a double-loop feedback structure is formed. The application significantly reduces the input buffer equivalent internal resistance, the circuit characteristics can be highly close to the ideal current feedback type transmission characteristics; the topology can be separately built and integrated into a special audio amplification chip, and is suitable for audio high-fidelity amplification application scenarios.

Description

Technical Field

[0001] This invention belongs to the field of audio amplifier technology, specifically relating to a current feedback topology amplifier circuit. This circuit can be implemented using discrete components or fabricated into an integrated circuit chip using semiconductor technology. It is mainly used in audio preamplifiers and audio power amplifiers, and can also be extended to various audio amplification scenarios. Technical Background

[0002] Currently, there are two main architectures for analog audio transistor amplifiers: differential input voltage feedback (VFA) and current feedback (CFA). The differential input architecture has a lower slew rate and is prone to transient intermodulation distortion. The current feedback architecture can achieve a very high slew rate, but due to inherent defects in its circuit structure, it cannot operate in an ideal current feedback state when the amplification factor is high, making its audio amplification performance less than ideal.

[0003] Figure 1 This is a general topology for a current feedback architecture, mainly composed of an input buffer 1, a current-to-voltage conversion module 2, and an output buffer 3. The current-to-voltage conversion module 2 consists of a current-controlled current source 4 and a mutual impedance Z1. R1, R2, and R3 form a feedback network, where R3 is the equivalent internal resistance of the input buffer output. Let the input voltage at input port 5 be... Output port output voltage When the current controls the current source When, its complete voltage transfer function expression is: When R3=0, it represents the ideal voltage transfer function for a current feedback architecture, and its expression is: Comparing the complete voltage transfer function expression with the ideal voltage transfer function expression, the third term in the denominator of the complete voltage transfer function... It can be seen that R3 has only a negative effect on the voltage transfer characteristics of the entire circuit. Its main negative effects are: weakening the core characteristic of the current feedback architecture—that "bandwidth does not change with gain under fixed feedback resistor"—making the bandwidth narrower as the gain increases; reducing loop gain and increasing distortion; and causing an error current to form a voltage drop across R3, resulting in the input buffer output voltage failing to follow the input voltage, thus introducing distortion. The value is the amplification factor setting value. The weight of the distortion effect is determined by the product of the resistance value of R3 and the amplification factor setting value. The larger the resistance value of R3 and the higher the amplification factor setting, the more significant the degradation effect. This defect limits the application of current feedback architecture in audio amplifiers.

[0004] Figure 2For a simplified schematic diagram of the current feedback architecture, constant current sources Is3 and Is4 in input buffer 1 are connected in series with D1 and D2, generating bias voltages at the anode of D1 and the cathode of D2. Typically, Is3 = Is4, but they cannot be absolutely equal. R4 is the asymmetrical current discharge resistor for constant current sources Is3 and Is4. The bases of Q1 and Q2 in the input buffer module are connected to the anode of D1 and the cathode of D2, respectively. The quiescent currents of Q1 and Q2 are determined by the bias voltages generated at the anode of D1 and the cathode of D2. Theoretically, under tight thermal coupling, the quiescent currents of Q1 and Q2 are stable; however, ideal thermal coupling cannot be achieved with discrete components or integrated semiconductor devices within a chip, causing the quiescent currents of Q1 and Q2 to drift significantly with temperature. This leads to two types of problems: either the current is too high and burns out the device, or the current is too low and enters the cutoff region.

[0005] Figure 3 This is a block diagram of a current-mode feedback architecture for practical engineering applications. To solve the problem of uncontrollable quiescent current in Q1 and Q2, resistors R11, R12, R13, and R14 are connected in series at the emitter of Q1 and the emitter of Q2, respectively. R11, R12, R13, and R14 are collectively referred to as quiescent stabilizing resistors, typically with the same resistance value, ranging from approximately 20 ohms to 100 ohms. The larger the resistance value, the more stable the current in Q1 and Q2. In the voltage transfer function, R3 is the sum of the inherent output internal resistance of Q1 and Q2 as emitter followers and the resistance value of the aforementioned series quiescent stabilizing resistors. Whether using discrete components or integrated circuit chips, connecting a quiescent stabilizing resistor in series at the emitter will increase R3. A long-standing technical contradiction exists in the industry: stabilizing the quiescent current requires a series resistor, which degrades bandwidth and distortion performance; removing the series resistor results in uncontrolled quiescent current temperature drift. Therefore, there is an urgent need for a new type of current feedback input buffer topology that takes into account static current stability, low equivalent output internal resistance, and is compatible with both discrete construction and chip integration. Summary of the Invention

[0006] All components and modules in this invention have a one-to-one correspondence with the technical features described in the claims. The connection topology of this invention can be implemented using discrete components or integrated circuit chips. Figure 4As shown, the emitter of the first NPN active amplifier transistor Q1 (hereinafter referred to as Q1) is connected to the current inflow terminal of the first constant current source Is1 (hereinafter referred to as Is1), and the current outflow terminal of Is1 is connected to the negative terminal of the power supply. The quiescent current of Q1 is determined by the set current of Is1, and Is1 serves as the constant current source load for Q1 as an emitter follower. The emitter of the second PNP active amplifier transistor Q2 (hereinafter referred to as Q2) is connected to the current outflow terminal of the second constant current source Is2 (hereinafter referred to as Is2), and the current inflow terminal of Is2 is connected to the positive terminal of the power supply. The quiescent current of Q2 is determined by the set current of Is2, and Is2 serves as the constant current source load for Q2 as an emitter follower. This circuit eliminates the static stabilizing resistors connected in series on the emitters of Q1 and Q2 and the bias branch.

[0007] First feedback loop: One end of the first resistor R15 is connected to the connection node between the emitter of Q1 and Is1, and the other end is connected to the output of output buffer 3; one end of the second resistor R16 is connected to the connection node between the emitter of Q1 and Is1, and the other end is connected to signal ground; the first resistor R15 and the second resistor R16 form the first independent voltage divider feedback loop. Second feedback loop: One end of the third resistor R17 is connected to the connection node between the emitter of Q2 and Is2, and the other end is connected to the output of output buffer 3; one end of the fourth resistor R18 is connected to the connection node between the emitter of Q2 and Is2, and the other end is connected to signal ground; the third resistor R17 and the fourth resistor R18 form the second independent voltage divider feedback loop, and the two feedback loops constitute a dual-loop feedback structure.

[0008] This invention eliminates all static stabilizing resistors, effectively reducing the equivalent output internal resistance R3 of the input buffer, and making the voltage transfer characteristics closer to those of an ideal current feedback amplifier. Simultaneously, the static currents of Q1 and Q2 are precisely limited by independent constant current sources, unaffected by temperature or device variations. This invention can be used to fabricate stable and reliable Class A and Class AB audio power amplifiers. The stable static currents of Q1 and Q2 mean that the current-controlled current source can output a stable static current. Typically, this current is also used to generate the bias voltage drop of the power output transistors, and the stability of this current is a fundamental condition for the stability of the power output transistors' static current.

[0009] Regarding magnification, it is approximately expressed as: The expression reveals that R15 and R17, and R16 and R18, which are symmetrically positioned, do not need to be precisely matched to accurately set the amplification factor of the circuit. However, for ease of calculation, R15 and R17, and R16 and R18 are usually taken to have equal values. If R15 = R17 = R1, and R16 = R18 = R2, then the amplification factor can be approximately expressed as... . Attached Figure Description

[0010] Figure 1is a general topology block diagram of a conventional current feedback amplifier;

[0011] Figure 2 is a schematic block diagram of a simplified conventional current feedback amplifier;

[0012] Figure 3 is a schematic block diagram of an engineering improved conventional current feedback amplifier;

[0013] Figure 4 is the core topology of the dual-loop constant current source load input buffer of the present invention;

[0014] Figure 5 is an embodiment of the single-transistor input buffer supporting DC servo according to the present invention;

[0015] Figure 6 is an embodiment of the composite transistor input buffer supporting DC servo according to the present invention. DETAILED DESCRIPTION

[0016] Figure 5 is the first detailed embodiment. Since the DC offset voltage output by the current feedback amplifier is relatively high, a DC servo circuit is required for better application in the audio amplification field, and the DC servo circuit must be used especially for power amplification to drive a loudspeaker. This specific embodiment is formed by connecting and combining the amplifying circuit of the present invention with a DC servo circuit. The zero-adjusting voltage output by the integrating circuit of the DC servo module is connected through R21 and R22 to the connection points of Q1 and the constant current source Is1, and of Q2 and the constant current source Is2, respectively.

[0017] In this embodiment, the bias circuit part is improved by replacing Figure 4 diodes D1 and D2 in the schematic block diagram with Figure 5 the active amplifying transistors Q3 and Q4 therein. This brings two advantages: one is that the input internal resistance is increased, and the other is that the voltage drop generated across R4 by the unequal currents of the constant current source Is3 and the constant current source Is4 when the input terminal is floating is reduced. Assuming that the current amplification factors of Q3 and Q4 are both , the current of the constant current source Is3 is Is3, and the current of the constant current source Is4 is Is4, the voltage drop across R4 caused by unequal currents when diodes are used as the bias circuit is , and after using the transistors Q3 and Q4, it is .

[0018] When the input voltage is zero, the DC offset voltage originates from two aspects: first, the unequal CE junction voltage drops of Q4 and Q1, and Q3 and Q2, generate offset voltage; second, the unequal currents of the upper and lower arms of constant current sources Is1 and Is2 generate offset voltage. Assume that the unequal CE junction voltage drops of Q4 and Q1 generate a ground-to-ground input offset voltage U1 at the emitter of Q1, and the unequal CE junction voltage drops of Q3 and Q2 generate a ground-to-ground input offset voltage U2 at the emitter of Q2. Let the current of the lower arm constant current source Is1 be Is1, and the current of the upper arm constant current source Is2 be Is2, and Is1 is not equal to Is2. Without a DC servo circuit connected, let the output offset voltage be Us, its expression is: .

[0019] When output offset voltage occurs due to non-zero values ​​of U1 and U2 and inequalities of Is1 and Is2, a zero-adjustment voltage can be achieved by using an integrator circuit to output a zero-adjustment voltage. Assuming the zero-adjustment voltage is Us1, its expression is: .

[0020] In this embodiment, the constant current sources Is1, Is2, Is3, and Is4 are set to the same current range of approximately 2 mA to 5 mA. Assuming 3 mA, the value of R3 in the complete transfer function can be estimated. Here, we take 10 ohms for estimation. In a conventional current feedback architecture, the emitters of Q1 and Q2 typically require a static stabilizing resistor of approximately 30 ohms in series, R3 = 30 + 10 = 40 ohms. In this embodiment using this invention, the value of R3 is reduced to one-quarter of that without this invention. With the same amplification factor, in the complete voltage transfer function... The value is also one-quarter of that of those who do not use this invention.

[0021] In this embodiment, the resistor and capacitor components R4, R5, R15, R16, R17, R18, R19, R20, R21, R22, C1, C2, and C3 are listed in the table in section 0022 for reference values. The resistance values ​​are in ohms. The DC servo operational amplifier U1 references the JFET operational amplifier LF353. Using these reference values ​​and the referenced operational amplifier devices, the circuit can operate stably and reliably. The connection topology of this embodiment can be implemented using discrete components or integrated circuit chips.

[0022] Reference value 50 k 100 4.6 k 100 4.6 k 100 470 k 470 k 4.6 k 4.6 k 200 pF 470 nF 470 nF

[0023] Figure 6In the second specific implementation, Q4 and Q5 are connected to form a PNP composite transistor, and Q3 and Q6 are connected to form an NPN composite transistor. Compared to the first specific implementation, this further increases the input impedance and further reduces the voltage drop across R4 caused by the unequal currents from constant current sources Is3 and Is4 when the input terminal is floating. Assume that the current amplification factors of Q4, Q5, Q3, and Q6 are all... The constant current source Is3 has a current of Is3, and the constant current source Is4 has a current of Is4. After using the composite tube... .

[0024] Q1 and Q7 are connected to form a composite transistor with NPN polarity, and Q2 and Q8 are connected to form a composite transistor with PNP polarity. The rest of the circuit is consistent with implementation method one. Because a composite transistor input buffer is used as an emitter follower, the output internal resistance is significantly reduced. Let the current amplification factor of a single transistor be... Assume the quiescent current is 3mA. In the complete voltage transfer function expression, the value of the third term in the denominator is negligible compared to the second term, and the characteristics of the complete voltage transfer function are very close to those of the ideal voltage transfer function.

[0025] In this embodiment, the resistor and capacitor reference designations are R4, R5, R6, R7, R8, R9, R15, R16, R17, R18, R19, R20, R21, R22, C1, C2, and C3. Reference values ​​are listed in the table in section 0026. The resistance values ​​are in ohms. The DC servo operational amplifier UI reference uses the JFET operational amplifier LF353. Using these reference values ​​and the referenced operational amplifier device, the circuit can operate stably and reliably. This embodiment's topology is also compatible with both discrete and on-chip integration.

[0026] Reference value 50 k 100 2 k 2 k 2 k 2 k 4.6 k 100 4.6 k 100 470 k 470 k 4.6 k 4.6 k 200 pF 470 nF 470 nF

Claims

1. A method for removing the static stabilizing resistor connected in series with the emitter of the active amplifier tube in the input buffer of a current feedback audio amplifier, characterized in that: The input buffer has two complementary active amplifier transistors. The emitters of the two active amplifier transistors are not connected in series with static stabilizing resistors, and the emitters of the two transistors are not directly interconnected. Each active amplifier transistor's emitter is configured with an independent constant current source as an emitter follower load, and the static operating current of the active amplifier transistor is limited individually by the corresponding constant current source. The connection nodes between the emitters of the two active amplifier transistors and their respective matching constant current sources are connected to an independent feedback network to form a dual feedback loop. The active amplifier transistors, constant current sources, and feedback networks can be built using discrete components or fully or partially integrated into an integrated circuit chip.

2. The method according to claim 1, characterized in that: The input buffer includes a first NPN active amplifier transistor Q1 (hereinafter referred to as Q1) and a second PNP active amplifier transistor Q2 (hereinafter referred to as Q2). The base of Q1 is connected to the positive output terminal of the bias voltage, the collector is connected to the control current output terminal of the current control current source in the current-voltage conversion module, the emitter is connected to the current input terminal of the first constant current source Is1 (hereinafter referred to as Is1), and the current output terminal of Is1 is connected to the negative terminal of the power supply. Is1 is the constant current source load of Q1 as an emitter follower. The base of Q2 is connected to the negative output terminal of the bias voltage, the collector is connected to the control current input terminal of the current control current source in the current-voltage conversion module, and the emitter is connected to the current output terminal of the second constant current source Is2 (hereinafter referred to as Is2). Is2 is the current inflow terminal connected to the positive terminal of the power supply. Is2 is the constant current source load for Q2 as an emitter follower. This circuit eliminates the static stabilizing resistors connected in series on the emitter of Q1, the emitter of Q2, and the bias branch.

3. The method according to claim 1, characterized in that: The feedback network includes a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to the connection node of Q1 and Is1, and the other end is connected to the output terminal of the output buffer. One end of the second resistor is connected to the connection node of Q1 and Is1, and the other end is connected to signal ground. Together, they form the first feedback loop. One end of the third resistor is connected to the connection node of Q2 and Is2, and the other end is connected to the output terminal of the output buffer. One end of the fourth resistor is connected to the connection node of Q2 and Is2, and the other end is connected to signal ground. Together, they form the second feedback loop. The two feedback loops are independent of each other, and the circuit amplification factor can be set without high-precision matching of feedback resistors.

4. The method according to claim 2, characterized in that: The first NPN active amplifier transistor Q1 is a single NPN transistor, a composite transistor of the same polarity formed by cascading two NPN transistors, or a composite transistor of opposite polarities formed by cascading one NPN transistor and one PNP transistor; the transistor can be a discrete component or a semiconductor device integrated inside an integrated circuit chip.

5. The method according to claim 2, characterized in that: The second PNP active amplifier transistor Q2 is a single PNP transistor, a composite transistor of the same polarity formed by cascading two PNP transistors, or a composite transistor of opposite polarities formed by cascading one PNP transistor and one NPN transistor; the transistor can be a discrete component or a semiconductor device integrated inside an integrated circuit chip.

6. An integrated circuit chip for an integrated current feedback type audio amplifier, characterized in that: The chip integrates an input buffer module, which is implemented according to the method described in any one of claims 1 to 5. No series static stabilizing resistor is set at the emitter of the complementary active amplifier transistor. The chip incorporates a first NPN active amplifier transistor, a second PNP active amplifier transistor, and two independent on-chip constant current sources. The emitters of Q1 and Q2 are not directly interconnected; each is connected to an on-chip constant current source as an emitter follower load. The connection nodes between the two active amplifier transistors and their corresponding on-chip constant current sources can be directly connected to the on-chip feedback network or connected to an external feedback network via external pins. The feedback network forms two independent feedback loops.

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