A surface acoustic wave filter wafer level packaging structure and a packaging method

Abstract

The application discloses a surface acoustic wave filter wafer level packaging structure and a packaging method, and relates to the technical field of radio frequency device packaging.The application breaks through the technical limitation of the traditional 'wall body + top cover' packaging scheme through the structural innovation of'replacing walls with grooves' and the process design of flush pads, and significantly improves the structural reliability, process yield, device thickness and manufacturing cost, etc.The application discloses that the independent polymer support wall body in the traditional scheme is directly etched on the piezoelectric substrate to form a groove, and the side wall of the groove provides support for the packaging film layer, so that the failure modes such as collapse and inclination caused by the softening of the polymer wall body under heat and uneven stress are eliminated from the root, and the mechanical reliability and process robustness of the packaging structure are greatly improved.

Description

Technical Field

[0001] This invention relates to the field of radio frequency device packaging technology, and specifically to a wafer-level packaging structure and packaging method for a surface acoustic wave filter. Background Technology

[0002] With the widespread adoption of 5G mobile communication technology and the rapid development of RF front-end modules, surface acoustic wave (SAW) filters have become indispensable core RF devices in mobile terminals, communication base stations, and other equipment due to their excellent frequency selectivity, small device size, and low insertion loss. To adapt to the miniaturization, thinning, and high integration trends of terminal electronic products, wafer-level packaging (WLP) technology has become the mainstream packaging technology for SAW filters due to its advantages such as device-level sealing protection, package size close to chip size, and suitability for mass production.

[0003] Current mainstream SAW filter wafer-level packaging commonly adopts, such as Figure 1 The typical fabrication process of the cavity structure of "support wall + top cover film" shown is as follows: First, interdigital transducers 3 and metal pads 4 electrically connected to them are fabricated on the functional surface of piezoelectric substrates 1 such as lithium tantalate and lithium niobate through photolithography and metal deposition processes; then, polymer materials such as polyimide and photosensitive dry film are coated or laminated on the wafer surface, and after photolithography and development, a closed annular support wall 5 is formed around the IDT area; next, a top cover film 6 is bonded or covered on the top of the support wall, and the annular support wall 5 and the top cover film 6 together form a sealed cavity covering the IDT to isolate external moisture and particulate matter from contamination and damage to the IDT structure; finally, photolithography is performed on the top cover film 6 at the position corresponding to the metal pads 4, and external solder balls 9 are fabricated to complete the wafer-level packaging.

[0004] While the aforementioned packaging solutions have achieved industrial application, several technical shortcomings remain in actual production and device application. First, the structural reliability of the polymer support wall is insufficient. During high-temperature curing, lamination, and subsequent molding processes, the wall material is prone to deformation such as collapse and tilting due to heat softening and uneven internal stress distribution. This not only reduces the uniformity of cavity height, directly affecting the frequency response characteristics and performance consistency of the filter, but in severe cases, it can also cause the top cover film to directly contact the IDT electrodes, leading to device short circuits or obstructed acoustic wave propagation, resulting in device failure. Second, the packaging process is highly complex, making yield improvement difficult. To ensure good height consistency and sidewall perpendicularity of the support wall, high-precision control is required for multiple processes such as photolithography, development, and curing. This places stringent demands on equipment performance and process control capabilities. Even micron-level deviations in wall height can cause problems such as weak top cover bonding and cavity airtightness failure, becoming a core bottleneck restricting the improvement of packaging yield. Secondly, the overall thickness of the package is too large, failing to fully meet the requirements for thinner designs. To form a cavity that meets the conditions for sound wave propagation, the supporting walls typically need to reach a height of 20-50 μm. After adding the thickness of the top cover film, the total package thickness is significant, making it difficult to adapt to the ever-increasing thinness requirements of end-product electronic devices. Finally, the packaging manufacturing cost is high. The existence of multiple processes such as photolithography, polymer material coating, and top cover bonding not only prolongs the product production cycle but also increases equipment investment and material costs, hindering the cost reduction through economies of scale and the improvement of market competitiveness. Summary of the Invention

[0005] To address the aforementioned shortcomings of the prior art, this invention provides a wafer-level packaging structure and packaging method for surface acoustic wave (SAW) filters.

[0006] To achieve the above-mentioned objectives, the technical solution adopted by this invention is as follows: A wafer-level packaging structure for a surface acoustic wave filter is provided, including a piezoelectric substrate, the top surface of which is a functional surface, and a groove is provided on the functional surface. An interdigitated transducer is installed at the bottom of the groove; The top surface of the non-functional area of ​​the interdigital transducer is also provided with a metal pad, and the top surface of the metal pad is flush with the top surface of the piezoelectric substrate. An encapsulation film layer is provided on the functional surface; the encapsulation film layer has one or more ball-planting openings; the lower part of the ball-planting opening is connected to the frame part of the metal pad; when multiple ball-planting openings are provided, the multiple ball-planting openings are evenly distributed along the circumference of the frame of the metal pad. A solder ball is placed inside the ball-planting opening, and the solder ball is electrically connected to the metal pad.

[0007] Furthermore, the depth of the groove is equal to the sum of the thickness of the interdigital transducer and the metal pad.

[0008] Furthermore, the encapsulation film layer is made of polybenzoxazole film, polyimide film, or epoxy resin film.

[0009] Furthermore, the thickness of the encapsulation film layer is 10μm~40μm.

[0010] The present invention also provides a packaging method for the above-mentioned surface acoustic wave filter wafer-level packaging structure, which adopts the following specific steps: S1: Take a piezoelectric substrate and etch a groove on the functional surface of the piezoelectric substrate to form a groove that is compatible with the interdigital transducer; S2: Interdigitated transducers and metal pads are formed in the groove by metal deposition process, and the interdigitated transducers and metal pads are electrically connected. S3: A packaging film layer is deposited on the functional surface of the piezoelectric substrate using a vacuum lamination method; S4: One or more ball-mounting openings are formed on the packaging thin film layer by photolithography, and the ball-mounting openings correspond to the frame positions of the metal pads; S5: Solder balls are fabricated in the ball-planting opening using ball-planting or electroplating methods. The solder balls are electrically connected to the metal pads through the ball-planting opening to obtain a wafer-level packaging structure.

[0011] 6. The packaging method according to claim 5, characterized in that, between steps S2 and S3, step S25 is further included: performing chemical mechanical polishing planarization treatment on the functional surface of the piezoelectric substrate so that the upper surface of the metal pad is flush with the functional surface of the piezoelectric substrate.

[0012] The beneficial effects of this invention are as follows: This invention overcomes the technical limitations of traditional "wall + top cover" packaging solutions through a structural innovation of "grooves instead of walls" and a process design of flush pads, achieving significant improvements in structural reliability, process yield, device thickness, and manufacturing cost. This invention eliminates the independently set polymer support wall in traditional solutions, directly etching grooves onto the piezoelectric substrate. The sidewalls of these grooves provide support for the packaging film layer, fundamentally eliminating failure modes such as collapse and tilting caused by thermal softening and uneven stress of the polymer wall, thus greatly improving the mechanical reliability and process robustness of the packaging structure.

[0013] This invention eliminates the two difficult and yield-sensitive processes of high-precision support wall fabrication and top cover bonding. The groove etching can be achieved using mature and stable MEMS semiconductor processing technology with strong parameter controllability. Furthermore, the encapsulation film layer can be directly laminated on a flat substrate surface, resulting in excellent film uniformity. This significantly improves the overall yield of the encapsulation process and the consistency of device performance.

[0014] Regarding device thinning, the height of the sealing cavity in this invention is directly determined by the groove depth and can be precisely controlled within the range of 5~30μm. After stacking a packaging film layer with a thickness of only 10~40μm, the overall packaging height can be reduced by more than 30% compared to traditional solutions, which can fully adapt to the trend of thinning in terminal electronic products. In addition, the simplification of process steps effectively reduces the investment in photolithography, material coating, and bonding equipment, shortens the product manufacturing cycle, and directly reduces material and processing costs.

[0015] The flat packaging surface ultimately formed by this invention can simplify the process flow of wafer-level testing, wafer dicing and subsequent board-level assembly, while providing a good structural foundation for the application of advanced packaging technologies such as three-dimensional heterogeneous integration and vertical chip stacking, which is conducive to further improving the system integration of devices. Attached Figure Description

[0016] Figure 1 A cross-sectional schematic diagram of the wafer-level packaging structure of a surface acoustic wave filter in the prior art; Figure 2 This is a cross-sectional schematic diagram of the wafer-level packaging structure of the surface acoustic wave filter of the present invention; Among them, 1. piezoelectric substrate; 2. groove; 3. interdigital transducer; 4. metal pad; 5. annular support wall; 6. top cover film; 7. encapsulation film layer; 8. ball planting opening; 9. solder ball. Detailed Implementation

[0017] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0018] Example 1 One such Figure 2 The wafer-level package structure of the surface acoustic wave filter shown includes a piezoelectric substrate 1, an interdigital transducer 3, a metal pad 4, a packaging thin film layer 7, and solder balls 9.

[0019] The top surface of the piezoelectric substrate 1 is a functional surface, and grooves 2 are etched inward on the functional surface. Interdigital transducers 3 are disposed on the bottom surface of the grooves 2, and the side edges of the interdigital transducers 3 are in contact with the sidewalls of the grooves 2. Metal pads 4 are arranged circumferentially along the grooves 2, and their bottoms are electrically connected to the interdigital transducers 3. The top surface of the metal pads 4 is flush with the functional surface of the piezoelectric substrate 1.

[0020] The encapsulation film layer 7 is completely covered on the functional surface of the piezoelectric substrate 1. One or more ball-planting openings 8 are opened on the encapsulation film layer 7 at the position corresponding to the metal pad 4. The ball-planting openings 8 are exposed downwards on the upper surface of the metal pad 4. The solder balls 9 are disposed in the ball-planting openings 8 and form an electrical connection with the metal pad 4.

[0021] The encapsulation film layer 7 and the groove 2 together form a sealed cavity, and the interdigital transducer 3 is housed inside the sealed cavity. The height of the cavity is directly determined by the depth of the groove 2, and there is no need to set up an additional independent support wall.

[0022] Example 2 This embodiment provides a wafer-level packaging method for a surface acoustic wave filter, which is implemented according to the following steps: S1: Substrate Groove 2 Preparation: A piezoelectric substrate 1 made of lithium tantalate or lithium niobate is selected. One side surface of the piezoelectric substrate 1 is used as the functional surface. An inductively coupled plasma dry etching process is used to etch a groove 2 on the functional surface that is compatible with the area where the interdigital transducer 3 is arranged. The depth of the groove 2 depends on the thickness and setting of the interdigital transducer 3 and the metal pad 4. In practice, it is generally 2um to 4um. The verticality of the sidewall of the groove 2 is ensured by the etching process. It is used to replace the support wall in the traditional packaging structure and serve as a lateral support structure for the sealed cavity.

[0023] S2: Flush device and pad fabrication: Interdigital transducers 3 are formed at the bottom of the groove 2 by magnetron sputtering metal deposition combined with photolithography lift-off process, and metal pads 4 electrically connected to the interdigital transducers 3 are fabricated simultaneously; the metal pads 4 are arranged along the circumference of the groove 2, and their initial metal layer thickness covers the depth of the groove 2 and extends to the functional surface of the piezoelectric substrate 1.

[0024] After the metal pattern is prepared, the functional surface of the piezoelectric substrate 1 is planarized by chemical mechanical polishing (CMP) to remove excess metal material from the surface of the functional surface, so that the upper surface of the metal pad 4 is completely flush with the functional surface of the piezoelectric substrate 1, and a globally flat wafer surface is obtained.

[0025] S3: Encapsulation film layer 7 coating: The encapsulation film layer 7 is coated on the functional surface of the piezoelectric substrate 1 after planarization using a vacuum lamination process; the encapsulation film layer 7 is selected from polybenzoxazole film, polyimide film or epoxy resin film, and the film thickness is controlled to be 10μm~40μm.

[0026] Since the functional surface of the wafer is a flat surface, the encapsulation film layer 7 can be uniformly attached to the substrate surface and together with the groove 2 above the groove 2 to form a sealed protective cavity. The interdigital transducer 3 is completely housed in this sealed cavity, isolating it from external moisture and particulate contamination.

[0027] S4: Ball placement opening 8 processing: Using photolithography etching, one or more ball placement openings 8 are formed at the frame position of the metal pad 4 corresponding to the encapsulation thin film layer 7; the ball placement openings 8 penetrate downward through the encapsulation thin film layer 7, exposing the metal surface of the metal pad 4 below. When multiple ball placement openings 8 are provided, the multiple ball placement openings 8 are evenly distributed along the circumference of the metal pad 4.

[0028] S5: Preparation of external solder balls 9: In the ball placement opening 8, solder balls 9 are prepared by ball placement process or electroplating process. The solder balls 9 form a reliable electrical connection with the metal pad 4 through the ball placement opening 8, and finally the wafer-level packaging structure of surface acoustic wave filter of Example 1 is obtained.

Claims

1. A surface acoustic wave filter wafer level package structure, characterized by, The wafer-level packaging structure includes a piezoelectric substrate, the top surface of which is a functional surface, and a groove is provided on the functional surface; An interdigitated transducer is provided at the bottom of the groove; The top surface of the non-functional area of ​​the interdigital transducer is also provided with a metal pad, and the top surface of the metal pad is flush with the top surface of the piezoelectric substrate. An encapsulation film layer is provided on the functional surface; the encapsulation film layer has one or more ball-mounting openings; the lower part of the ball-mounting opening is connected to the frame portion of the metal pad; When multiple ball-planting openings are set, the multiple ball-planting openings are evenly distributed along the circumference of the metal pad frame. A solder ball is provided inside the ball-planting opening, and the solder ball is electrically connected to the metal pad.

2. The SAW filter wafer level package structure of claim 1, wherein, The depth of the groove is equal to the sum of the thicknesses of the interdigital transducer and the metal pad.

3. The SAW filter wafer level package structure of claim 1, wherein, The encapsulation film layer is made of polybenzoxazole film, polyimide film or epoxy resin film.

4. The SAW filter wafer level package structure of claim 2, wherein, The thickness of the encapsulation film layer is 10μm~40μm.

5. A method of packaging the SAW filter wafer level package structure according to any one of claims 1 to 4, characterized by, The specific steps are as follows: S1: Take a piezoelectric substrate and etch a groove on the functional surface of the piezoelectric substrate to form a groove that is compatible with the interdigital transducer; S2: An interdigital transducer and a metal pad are formed in a groove by a metal deposition process, and the interdigital transducer and the metal pad are electrically connected. S3: A packaging film layer is deposited on the functional surface of the piezoelectric substrate using a vacuum lamination method; S4: One or more ball-mounting openings are formed on the packaging thin film layer by photolithography, and the ball-mounting openings correspond to the frame positions of the metal pads; S5: Solder balls are fabricated in the ball-planting opening using ball-planting or electroplating methods. The solder balls are electrically connected to the metal pads through the ball-planting opening to obtain a wafer-level packaging structure.

6. The packaging method according to claim 5, wherein, The step between steps S2 and S3 includes step S25: performing chemical mechanical polishing planarization on the functional surface of the piezoelectric substrate so that the upper surface of the metal pad is flush with the functional surface of the piezoelectric substrate.

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