Filter, method of forming a filter, and electronic device

Abstract

A filter and a forming method thereof, and an electronic device, in the filter, an adhesive layer covers a top of a piezoelectric layer, a side wall of the piezoelectric layer towards a packaging edge region, and a top of a dielectric layer of the packaging edge region, and a first support part is formed on a partial top surface of the adhesive layer of the packaging edge region, the first support part further extends to cover a part of the adhesive layer of the side wall of the piezoelectric layer towards the packaging edge region, and a part of the adhesive layer on a region connected with the side wall in the top of the piezoelectric layer, compared with a scheme in which the adhesive layer only covers the top of the piezoelectric layer, the first support part avoids being in contact with the adhesive layer and the dielectric layer at the same time, the contact area between the adhesive layer and the first support part is correspondingly increased, a single contact interface is formed between the first support part and the adhesive layer, the bonding strength of the interface between the first support part and the adhesive layer is improved, and the yield of the filter is further improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a filter, a method for forming the filter, and an electronic device. Background Technology

[0002] Bulk acoustic wave (BAW) filters are widely used in radio frequency (RF) front-end modules of wireless communication systems due to their high Q value, low insertion loss, and excellent frequency response characteristics. The BAW resonator is the basic unit of a BAW filter, and its core structure typically includes an upper electrode, a piezoelectric layer, and a lower electrode, achieving the mutual conversion between electrical signals and acoustic signals through the piezoelectric effect.

[0003] Currently, BAW filters still suffer from low yield rates. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a filter, a method for forming a filter, and an electronic device, which is beneficial to improving the yield of the filter.

[0005] To address the aforementioned problems, embodiments of the present invention provide a filter, comprising: a substrate; a dielectric layer located on top of the substrate, the dielectric layer including an encapsulation edge region; a piezoelectric layer located on top of the dielectric layer and exposing the surface of the dielectric layer in the encapsulation edge region; an adhesive layer located on top of the piezoelectric layer, the adhesive layer further covering the sidewall of the piezoelectric layer facing the encapsulation edge region and the top of the dielectric layer in the encapsulation edge region; and a first support portion located on a portion of the top surface of the adhesive layer in the encapsulation edge region, and further extending to cover the adhesive layer of the piezoelectric layer facing the sidewall of the encapsulation edge region and a portion of the top surface of the adhesive layer in the region of the top of the piezoelectric layer connected to the sidewall.

[0006] Optionally, the filter further includes a second support portion located on a portion of the top surface of the adhesive layer and on the side of the first support portion away from the encapsulation edge region.

[0007] Optionally, the filter further includes a cap layer that spans the top of the first support portion and the second support portion, and the cap layer, the first support portion, the second support portion and the adhesive layer form a cavity.

[0008] Optionally, on a projection plane parallel to the top surface of the substrate, the width of the area where the cap layer and the first support overlap is 30 micrometers to 35 micrometers.

[0009] Optionally, on a projection plane parallel to the top surface of the substrate, the width of the area where the top of the first support and the piezoelectric layer overlap is 10 micrometers to 15 micrometers.

[0010] Optionally, on a projection plane parallel to the top surface of the substrate, the width of the area where the top of the first support and the top of the dielectric layer overlap is 10 micrometers to 15 micrometers.

[0011] Optionally, the material of the adhesive layer includes silicon nitride or silicon oxynitride.

[0012] Optionally, the angle between the sidewall of the piezoelectric layer facing the packaging edge region and the top surface of the dielectric layer of the packaging edge region is obtuse.

[0013] Accordingly, the present invention also provides an electronic device comprising: the filter described in any embodiment of the present invention.

[0014] Accordingly, embodiments of the present invention also provide a method for forming a filter, comprising: providing a substrate, wherein a dielectric layer is formed on the substrate, the dielectric layer including an encapsulation edge region; forming a piezoelectric layer on the dielectric layer, the piezoelectric layer covering the encapsulation edge region; forming a protective layer on top of the piezoelectric layer; removing the piezoelectric layer and the protective layer of the encapsulation edge region to expose the top of the dielectric layer of the encapsulation edge region; after removing the piezoelectric layer and the protective layer of the encapsulation edge region, removing the remaining protective layer; after removing the remaining protective layer, forming an adhesive layer on top of the piezoelectric layer, the adhesive layer further covering the sidewall of the piezoelectric layer facing the encapsulation edge region and the top of the dielectric layer of the encapsulation edge region; forming a first support portion on a portion of the top surface of the adhesive layer of the encapsulation edge region, the first support portion further extending to cover the adhesive layer of the piezoelectric layer facing the sidewall of the encapsulation edge region and a portion of the top surface of the adhesive layer on the top of the piezoelectric layer in the region connected to the sidewall.

[0015] Optionally, the step of removing the piezoelectric layer and protective layer of the package edge region includes: forming a mask layer on top of the protective layer, the mask layer exposing the protective layer of the package edge region; using the mask layer as a mask, removing the protective layer of the package edge region to expose the piezoelectric layer of the package edge region; using the mask layer and the remaining protective layer as a mask, removing the piezoelectric layer of the package edge region.

[0016] Optionally, the process for removing the protective layer from the packaging edge region includes a wet etching process.

[0017] Optionally, the step of forming a first support portion on a portion of the top surface of the adhesive layer in the packaging edge region further includes: forming a second support portion on a portion of the top surface of the adhesive layer, wherein the second support portion is located on the side of the first support portion away from the packaging edge region.

[0018] Optionally, after forming a first support portion and a second support portion on a portion of the top surface of the adhesive layer in the packaging edge region, the method further includes: forming a capping layer spanning the first support portion and the second support portion, wherein the capping layer, the first support portion, the second support portion, and the adhesive layer form a cavity; after forming the capping layer spanning the first support portion and the second support portion, the method further includes: baking the capping layer, the first support portion, and the second support portion.

[0019] Optionally, the temperature at which the cap layer, the first support portion, and the second support portion are baked is 260 degrees Celsius to 280 degrees Celsius.

[0020] Optionally, the processes of forming a first support portion on a portion of the top surface of the adhesive layer in the packaging edge region and forming a second support portion on a portion of the top surface of the adhesive layer both include a lamination process.

[0021] Optionally, the lamination speed of the lamination process is from 1 mm / s to 3 mm / s.

[0022] Optionally, the process for forming a protective layer on top of the piezoelectric layer includes plasma-enhanced chemical vapor deposition.

[0023] Optionally, the material of the protective layer includes silicon oxide or silicon nitride.

[0024] Optionally, the process for forming an adhesion layer on top of the piezoelectric layer includes a chemical vapor deposition process.

[0025] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages: This invention provides a filter forming method that employs a technique of first forming a protective layer, then removing the protective layer and piezoelectric layer in the encapsulation edge region, subsequently removing the remaining protective layer, and finally depositing an adhesive layer. Compared to the technique of first forming an adhesive layer and then removing the adhesive layer and piezoelectric layer in the encapsulation edge region, the adhesive layer in this application can continuously cover the top of the dielectric layer in the encapsulation edge region, the sidewall of the piezoelectric layer facing the encapsulation edge region, and the top of the piezoelectric layer, thereby increasing the total area of ​​the adhesive layer. In addition, a first support portion is formed on a portion of the top surface of the adhesive layer in the encapsulation edge region, and the first support portion also extends to cover the adhesive layer on the sidewall of the piezoelectric layer facing the encapsulation edge region, and a portion of the top surface of the adhesive layer in the region of the top of the piezoelectric layer connected to the sidewall. This avoids the first support portion contacting both the adhesive layer and the dielectric layer simultaneously, thereby increasing the contact area between the adhesive layer and the first support portion. This results in a single contact interface between the first support portion and the adhesive layer, improving the bonding strength of the interface between the first support portion and the adhesive layer, and thus improving the filter yield.

[0026] This invention provides a filter in which an adhesive layer covers the top of a piezoelectric layer, the sidewall of the piezoelectric layer facing the package edge region, and the top of the dielectric layer in the package edge region. A first support portion is formed on a portion of the top surface of the adhesive layer in the package edge region. This first support portion further extends and covers the adhesive layer on the sidewall of the piezoelectric layer facing the package edge region, and a portion of the top surface of the adhesive layer on the top of the piezoelectric layer connected to the sidewall. Compared to a solution where the adhesive layer only covers the top of the piezoelectric layer, this avoids the first support portion simultaneously contacting both the adhesive layer and the dielectric layer. This increases the contact area between the adhesive layer and the first support portion, thus forming a single contact interface between the first support portion and the adhesive layer. This improves the bonding strength of the interface between the first support portion and the adhesive layer, thereby increasing the filter yield. Attached Figure Description

[0027] Figures 1 to 2 This is a schematic diagram of a filter structure; Figures 3 to 10 This is a schematic diagram of the structure corresponding to each step in one embodiment of the filter formation method of the present invention. Detailed Implementation

[0028] Currently, the yield rate of filters still needs improvement. This paper analyzes the reasons why the yield rate of filters needs to be improved, using a schematic diagram of a filter structure as an example.

[0029] Figures 1 to 2 This is a schematic diagram of a filter structure. Specifically, Figure 2 yes Figure 1 A magnified view of a section at point B.

[0030] refer to Figure 1 The filter includes: a substrate 10; a dielectric layer 11 located on top of the substrate 10, the dielectric layer 11 including an encapsulation edge region i; a piezoelectric layer 12 located on top of the dielectric layer 11 and exposing the surface of the dielectric layer 11 in the encapsulation edge region i; an adhesive layer 13 located on top of the piezoelectric layer 12 and exposing the surface of the dielectric layer 11 in the encapsulation edge region i; a first support portion 14 located on the dielectric layer 11 in the encapsulation edge region and also covering the sidewall of the piezoelectric layer 12 facing the encapsulation edge region i, and a portion of the top surface of the adhesive layer 13 on the top of the piezoelectric layer 12 in the region connected to the sidewall; a second support portion 15 located on top of the piezoelectric layer 12 and on the adhesive layer 13 on the side of the first support portion 14 away from the encapsulation edge region i; and a capping layer 16 spanning the first support portion 14 and the second support portion 15, the capping layer 16, the first support portion 14, the second support portion 15, and the adhesive layer 13 forming a cavity 17.

[0031] It should be noted that, since the adhesive layer 13 is only disposed on the top of the piezoelectric layer 12 and exposes the surface of the dielectric layer 11 of the encapsulation edge region i, the first support portion 14 is prone to shrinkage during the high-temperature baking process of the first support portion 14, the second support portion 15, and the cap layer 16. This increases the stress between the first support portion 14 and the dielectric layer 11 of the encapsulation edge region i, resulting in delamination between the first support portion 14 and the dielectric layer 11 of the encapsulation edge region i, forming a gap 18 (e.g., ...). Figure 2 (As shown); In the subsequent injection molding process, the encapsulating material will enter the filter through the gap 18. During the subsequent curing of the encapsulating material, thermal stress is generated due to the mismatch of the thermal expansion coefficients between the encapsulating material and the film material (e.g., adhesive layer 13, first support portion 14, etc.), which causes the film material (e.g., adhesive layer 13, first support portion 14, etc.) in the filter to delaminate, thereby causing the filter to fail electrically.

[0032] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a filter, comprising: providing a substrate, wherein a dielectric layer is formed on the substrate, the dielectric layer including an encapsulation edge region; forming a piezoelectric layer on the dielectric layer, the piezoelectric layer covering the encapsulation edge region; forming a protective layer on top of the piezoelectric layer; removing the piezoelectric layer and the protective layer of the encapsulation edge region to expose the top of the dielectric layer of the encapsulation edge region; after removing the piezoelectric layer and the protective layer of the encapsulation edge region, removing the remaining protective layer; after removing the remaining protective layer, forming an adhesive layer on top of the piezoelectric layer, the adhesive layer further covering the sidewall of the piezoelectric layer facing the encapsulation edge region and the top of the dielectric layer of the encapsulation edge region; forming a first support portion on the adhesive layer of the encapsulation edge region, the first support portion further covering the adhesive layer of the piezoelectric layer facing the sidewall of the encapsulation edge region and a portion of the top surface of the adhesive layer on the top of the piezoelectric layer in the region connected to the sidewall.

[0033] In the embodiments of this invention, a technical solution is adopted that first forms a protective layer, then removes the protective layer and piezoelectric layer in the packaging edge area, then removes the remaining protective layer, and finally deposits an adhesive layer. Compared with the technical solution of first forming an adhesive layer and then removing the adhesive layer and piezoelectric layer in the packaging edge area, the adhesive layer in this application can continuously cover the top of the dielectric layer in the packaging edge area, the sidewall of the piezoelectric layer facing the packaging edge area, and the top of the piezoelectric layer, thereby increasing the total area of ​​the adhesive layer. In addition, a first support portion is formed on a portion of the top surface of the adhesive layer in the packaging edge area. The first support portion also extends to cover the adhesive layer on the sidewall of the piezoelectric layer facing the packaging edge area, and a portion of the top surface of the adhesive layer in the area of ​​the piezoelectric layer connected to the sidewall. This avoids the first support portion contacting both the adhesive layer and the dielectric layer at the same time, thereby increasing the contact area between the adhesive layer and the first support portion. This results in a single contact interface between the first support portion and the adhesive layer, improving the bonding strength of the interface between the first support portion and the adhesive layer, and thus improving the yield of the filter.

[0034] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] Figures 3 to 10 This is a schematic diagram of the structure corresponding to each step in one embodiment of the filter formation method of the present invention.

[0036] refer to Figure 3 A substrate 100 is provided, on which a dielectric layer 101 is formed, the dielectric layer 101 including an encapsulation edge region I.

[0037] It should be noted that the cutting channel II is located in the packaging edge area I, the packaging edge area I covers the cutting channel II, and the lateral dimension of the packaging edge area I is larger than the lateral dimension of the cutting channel II, so as to avoid damage to the filter by subsequent cutting processes. Here, lateral refers to the direction parallel to the top surface of the substrate 100.

[0038] Substrate 100 is used to provide a process platform for the fabrication of filters.

[0039] In some embodiments, the substrate 100 is made of silicon. In other embodiments, the substrate material includes one or more of germanium, silicon germanide, silicon carbide, silicon germanium carbide, indium arsenide, gallium arsenide, and indium phosphide. The substrate may also be other types of substrates such as ceramic substrate, quartz substrate, or glass substrate.

[0040] The dielectric layer 101 is a film structure formed in the preceding processes of filter fabrication. In some embodiments, the dielectric layer 101 is a stacked structure.

[0041] Continue to refer to Figure 3 A piezoelectric layer 102 is formed on the dielectric layer 101, and the piezoelectric layer 102 covers the encapsulation edge region I.

[0042] The piezoelectric layer 102 is made of piezoelectric material, which is a crystalline material that produces a voltage between its two ends when subjected to pressure. Piezoelectric material has a piezoelectric effect, and the piezoelectric effect of piezoelectric material can be used to realize the mutual conversion between mechanical vibration (sound wave) and alternating current, thereby realizing the conversion between sound energy and electrical energy.

[0043] The piezoelectric layer 102 can be made of piezoelectric crystals, piezoelectric ceramics, or piezoelectric polymers. Specifically, the piezoelectric crystal can be aluminum nitride, scandium-doped aluminum nitride, lead zirconate titanate, quartz crystal, lithium gallium oxide, lithium germanate, titanium germanate, lithium niobate, or lithium tantalate, etc., and the piezoelectric polymer can be polyvinylidene fluoride, vinylidene fluoride-trifluoroethylene copolymer, nylon-11, or vinylidene dicyanide-vinyl acetate alternating copolymer, etc.

[0044] In some embodiments, after providing the substrate 100 and before forming the piezoelectric layer 102 on the dielectric layer 101, a patterned lower electrode (not shown) is formed on the top of the dielectric layer 101 on the side of the package edge region I.

[0045] In some embodiments, after the piezoelectric layer 102 is formed on the dielectric layer 101 and before a protective layer is formed on top of the piezoelectric layer 102, the method further includes forming a patterned upper electrode (not shown) on top of the piezoelectric layer 102, wherein the upper electrode overlaps with the projection portion of the lower electrode on the substrate 100.

[0046] Continue to refer to Figure 3 A protective layer 103 is formed on top of the piezoelectric layer 102.

[0047] The protective layer 103 is used as a mask for the subsequent removal of the piezoelectric layer 102 from the encapsulation edge region I.

[0048] Specifically, a protective layer 103 is formed on top of the upper electrode.

[0049] In some embodiments, the process of forming a protective layer 103 on top of the piezoelectric layer 102 includes a plasma-enhanced chemical vapor deposition process.

[0050] It should be noted that the plasma-enhanced chemical vapor deposition process deposits the protective layer 103 at a lower temperature, which can reduce the probability of thermal damage to the piezoelectric layer 102 and other formed structures. In addition, the protective layer 103 formed by the plasma-enhanced chemical vapor deposition process has high density, low pinhole density and high step coverage. Accordingly, when the piezoelectric layer 102 of the encapsulation edge region I is subsequently removed, damage to the remaining piezoelectric layer 102 can be reduced.

[0051] In other embodiments, the process of forming a protective layer on top of the piezoelectric layer may also include an atomic layer chemical vapor deposition process.

[0052] The protective layer 103 and the piezoelectric layer 102 have a high removal selectivity. Therefore, the material of the protective layer 103 includes silicon oxide or silicon nitride. As an example, the material of the protective layer 103 is silicon oxide.

[0053] refer to Figures 4 to 6 Remove the piezoelectric layer 102 and protective layer 103 of the package edge region I to expose the top of the dielectric layer 101 of the package edge region I.

[0054] It should be noted that removing the piezoelectric layer 102 and the protective layer 103 from the package edge region I helps to reduce the probability of peeling between the piezoelectric layer 102 and the dielectric layer 101 in the package edge region I when the filter device is subsequently cut along the cutting path II in the package edge region I, thereby improving the yield of the filter.

[0055] Specifically, the step of removing the piezoelectric layer 102 and the protective layer 103 from the encapsulation edge region I includes: referencing Figure 4 A mask layer 104 is formed on top of the protective layer 103, the mask layer 104 exposing the protective layer 103 of the encapsulation edge region I; Reference Figure 5 Using the mask layer 104 as a mask, the protective layer 103 of the encapsulation edge region I is removed, exposing the piezoelectric layer 102 of the encapsulation edge region I; Reference Figure 6 Using the mask layer 104 and the remaining protective layer 103 as a mask, the piezoelectric layer 102 of the encapsulation edge region I is removed.

[0056] The mask layer 104 is used as a mask to remove the protective layer 103 of the packaging edge region I.

[0057] In some embodiments, the mask layer 104 is made of photoresist. Photoresist has high resolution, allowing precise control over the size of the protective layer 103 exposed by the mask layer 104 over the package edge region I; simultaneously, photoresist is easy to remove, reducing process complexity and improving production efficiency. In other embodiments, the mask layer may be made of other materials suitable for etching and easy to remove.

[0058] It should be noted that, firstly, the protective layer 103 of the package edge region I is removed by the mask layer 104, exposing the piezoelectric layer 102 of the package edge region I, so that the piezoelectric layer 102 of the package edge region I can be removed subsequently; then, the piezoelectric layer 102 of the package edge region I is removed by using the mask layer 104 and the protective layer 103 together as a mask. On the one hand, during the removal of the piezoelectric layer 102 of the package edge region I, it is beneficial to protect the piezoelectric layer 102 of the non-package edge region I. On the other hand, it reduces surface contamination caused by direct contact between the photoresist and the piezoelectric layer 102, thereby ensuring the electrical performance of the filter.

[0059] In some embodiments, the process for removing the protective layer 103 of the package edge region I includes a wet etching process. Specifically, the wet etching process is isotropic. On the one hand, it can accurately transfer the pattern of the mask layer 104 onto the protective layer 103, thereby accurately removing the protective layer of the package edge region I, and thus providing an accurate mask pattern for the subsequent removal of the piezoelectric layer 102 of the package edge region I. On the other hand, it is beneficial to achieve a high etching selectivity, thereby reducing the probability of mis-etching other film layers (e.g., mask layer 104 and piezoelectric layer 102).

[0060] In some embodiments, the process of removing the piezoelectric layer 102 of the package edge region I includes a wet etching process. Specifically, the wet etching process has a high etching selectivity. During the removal of the piezoelectric layer 102 of the package edge region I, the etching rate of the etching solution on the piezoelectric layer 102 is much higher than the etching rate on the mask layer 104 and the protective layer 103, thereby reducing the probability that the mask layer 104 and the protective layer 103 are consumed or damaged, and thus reducing the probability that the piezoelectric layer 102 in the non-package edge region is damaged.

[0061] In some embodiments, reference Figure 6 The piezoelectric layer 102 forms an obtuse angle C with the top surface of the dielectric layer 101 of the package edge region I. As an example, the angle C between the piezoelectric layer 102 and the top surface of the dielectric layer 101 of the package edge region I ranges from 110 degrees to 130 degrees.

[0062] It should be noted that, since the piezoelectric layer 102 of the package edge region I is removed by wet etching process, and the wet etching process has the characteristic of isotropy, the corresponding etching solution starts from the top of the piezoelectric layer 102 and simultaneously etches along the longitudinal and transverse directions, so that the angle between the sidewall of the piezoelectric layer 102 facing the package edge region I and the top surface of the dielectric layer 101 of the package edge region I is an obtuse angle. Here, the longitudinal direction refers to the direction of the normal of the substrate 100, and the transverse direction refers to the direction parallel to the surface of the substrate 100.

[0063] Specifically, the piezoelectric layer 102 has an obtuse angle C between its sidewall facing the packaging edge region I and the top surface of the dielectric layer 101 in the packaging edge region I. This means that the slope of the sidewall of the piezoelectric layer 102 facing the packaging edge region I is relatively gentle, which helps to reduce stress concentration at the angle C of the subsequently deposited adhesive layer and correspondingly reduces the risk of adhesive layer breakage. This allows a continuous and tight contact interface to be formed between the first support and the adhesive layer, thereby improving the yield of the filter.

[0064] refer to Figure 7 After removing the piezoelectric layer 102 of the package edge region I, the process also includes removing the mask layer 104. Specifically, the mask layer 104 is removed to expose the protective layer 103 of the non-package edge region, in preparation for the subsequent removal of the protective layer 103 of the non-package edge region.

[0065] Reference Figure 7 and reference Figure 8 After removing the piezoelectric layer 102 and the protective layer 103 of the encapsulation edge region I, the remaining protective layer 103 is removed.

[0066] It should be noted that removing the remaining protective layer 103 prepares for the subsequent formation of the adhesive layer.

[0067] Specifically, removing the remaining protective layer 103 refers to removing the protective layer 103 of the edge region 100A and the core region. In other embodiments, depending on actual process requirements, removing the remaining protective layer may also involve removing only the protective layer in the edge region while retaining the protective layer in the core region.

[0068] In some embodiments, the process of removing the remaining protective layer 103 includes a wet etching process.

[0069] refer to Figure 9 After removing the remaining protective layer 103, an adhesive layer 105 is formed on top of the piezoelectric layer 102, and the adhesive layer 105 also covers the sidewall of the piezoelectric layer 102 facing the package edge region I and the top of the dielectric layer 101 of the package edge region I.

[0070] Specifically, after the remaining protective layer 103 is removed, the upper electrode is exposed, and thus an adhesive layer 105 is formed on top of the upper electrode.

[0071] The adhesive layer 105 is used not only to improve the adhesion between the dielectric layer 101 and the piezoelectric layer 102 and the subsequently formed first support, but also to protect the device structure in the core area (e.g., top electrode layer, metal interconnect structure, etc.) and reduce the probability of moisture and pollutants in the air directly adhering to the device structure in the core area.

[0072] In some embodiments, the process of forming an adhesion layer 105 on top of the piezoelectric layer 102 includes a chemical vapor deposition process.

[0073] Specifically, chemical vapor deposition has good step coverage capability, so that the sidewall of the piezoelectric layer 102 facing the encapsulation edge region I also has an adhesion layer 105; in addition, chemical vapor deposition has the characteristic of high film deposition density, and the adhesion layer 105 formed by chemical vapor deposition is correspondingly higher density.

[0074] In other embodiments, the process of forming an adhesion layer on the piezoelectric structure further includes physical vapor deposition or atomic layer deposition.

[0075] The adhesive layer 105 has relatively stable physical and chemical properties, as well as high adhesion. In some embodiments, the material of the adhesive layer 105 includes silicon nitride or silicon oxynitride. As an example, the material of the adhesive layer 105 is silicon nitride.

[0076] refer to Figure 10 A first support portion 106 is formed on a portion of the top surface of the adhesive layer 105 in the packaging edge region I. The first support portion 106 also extends to cover the adhesive layer 105 of the piezoelectric layer 102 facing the sidewall of the packaging edge region I, and a portion of the top surface of the adhesive layer 105 in the region of the top of the piezoelectric layer 102 connected to the sidewall.

[0077] The first support 106 is used to prepare for the subsequent formation of the capping layer.

[0078] Specifically, a first support portion 106 is formed on a portion of the top surface of the adhesive layer 105 in the packaging edge region I, and the first support portion 106 does not cover the adhesive layer 105 of the cutting channel II.

[0079] It should be noted that the first support portion 106 does not cover the adhesive layer 105 of the cutting path II, which helps to reduce the probability of damage to the first support portion 106 when the filter device is subsequently cut along the cutting path II, thereby improving the yield of the filter.

[0080] In some embodiments, the material of the first support portion 106 includes a photosensitive material.

[0081] It should be noted that the material of the first support portion 106 is a photosensitive material, which can be patterned using photolithography, thus reducing the complexity and precision of the patterning process. Specifically, the photosensitive material is a dry film. A dry film is a permanent bonding film with high adhesive strength, ensuring the bonding strength between the first support portion 106 and the adhesive layer 105 and the capping layer. Simultaneously, it improves the sealing performance of the cavity.

[0082] In other embodiments, the material of the first support portion can also be a non-photosensitive material. In this case, a photolithography process including photoresist coating, exposure, and development can be used to form a photoresist mask (not shown). The non-photosensitive material is then etched through the photoresist mask using a dry etching process to form the first support portion. The dry etching process has anisotropic etching characteristics, which is beneficial for improving the morphological quality and dimensional accuracy of the support portion. The dry etching process can be a plasma dry etching process. Accordingly, after forming the first support portion, the process further includes removing the photoresist mask by a wet stripping or ashing process.

[0083] Specifically, the top of the piezoelectric layer 102 refers to the side of the piezoelectric layer 102 that faces away from the dielectric layer 101.

[0084] On a projection plane parallel to the top surface of the substrate 100, the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 should not be too large or too small. If the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is too large, the size of the filter will increase accordingly, affecting the miniaturization of the filter; if the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is too small, the contact area of ​​the adhesive layer 105 on the top of the first support portion 106 and the piezoelectric layer 102 will decrease accordingly, thereby reducing the bonding strength between the adhesive layer 105 on the top of the first support portion 106 and the piezoelectric layer 102. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is 10 micrometers to 15 micrometers.

[0085] On a projection plane parallel to the top surface of the substrate 100, the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 should not be too large or too small. If the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is too large, the size of the filter will increase accordingly, affecting the miniaturization of the filter; if the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is too small, the contact area between the first support portion 106 and the adhesive layer 105 on the top of the dielectric layer 101 will decrease accordingly, reducing the bonding strength between the first support portion 106 and the adhesive layer 105 on the top of the dielectric layer 101. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is 10 micrometers to 15 micrometers.

[0086] It should be noted that, compared with the technical solution of first forming the protective layer 103, then removing the protective layer 103 and piezoelectric layer 102 of the encapsulation edge region I, then removing the remaining protective layer 103, and finally depositing the adhesive layer 105, the adhesive layer 105 in this application can continuously cover the top of the dielectric layer 101 of the encapsulation edge region I, the sidewall of the piezoelectric layer 102 facing the encapsulation edge region I, and the top of the piezoelectric layer 102, thus increasing the total area of ​​the adhesive layer 105; in addition, a first layer is formed on a portion of the top surface of the adhesive layer 105 in the encapsulation edge region I. The support portion 106 extends to cover the adhesive layer 105 on the sidewall of the piezoelectric layer 102 facing the packaging edge region I, and a portion of the top surface of the adhesive layer 105 on the top of the piezoelectric layer 102 in the region connected to the sidewall. This prevents the first support portion 106 from contacting both the adhesive layer 105 and the dielectric layer 101 simultaneously, thereby increasing the contact area between the adhesive layer 105 and the first support portion 106. This results in a single contact interface between the first support portion 106 and the adhesive layer 105, improving the bonding strength of the interface between the first support portion 106 and the adhesive layer 105, and thus improving the yield of the filter.

[0087] It should also be noted that, since the material of the adhesive layer 105 contains active groups such as amino groups and the material of the first support layer 106 contains active groups such as hydroxyl groups, chemical bonds can be formed between the materials of the adhesive layer 105 and the support layer 106, thereby improving the bonding strength of the interface between the first support 106 and the adhesive layer 105.

[0088] Continue to refer to Figure 10The step of forming a first support portion 106 on the adhesive layer 105 of the packaging edge region I further includes: forming a second support portion 107 on a portion of the top surface of the adhesive layer 105, wherein the second support portion 107 is located on the side of the first support portion 106 away from the packaging edge region I.

[0089] The second support section 107 and the first support section 106 work together to prepare for the subsequent formation of the capping layer.

[0090] Specifically, the second support portion 107 and the first support portion 106 are formed in the same process step. Therefore, the material of the second support portion 107 is the same as that of the first support portion 106, which will not be described again here.

[0091] In some embodiments, the processes of forming a first support portion 106 on the adhesive layer 105 of the packaging edge region I and forming a second support portion 107 on a portion of the top surface of the adhesive layer 105 both include a lamination process.

[0092] Specifically, the lamination process can quickly and tightly bond a dry film material of uniform thickness to the surface of the adhesive layer 105 without bubbles by heating and pressurizing, which is conducive to the precise formation of the first support portion 106 and the second support portion 107 by photolithography.

[0093] In some embodiments, the lamination speed of the lamination process is from 1 mm / s to 3 mm / s. Specifically, by setting the lamination speed of the lamination process in the range of 1 mm / s to 3 mm / s, it is beneficial to form a tight, bubble-free bonding surface between the first support portion 106 and the surface of the adhesive layer 105, and between the second support portion 107 and the surface of the adhesive layer 105, thereby improving the bonding strength between the first support portion 106 and the adhesive layer 105, and between the second support portion 107 and the adhesive layer 105.

[0094] As an example, the lamination process has a lamination speed of 2 millimeters per second.

[0095] Continue to refer to Figure 10 After forming a first support portion 106 on the adhesive layer 105 of the encapsulation edge region I and forming a second support portion 107 on a portion of the top surface of the adhesive layer 105, the method further includes forming a capping layer 108 that spans the first support portion 106 and the second support portion 107, wherein the capping layer 108, the first support portion 106, the second support portion 107 and the adhesive layer 105 form a cavity 109.

[0096] Specifically, on a projection plane parallel to the top surface of the substrate 100, the lower electrode extends from directly below the second support portion 107 to directly below the cavity 109; on a projection plane parallel to the top surface of the substrate 100, the upper electrode extends from the side of the encapsulation edge region I to directly below the cavity 109, and the projection portions of the upper electrode and the lower electrode on the substrate 100 overlap; when the filter is working, the piezoelectric layer 102 located in the overlapping area of ​​the upper electrode and the lower electrode generates acoustic waves under the excitation of the electric field generated by the upper electrode and the lower electrode.

[0097] Therefore, the cavity 109 is used to reflect the sound waves generated by the piezoelectric layer 102.

[0098] In some embodiments, the capping layer 108 is made of a dry film or PI. In other embodiments, the capping layer is made of one or more of silicon, germanium, silicon germanide, silicon carbide, silicon germanium carbide, indium arsenide, gallium arsenide, and indium phosphide. The capping layer may also be other types of capping layers such as ceramic capping layer, quartz capping layer, or glass capping layer.

[0099] In some embodiments, after forming a capping layer 108 spanning the first support portion 106 and the second support portion 107, the method further includes baking the capping layer 108, the first support portion 106, and the second support portion 107.

[0100] It should be noted that by baking the cap layer 108, the first support portion 106, and the second support portion 107, the materials of the cap layer 108, the first support portion 106, and the second support portion 107 are completely cured, improving their mechanical strength, heat resistance, and chemical resistance. This also enhances the bonding strength between the first support portion 106 and the adhesive layer 105, between the second support portion 107 and the adhesive layer 105, and between the first support portion 106, the second support portion 107, and the cap layer 108. This ensures the stability and integrity of the first support portion 106, the second support portion 107, and the cap layer 108 in subsequent injection molding processes, reducing the risk of device failure.

[0101] On a projection plane parallel to the top surface of the substrate 100, the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 should not be too large or too small. If the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is too large, the area of ​​tensile stress exerted by the cap layer 108 on the first support portion 106 increases, thereby reducing the bonding strength between the first support portion 106 and the adhesive layer 105. If the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is too small, the contact area between the cap layer 108 and the first support portion 106 is correspondingly reduced, thereby reducing the bonding strength between the cap layer 108 and the first support portion 106. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is 30 micrometers to 35 micrometers.

[0102] In some embodiments, the baking temperature for the cap layer 108, the first support portion 106, and the second support portion 107 is between 260 degrees Celsius and 280 degrees Celsius. Specifically, by setting the baking temperature within the range of 260 degrees Celsius to 280 degrees Celsius, it is beneficial to reduce the thermal stress caused by high temperature on the cap layer 108, the first support portion 106, and the second support portion 107, thereby reducing the risk of cracking or peeling of the cap layer 108, the first support portion 106, and the second support portion 107.

[0103] As an example, the temperature at which the cap layer 108, the first support portion 106, and the second support portion 107 are baked is 270 degrees Celsius.

[0104] Accordingly, embodiments of the present invention also provide a filter.

[0105] Reference Figure 10 The filter includes: a substrate 100; a dielectric layer 101 located on top of the substrate 100, the dielectric layer 101 including an encapsulation edge region I; a piezoelectric layer 102 located on top of the dielectric layer 101 and exposing the surface of the dielectric layer 101 in the encapsulation edge region I; an adhesive layer 105 located on top of the piezoelectric layer 102, and the adhesive layer 105 also covers the sidewall of the piezoelectric layer 102 facing the encapsulation edge region I and the top of the dielectric layer 101 in the encapsulation edge region I; and a first support portion 106 located on a portion of the top surface of the adhesive layer 105 in the encapsulation edge region I, and also extending to cover the adhesive layer 105 of the piezoelectric layer 102 facing the sidewall of the encapsulation edge region I, and a portion of the top surface of the adhesive layer 105 in the region of the top of the piezoelectric layer 102 connected to the sidewall.

[0106] It should be noted that the cutting channel II is located in the packaging edge area I, the packaging edge area I covers the cutting channel II, and the lateral dimension of the packaging edge area I is larger than the lateral dimension of the cutting channel II, so as to avoid damage to the filter by subsequent cutting processes. Here, lateral refers to the direction parallel to the top surface of the substrate 100.

[0107] Substrate 100 is used to provide a process platform for the fabrication of filters.

[0108] In this embodiment, the substrate 100 is made of silicon. In other embodiments, the substrate material includes one or more of germanium, silicon germanide, silicon carbide, silicon germanium carbide, indium arsenide, gallium arsenide, and indium phosphide. The substrate may also be other types of substrates such as ceramic substrate, quartz substrate, or glass substrate.

[0109] The dielectric layer 101 is a film structure formed in the preceding processes of filter fabrication. In some embodiments, the dielectric layer 101 is a stacked structure.

[0110] The piezoelectric layer 102 is made of piezoelectric material, which is a crystalline material that produces a voltage between its two ends when subjected to pressure. Piezoelectric material has a piezoelectric effect, and the piezoelectric effect of piezoelectric material can be used to realize the mutual conversion between mechanical vibration (sound wave) and alternating current, thereby realizing the conversion between sound energy and electrical energy.

[0111] The piezoelectric layer 102 can be made of piezoelectric crystals, piezoelectric ceramics, or piezoelectric polymers. Specifically, the piezoelectric crystal can be aluminum nitride, scandium-doped aluminum nitride, lead zirconate titanate, quartz crystal, lithium gallium oxide, lithium germanate, titanium germanate, lithium niobate, or lithium tantalate, etc., and the piezoelectric polymer can be polyvinylidene fluoride, vinylidene fluoride-trifluoroethylene copolymer, nylon-11, or vinylidene dicyanide-vinyl acetate alternating copolymer, etc.

[0112] It should be noted that the piezoelectric layer 102 exposes the surface of the dielectric layer 102 in the package edge region I. When the filter device is cut along the cutting path II in the package edge region I, it helps to reduce the probability of peeling between the piezoelectric layer 102 and the dielectric layer 101 in the package edge region I, thereby improving the yield of the filter.

[0113] In some embodiments, the angle C between the sidewall of the piezoelectric layer 102 facing the package edge region I and the top surface of the dielectric layer 101 of the package edge region I (e.g., ...) Figure 6 (As shown) is an obtuse angle. As an example, the angle C between the sidewall of the piezoelectric layer 102 facing the package edge region I and the top surface of the dielectric layer 101 of the package edge region I ranges from 110 degrees to 130 degrees.

[0114] Specifically, the piezoelectric layer 102 has an obtuse angle C between its sidewall facing the packaging edge region I and the top surface of the dielectric layer 101 of the packaging edge region I. This means that the slope of the sidewall of the piezoelectric layer 102 facing the packaging edge region I is relatively gentle, which helps to reduce stress concentration of the adhesive layer 105 at the angle C and correspondingly reduces the risk of the adhesive layer 105 breaking. This allows a continuous and tight contact interface to be formed between the first support portion 106 and the adhesive layer 105, thereby improving the yield of the filter.

[0115] The adhesive layer 105 is used not only to improve the adhesion between the dielectric layer 101 and the piezoelectric layer 102 and the first support portion 106, but also to protect the device structure in the core area (e.g., top electrode layer, metal interconnect structure, etc.) and reduce the probability of water vapor and pollutants in the air directly adhering to the device structure in the core area.

[0116] The adhesive layer 105 has relatively stable physical and chemical properties, as well as high adhesion. In some embodiments, the material of the adhesive layer 105 includes silicon nitride or silicon oxynitride. As an example, the material of the adhesive layer 105 is silicon nitride.

[0117] It should be noted that, since the adhesive layer 105 covers the top of the piezoelectric layer 102, the sidewall of the piezoelectric layer 102 facing the encapsulation edge region I, and the top of the dielectric layer 101 of the encapsulation edge region I, and a first support portion 106 is formed on a portion of the top surface of the adhesive layer 105 in the encapsulation edge region I, the first support portion 106 also extends and covers the adhesive layer 105 of the piezoelectric layer 102 facing the sidewall of the encapsulation edge region I, and the area of ​​the top of the piezoelectric layer 102 connected to the sidewall. Compared to the scheme where the adhesive layer 105 only covers the top of the piezoelectric layer 102, the partial top surface of the adhesive layer 105 on the domain avoids the first support portion 106 from contacting both the adhesive layer 105 and the dielectric layer 102 simultaneously. This correspondingly increases the contact area between the adhesive layer 105 and the first support portion 106, thereby forming a single contact interface between the first support portion 106 and the adhesive layer 105. This improves the bonding strength of the interface between the first support portion 106 and the adhesive layer 105, and thus improves the yield of the filter.

[0118] It should also be noted that, since the material of the adhesive layer 105 contains active groups such as amino groups and the material of the first support layer 106 contains active groups such as hydroxyl groups, chemical bonds can be formed between the material of the adhesive layer 105 and the material of the first support layer 106, thereby improving the bonding strength of the interface between the first support 106 and the adhesive layer 105.

[0119] The first support 106 is used to prepare for the formation of the cap layer 108.

[0120] Specifically, a first support portion 106 is formed on a portion of the top surface of the adhesive layer 105 in the packaging edge region I, and the first support portion 106 does not cover the adhesive layer 105 of the cutting channel II.

[0121] It should be noted that the first support portion 106 does not cover the adhesive layer 105 of the cutting path II, which helps to reduce the probability of damage to the first support portion 106 when the filter device is subsequently cut along the cutting path II, thereby improving the yield of the filter.

[0122] In some embodiments, the material of the first support portion 106 includes a photosensitive material.

[0123] It should be noted that the material of the first support portion 106 is a photosensitive material, which can be patterned using photolithography, thus reducing the complexity and precision of the patterning process. Specifically, the photosensitive material is a dry film. A dry film is a permanent bonding film with high adhesive strength, ensuring the bonding strength between the first support portion 106 and the adhesive layer 105 and the capping layer. Simultaneously, it improves the sealing performance of the cavity.

[0124] In other embodiments, the material of the first support portion may also be a non-photosensitive material.

[0125] Specifically, the top of the piezoelectric layer 102 refers to the side of the piezoelectric layer 102 that faces away from the dielectric layer 101.

[0126] On a projection plane parallel to the top surface of the substrate 100, the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 should not be too large or too small. If the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is too large, the size of the filter will increase accordingly, affecting the miniaturization of the filter; if the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is too small, the contact area of ​​the adhesive layer 105 on the top of the first support portion 106 and the piezoelectric layer 102 will decrease accordingly, thereby reducing the bonding strength between the adhesive layer 105 on the top of the first support portion 106 and the piezoelectric layer 102. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w2 of the overlapping area between the top of the first support portion 106 and the piezoelectric layer 102 is 10 micrometers to 15 micrometers.

[0127] On a projection plane parallel to the top surface of the substrate 100, the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 should not be too large or too small. If the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is too large, the size of the filter will increase accordingly, affecting the miniaturization of the filter; if the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is too small, the contact area between the first support portion 106 and the adhesive layer 105 on the top of the dielectric layer 101 will decrease accordingly, reducing the bonding strength between the first support portion 106 and the adhesive layer 105 on the top of the dielectric layer 101. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w3 of the overlapping area between the top of the first support portion 106 and the top of the dielectric layer 101 is 10 micrometers to 15 micrometers.

[0128] In some embodiments, the filter further includes a second support portion 107 located on a portion of the top surface of the adhesive layer 105 and on the side of the first support portion 106 opposite to the encapsulation edge region I.

[0129] The second support 107 and the first support 106 work together to prepare for the formation of the cap layer 108.

[0130] Specifically, the second support portion 107 and the first support portion 106 are formed in the same process step. Therefore, the material of the second support portion 107 is the same as that of the first support portion 106, which will not be described again here.

[0131] In some embodiments, the filter further includes a capping layer 108 that spans the top of the first support portion 106 and the second support portion 107, wherein the capping layer 108, the first support portion 106, the second support portion 107 and the adhesive layer 105 form a cavity 109.

[0132] It should be noted that cavity 109 is beneficial for sound reflection.

[0133] In some embodiments, the capping layer 108 is made of dry film or PI. In other embodiments, the capping layer is made of one or more of silicon, germanium, silicon germanide, silicon carbide, silicon germanium carbide, indium arsenide, gallium arsenide, and indium phosphide. The capping layer may also be other types of capping layers such as ceramic capping layer, quartz capping layer, or glass capping layer.

[0134] On a projection plane parallel to the top surface of the substrate 100, the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 should not be too large or too small. If the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is too large, the area of ​​tensile stress exerted by the cap layer 108 on the first support portion 106 increases, thereby reducing the bonding strength between the first support portion 106 and the adhesive layer 105. If the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is too small, the contact area between the cap layer 108 and the first support portion 106 is correspondingly reduced, thereby reducing the bonding strength between the cap layer 108 and the first support portion 106. Therefore, in some embodiments, on a projection plane parallel to the top surface of the substrate 100, the width w1 of the overlapping area between the cap layer 108 and the first support portion 106 is 30 micrometers to 35 micrometers.

[0135] In some embodiments, the filter further includes: a lower electrode (not shown) located between the piezoelectric layer 102 and the dielectric layer 101, extending from directly below the second support portion 107 to directly below the cavity 109 on a projection plane parallel to the top surface of the substrate 100; and an upper electrode (not shown) located between the adhesive layer 105 and the piezoelectric layer 102, extending from the side of the encapsulation edge region I to directly below the cavity 109 on a projection plane parallel to the top surface of the substrate 100, wherein the upper electrode and the projection portion of the lower electrode on the substrate 100 overlap.

[0136] Specifically, the piezoelectric layer 102 located in the overlapping region of the upper electrode and the lower electrode generates acoustic waves under the excitation of the electric field generated by the upper electrode and the lower electrode.

[0137] Accordingly, embodiments of the present invention also provide an electronic device, which includes the filter described in any embodiment of the present invention.

[0138] Filters can be integrated into various electronic devices. As the foregoing analysis shows, filters have a high yield rate, which in turn leads to electronic devices with high yield rates. These electronic devices can also include personal computers, mobile terminals such as smartphones, media players, navigation devices, video game consoles, game controllers, tablet computers, wearable devices, security access control systems, POS terminals, medical devices, flight simulators, and more.

[0139] It should be noted that the filter described in this embodiment can be formed using the forming method described in the foregoing embodiments, or it can be formed using other forming methods. For a description of the filter in this embodiment, please refer to the relevant content in the foregoing forming methods.

[0140] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A filter, characterized in that, include: Base; A dielectric layer, located on top of the substrate, includes an encapsulation edge region; A piezoelectric layer is located on top of the dielectric layer and exposes the surface of the dielectric layer in the encapsulation edge region; An adhesive layer is located on top of the piezoelectric layer, and the adhesive layer also covers the sidewall of the piezoelectric layer facing the package edge region and the top of the dielectric layer of the package edge region; The first support portion is located on a portion of the top surface of the adhesive layer in the packaging edge region, and also extends to cover the adhesive layer of the piezoelectric layer facing the sidewall of the packaging edge region, and a portion of the top surface of the adhesive layer in the region of the top of the piezoelectric layer connected to the sidewall.

2. The filter as described in claim 1, characterized in that, The filter further includes a second support portion located on a portion of the top surface of the adhesive layer and on the side of the first support portion away from the encapsulation edge region.

3. The filter as described in claim 1, characterized in that, The filter further includes a cap layer that spans the top of the first support portion and the second support portion, and the cap layer, the first support portion, the second support portion and the adhesive layer form a cavity.

4. The filter as described in claim 3, characterized in that, On a projection plane parallel to the top surface of the substrate, the width of the area where the cap layer and the first support overlap is 30 to 35 micrometers.

5. The filter as described in claim 1, characterized in that, On a projection plane parallel to the top surface of the substrate, the width of the area where the top of the first support and the piezoelectric layer overlap is 10 micrometers to 15 micrometers.

6. The filter as described in claim 1, characterized in that, On a projection plane parallel to the top surface of the substrate, the width of the area where the top of the first support and the top of the dielectric layer overlap is 10 micrometers to 15 micrometers.

7. The filter as described in claim 1, characterized in that, The adhesive layer is made of silicon nitride or silicon oxynitride.

8. The filter as described in claim 1, characterized in that, The angle between the sidewall of the piezoelectric layer facing the edge region of the package and the top surface of the dielectric layer of the edge region of the package is an obtuse angle.

9. An electronic device, characterized in that, Includes the filter as described in any one of claims 1 to 8.

10. A method for forming a filter, characterized in that, include: A substrate is provided on which a dielectric layer is formed, the dielectric layer including an encapsulation edge region; A piezoelectric layer is formed on the dielectric layer, and the piezoelectric layer covers the packaging edge region; A protective layer is formed on top of the piezoelectric layer; Remove the piezoelectric layer and protective layer from the package edge region to expose the top of the dielectric layer in the package edge region; After removing the piezoelectric layer and protective layer from the packaging edge region, remove the remaining protective layer; After removing the remaining protective layer, an adhesive layer is formed on top of the piezoelectric layer, and the adhesive layer also covers the sidewall of the piezoelectric layer facing the package edge region and the top of the dielectric layer of the package edge region; A first support portion is formed on a portion of the top surface of the adhesive layer in the packaging edge region. The first support portion also extends to cover the adhesive layer of the piezoelectric layer facing the sidewall of the packaging edge region, and a portion of the top surface of the adhesive layer in the region of the top of the piezoelectric layer connected to the sidewall.

11. The method for forming a filter as described in claim 10, characterized in that, The steps for removing the piezoelectric layer and protective layer from the packaging edge region include: A mask layer is formed on top of the protective layer, the mask layer exposing the protective layer at the packaging edge region; Using the mask layer as a mask, the protective layer of the packaging edge region is removed to expose the piezoelectric layer of the packaging edge region; Using the mask layer and the remaining protective layer as a mask, the piezoelectric layer in the packaging edge region is removed.

12. The method for forming a filter as described in claim 11, characterized in that, The process for removing the protective layer from the edge region of the package includes a wet etching process.

13. The method for forming a filter as described in claim 10, characterized in that, The step of forming a first support portion on a portion of the top surface of the adhesive layer in the packaging edge region further includes: forming a second support portion on a portion of the top surface of the adhesive layer, wherein the second support portion is located on the side of the first support portion away from the packaging edge region.

14. The method for forming a filter as described in claim 13, characterized in that, After forming a first support portion and a second support portion on a portion of the top surface of the adhesive layer in the packaging edge region, the method further includes: forming a capping layer that spans the first support portion and the second support portion, wherein the capping layer, the first support portion, the second support portion and the adhesive layer form a cavity. After forming a capping layer spanning the first support portion and the second support portion, the process further includes baking the capping layer, the first support portion, and the second support portion.

15. The method for forming a filter as described in claim 14, characterized in that, The temperature at which the cap layer, the first support portion, and the second support portion are baked is 260 degrees Celsius to 280 degrees Celsius.

16. The method for forming a filter as described in claim 14, characterized in that, The process of forming a first support portion and a second support portion on a portion of the top surface of the adhesive layer in the packaging edge region includes a lamination process.

17. The method for forming a filter as described in claim 16, characterized in that, The lamination speed of the lamination process is from 1 mm / s to 3 mm / s.

18. The method for forming a filter as described in claim 10, characterized in that, The process of forming a protective layer on top of the piezoelectric layer includes plasma-enhanced chemical vapor deposition.

19. The method for forming a filter as described in claim 10, characterized in that, The material of the protective layer includes silicon oxide or silicon nitride.

20. The method for forming a filter as described in claim 10, characterized in that, The process of forming an adhesion layer on top of the piezoelectric layer includes chemical vapor deposition.

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