Ultra-wideband radio frequency switch matrix network, control method and system

Abstract

The application discloses a kind of ultra-wideband radio frequency switch matrix network, control method and system, matrix network includes radio frequency coaxial switch control unit, radio frequency coaxial switch unit, integrated FPGA control system's product external control unit, switching power supply unit, radio frequency cable connection unit and power detection unit.Radio frequency coaxial switch unit is built with three groups of mutually independent and physically isolated programmable signal input channel, support multiple radio frequency signal synchronous independent input to be measured product, output side is configured with the switch network that multiple product output signal is routed to multiple test equipment.FPGA control system is connected with radio frequency coaxial switch control unit and power detection unit communication respectively, pass through programmable logic control each electromechanical relay on-off, and according to the detection result of power detection unit, adjust test equipment attenuation parameter.The ultra-wideband radio frequency switch matrix network provided in the application improves the isolation of switch matrix, security and test efficiency in radio frequency automation test.

Description

Technical Field

[0001] This invention relates to the field of radio frequency microwave testing technology, specifically to ultra-wideband radio frequency switch matrix networks, control methods, and systems. Background Technology

[0002] RF switch matrices are key components in modern RF test and communication systems. Their main function is to enable programmable and flexible switching between multiple RF signals, making them essential equipment for building switch control platforms for automated RF testing. Existing technologies for implementing RF switch matrices primarily include architectures based on electromechanical relays (EMRs), solid-state electronic switch architectures based on PIN diodes, and switch architectures based on RF MEMS.

[0003] However, while existing solid-state switch architectures offer advantages in switching speed, their performance is subpar in the ultra-wideband range of DC to 50 GHz. As the frequency increases, the semiconductor junction capacitance effect becomes more pronounced, leading to a sharp increase in insertion loss. Especially under conditions of concurrent input of multiple signals, electromagnetic coupling between channels is difficult to suppress, easily generating severe signal crosstalk, which cannot meet the stringent requirements for signal purity in high-precision testing.

[0004] Meanwhile, the existing test system's topology lacks flexibility and struggles to adapt to the testing needs of various product types. Traditional designs often employ a fixed "one-to-one" routing pattern, resulting in a rigid input architecture. When faced with multi-port devices under test (DUTs) of different specifications (such as multi-channel transceiver components or phased array antennas), complex manual switching or hardware configuration changes are often required, which not only prolongs the test preparation cycle but also increases the risk of human error, leading to low test efficiency.

[0005] At the control logic level, traditional systems generally use a preset fixed time delay to issue data acquisition commands. This method cannot perceive the actual physical engagement state of the relay contacts. Due to the time discreteness of mechanical actions, the system often samples during the transient phase before the switch has fully stabilized. This not only leads to large fluctuations and poor repeatability in the acquired data, but also limits the execution efficiency of automated testing to some extent.

[0006] Furthermore, existing solutions have significant shortcomings in power management. The systems generally lack built-in adaptive power adjustment mechanisms. When faced with high-power input signals, failure to adjust the attenuation of the test equipment in a timely manner can easily lead to saturation or even burnout of the input terminals of downstream precision instruments (such as spectrum analyzers and network analyzers). Conversely, when testing weak signals, improper attenuation settings can degrade the signal-to-noise ratio. This lack of underlying physical layer linkage in the control method makes existing switching matrices poorly adaptable to high-performance, ultra-wideband testing scenarios.

[0007] Finally, the hardware cost of high-performance broadband switch matrices remains high. As bandwidth and port count requirements increase, equipment costs multiply. Existing equipment mostly uses stacked commercially available modules, lacking customized linkage control for specific testing needs. This results in low system integration, difficulty in expansion, and an inability to meet the comprehensive requirements of modern RF test systems for high efficiency, high reliability, and low cost. Summary of the Invention

[0008] This invention provides an ultra-wideband RF switch matrix network, control method, and system, which solves the problems of rigid input / output architecture, difficulty in adapting to ultra-wideband testing of various types of products, and low degree of automation in existing RF test systems.

[0009] This invention is achieved through the following technical solution:

[0010] In the first aspect, this application provides an ultra-wideband radio frequency switch matrix network, which is built based on EMR electromechanical relay assembly radio frequency coaxial switch, including radio frequency coaxial switch control unit, radio frequency coaxial switch unit, product external control unit, switching power supply unit, radio frequency cable connection unit and power detection unit;

[0011] The radio frequency coaxial switch unit has three sets of independent and physically isolated programmable signal input channels. The three sets of input channels support multiple radio frequency signals to be input to the product under test simultaneously and independently. The output side of the radio frequency coaxial switch unit is configured with a switch network for routing multiple product output signals to multiple test devices.

[0012] The external control unit of the product integrates an FPGA control system. The FPGA control system is communicatively connected to the RF coaxial switch control unit and the power detection unit. It controls the on / off state of each electromechanical relay through programmable logic and adjusts the attenuation parameters of the test equipment according to the detection results of the power detection unit. The FPGA control system is configured to execute the integrated logic of the underlying physical layer control and the upper layer algorithm to achieve high-precision test switching.

[0013] A further optimized solution is that the topology of the three sets of programmable signal input channels includes:

[0014] The first group consists of a single-pole four-throw switch and a single-pole six-throw switch cascaded together to form a four-input six-output structure, with one common terminal of the single-pole four-throw switch connected to the common terminal of the single-pole six-throw switch.

[0015] The second group consists of a single-pole four-throw switch forming a single-input four-output structure;

[0016] The third group consists of a single-pole double-throw switch forming a single-input dual-output structure;

[0017] The three structures provide a total of 12 product-side input ports.

[0018] A further optimization scheme is as follows: the 12 product-side input ports are divided into three groups: INA1 to INA6, INB1 to INB6, and INC1 to INC2, corresponding to the first, second, and third group topologies, respectively; the signal source-side access ports are S1 to S6.

[0019] A further optimized solution is that the output-side switching network includes two sets of single-pole six-throw switches, a three-stage single-pole double-throw switch, and a set of single-pole four-throw switches;

[0020] The common ports of the two sets of single-pole six-throw switches are respectively connected to the two input terminals of the first-stage single-pole double-throw switch. The common port of the first-stage single-pole double-throw switch is connected to the common terminal of the second-stage single-pole double-throw switch. The second input terminal of the second-stage single-pole double-throw switch is connected to the common terminal of another set of single-pole double-throw switches. The output terminal of the other set of single-pole double-throw switches is used as the output port.

[0021] The first input port of the second-stage single-pole double-throw switch is connected to the common terminal of the single-pole four-throw switch on the test equipment side, and the output port is connected to the test equipment as a signal output port.

[0022] A further optimized solution is as follows: the electromechanical relay is an EMR electromechanical relay; the RF cable connection unit adopts a semi-rigid coaxial cable; the impedance matching of the entire line is 50 ohms; the isolation between any adjacent channels in the three input channels is greater than 80dB; and the operating frequency covers DC to 50GHz.

[0023] A further optimization is that the FPGA control system is configured as follows:

[0024] Receive the switching command issued by the host computer and control the cascaded switches in the radio frequency coaxial switch unit to complete the path switching;

[0025] After the switch switching action is completed, the switch engagement status signal is collected and sent back to the host computer to trigger the host computer to collect data.

[0026] The power data of the output signal returned by the power detection unit is received, processed and converted into serial data and sent to the host computer. The host computer automatically sets the attenuation and bias parameters of the test equipment according to the received power data.

[0027] The FPGA control system communicates with the external control unit of the product through internally configured linkage control signals.

[0028] A further optimization scheme is that the network interacts with the host computer through a serial communication protocol, and the feedback signal issued by the FPGA control system is used to eliminate the timing error caused by the data acquisition command being issued with a preset delay in the traditional test system.

[0029] Secondly, this application provides a control method applicable to the ultra-wideband radio frequency switch matrix network described above, comprising the following steps:

[0030] Obtain information on the type of product to be tested and a list of test items;

[0031] The FPGA control system calls the preset switching logic according to the list of items under test, and programs the on / off combination of each stage of the RF coaxial switch unit to establish the transmission link from the source signal to the product under test.

[0032] The source signal is synchronously sent to the corresponding input port of the product under test through three sets of independent input channels;

[0033] The output signal of the product under test is routed to the corresponding test equipment port via the RF coaxial switch unit.

[0034] The power of the signal output to the test equipment is transmitted back to the FPGA control system after passing through the power detection unit. The FPGA control system sends the processed power data to the host computer, which generates attenuation control commands and sends them to the test equipment to achieve adaptive adjustment of attenuation parameters for signals of different amplitudes.

[0035] After the switch switching action is completed, the FPGA control system collects the switch engagement status signal and sends it back to the host computer. The host computer responds to the returned signal to trigger data acquisition and completes one-click automated testing.

[0036] A further optimization scheme is to monitor the connection status and power of each channel in real time before and after the switching action is executed through the FPGA control system;

[0037] When a channel fault or power abnormality is detected, the current channel is automatically disconnected and switched to the backup route, while an error code is reported to the host computer.

[0038] Thirdly, this application provides a control system, including:

[0039] The ultra-wideband RF switch matrix network described above;

[0040] Source signal, used to provide radio frequency input signals to the source signal side access ports S1 to S6 of the ultra-wideband radio frequency switch matrix network;

[0041] The test equipment is connected to the test equipment side ports E1 to E6 of the ultra-wideband RF switch matrix network, and adjusts its own attenuation parameters according to the attenuation control command.

[0042] The host computer is connected to the FPGA control system and is used to issue test item lists and switching logic, and to perform data acquisition in response to the switch engagement state signal.

[0043] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0044] By employing a three-group physically isolated independent input channel architecture, the crosstalk defects of traditional solid-state switches in multi-signal concurrent scenarios are effectively avoided, improving signal purity and channel isolation in the DC to 50GHz ultra-wideband range. A real-time feedback mechanism for switch engagement status, implemented using an FPGA control system, eliminates timing errors caused by traditional preset delay control, ensuring accurate triggering of data acquisition actions and system stability. Through closed-loop linkage between the integrated power detection unit and upper-level algorithms, dynamic monitoring of output signal power and adaptive adjustment of test equipment attenuation and attenuation bias parameters are achieved. This solves the problems of instrument burnout caused by high-power signal input and deterioration of signal-to-noise ratio in small-signal testing. It changes the rigid one-to-one correspondence between traditional switch matrices and outputs, expanding the test adaptability for various types of RF products while improving the efficiency and data accuracy of automated testing. Attached Figure Description

[0045] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0046] Figure 1 This is an internal structure diagram of an ultra-wideband radio frequency switch matrix network provided in an embodiment of this application;

[0047] Figure 2 A topology diagram of the radio frequency coaxial switch matrix provided in the embodiments of this application;

[0048] Figure 3 A block diagram of a test system for an ultra-wideband RF switch matrix network provided in this application embodiment;

[0049] Figure 4 This is a schematic diagram of control signals provided in an embodiment of this application;

[0050] Figure 5 This is a schematic diagram of three sets of channel inputs and outputs provided in an embodiment of this application.

[0051] The attached diagram shows the markings and corresponding component names:

[0052] 1-RF coaxial switch control unit; 2-RF coaxial switch unit; 3-External control unit; 4-Switching power supply unit; 5-RF cable connection unit; 6-Power detection unit. Detailed Implementation

[0053] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0054] First, some of the technical terms used in this application will be explained to help those skilled in the art understand this application.

[0055] EMR: Electromechanical Relay;

[0056] FPGA: Field Programmable Gate Array;

[0057] INA: Input Group A;

[0058] INB: Input Group B;

[0059] INC: Input Group C;

[0060] SP4T: Single Pole Four Throw switch;

[0061] SP6T: Single Pole Six Throw switch;

[0062] SP2T: Single Pole Double Throw switch;

[0063] DC: Direct Current;

[0064] RF: Radio Frequency;

[0065] TR: Transmit / Receive, the send / receive component;

[0066] PCB: Printed Circuit Board.

[0067] In one embodiment, such as Figure 1 As shown, the ultra-wideband radio frequency switch matrix network provided by the present invention is built based on EMR electromechanical relay assembly radio frequency coaxial switch, and internally integrates radio frequency coaxial switch control unit 1, radio frequency coaxial switch unit 2, product external control unit 3, switching power supply unit 4, radio frequency cable connection unit 5, and power detection unit 6.

[0068] The functional units work together via physical links and the control bus as follows:

[0069] The RF coaxial switch control unit 1 communicates with the FPGA control system of the external control unit 3 of the product via the control bus. After receiving the switching command, it drives the EMR electromechanical relays of each stage in the RF coaxial switch unit 2 to operate.

[0070] The input side of the RF coaxial switch unit 2 is connected to the signal source and three sets of independent and physically isolated programmable signal input channels through the RF cable connection unit 5, which consists of an amplitude and phase stabilizing cable with a 2.4mm connector and a KFK connector. The output side is routed to multiple test devices through the same level RF cable connection unit 5.

[0071] The FPGA control system mounted on the external control unit 3 of the product is configured to execute the integrated logic of the underlying physical layer control and the upper layer algorithm. It controls the on / off state of each electromechanical relay through programmable logic, and adjusts the attenuation parameters of the test equipment according to the detection results of the power detection unit 6. While avoiding self-excitation interference caused by equipment input saturation, it achieves high-precision test switching.

[0072] The switching power supply unit 4 converts 220V AC power to 24V DC power, which powers the RF coaxial switch control unit 1, the external control unit 3 with integrated FPGA control system, and the power detection unit 6 respectively.

[0073] The power detection unit 6 is connected in series in the output link of the RF coaxial switch unit 2. Its detection signal output terminal is connected to the FPGA control system through the communication bus to form a closed-loop link of "signal transmission-power detection-control regulation".

[0074] In one embodiment, such as Figure 2As shown, the three sets of programmable signal input channels are implemented using a specific cascaded topology. The first set consists of a single-pole four-throw switch and a single-pole six-throw switch cascaded together to form a four-input, six-output routing structure. The figure shows the first set of four-input, six-output structure consisting of a single-pole four-throw switch and a single-pole six-throw switch cascaded together; the second set of one-input, four-output structure consisting of a single-pole four-throw switch corresponding to one source signal input; and the third set of one-input, two-output structure consisting of a single-pole double-throw switch corresponding to one source signal input. The three sets of structures provide a total of 12 product-side input ports (INA1-INA6, INB1-INB6, INC1-INC2); the second set consists of a single-pole four-throw switch forming a single-input, four-output structure; and the third set consists of a single-pole double-throw switch forming a single-input, two-output structure.

[0075] This combination provides a total of 12 product-side input ports. The three sets of input channels are independent and can operate simultaneously, changing the traditional one-to-one correspondence between switch matrices and outputs. The first set's four-input, six-output structure supports complex multi-channel excitation scenarios, while the simplified structures of the second and third sets provide flexible interfaces for specific types of testing. Through this modular cascading design, signal routing is no longer limited to fixed physical connections but can be software-defined according to testing requirements.

[0076] The three input channels are independent and can operate simultaneously, supporting parallel transmission of multiple RF signals to the product under test without time-division switching. This invention employs three independent input channels, such as... Figure 5 As shown, this effectively avoids crosstalk caused by circuitry and control, achieving high isolation. Simultaneously, the three sets of signals can be input and output at the same time, achieving high signal purity through physical isolation. This architecture solves the concurrent crosstalk problem that occurs in traditional solid-state switches when signals are simultaneously activated.

[0077] In one embodiment, the aforementioned 12 product-side input ports are clearly divided into three groups according to their function and topology. Specifically, ports INA1 to INA6 correspond to the first group's four-input, six-output topology; ports INB1 to INB6 correspond to the second group's single-input, four-output topology; and ports INC1 to INC2 correspond to the third group's single-input, dual-output topology. The corresponding signal source-side access ports are defined as S1 to S6.

[0078] In actual testing, after the source signal is injected into the system from S1 to S6, it is transmitted to the corresponding product-side ports via the three channels mentioned above, specifically INA1~INA6, INB1~INB6, and INC1~INC2. This standardized port partitioning method allows operators to quickly establish physical connections without needing to delve into the complex internal switch matrix logic. For example, for TR components with multiple RF input ports, the signal source of the corresponding frequency band can be directly mapped to the INA or INB group without the need for additional external power dividers or couplers.

[0079] The signal flow principle is as follows: the source signal is input from S1 to S6, and is input to the product under test through three independent channels from INA1 to INA6, INB1 to INB6, and INC1 to INC2 respectively; the product output signal is connected to the output side switch network from OUT1 to OUT12, and is finally output to the test equipment from E1 to E6.

[0080] This embodiment significantly simplifies the connection complexity of the test system through a clear port mapping and grouping mechanism, effectively shortens the test preparation cycle, makes the performance testing of various types of RF modules more convenient and efficient, and reduces the risk of human wiring errors.

[0081] In one embodiment, the output-side switch network consists of two sets of single-pole six-throw switches, a three-stage single-pole double-throw switch, and one set of single-pole four-throw switches. The common ports of the two sets of single-pole six-throw switches are respectively connected to the two input terminals of the first-stage single-pole double-throw switch, forming an initial routing node. Specifically, the common ports of the two sets of single-pole six-throw switches are respectively connected to the two input terminals of the first-stage single-pole double-throw switch; the common port of the first-stage single-pole double-throw switch is further connected to the common terminal of the second-stage single-pole double-throw switch; and the second input terminal of the second-stage single-pole double-throw switch is connected to the common terminal of another set of single-pole double-throw switches.

[0082] Finally, the common port of the second-stage single-pole double-throw switch is connected to the common terminal of the single-pole four-throw switch on the test equipment side, and the output port is connected to the test equipment as a signal output port. The product output signal is input to this switch network from OUT1 to OUT12, and after complex routing selection, it is output to the test equipment from E1 to E6, realizing the flexible distribution of multiple output signals to multiple test equipment. This architecture allows multiple test equipment (such as spectrum analyzers, network analyzers, power meters, etc.) to be connected to the system simultaneously. This embodiment, through optimized switch network hierarchy design, realizes dynamic allocation and efficient multiplexing of test resources, solving the problem of fixed output ports and inability to drive multiple test equipment simultaneously in traditional switching systems, and significantly improving test throughput and system multi-functional integration.

[0083] In one embodiment, the electromechanical relay is an EMR (electromechanical relay) type, which offers better linearity and higher power capacity over the ultra-wideband range compared to solid-state switches. The entire RF cable connection unit uses semi-rigid coaxial cable, which offers excellent shielding and low-loss characteristics, and its impedance is strictly matched to 50 ohms throughout, thereby minimizing signal reflection and standing waves during transmission.

[0084] Based on this, the isolation between adjacent signal channels is designed to be greater than 80dB, with an operating frequency range from DC to 50GHz. Specifically, the three independent and physically isolated programmable signal input channels maintain high isolation across the ultra-wideband range of DC to 50GHz, ensuring good signal purity. The use of semi-rigid cables further guarantees the phase stability of high-frequency signals. The switching power supply unit converts 220V AC to 24V DC to power the RF coaxial switch control unit, the product's external control unit, and the power detection unit.

[0085] This embodiment ensures the superior electrical performance of the switching matrix in the ultra-wideband range through strict control over component selection and transmission line design, meeting the stringent requirements of modern high-end RF testing for signal integrity, isolation, and frequency coverage, and providing a hardware foundation for high-precision testing.

[0086] In one embodiment, the FPGA control system is configured to execute a sophisticated linkage control process. The system first receives a switching command from the host computer, then drives each stage of the RF coaxial switch unit to complete the physical path switching. Unlike traditional time-delay control, through an internal linkage control mechanism, the FPGA control system only acquires the switch engagement status signal and sends it back to the host computer after confirming that the switch switching action is completely completed. This signal serves as the enable signal to trigger the host computer to perform data acquisition.

[0087] Meanwhile, the system continuously receives output signal power data from the power detection unit. This data is processed by the FPGA's internal algorithm, converted into serial data, and sent to the host computer. The host computer then automatically adjusts the attenuation and bias parameters of the test equipment accordingly. The FPGA control system communicates with the external control unit via internally configured linkage control signals. This closed-loop control mechanism avoids self-interference signals caused by the device's own input saturation and adjusts the receiving sensitivity of the test equipment in real time based on the output power. Through the internal linkage control mechanism, the FPGA control system accurately triggers data acquisition from the host computer after the switch stabilizes, eliminating the influence of mechanical motion discreteness and making the system more stable and efficient.

[0088] This embodiment uses FPGA to implement precise linkage control and power data processing, which eliminates the uncertainty caused by traditional preset time delay control, ensuring that the data acquisition action occurs at the moment when the signal is most stable. At the same time, through adaptive attenuation adjustment, it effectively avoids the defects of high power burning out equipment or poor signal-to-noise ratio of small signals.

[0089] In one embodiment, the entire ultra-wideband RF switch matrix network establishes an interactive link with the host computer via a serial communication protocol. The feedback signal emitted by the FPGA control system is specifically used to eliminate the timing errors caused by the data acquisition command issued based on a preset delay in traditional testing systems. Compared to the traditional approach of issuing data acquisition commands by setting a fixed delay (e.g., waiting 50ms before acquisition), this invention uses the FPGA control system to send a feedback signal to the host computer at the instant the physical contacts stably close, directly controlling the host computer to perform data acquisition. The system uses serial communication control, and the FPGA control system communicates with the external control unit of the product through internally configured linkage control signals to achieve precise linkage between control and reception.

[0090] This invention uses an FPGA control system to send a feedback signal to a host computer, controlling the host computer to perform data acquisition, thus achieving precise linkage control between control and reception. Figure 4 As shown in the diagram, the serial communication protocol ensures the reliability and versatility of control commands and feedback signal transmission. Through internally configured linkage control signals, it communicates with external control units and the FPGA control system, enabling collaborative operation. Compared to traditional solutions that issue data acquisition commands with fixed delays, this invention offers precise and efficient data acquisition timing control. This embodiment, through deep hardware and software collaboration, ensures precise data acquisition timing control, making the system more stable and efficient. It is particularly suitable for timing-sensitive, high-precision RF automated testing switching control scenarios, fundamentally solving the problem of inaccurate data acquisition caused by the discreteness of relay action time.

[0091] Figure 3 The diagram illustrates the connections between the ultra-wideband RF switch matrix network, source signals, test equipment, and the host computer. In one embodiment, the host computer maintains a communication connection with the FPGA control system, is responsible for issuing the test item list and switching logic, and performs data acquisition in response to the switch engagement state signal, thus forming a complete RF automated test switch control system.

[0092] This invention employs serial communication control. The FPGA control system communicates with the external control unit of the product through internally configured linkage control signals. The FPGA control system sends feedback signals to the host computer, controlling the host computer to perform data acquisition, achieving precise linkage control between control and reception. Compared to traditional methods of issuing data acquisition commands by setting time delays, this invention offers precise data acquisition timing control and high efficiency.

[0093] Secondly, this application provides a control method applicable to the aforementioned ultra-wideband radio frequency switch matrix network, comprising the following steps:

[0094] Step S1: Obtain the type information of the product to be tested and the list of items to be tested, and determine the signal routing and resource configuration required for the test;

[0095] Step S2: The FPGA control system calls the preset switching logic according to the list of items to be tested, and programs the switching combination of each stage of the RF coaxial switch unit to establish a stable transmission link from the source signal to the product under test.

[0096] Step S3: The source signal is simultaneously sent to the corresponding input port of the product under test through three sets of independent input channels to realize the simultaneous loading of multiple excitation signals.

[0097] Step S4: The output signal of the product under test is routed to the corresponding test equipment side port via the RF coaxial switch unit;

[0098] Step S5: The signal power output to the test equipment is detected by the power detection unit and then sent back to the FPGA control system. The FPGA control system sends the processed power data to the host computer, which generates an attenuation control command and sends it to the test equipment. The attenuation amount and bias parameters are dynamically adjusted according to the power level to achieve adaptive adjustment of the attenuation parameters of signals with different amplitudes.

[0099] Step S6: Receive the switch engagement status signal returned by the FPGA control system, and trigger the host computer to perform data acquisition in response to the signal, thereby changing the traditional one-to-one correspondence output pattern of the switch matrix and completing one-click automated testing.

[0100] The complete execution steps of the method are as follows:

[0101] First, the type information of the product under test and the list of test items are obtained. The FPGA control system calls the preset switching logic to establish the transmission link from the source signal to the product under test. The source signal is sent to the product under test synchronously through three independent input channels. The output signal of the product under test is routed to the test equipment side port through the RF coaxial switch unit. The power detection unit transmits the output signal power back and the FPGA generates attenuation control instructions to achieve adaptive adjustment. Finally, the host computer is triggered to acquire data in response to the switch energizing status signal.

[0102] This method effectively avoids interference signals caused by device input saturation through closed-loop adaptive power adjustment and physical layer state feedback mechanism. Among them, power detection and adjustment in step S5 is the key link to achieve high-precision testing.

[0103] This embodiment solves the problems of low efficiency, easy equipment damage, and inaccurate data in traditional testing methods by using fully automated control logic throughout the entire process. It achieves one-click automated and accurate testing, shortens the testing cycle, and improves the reliability of the data.

[0104] In one embodiment, the control method also incorporates real-time health monitoring and fault tolerance mechanisms. Before and after the switching action is executed, the FPGA control system monitors the connection status and power of each channel in real time. Specifically, the system detects the reflection coefficient on the transmission line to determine whether the connection is secure or whether the component is intact.

[0105] Once a channel fault or power anomaly is detected, the system immediately and automatically disconnects the current channel and quickly switches to the backup route, while simultaneously reporting an error code to the host computer to alert the operator. This real-time VSWR monitoring and automatic route switching function can promptly detect signal reflection anomalies caused by loose connections or component damage, prevent unqualified data from being recorded, and protect the precision testing equipment at the back end from the impact of high VSWR signals.

[0106] This embodiment significantly enhances the robustness and reliability of the system in long-term operating environments by adding a health monitoring component, reduces maintenance costs, ensures the validity of test data, and maintains basic testing functions even in the event of individual channel failures.

[0107] Thirdly, this application provides a control system comprising the aforementioned ultra-wideband RF switch matrix network, source signals, test equipment, and a host computer. The signal sources are responsible for providing RF input signals to the source signal side access ports S1 to S6 of the network; these signal sources can be standard signal generators or excitation sources for specific frequency bands. The test equipment is connected to the test equipment side ports E1 to E6 of the network and adjusts its internal attenuation parameters in real time according to received attenuation control commands to adapt to input signals of different amplitudes.

[0108] This invention uses a serial communication protocol to realize the interaction between units, and the FPGA control system communicates with the external control unit of the product through the internally set linkage control signals.

[0109] The host computer maintains a communication connection with the FPGA control system, responsible for issuing the test item list and switching logic, and performing specific data acquisition and processing operations in response to the switch engagement status signal. As the core of human-computer interaction, the host computer encapsulates the complex switch control, power regulation, and data acquisition process into a one-click operation. Testers only need to select the product model under test and the test item, and the rest of the work is completed automatically by the system.

[0110] This embodiment constructs a complete and high-precision RF automated test switching control environment through the organic collaboration of various functional modules. It can flexibly adapt to the test requirements of various types of products, significantly shorten the test cycle, and significantly reduce the overall test cost and the risk of damage to precision instruments.

[0111] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An ultra-wideband radio frequency switch matrix network, characterized in that, The system is based on EMR electromechanical relays to assemble RF coaxial switches, including an RF coaxial switch control unit, an RF coaxial switch unit, an external control unit, a switching power supply unit, an RF cable connection unit, and a power detection unit. The radio frequency coaxial switch unit has three sets of independent and physically isolated programmable signal input channels. The three sets of input channels support multiple radio frequency signals to be input to the product under test simultaneously and independently. The output side of the radio frequency coaxial switch unit is configured with a switch network for routing multiple product output signals to multiple test devices. The external control unit of the product integrates an FPGA control system. The FPGA control system is communicatively connected to the RF coaxial switch control unit and the power detection unit. It controls the on / off state of each electromechanical relay through programmable logic and adjusts the attenuation parameters of the test equipment according to the detection results of the power detection unit. The FPGA control system is configured to execute the integrated logic of the underlying physical layer control and the upper layer algorithm to realize test switching.

2. The ultra-wideband radio frequency switch matrix network according to claim 1, characterized in that, The topology of the three sets of programmable signal input channels includes: The first group consists of a single-pole four-throw switch and a single-pole six-throw switch cascaded together to form a four-input six-output structure, with one common terminal of the single-pole four-throw switch connected to the common terminal of the single-pole six-throw switch. The second group consists of a single-pole four-throw switch forming a single-input four-output structure; The third group consists of a single-pole double-throw switch forming a single-input dual-output structure; The three structures provide a total of 12 product-side input ports.

3. The ultra-wideband radio frequency switch matrix network according to claim 2, characterized in that, The 12 product-side input ports are divided into three groups: INA1 to INA6, INB1 to INB6, and INC1 to INC2, which correspond to the first, second, and third group topologies, respectively; the source signal-side access ports are S1 to S6.

4. The ultra-wideband radio frequency switch matrix network according to claim 1, characterized in that, The output-side switching network includes two sets of single-pole six-throw switches, a three-stage single-pole double-throw switch, and a set of single-pole four-throw switches; The common ports of the two sets of single-pole six-throw switches are respectively connected to the two input terminals of the first-stage single-pole double-throw switch. The common port of the first-stage single-pole double-throw switch is connected to the common terminal of the second-stage single-pole double-throw switch. The second input terminal of the second-stage single-pole double-throw switch is connected to the common terminal of another set of single-pole double-throw switches. The two ports of the other set of single-pole double-throw switches serve as output ports. The first input terminal of the second-stage single-pole double-throw switch is connected to the common terminal of the single-pole four-throw switch on the test equipment side, and the output port is connected to the test equipment as a signal output port.

5. The ultra-wideband radio frequency switch matrix network according to claim 1, characterized in that, The electromechanical relay is an EMR electromechanical relay, and the radio frequency cable connection unit adopts a semi-rigid coaxial cable with a full impedance matching of 50 ohms; the isolation between any adjacent channels in the three input channels is greater than 80dB, and the operating frequency covers DC to 50GHz.

6. The ultra-wideband radio frequency switch matrix network according to claim 1, characterized in that, The FPGA control system is configured as follows: Receive the switching command issued by the host computer and control the cascaded switches in the radio frequency coaxial switch unit to complete the path switching; After the switch switching action is completed, the switch engagement status signal is collected and sent back to the host computer to trigger the host computer to collect data. The power data of the output signal returned by the power detection unit is received, processed and converted into serial data and sent to the host computer. The host computer automatically sets the attenuation and bias parameters of the test equipment according to the received power data. The FPGA control system communicates with the external control unit of the product through internally configured linkage control signals.

7. The ultra-wideband radio frequency switch matrix network according to claim 1, characterized in that, The network interacts with the host computer via a serial communication protocol, and the feedback signal sent by the FPGA control system is used to eliminate the timing error caused by the data acquisition command being issued with a preset delay in the traditional test system.

8. A control method applicable to the ultra-wideband radio frequency switch matrix network as described in any one of claims 1 to 7, characterized in that, Includes the following steps: Obtain information on the type of product to be tested and a list of test items; The FPGA control system calls the preset switching logic according to the list of items under test, and programs the on / off combination of each stage of the RF coaxial switch unit to establish the transmission link from the source signal to the product under test. The source signal is synchronously sent to the corresponding input port of the product under test through three sets of independent input channels; The output signal of the product under test is routed to the corresponding test equipment port via the RF coaxial switch unit. The power of the signal output to the test equipment is transmitted back to the FPGA control system after passing through the power detection unit. The FPGA control system sends the processed power data to the host computer, which generates attenuation control commands and sends them to the test equipment to achieve adaptive adjustment of attenuation parameters for signals of different amplitudes. After the switch switching action is completed, the FPGA control system collects the switch engagement status signal and sends it back to the host computer. The host computer responds to the returned signal to trigger data acquisition and completes one-click automated testing.

9. The control method according to claim 8, characterized in that, Before and after the switching action is executed, the FPGA control system monitors the connection status and power of each channel in real time. When a channel fault or power abnormality is detected, the current channel is automatically disconnected and switched to the backup route, while an error code is reported to the host computer.

10. A control system, characterized in that, include: The ultra-wideband radio frequency switch matrix network as described in any one of claims 1 to 7; Source signal, used to provide radio frequency input signals to the source signal side access ports S1 to S6 of the ultra-wideband radio frequency switch matrix network; The test equipment is connected to the test equipment side ports E1 to E6 of the ultra-wideband RF switch matrix network, and adjusts its own attenuation parameters according to the attenuation control command. The host computer is connected to the FPGA control system and is used to issue test item lists and switching logic, and to perform data acquisition in response to the switch engagement state signal.

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