Depletion mode integrated circuit having logic circuit with input level shifter and n-channel push-pull output configuration

Abstract

The present application relates to depletion mode integrated circuits having logic circuits with input level shifters and n-channel totem pole output configurations. The logic circuits include an input stage and an output stage. The input stage includes an input level shifter including first and second resistors, and a set of one or more input n-channel depletion mode devices having respective gate, source, and drain terminals. The gate terminals of each input n-channel depletion mode device are configured as inputs to the logic circuit, the drain terminals of the input n-channel depletion mode devices are connected to a positive voltage source, and the source terminals of the input n-channel depletion mode devices are connected to a negative voltage source through the input level shifter. The output stage includes an output of the logic circuit, a third resistor, a first output n-channel depletion mode device, a second output n-channel depletion mode device, and a set of one or more diodes arranged in an n-channel totem pole output configuration.

Description

Technical Field

[0001] This disclosure generally relates to an integrated circuit, and a depletion-type integrated circuit having logic circuitry utilizing an input level shifter and an n-channel push-pull output configuration. Background Technology

[0002] A depletion-type integrated circuit is a circuit that is naturally in a conducting state (e.g., a conductive state) when no voltage is applied to its input terminals. Summary of the Invention

[0003] Embodiments of this disclosure provide an integrated circuit comprising: a logic circuit including an input stage and an output stage, wherein: the input stage includes: a positive voltage source; a negative voltage source; an input level shifter including a first resistor and a second resistor; a group of one or more input n-channel depletion-type devices having respective gate terminals, source terminals, and drain terminals, wherein, for each input n-channel depletion-type device: the gate terminal of the input n-channel depletion-type device is configured as an input terminal of the logic circuit, the drain terminal of the input n-channel depletion-type device is connected to the positive voltage source, and the source terminal of the input n-channel depletion-type device is connected to the negative voltage source via the input level shifter; and the output stage includes: an output terminal of the logic circuit; a third resistor; a first output n-channel depletion-type device; a second output n-channel depletion-type device; and a group of one or more diodes, wherein the output terminal, the third resistor, the first output n-channel depletion-type device, the second output n-channel depletion-type device, and the group of one or more diodes are arranged in an n-channel push-pull output configuration.

[0004] Another embodiment of this disclosure provides an integrated circuit comprising: a logic circuit including an input stage and an output stage, wherein: the input stage includes: an input level shifter including a first resistor and a second resistor; a group of one or more input n-channel depletion-type devices having respective gate terminals, source terminals and drain terminals, wherein, for each input n-channel depletion-type device: the gate terminal of the input n-channel depletion-type device is configured as an input terminal of the logic circuit, the drain terminal of the input n-channel depletion-type device is connected to a positive voltage source, and the source terminal of the input n-channel depletion-type device is connected to a negative voltage source via the input level shifter; and the output stage includes an output terminal of the logic circuit arranged in an n-channel push-pull output configuration, a third resistor, a first output n-channel depletion-type device, a second output n-channel depletion-type device, and a group of one or more diodes.

[0005] Another embodiment of the present invention provides a logic circuit comprising: an input level shifter including a first resistor and a second resistor; a group of one or more input n-channel depletion-type devices having respective gate terminals, source terminals, and drain terminals, wherein, for each input n-channel depletion-type device: the gate terminal of the input n-channel depletion-type device is configured as an input terminal of the logic circuit, the drain terminal of the input n-channel depletion-type device is connected to a positive voltage source, and the source terminal of the input n-channel depletion-type device is connected to a negative voltage source via the input level shifter; and an output terminal of the logic circuit arranged in an n-channel push-pull output configuration, a third resistor, a first output n-channel depletion-type device, a second output n-channel depletion-type device, and a group of one or more diodes.

[0006] The features, functions and advantages described herein may be implemented independently in various embodiments or in combination in other embodiments, further details of which are shown in the accompanying drawings and described below. Attached Figure Description

[0007] Figures 1A-1C This is an illustration of an exemplary embodiment associated with a depletion-type integrated circuit having logic circuitry configured with an input level shifter and an n-channel push-pull output.

[0008] Figure 2 This is an illustration of an exemplary embodiment associated with a depletion-type integrated circuit having logic circuitry configured with an input level shifter and an n-channel push-pull output. Detailed Implementation

[0009] The following detailed description of exemplary embodiments is with reference to the accompanying drawings. The same reference numerals in different drawings denote the same or similar elements.

[0010] Depletion-type integrated circuits typically support single-channel devices, whether p-channel or n-channel. This constraint makes designing and implementing depletion-type logic circuits challenging, as conventional logic circuits often combine both p-channel and n-channel devices to achieve efficient switching and logic functions.

[0011] When logic circuits rely solely on single-channel depletion-mode devices, the output stage typically requires additional circuitry, such as a load resistor, to generate the appropriate output voltage. However, the presence of such a resistor can introduce several limitations. Resistors may limit the available current, reducing the logic circuit's ability to drive multiple subsequent logic circuits, thus impacting fan-out performance. Furthermore, resistors may create inherent delays (e.g., resistor-capacitor (RC) delays), which slow the logic circuit's ability to transition between logic states, thereby limiting the overall switching speed of the logic circuit. Additionally, because resistors continuously dissipate power even when the logic circuit is not actively switched, they reduce power efficiency and lead to unnecessary energy consumption and heat generation. These factors make depletion-mode logic circuits with output load resistors less practical for high-speed, low-power, or highly integrated applications.

[0012] Some embodiments described herein include an integrated circuit comprising logic circuitry including an input stage and an output stage. The input stage includes a set of one or more single-channel type input depletion-type devices (e.g., one or more input n-channel depletion-type devices), an input level shifter including a first resistor and a second resistor, a first voltage source (e.g., a positive voltage source), and a second voltage source (e.g., a negative voltage source). Each input depletion-type device includes a gate terminal configured as an input to the logic circuitry, a drain terminal connected to the first voltage source, and a source terminal connected to the second voltage source via the input level shifter. The output stage includes an output of the logic circuitry, a third resistor, a single-channel type first output depletion-type device (e.g., a first output n-channel depletion-type device), a single-channel type second output depletion-type device (e.g., a second output n-channel depletion-type device), and a set of one or more diodes. The output of the output stage, the third resistor, the first output depletion-type device, the second output depletion-type device, and the set of one or more diodes are arranged in a single-channel type push-pull output configuration (e.g., an n-channel push-pull output configuration).

[0013] Some of the embodiments described herein utilize depletion-mode technologies, such as gallium nitride (GaN), gallium arsenide (GaAs), and other wide-bandgap semiconductors, to implement integrated circuits incorporating the aforementioned logic circuitry. These materials are particularly well-suited for high-temperature and high-radiation environments, such as those encountered by hypersonic vehicles, satellites, or other equipment or vehicles configured for heat- or radiation-intensive applications, where conventional silicon-based circuits struggle to operate reliably. Furthermore, the logic circuitry design allows for the direct integration of digital and existing analog circuitry within wide-bandgap semiconductor technologies, such as GaN-based platforms. This capability enables the development of monolithic integrated systems, reducing size and weight in applications requiring compact, high-performance electronics, such as phased array antennas and active electronically steered apertures (AESA).

[0014] Furthermore, the logic circuitry incorporates an input level shifter consisting of first and second resistors within the logic function of the input stage, thereby providing an appropriate voltage level for the output stage. The logic circuitry also includes a push-pull output configuration, which improves power efficiency, increases fan-out capability, and enhances speed and bandwidth by using active devices instead of relying on resistors to drive the rise or fall of the output voltage. This design provides stronger output drive for a given DC power supply, resulting in higher overall performance.

[0015] Furthermore, by removing the resistive load in the output stage of the logic circuit, idle current dissipation is reduced, enabling the logic circuit to drive multiple subsequent logic circuits without performance degradation. Additionally, reducing the inherent resistor delay in the output stage allows for faster logic transitions and improved power efficiency. This makes it possible to design and integrate complex digital circuits, including computer processing units (CPUs) and memory architectures, which can contain tens, hundreds, thousands, or even thousands of logic circuits using the described logic circuit configuration. Notably, the logic circuit configuration is also suitable for use with discrete components outside of integrated circuit environments, providing greater design flexibility.

[0016] Figures 1A-1C This is an illustration of an exemplary embodiment 100 associated with a depletion-type integrated circuit having logic circuitry utilizing an input level shifter and an n-channel push-pull output configuration. (See illustration for further details.) Figures 1A-1C As shown, the exemplary embodiment 100 includes a logic circuit 102, which includes an input stage 104 and an output stage 106.

[0017] Logic circuit 102 is a depletion-mode logic circuit, such as a GaN logic circuit or a GaAs logic circuit. In some embodiments, logic circuit 102 is configured as an inverting logic circuit. For example, Figure 1AThe configuration of logic circuit 102 as a "NOT" logic circuit is shown. Figure 1B The configuration of logic circuit 102 as a "NOR" logic circuit is shown, and Figure 1C The configuration of logic circuit 102 as a "NAND" logic circuit is shown.

[0018] like Figures 1A-1C As shown, the input stage 104 of logic circuit 102 includes a first voltage source 108 (shown as a positive voltage source) and a second voltage source 110 (shown as a negative voltage source). Input stage 104 also includes an input level shifter 112 comprising a first resistor 114 and a second resistor 116, a set of one or more input n-channel depletion-type devices 118, and one or more input terminals 120 (e.g., one or more input terminals of logic circuit 102). Output stage 106 includes an output terminal 122 (e.g., an output terminal of logic circuit 102), a third resistor 124, a first output n-channel depletion-type device 126, a second output n-channel depletion-type device 128, and a set of one or more diodes 130.

[0019] The first voltage source 108 and the second voltage source 110 can be high-voltage voltage sources. That is, the magnitude of the voltage of each of the first voltage source 108 and the second voltage source 110 can be greater than or equal to a voltage threshold, such as 4 volts (V), to enable fast switching and driving of the logic circuit 102 and to provide sufficient negative gate-to-source voltage (V_GS) to turn off one or more input n-channel depletion-type devices 118. Additionally or alternatively, the voltages of the first voltage source 108 and the second voltage source 110 can have equal magnitudes and opposite polarities. For example, as Figures 1A-1C As shown, the first voltage source 108 can provide a positive voltage source of 16V, and the second voltage source 110 can provide a negative voltage source of -16V.

[0020] Input level shifter 112 is configured to provide level shifting (e.g., shifting a high voltage down or a low voltage up) and / or voltage scaling or biasing within input stage 104 of logic circuit 102, such as to achieve a suitable voltage for the second output n-channel depletion-type device 128 of output stage 106. For example, first resistor 114 and second resistor 116 may be configured to have specific resistances such that the voltage is shifted to the available voltage range for the second output n-channel depletion-type device 128 of output stage 106 (e.g., for the gate of the second output n-channel depletion-type device 128). In some embodiments, first resistor 114 and second resistor 116 may have equal resistances, and optionally, first resistor 114, second resistor 116, and third resistor 124 may have equal resistances.

[0021] A group of one or more input n-channel depletion-type devices 118 includes, for example, one or more n-channel junction field-effect transistors (JFETs), one or more n-channel metal-semiconductor field-effect transistors (MESFETs), one or more n-channel high electron mobility transistors (HEMTs), one or more n-channel modulation-doped field-effect transistors (MODFETs), one or more n-channel pseudo-high electron mobility transistors (pHEMTs), and / or one or more other types of n-channel devices (including epitaxially grown n-channel devices). Therefore, a group of one or more input n-channel depletion-type devices 118 has a corresponding gate terminal, source terminal, and drain terminal. In some embodiments, for each input n-channel depletion-type device 118, the gate terminal of the input n-channel depletion-type device 118 is configured as an input terminal 120 of logic circuit 102, the drain terminal of the input n-channel depletion-type device 108 is connected to a first voltage source 108, and the source terminal of the input n-channel depletion-type device 118 (e.g., via an input level shifter 112) is connected to a second voltage source.

[0022] The configuration of one or more input n-channel depletion-type devices 118 determines a specific type of inverting logic circuit implemented by logic circuit 102. For example, as Figure 1A As shown, a group of one or more input n-channel depletion-type devices 118 includes a single-input n-channel depletion-type device 118, wherein the gate terminal of the input n-channel depletion-type device is configured as a single input 120 of logic circuit 102, the drain terminal of the input n-channel depletion-type device 118 is connected to a first voltage source 108, and the source terminal of the input n-channel depletion-type device 118 (e.g., via input level shifter 112) is connected to a second voltage source 110. Thus, logic circuit 102 is configured as a "NOT" logic circuit, as further described herein. As another example, such as Figure 1B As shown, a group of one or more input n-channel depletion-type devices 118 includes a plurality of input n-channel depletion-type devices 118 (shown as n-channel depletion-type devices 118-1 to 118-M) configured in parallel, wherein the respective gate terminals of the plurality of input n-channel depletion-type devices 118 are configured as input terminals 120 (shown as input terminals 120-1 to 120-M) of logic circuit 102, the respective drain terminals of the plurality of input n-channel depletion-type devices 118 are connected to a first voltage source 108, and the respective source terminals of the plurality of input n-channel depletion-type devices 118 (e.g., via input level shifter 112) are connected to a second voltage source 110. Thus, logic circuit 102 is configured as a "NOR" logic circuit, as further described herein. In another example, as... Figure 1CAs shown, a group of one or more input n-channel depletion-type devices 118 includes a plurality of input n-channel depletion-type devices 118 (shown as n-channel depletion-type devices 118-1 to 118-N) configured in series, wherein the respective gate terminals of the plurality of input n-channel depletion-type devices 118 are configured as input terminals 120 (shown as input terminals 120-1 to 120-N) of logic circuit 102, the respective drain terminals of the plurality of input n-channel depletion-type devices 118 are connected to a first voltage source 108, and the respective source terminals of the plurality of input n-channel depletion-type devices 118 (e.g., via input level shifter 112) are connected to a second voltage source 110. Thus, logic circuit 102 is configured as a NAND logic circuit, as further described herein.

[0023] like Figures 1A-1C As further shown, the output terminal 122 of the output stage 106, the third resistor 124, the first output n-channel depletion-type device 126, the second output n-channel depletion-type device 128, and a group of one or more diodes 130 are arranged in an n-channel push-pull output configuration. For example, the first output n-channel depletion-type device 126 has a first gate terminal, a first drain terminal, and a first source terminal, and the second output n-channel depletion-type device 128 has a second gate terminal, a second drain terminal, and a second source terminal. The first gate terminal of the first output n-channel depletion-type device 126 is connected via the third resistor 124 to the first voltage source 108, the drain terminal of a group of one or more input n-channel depletion-type devices 118, and the first drain terminal of the first output n-channel depletion-type device 126. The first drain terminal of the first output n-channel depletion-type device 126 is also connected to the first voltage source 108 and the drain terminals of a group of one or more input n-channel depletion-type devices 118. The first source terminal of the first output n-channel depletion-type device 126 is connected to output terminal 122 and to the second drain terminal of the second output n-channel depletion-type device 128 via a set of one or more diodes 130 (configured to provide a voltage drop). The second gate terminal of the second output n-channel depletion-type device 128 is connected to input level shifter 112. The second drain terminal of the second output n-channel depletion-type device 128 is also connected to the first gate terminal of the first output n-channel depletion-type device 126. The second source terminal of the second output n-channel depletion-type device 128 is connected to ground 132.

[0024] Therefore, input stage 104 and output stage 106 make logic circuit 102 an inverting logic circuit. Figure 1AA logic circuit 102 is shown as a NOT logic circuit, in which a signal at input 120 is inverted at output 122. For example, a signal with a logic value of 1 (or "high") at input 120 (e.g., an input signal voltage of 0 V) ​​is inverted at output 122 to have a logic value of 0 (or "low") (e.g., a negative voltage), and a signal with a logic value of 0 (or "low") at input 120 (e.g., a negative voltage sufficient to close the input n-channel depletion-type device 118) is inverted to have a logic value of 1 (or "high") (e.g., a 0 V voltage). Figure 1B A logic circuit 102 is shown as a "NOR" logic circuit, wherein the signal at the output terminal 122 has a logic value of 0 (or "low") when one or more of the M signals at input terminals 120-1 to 120-M have a logic value of 1 (or "high"), and the signal at the output terminal 122 has a logic value of 1 (or "high") when all M signals at input terminals 120-1 to 120-M have a logic value of 0 (or "low"). Figure 1C A logic circuit 102 is shown as a NAND logic circuit, wherein the signal at the output terminal 122 has a logic value of 1 (or "high") when one or more of the N signals at input terminals 120-1 to 120-N have a logic value of 0 (or "low"), and the signal at the output terminal 122 has a logic value of 0 (or "low") when all N signals at input terminals 120-1 to 120-N have a logic value of 1 (or "high").

[0025] Input stage 104 is configured to perform an inversion function (e.g., "NOT", "NOR", or "NAND"), and output stage 106 is configured to provide output drive (e.g., push or pull logic output at output 122). For example, an input at one or more inputs at 120 can activate (e.g., close) a set of one or more input n-channel depletion-type devices 118, such as when Figure 1A When the signal at input terminal 120 has a logic value of 1 (or "high"), when Figure 1BWhen one or more of the M signals at inputs 120-1 to 120-M have a logic value of 1 (or "high"), or when all N signals at inputs 120-1 to 120-N have a logic value of 1 (or "high"), this connects the first voltage source 108 to the second voltage source 110, causing the voltage supplied to the second gate terminal of the second output n-channel depletion-type device 128 due to the input level shifter 112 to correspond to a logic value of 1 (or "high"). This activates (e.g., closes) the second output n-channel depletion-type device 128, and thus the second output n-channel depletion-type device 128 pulls the signal at output 122 to have a logic value of 0 (or "low"). As another example, an input at one or more inputs 120 can deactivate (e.g., open) a set of one or more input n-channel depletion-type devices 118, such as when Figure 1A When the signal at input terminal 120 has a logic value of 0 (or "low"), when Figure 1B When all M signals at input terminals 120-1 to 120-M have a logic value of 0 (or "low"), or when Figure 1C When one or more of the N signals at input terminals 120-1 to 120-N have a logic value of 0 (or "low"), this causes the first voltage source 108 to be disconnected from the second voltage source 110. This causes the voltage supplied to the second gate terminal of the second output n-channel depletion-type device 128 due to the input level shifter 112 to correspond to a logic value of 0 (or "low"). This causes the second output n-channel depletion-type device 128 to be inactive (e.g., disconnected), and therefore the first output n-channel depletion-type device 126 pushes the signal at output terminal 122 to have a logic value of 1 (or "high").

[0026] Although Figures 1A-1C The corresponding description describes logic circuit 102 as an n-channel depletion-type logic circuit, but this logic circuit can also be implemented as a p-channel depletion-type logic circuit. For example, logic circuit 102 may include a set of one or more input p-channel depletion-type devices 118 (instead of a set of one or more input n-channel depletion-type devices 118), a first output p-channel depletion-type device 126 (instead of a first output n-channel depletion-type device 126), and a second output p-channel depletion-type device 128 (instead of a second output n-channel depletion-type device 128). Furthermore, the polarities of the first voltage source 108 and the second voltage source 110 can be reversed (e.g., making the first voltage source 107 a negative voltage source and the second voltage source 110 a positive voltage source), and the directions of a set of one or more diodes 130 can be reversed. Therefore, in some embodiments, logic circuit 102 may be a single-channel type depletion-type logic circuit.

[0027] As mentioned above, Figures 1A-1CProvided as an example only. Other examples may be provided. Figures 1A-1C The descriptions differ from those in the text.

[0028] Figure 2 This is an illustration of an exemplary embodiment 200 associated with a depletion-type integrated circuit having logic circuitry configured with an input level shifter and an n-channel push-pull output.

[0029] like Figure 2 As shown, exemplary embodiment 200 includes an integrated circuit 202, which includes a plurality of logic circuits 102. The integrated circuit 202 is a depletion-mode integrated circuit, such as a GaN integrated circuit or a GaAs integrated circuit.

[0030] like Figure 2 As shown, multiple logic circuits 102 are positioned in a fan-out configuration (e.g., a first-stage logic circuit including logic circuit 102-1 provides outputs to a second-stage logic circuit including logic circuits 102-2-1 to 102-2-K, the second-stage logic circuit provides outputs to a third-stage logic circuit including logic circuits 102-2-1 to 102-2-K, and so on). The fan-out configuration is feasible because within each logic circuit 102, an input level shifter 112 is included within an input stage 104, and the components of the output stage 106 are arranged in an n-channel push-pull output configuration. Therefore, resistive loads are eliminated from the output stage of each logic circuit 102, allowing each logic circuit 102 to drive multiple subsequent logic circuits without degrading performance.

[0031] As mentioned above, Figure 2 Provided as an example. Other examples may be provided. Figure 2 The descriptions differ.

[0032] The foregoing disclosure provides illustrations and descriptions, but is not intended to be exhaustive or to limit the embodiments described herein to their precise forms. Modifications and variations can be made based on the foregoing descriptions, or modifications and variations can be obtained from the practice of the embodiments described herein.

[0033] As used in this article, depending on the context, satisfying the threshold can mean that the value is greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, not equal to the threshold, etc.

[0034] Even if a particular combination of features is referenced in the claims and / or described in the specification, such combinations are not intended to limit the embodiments described herein. In fact, many of these features can be combined in ways not specifically referenced in the claims and / or described in the specification. For example, the description includes combinations of each dependent claim with each other claim in the claim set. As used herein, the phrase “at least one” in the list of items refers to any combination of these items, including individual elements. As an example, “at least one of a, b, or c” is intended to cover any combination of a, b, c, ab, ac, bc, and abc, as well as multiple combinations of the same item.

[0035] Unless explicitly stated otherwise, no element, action, or instruction used herein should be construed as critical or necessary. Furthermore, as used herein, the articles “a” and “one” are intended to include one or more items and may be used interchangeably with “one or more.” Additionally, as used herein, the article “described” is intended to include one or more items referenced in connection with the article “described” and may be used interchangeably with “one or more.” Furthermore, as used herein, the term “a group” is intended to include one or more items (e.g., related items, unrelated items, or a combination of related and unrelated items) and may be used interchangeably with “one or more.” The phrase “only one” or similar expression is used when the intent is to refer to only one item. Similarly, as used herein, words such as “have,” “have,” and “contain” are intended as open-ended expressions. Furthermore, the phrase “based on” is intended to mean “at least partially based on” unless explicitly stated otherwise. Likewise, as used herein, the term “or” is intended to be inclusive when used in parallel and may be used interchangeably with “and / or” unless explicitly stated otherwise (e.g., when used in conjunction with “either” or “only one of them”).

[0036] Example 1. An integrated circuit (202) comprising: Logic circuit (102), which includes an input stage (104) and an output stage (106), wherein: The input stage (104) includes: Positive voltage source (108); Negative voltage source (110); The input level shifter (112) includes a first resistor (114) and a second resistor (116). A group of one or more n-channel depletion-type devices (118) having respective gate terminals, source terminals, and drain terminals, wherein, for each n-channel depletion-type device (18): The gate terminal of the n-channel depletion-type device (118) is configured as the input terminal (120) of the logic circuit (102). The drain terminal of the input n-channel depletion-type device (118) is connected to the positive voltage source (108), and The source terminal of the input n-channel depletion-mode device (118) is connected to the negative voltage source via the input level shifter (112); and The output stage (106) includes: The output terminal (122) of the logic circuit (102); Third resistor (124); First n-channel depletion-type device (126); The second output n-channel depletion-type device (128); and A group of one or more diodes (130), wherein: The output terminal (122), the third resistor (124), the first output n-channel depletion device (126), the second output n-channel depletion device (128), and the group of one or more diodes (130) are arranged in an n-channel push-pull output configuration.

[0037] Example 2. According to the integrated circuit (202) of Example 1, wherein, in the n-channel push-pull output configuration, the first output n-channel depletion-type device (126) has a first gate terminal, a first drain terminal, and a first source terminal, and the second output n-channel depletion-type device (128) has a second gate terminal, a second drain terminal, and a second source terminal, wherein: The first gate terminal of the first output n-channel depletion-type device (126) is connected to the positive voltage source (108), the drain terminal of the group of one or more input n-channel depletion-type devices (118), and the first drain terminal of the first output n-channel depletion-type device (126) via the third resistor (124); The first drain terminal of the first output n-channel depletion-type device (126) is also connected to the positive voltage source (108) and the drain terminal of the group of one or more input n-channel depletion-type devices (118); The first source terminal of the first output n-channel depletion-type device (126) is connected to the output terminal (122) and is connected to the second drain terminal of the second output n-channel depletion-type device (128) through the set of one or more diodes (130); The second gate terminal of the second output n-channel depletion-type device (128) is connected to the input level shifter (112). The second drain terminal of the second output n-channel depletion-type device (128) is also connected to the first gate terminal of the first output n-channel depletion-type device (126); and The second source terminal of the second output n-channel depletion-type device (128) is connected to ground (132).

[0038] Example 3. The integrated circuit (202) according to Example 1, wherein the integrated circuit (202) is a gallium nitride (GaN) integrated circuit.

[0039] Example 4. The integrated circuit (202) according to Example 1, wherein the integrated circuit (202) is a depletion-type integrated circuit.

[0040] Example 5. The integrated circuit (202) according to Example 1, wherein the group of one or more input n-channel depletion-type devices (118) includes a single input n-channel depletion-type device, and the logic circuit (102) is configured as a "NOT" logic circuit.

[0041] Example 6. The integrated circuit (202) according to Example 1, wherein the group of one or more input n-channel depletion-type devices (118) includes a plurality of input n-channel depletion-type devices configured in series, and the logic circuit (102) is configured as a "NAND" logic circuit.

[0042] Example 7. The integrated circuit (202) according to Example 1, wherein the group of one or more input n-channel depletion-type devices (118) includes a plurality of input n-channel depletion-type devices configured in parallel, and the logic circuit (102) is configured as a "NOR" logic circuit.

[0043] Example 8. The integrated circuit (202) according to Example 1, wherein the voltages of the positive voltage source (108) and the negative voltage source (110) have equal magnitudes and opposite polarities.

[0044] Example 9. The integrated circuit (202) according to Example 1, wherein the first resistor (114), the second resistor (116) and the third resistor (124) have equal resistance.

[0045] Example 10. An integrated circuit (202) comprising: Logic circuit (102), which includes an input stage (104) and an output stage (106), wherein: The input stage (104) includes: The input level shifter (112) includes a first resistor (114) and a second resistor (116). A group of one or more input n-channel depletion-type devices (118) having respective gate terminals, source terminals, and drain terminals, wherein, for each input n-channel depletion-type device (118): The gate terminal of the input n-channel depletion-type device (118) is configured as the input terminal (120) of the logic circuit (102). The drain terminal of the input n-channel depletion-mode device (118) is connected to a positive voltage source (108), and The source terminal of the input n-channel depletion-type device (118) is connected to the negative voltage source (110) via the input level shifter (112); and The output stage (106) includes the output terminal (122) of the logic circuit (102) arranged in an n-channel push-pull output configuration, a third resistor (124), a first n-channel depletion device (126), a second output n-channel depletion device (128), and a set of one or more diodes (130).

[0046] Example 11. The integrated circuit (202) according to Example 10, wherein: The first gate terminal of the first output n-channel depletion-type device (126) is connected to the positive voltage source (108), the drain terminal of the group of one or more input n-channel depletion-type devices (118), and the first drain terminal of the first output n-channel depletion-type device (126) through the third resistor (124); The first drain terminal of the first output n-channel depletion-type device (126) is also connected to the positive voltage source (108) and the drain terminal of the group of one or more input n-channel depletion-type devices (118); The first source terminal of the first output n-channel depletion-type device (126) is connected to the output terminal (122) and is connected to the second drain terminal of the second output n-channel depletion-type device (128) through the set of one or more diodes (130); The second gate terminal of the second output n-channel depletion-type device (128) is connected to the input level shifter (112). The second drain terminal of the second output n-channel depletion-type device (128) is also connected to the first gate terminal of the first output n-channel depletion-type device (126); and The second source terminal of the second output n-channel depletion-type device (128) is connected to ground (132).

[0047] Example 12. The integrated circuit (202) according to Example 10, wherein the integrated circuit (202) is a gallium nitride (GaN) integrated circuit.

[0048] Example 13. The integrated circuit (202) according to Example 10, wherein the integrated circuit (202) is a depletion-type integrated circuit.

[0049] Example 14. The integrated circuit (202) according to Example 10, wherein the group of one or more input n-channel depletion-type devices (118) includes a single input n-channel depletion-type device, and the logic circuit (102) is configured as a "NOT" logic circuit.

[0050] Example 15. The integrated circuit (202) according to Example 10, wherein the group of one or more input n-channel depletion-type devices (118) includes a plurality of input n-channel depletion-type devices configured in series, and the logic circuit (102) is configured as a "NAND" logic circuit.

[0051] Example 16. The integrated circuit (202) according to Example 10, wherein the group of one or more input n-channel depletion-type devices (118) includes a plurality of input n-channel depletion-type devices configured in parallel, and the logic circuit (102) is configured as a "NOR" logic circuit.

[0052] Example 17. A logic circuit (102) comprising: The input level shifter (112) includes a first resistor (114) and a second resistor (116). A group of one or more input n-channel depletion-type devices (118) having respective gate terminals, source terminals, and drain terminals, wherein, for each input n-channel depletion-type device (118): The gate terminal of the input n-channel depletion-type device (118) is configured as the input terminal (120) of the logic circuit (102). The drain terminal of the input n-channel depletion-mode device (118) is connected to a positive voltage source (108), and The source terminal of the input n-channel depletion-mode device is connected to a negative voltage source (110) via the input level shifter (112); and The logic circuit (102) arranged in an n-channel push-pull output configuration includes an output terminal (122), a third resistor (124), a first output n-channel depletion device (126), a second output n-channel depletion device (128), and a set of one or more diodes (130).

[0053] Example 18. According to the logic circuit (102) described in Example 17, wherein: The first gate terminal of the first output n-channel depletion-type device (126) is connected to the positive voltage source (108), the drain terminal of the group of one or more input n-channel depletion-type devices (118), and the first drain terminal of the first output n-channel depletion-type device (126) through the third resistor (124); The first drain terminal of the first output n-channel depletion-type device (126) is also connected to the positive voltage source (108) and the drain terminal of the group of one or more input n-channel depletion-type devices (118); The first source terminal of the first output n-channel depletion-type device (126) is connected to the output terminal (122) and is connected to the second drain terminal of the second output n-channel depletion-type device (128) through the set of one or more diodes (130); The second gate terminal of the second output n-channel depletion-type device (128) is connected to the input level shifter (112). The second drain terminal of the second output n-channel depletion-type device (128) is also connected to the first gate terminal of the first output n-channel depletion-type device (126); and The second source terminal of the second output n-channel depletion-type device (128) is connected to ground (132).

[0054] Example 19. The logic circuit (102) according to Example 17, wherein the logic circuit (102) is a depletion-type logic circuit.

[0055] Example 20. The logic circuit (102) according to Example 17, wherein the logic circuit (102) is configured as an inverting logic circuit.

Claims

1. An integrated circuit (202) comprising: Logic circuit (102), which includes an input stage (104) and an output stage (106), wherein: The input stage (104) includes: Positive voltage source (108); Negative voltage source (110); The input level shifter (112) includes a first resistor (114) and a second resistor (116). A group of one or more n-channel depletion-type devices (118) having respective gate terminals, source terminals, and drain terminals, wherein, for each n-channel depletion-type device (18): The gate terminal of the n-channel depletion-type device (118) is configured as the input terminal (120) of the logic circuit (102). The drain terminal of the input n-channel depletion-mode device (118) is connected to the positive voltage source (108), and The source terminal of the input n-channel depletion-mode device (118) is connected to the negative voltage source via the input level shifter (112); and The output stage (106) includes: The output terminal (122) of the logic circuit (102); Third resistor (124); First n-channel depletion-type device (126); The second output n-channel depletion-type device (128); and A group of one or more diodes (130), wherein: The output terminal (122), the third resistor (124), the first output n-channel depletion device (126), the second output n-channel depletion device (128), and the group of one or more diodes (130) are arranged in an n-channel push-pull output configuration.

2. The integrated circuit (202) according to claim 1, wherein, In the n-channel push-pull output configuration, the first output n-channel depletion-type device (126) has a first gate terminal, a first drain terminal, and a first source terminal, and the second output n-channel depletion-type device (128) has a second gate terminal, a second drain terminal, and a second source terminal, wherein: The first gate terminal of the first output n-channel depletion-type device (126) is connected to the positive voltage source (108), the drain terminal of the group of one or more input n-channel depletion-type devices (118), and the first drain terminal of the first output n-channel depletion-type device (126) via the third resistor (124); The first drain terminal of the first output n-channel depletion-type device (126) is also connected to the positive voltage source (108) and the drain terminal of the group of one or more input n-channel depletion-type devices (118); The first source terminal of the first output n-channel depletion-type device (126) is connected to the output terminal (122) and is connected to the second drain terminal of the second output n-channel depletion-type device (128) through the set of one or more diodes (130); The second gate terminal of the second output n-channel depletion-type device (128) is connected to the input level shifter (112). The second drain terminal of the second output n-channel depletion-type device (128) is also connected to the first gate terminal of the first output n-channel depletion-type device (126); and The second source terminal of the second output n-channel depletion-type device (128) is connected to ground (132).

3. The integrated circuit (202) according to claim 1, wherein the integrated circuit (202) is a gallium nitride (GaN) integrated circuit.

4. The integrated circuit (202) according to claim 1, wherein the integrated circuit (202) is a depletion-type integrated circuit.

5. The integrated circuit (202) of claim 1, wherein the group of one or more input n-channel depletion-type devices (118) includes a single input n-channel depletion-type device, and the logic circuit (102) is configured as a "NOT" logic circuit.

6. The integrated circuit (202) of claim 1, wherein the group of one or more input n-channel depletion-type devices (118) comprises a plurality of input n-channel depletion-type devices configured in series, and the logic circuit (102) is configured as a "NAND" logic circuit.

7. The integrated circuit (202) of claim 1, wherein the group of one or more input n-channel depletion-type devices (118) comprises a plurality of input n-channel depletion-type devices configured in parallel, and the logic circuit (102) is configured as a "NOR" logic circuit.

8. The integrated circuit (202) according to claim 1, wherein the voltages of the positive voltage source (108) and the negative voltage source (110) have equal magnitudes and opposite polarities.

9. The integrated circuit (202) according to claim 1, wherein the first resistor (114), the second resistor (116) and the third resistor (124) have equal resistance.

10. An integrated circuit (202) comprising: Logic circuit (102), which includes an input stage (104) and an output stage (106), wherein: The input stage (104) includes: The input level shifter (112) includes a first resistor (114) and a second resistor (116). A group of one or more input n-channel depletion-type devices (118) having respective gate terminals, source terminals, and drain terminals, wherein, for each input n-channel depletion-type device (118): The gate terminal of the input n-channel depletion-type device (118) is configured as the input terminal (120) of the logic circuit (102). The drain terminal of the input n-channel depletion-mode device (118) is connected to a positive voltage source (108), and The source terminal of the input n-channel depletion-type device (118) is connected to the negative voltage source (110) via the input level shifter (112); and The output stage (106) includes the output terminal (122) of the logic circuit (102) arranged in an n-channel push-pull output configuration, a third resistor (124), a first n-channel depletion device (126), a second output n-channel depletion device (128), and a set of one or more diodes (130).

Images