A navigation, guidance and control integrated system suitable for satellites

Abstract

The application relates to the technical field of satellite-borne integrated electronic systems, and provides a satellite-oriented integrated system of command, control and navigation, which comprises a real-time control domain, which executes strong real-time communication protocol processing, navigation solution, sensing data preprocessing and control instruction generation; an intelligent computing domain, which executes multi-source data fusion and intelligent reasoning and has out-of-band monitoring and fault disposal capacity independent of the intelligent computing domain operation; a radio frequency front end, which completes radio frequency signal receiving, transmitting and transceiver link time delay calibration; a chip-level atomic clock, which is connected with the real-time control domain and provides a frequency reference and a second synchronization signal; a communication antenna, which is connected with the radio frequency front end; the real-time control domain and the intelligent computing domain are connected through a high-speed data interface; the radio frequency front end obtains link time delay parameters through a calibration channel; the link time delay parameters are associated with the time reference provided by the chip-level atomic clock; and the out-of-band monitoring and fault disposal capacity of the intelligent computing domain is independent of the system main data bus operation.

Description

Technical Field

[0001] This invention relates to the technical field of integrated spaceborne electronic systems, and more particularly to an integrated communication, navigation, and control system suitable for satellites. This system is a lightweight, compact spaceborne unit that integrates communication, navigation, inter-satellite measurement, control, intelligent computing, timing synchronization, and on-orbit safety assurance into a single unit, suitable for microsatellites and satellite constellations. A satellite constellation refers to a satellite node that utilizes a lightweight, compact satellite platform and achieves distributed sensing, information exchange, and mission coordination through multi-satellite collaborative networking. Background Technology

[0002] With the development of microsatellite technology, BeeStar achieves distributed sensing, information exchange, and mission coordination through multi-satellite collaborative networking. Compared to a single large satellite, BeeStar nodes are characterized by their small size, distributed nature, and mission reconfigurability. However, this also requires each satellite to simultaneously undertake tasks such as communication, navigation, relative measurement, attitude or orbit control, payload data processing, and autonomous decision-making within limited size, weight, and power consumption.

[0003] Existing lightweight satellites typically separate communication baseband, navigation calculation, onboard computer, radio frequency front-end, and intelligent acceleration functions onto different boards, each with its own processor, memory, power supply, and interfaces. This discrete approach easily leads to redundant resource configuration and increases the number of connectors, cables, and backplane interconnects, resulting in problems such as increased structural weight, signal transmission delay, communication jitter, and an increase in potential points of failure.

[0004] Furthermore, communication, navigation, and control results are typically generated and maintained by different devices using independent time bases, making it difficult to uniformly process communication link delays, navigation measurement delays, and control command delays under the same time coordinate. In inter-satellite relative measurements, cooperative positioning, and distributed control within satellite constellations, inconsistent time bases reduce measurement consistency and the real-time performance of closed-loop control.

[0005] On the other hand, tasks such as image recognition, multi-source data fusion, autonomous task planning, and intelligent decision-making place higher demands on computing power. Directly using high-performance or AI processors will face risks such as space irradiation, single-event effects, power supply failures, program crashes, and memory flips; without independent monitoring and fault isolation, anomalies may spread to other functional domains via shared power, buses, or interfaces.

[0006] Therefore, an integrated communication, navigation, and control system is needed to achieve hierarchical collaboration of communication, navigation, control, and computing under limited resource conditions. At the same time, the system's real-time performance, measurement consistency, and on-orbit continuous operation capability should be guaranteed through unified time base, transceiver link calibration, and independent safety monitoring. Summary of the Invention

[0007] This invention aims to address issues in existing technologies such as functional separation, resource duplication, large closed-loop latency in communication, control, and guidance, inconsistent latency between communication and measurement links, contention between real-time control and complex intelligent computing, and the lack of independent on-orbit safety guarantees for high-performance chips. The system adopts a core processing-computing power extension layered collaborative architecture: the real-time control domain handles high-real-time tasks, the intelligent computing domain handles complex calculations, the RF front-end handles transmission and reception and link calibration, the chip-level atomic clock provides a unified frequency reference and second synchronization signal, and an independent functional safety island implements out-of-band monitoring and fault handling.

[0008] The system comprises a real-time control domain, an intelligent computing domain, an RF front-end, a chip-level atomic clock, and a communication antenna. The real-time control domain and the intelligent computing domain are connected via a high-speed data interface and are scheduled in a hierarchical manner according to the real-time requirements of the tasks: highly real-time tasks are executed within the real-time control domain, while complex computational tasks are sent to the intelligent computing domain. The results returned by the intelligent computing domain include a task identifier and a timestamp, which are then verified for timeliness by the real-time control domain. Only after passing the verification do the results participate in the generation of control variables, adjustment of communication resources, or updates of inter-satellite collaborative tasks.

[0009] The RF front-end is configured with a receive channel, a transmit channel, a common coupling channel, and a calibration channel. The calibration channel acquires parameters such as transmit / receive link delay, phase, or gain variation, and correlates them with a time reference provided by a chip-level atomic clock. Based on this, the real-time control domain performs unified time compensation for communication synchronization, navigation measurement, and control commands, enabling different services to share the same link error reference.

[0010] The intelligent computing domain is equipped with computing power units and independent functional safety islands. The functional safety islands do not rely on the real-time control domain and the software state of the intelligent computing domain. They monitor power supply status, program integrity, and operating status through monitoring channels independent of the main data bus, and perform fault isolation, reset, program mirroring reload, or degraded operation according to the fault level.

[0011] The real-time control domain preferably employs the RFSOC navigation and control module, with an integrated RF system-on-a-chip (SoC) comprising a general-purpose processor, a hard real-time processor, a programmable logic unit (PLU), and an RF data converter as its core. The general-purpose processor runs the operating system, network protocol stack, and task scheduler; the hard real-time processor performs navigation calculations, control loops, and safety-critical tasks; the PLU performs high-speed digital signal processing, interface conversion, and hardware acceleration; and the high-speed RF analog-to-digital converter (ADC) and digital-to-analog converter (DAC) complete RF or intermediate frequency signal acquisition and waveform output.

[0012] The aforementioned processing resources are interconnected via an on-chip high-speed bus, forming a hardware acceleration path from RF signal acquisition and digital signal processing to control command generation. This allows closed-loop control to operate independently of the operating system, thereby reducing uncertain delays caused by task switching.

[0013] A low-latency data link is preferably formed between the real-time control domain and the intelligent computing domain using a PCIe interface. The real-time control domain classifies tasks according to a first threshold: high-real-time tasks above the first threshold are executed locally, while complex computational tasks below the first threshold are transmitted to the intelligent computing domain via direct memory access. Optical imaging data, radar echo data, or communication measurement data can be formatted and preprocessed by the real-time control domain before being sent via DMA.

[0014] After completing target recognition, multi-source data fusion, data compression, or autonomous decision-making, the intelligent computing domain returns intelligent inference results with task identifiers and timestamps. The real-time control domain checks whether the results correspond to the current task and whether they are within a valid time window; results that fail the verification are discarded and the anomaly is recorded, while triggering a task rerun or timeout retransmission mechanism to prevent invalid or expired results from entering the control loop.

[0015] The RF front-end can adopt a primary / backup redundancy or switchable architecture. The receive channel includes a digitally controlled attenuator and a multi-stage low-noise amplifier with bypass mode to adapt to different input signal strengths; the transmit channel includes a preamplifier, filter, and power amplifier; the common coupling channel includes a transmit / receive switching switch and an out-of-band rejection filter; and the calibration channel includes a directional coupler, a fixed attenuator, and multiple RF switches.

[0016] During calibration, the real-time control domain controls the radio frequency switches to select the receive calibration path and the transmit calibration path in a time-division multiplexing manner to obtain parameters such as transmit / receive link delay, phase, or gain variation. These parameters, after being associated with a unified time reference, can be used for time compensation for communication frame synchronization, delay compensation for navigation measurement equipment, and time alignment for inter-satellite link measurements, respectively.

[0017] Recalibration is triggered when there are changes in temperature, power supply status, or RF channel switching. Predetermined time intervals, cold or warm starts, link reconstruction after RF channel failure recovery, and target nodes for inter-satellite link switching can also be used as recalibration conditions. When the recalibration parameters are compared with the previous parameters, an alarm is generated and the compensation parameter table is updated if the difference exceeds a preset threshold.

[0018] The intelligent computing domain preferably adopts AI computing power SIP, which consists of a power management module, an independent functional safety island, and computing units. Each area uses an independent power supply or a controllable power supply path. The computing units include one or more NPU clusters and high-speed memory and non-volatile memory corresponding to each NPU, used for target recognition, multi-source data fusion, data compression, and autonomous decision-making.

[0019] The functional safety island operates independently of the main computing domain. Through a monitoring channel independent of the system's main data bus, it performs out-of-band monitoring of the power supply status, program integrity, and operational status of the real-time control domain and computing units. The independent control interface may include SPI, I2C, UART, CAN, or an independent hardwired interface, and connects to the power supply monitoring circuit, program mirror memory, watchdog signal, reset control terminal, and power switch.

[0020] The functional safety island can employ at least one fault-tolerance method among triple redundancy, error correction codes, program integrity verification, and primary / backup storage to detect and handle soft errors in computing units, storage units, and interconnection links; it has an independent clock source and an independent power monitoring circuit, and is not affected by reset operations in the real-time control domain and intelligent computing domain.

[0021] The first level is used for single-bit memory flips or correctable soft errors, performing error correction or partial data reloading without interrupting the current task; the second level is used for program timeouts, watchdog overflows, or communication interruptions where soft errors cannot be corrected, performing fault domain-specific resets and restoring the program image, while non-fault domains continue to run; the third level is used for overcurrent, latch-up, persistent anomalies, or situations where the aforementioned measures are ineffective, controlling the power isolation of the affected power domain and entering degraded operation.

[0022] During degraded operation, the chip-level atomic clock, basic communication, basic navigation, and minimum control loop are preserved, while intelligent computing tasks are suspended. Once the recovery conditions are met, power supply and operation of the isolated domains are restored step by step. Each fault event and its handling result generates a timestamped fault record, which is stored in an independent non-volatile memory for analysis by the ground or onboard health management system.

[0023] A chip-scale atomic clock provides a frequency reference and a 1PPS second synchronization signal to the real-time control domain. Based on this reference, the real-time control domain allocates a unified time base to communication processing, navigation calculation, inter-satellite measurement, RF calibration, and control tasks. The resolution of the unified time base is no less than 1 microsecond, and the time base deviation between each task channel is no greater than 10 nanoseconds.

[0024] When the chip-level atomic clock experiences short-term frequency deviation or second pulse jitter, the real-time control domain filters and compensates through a phase-locked loop or digital phase-locked loop. When the atomic clock fails, it can switch to the internal clock source of the real-time control domain to maintain the finite time base function in order to maintain the continuity of system time service.

[0025] The real-time control domain, RF front-end, and intelligent computing domain adopt a layered or heterogeneous integrated structure, with the RF region, digital logic region, and computing power region mutually partitioned. Return paths and shielding isolation are set between the RF region and the high-speed digital region, and heat sources in each domain form short-path heat conduction channels through intermediary layers, heat diffusion layers, or heat sinks; in a vacuum environment, short thermal paths and heat dissipation structures are used to reduce interface thermal resistance and local hot spots.

[0026] Each area is equipped with an electromagnetic shield or shielding frame. The radio frequency transmission lines adopt a coplanar waveguide or microstrip line structure, and adjacent signal layers are provided with a complete ground plane. High-speed digital signals use differential pairs and maintain equal length constraints, with differential impedance controlled at 100Ω±10%. Functional areas are divided on a unified base. Critical high-speed signals use controlled impedance wiring. The radio frequency return path is separated from the high-current power supply return path, and decoupling components and grounding structures are configured.

[0027] The system features dual redundant CAN interfaces and dual Ethernet interfaces. The CAN interface is used for transmitting control commands and status information, including task scheduling, actuator control, and telemetry information; the Ethernet interface is used for transmitting AI model weights, images, point clouds, or batch service data. The communication antenna is a wide-beam microstrip antenna with a working bandwidth supporting tens to hundreds of MHz.

[0028] The combined weight of the real-time control domain, RF front-end, and intelligent computing domain is no more than 500g, and hierarchical power supply and power consumption management are implemented according to the operating status of real-time control, RF transceiver, and intelligent inference. In idle state, the power supply of the intelligent computing domain computing area is turned off, the bias current of the RF transmit channel is reduced, and the operating frequency of the real-time control domain is reduced to the minimum sustaining frequency; in normal operating state, the NPU and RF channel are turned on as needed; in peak operating state, it runs at full power, and the peak duration is limited by the functional safety island according to the temperature and power consumption status. When the preset temperature threshold is exceeded, the frequency is automatically reduced or non-critical tasks are shut down.

[0029] In a preferred implementation, the general-purpose processor of the real-time control domain is a quad-core high-performance processor, the hard real-time processor is a dual-core hard real-time processor, the programmable logic unit has hundreds to thousands of logic units, and there are eight high-speed RF analog-to-digital converters and eight high-speed RF digital-to-analog converters each; the intelligent computing domain adopts multi-channel NPU expansion, with a total computing power of ten to hundreds of TOPS; the RF front-end operating bandwidth supports tens to hundreds of MHz. The above parameters are used to illustrate the preferred implementation.

[0030] Compared with existing technologies, this invention achieves resource intensiveness and closed-loop communication, navigation, control, and computation through hierarchical collaboration; reduces resource contention by separating real-time and intelligent domains for execution; enables communication, navigation, inter-satellite measurement, and control results to share time and error references through unified time base and transceiver link calibration; achieves fault monitoring, isolation, recovery, and degraded operation through independent functional safety islands; and balances radio frequency integrity, computing performance, and vacuum heat dissipation through partitioned layout, shielding isolation, and short thermal paths. Attached Figure Description

[0031] Figure 1 This is a structural diagram of the integrated communication, navigation, and control system applicable to satellites according to the present invention; Figure 2This is a schematic diagram of the overall architecture of the second embodiment of the present invention; Figure 3 This is a flowchart of the hierarchical collaboration and closed-loop processing of the communication, control, and computation of the present invention; Figure 4 This is a schematic diagram of the SIP transceiver and calibration channel of the radio frequency front-end of the present invention; Figure 5 This is a schematic diagram of the independent functional safety island monitoring, isolation, and recovery architecture of the present invention. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] Those skilled in the art will understand that, unless specifically stated otherwise, the singular forms “a,” “an,” “the,” and “the” used herein may also include the plural forms. It should be further understood that the term “comprising” as used in this specification means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0034] Existing lightweight satellites typically separate communication, navigation, control, RF transceiver, and intelligent computing onto different boards, resulting in redundant configuration of processing and storage resources, complex inter-board connections, increased closed-loop latency, and the easy propagation of single-module failures into mission interruptions. Satellite constellations also require multiple nodes to complete inter-satellite communication, collaborative measurement, navigation status updates, and control quantity generation under a unified time base. Traditional discrete devices struggle to simultaneously meet the requirements of real-time performance, high computing power, and long-term on-orbit reliability. This invention is based on a hierarchical collaborative architecture of real-time control and intelligent computing domains, separating real-time communication and control tasks from complex intelligent tasks for execution within their respective domains. Closed-loop collaboration is achieved through a unified time base, RF calibration, and independent safety monitoring.

[0035] This invention discloses an integrated communication, navigation, and control system suitable for satellites, belonging to the field of spaceborne integrated electronic system technology. The system includes a real-time control domain (RFSOC communication, navigation, and control module), a radio frequency front-end, an intelligent computing domain (AI computing power SIP), a chip-level atomic clock, and a communication antenna. The real-time control domain is configured with a general-purpose processor, a hard real-time processor, programmable logic, and high-speed radio frequency data conversion resources for communication protocol processing, navigation calculation, radio frequency signal preprocessing, and closed-loop control. The radio frequency front-end is equipped with a receiving channel, a transmitting channel, a common coupling channel, and a calibration channel for radio frequency transmission and reception and transmit / receive link delay calibration. The intelligent computing domain is equipped with an NPU computing power cluster and a functional safety island operating independently of the computing power domain for complex intelligent task processing and out-of-band monitoring and recovery of power supply, programs, and operating status. The real-time control domain and the intelligent computing domain are connected through a high-speed data interface, and are hierarchically scheduled according to the real-time requirements of the tasks, forming a layered collaborative link between real-time control and complex computing. Under a unified atomic clock time base, the communication, navigation, inter-satellite measurement, and control results are time-correlated, enabling the communication, navigation, and control results to share the same link error benchmark, forming a closed loop of perception, computation, decision-making, and control. This invention achieves integrated communication, navigation, control, and computing under limited size, weight, and power consumption conditions, and is suitable for satellite-bee collaborative networking and autonomous mission operation.

[0036] The following is an illustration through specific examples: First Embodiment like Figure 1 As shown, this embodiment provides an integrated communication, navigation, and control system suitable for satellites, including: The real-time control domain is used to perform strong real-time communication protocol processing, navigation calculation, sensing data preprocessing, and control command generation. The intelligent computing domain is used to perform multi-source data fusion and intelligent inference, and has out-of-band monitoring and fault handling capabilities that operate independently of the intelligent computing domain. The radio frequency front end is used to complete the reception and transmission of radio frequency signals, as well as the calibration of the transmit and receive link delay. A chip-level atomic clock, connected to the real-time control domain, provides a frequency reference and a second synchronization signal; A communication antenna is connected to the radio frequency front end; The real-time control domain and the intelligent computing domain are connected through a high-speed data interface. They are hierarchically scheduled according to the real-time level of the task, keeping strong real-time tasks executed within the real-time control domain and sending complex computing tasks to the intelligent computing domain. After receiving the decision results returned by the intelligent computing domain, the timeliness of the results is verified, and control commands are generated only after the verification is passed, so as to form a closed loop of perception, computing and control. The radio frequency front end obtains the link delay parameters through the calibration channel. The link delay parameters are associated with the time reference provided by the chip-level atomic clock. The real-time control domain performs unified time compensation on communication synchronization, navigation measurement and control commands according to the associated link delay parameters, so that the communication, navigation and control results share the same link error reference. The out-of-band monitoring and fault handling capabilities of the intelligent computing domain operate independently of the system's main data bus. Without relying on the software status of the real-time control domain and the intelligent computing domain, it monitors the power supply status, program integrity, and operating status of each domain of the system, and performs fault isolation and recovery operations according to the fault level.

[0037] Second Embodiment The embodiments of the present invention will now be described with reference to the accompanying drawings. The device model, interface speed, capacity, and size in the following embodiments are preferred parameters, and those skilled in the art can substitute or adjust them without changing the core functional relationships.

[0038] like Figure 2 As shown, the integrated communication, navigation, and control system provided in this embodiment consists of a real-time control domain (RFSOC communication, navigation, and control module), an RF front-end, an intelligent computing domain (AI computing power SIP), a chip-level atomic clock, and a communication antenna. The real-time control domain, RF front-end, and intelligent computing domain are layered and mounted on a substrate of the same size, and the combined weight can be controlled within 500g. A PCIe interface and a monitoring serial port are provided between the real-time control domain and the intelligent computing domain, and multiple RF input / output interfaces are provided between the real-time control domain and the RF front-end. The atomic clock is connected to the real-time control domain through a frequency interface, a 1PPS interface, and a UART interface.

[0039] The general-purpose processor in the real-time control domain runs communication network protocols, file management, and task scheduling; the hard real-time processor performs navigation calculations and control loops; the programmable logic implements communication baseband, measurement-related operations, data preprocessing, and hardware interfaces; and the storage system includes high-speed volatile memory, reliable boot memory, and large-capacity service memory.

[0040] (1) Overall composition and interface relationship The general-purpose processor runs communication network protocols, manages files, and schedules tasks. The hard real-time processor executes navigation calculations and control loops. Programmable logic implements communication baseband, measurement-related operations, data preprocessing, and hardware interfaces. The wide-beam antenna connects to the RF front-end, which internally houses receive, transmit, common coupling, and calibration channels.

[0041] (2) Layered closed-loop control calculation like Figure 3As shown, after the antenna receives inter-satellite or satellite-to-ground signals, the RF front-end performs gain adjustment, filtering, and transmit / receive path selection. The RF analog-to-digital conversion unit acquires signals, and programmable logic performs digital down-conversion, filtering, synchronization, and frame parsing. The hard real-time processor updates navigation and control status based on an atomic clock time reference, and the general-purpose processor schedules tasks according to real-time requirements. Complex sensing data is preprocessed and then sent to the NPU cluster via DMA. The returned results are verified by task identifiers and timestamps and then used for control or collaborative tasks.

[0042] (3) Radio frequency link calibration like Figure 4 As shown, in the receive calibration state, the calibration signal enters the receive link after fixed attenuation. The real-time control domain compares the reference time with the received time to obtain the receive link delay. In the transmit calibration state, the transmit signal is sampled by a directional coupler and sent back to the receive link to obtain the combined transmit and transmit delays. This combined delay is then combined with known transmit path parameters to obtain the transmit link delay. The calibration results, after being correlated with a unified time base, are used for communication, navigation, and inter-satellite measurement time compensation.

[0043] (4) Independent security monitoring and recovery like Figure 5 As shown, the functional safety island acquires real-time voltage, current, and temperature data from the control domain, intelligent computing domain, and RF front-end via an external analog-to-digital converter or comparator. It also determines the processor's operating status through independent clock monitoring and a watchdog signal, while performing integrity checks on critical programs, configuration parameters, and stored data. Based on the fault level, it outputs actions such as current limiting or power-off isolation, domain reset or program mirror reload, and degraded operation, storing the fault event and its handling results in an independent non-volatile memory.

[0044] (5) Structure, thermal design and power consumption mode The system can be implemented using board-level stacking, system-in-package (SiP), or 2.5D heterogeneous integration. A unified base is used to divide the RF, digital logic, and computing power areas. Critical high-speed signals are routed with controlled impedance. RF return current is separated from high-current power supply return current, and shielding, grounding, and decoupling structures are implemented. Heat sources form short paths through thermal interface materials, high thermal conductivity heat diffusion layers, and structural heat dissipation surfaces. Short thermal paths and heat dissipation structures are used in vacuum environments.

[0045] The system dynamically adjusts power supply and power consumption according to idle, normal, and peak states: In the idle state, the computing area is shut down and the power consumption of radio frequency and real-time control is reduced; in the normal state, the corresponding NPU and radio frequency channels are turned on according to the task; in the peak state, it runs at full power, and the duration is limited by the functional safety island based on temperature and power consumption.

[0046] The above embodiments are for illustrative purposes only. Any equivalent substitutions or combinations made based on the technical concepts of the hierarchical collaborative architecture of real-time control domain and intelligent computing domain, unified time base and radio frequency calibration linkage, independent out-of-band monitoring and graded fault handling described in this invention shall fall within the protection scope of this invention.

[0047] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

[0048] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] It should be noted that the above embodiments can be freely combined as needed. The above description is only a preferred embodiment of the present invention. It should be pointed out that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. An integrated communication, navigation, and control system suitable for satellites, characterized in that, include: The real-time control domain is used to perform strong real-time communication protocol processing, navigation calculation, sensing data preprocessing, and control command generation. The intelligent computing domain is used to perform multi-source data fusion and intelligent inference, and has out-of-band monitoring and fault handling capabilities that operate independently of the intelligent computing domain. The radio frequency front end is used to complete the reception and transmission of radio frequency signals, as well as the calibration of the transmit and receive link delay. A chip-level atomic clock, connected to the real-time control domain, provides a frequency reference and a second synchronization signal; A communication antenna is connected to the radio frequency front end; The real-time control domain and the intelligent computing domain are connected through a high-speed data interface. They are hierarchically scheduled according to the real-time level of the task, keeping strong real-time tasks executed within the real-time control domain and sending complex computing tasks to the intelligent computing domain. After receiving the decision results returned by the intelligent computing domain, the timeliness of the results is verified, and control commands are generated only after the verification is passed, so as to form a closed loop of perception, computing and control. The radio frequency front end obtains the link delay parameters through the calibration channel. The link delay parameters are associated with the time reference provided by the chip-level atomic clock. The real-time control domain performs unified time compensation on communication synchronization, navigation measurement and control commands according to the associated link delay parameters, so that the communication, navigation and control results share the same link error reference. The out-of-band monitoring and fault handling capabilities of the intelligent computing domain operate independently of the system's main data bus. Without relying on the software status of the real-time control domain and the intelligent computing domain, it monitors the power supply status, program integrity, and operating status of each domain of the system, and performs fault isolation and recovery operations according to the fault level.

2. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The real-time control domain is implemented using an RFSOC communication and control module, which is based on an RF system-on-a-chip that integrates a general-purpose processor, a hard real-time processor, a programmable logic unit, and an RF data converter. The general-purpose processor is used to run the operating system, network protocol stack, and task scheduler. The hard real-time processor is used to perform navigation calculations, control loops, and safety-critical tasks. Its response time is in the microsecond range, ensuring the determinism and stability of the control loop. The programmable logic unit is used to perform high-speed digital signal processing, interface conversion and hardware acceleration, and to complete parallel processing of high-speed digital filtering, modulation and demodulation, interface adaptation and encryption. The RFSOC control module also includes a high-speed radio frequency analog-to-digital converter and a high-speed radio frequency digital-to-analog converter, which are connected to the radio frequency front end and used to realize high-speed acquisition and waveform output of radio frequency or intermediate frequency signals; The general-purpose processor, hard real-time processor, and programmable logic unit are interconnected via an on-chip high-speed bus, forming a full-link hardware acceleration path from RF signal acquisition and digital signal processing to control instruction generation, which can complete closed-loop control without relying on operating system scheduling.

3. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The high-speed data interface between the real-time control domain and the intelligent computing domain is a PCIe interface, through which a low-latency data link is formed. The real-time control domain performs hierarchical scheduling according to the real-time requirements of the tasks. Strong real-time tasks with real-time requirements higher than the first threshold are executed in the real-time control domain, while complex computing tasks with real-time requirements lower than the first threshold are transmitted to the intelligent computing domain through direct memory access. The real-time control domain is used to format and preprocess optical imaging data, radar echo data or communication measurement data, and transmit the preprocessed optical imaging data, radar echo data or inter-satellite coordination data to the intelligent computing domain through direct memory access. After completing complex calculations, the intelligent computing domain returns intelligent reasoning results with task identifiers and timestamps. The real-time control domain determines whether the intelligent inference result corresponds to the current task and the effective time window based on the task identifier and timestamp, and only uses the intelligent inference result for control quantity generation, communication resource adjustment or inter-satellite collaborative task update after the verification is passed. For results that fail the judgment, the real-time control domain discards the result and records the abnormal event, while triggering the task rerun or timeout retransmission mechanism of the intelligent computing domain to prevent failed data from entering the control loop.

4. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The radio frequency front end includes a receiving channel, a transmitting channel, a common coupling channel, and a calibration channel, and adopts a primary / backup redundant or switchable architecture; The receiving channel includes a digitally controlled attenuator and a multi-stage low-noise amplifier with a bypass state, which are used to adapt to different input signal strengths through the digitally controlled attenuator and the multi-stage low-noise amplifier. When the input signal strength exceeds a preset threshold, the digitally controlled attenuator automatically reduces the gain to prevent the receiving channel from saturating. When the input signal strength is lower than the preset threshold, the multi-stage low-noise amplifier is in a bypass state to reduce the noise figure. The transmit channel includes a preamplifier, a filter, and a power amplifier, which are used to form a stable radio frequency output through filtering and amplification. The common coupling channel includes a transmit / receive switching switch and an out-of-band rejection filter, used to perform transmit / receive switching and out-of-band rejection; The calibration channel includes a directional coupler, a fixed attenuator, and multiple RF switches, used to couple a portion of the signal from the transmit link to the receive path, or to form an independent receive calibration path, in order to obtain changes in transmit / receive link delay, phase, or gain. The real-time control domain controls the radio frequency switch to select the receive calibration path and the transmit calibration path in a time-division manner, forming link delay compensation parameters for communication synchronization, navigation measurement, or inter-satellite measurement.

5. The integrated communication, navigation, and control system for satellites according to claim 4, characterized in that, After the transmit / receive link delay, phase or gain change parameters obtained by the calibration channel are associated with the time reference provided by the chip-level atomic clock, they are used for time compensation of communication frame synchronization, delay compensation of navigation measurement equipment and time alignment of inter-satellite link measurement, so that different services can share the same link error reference. When the temperature, power supply status, or RF channel switching changes, the real-time control domain triggers recalibration to avoid using failed parameters. The triggering conditions for recalibration also include the arrival of a predetermined time interval, system cold start or hot start, link reconstruction after RF channel fault recovery, and inter-satellite link switching target node. The parameters of each recalibration are compared with the parameters of the previous calibration. When the difference exceeds a preset threshold, an alarm indication is generated and the compensation parameter table is updated.

6. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The intelligent computing domain is implemented using AI computing power SIP. The AI ​​computing power SIP consists of a power management module, an independent functional safety island, and a computing power unit, including a power management area, a functional safety area, and a computing power area. Each area adopts an independent power supply or a controllable power supply path. The computing unit includes one or more NPU clusters and high-speed memory and non-volatile memory corresponding to each NPU, used for target recognition, multi-source data fusion, data compression and autonomous decision-making; The functional safety island operates independently of the main computing power domain. It monitors the power supply status, program integrity, and operating status of the real-time control domain and computing power unit through a monitoring channel independent of the system's main data bus. The independent control interface includes SPI, I2C, UART, CAN, or an independent hardwired interface, which connects to the power supply monitoring circuit, program mirror memory, watchdog signal, reset control terminal, and power switch. Without relying on the software status of the real-time control domain and computing power unit, it performs at least one of the following actions according to the fault level: current limiting or power failure, domain reset, program mirror reload, and degraded operation, forming a closed loop of fault monitoring, fault isolation, and autonomous recovery. The functional safety island also employs at least one fault-tolerance method among triple modular redundancy, error correction codes, program integrity verification, and primary / backup storage to detect and handle soft errors in the computing units, storage units, and interconnection links of the real-time control domain and intelligent computing domain. The functional safety island has an independent clock source and an independent power monitoring circuit. Its operating state is not affected by the reset operations of the real-time control domain and the intelligent computing domain, ensuring that the safety monitoring function remains effective during any domain reset.

7. The integrated communication, navigation, and control system for satellites according to claim 6, characterized in that, The functional safety island implements a graded handling strategy according to the fault level: Level 1: When a single-bit storage flip or a correctable soft error is detected, error correction or reloading of local data is triggered without interrupting the execution of the current task. The second level involves detecting program timeouts, watchdog overflows, or communication interruptions that cannot be corrected by soft errors. In this case, the corresponding fault domain is first reset and the program image is restored, while non-fault domains continue to run. The third level, when overcurrent, latch-up, persistent abnormality or failure of the first and second level handling is detected, controls the power domain of the affected power domain to be disconnected and isolated, and puts the system into a degraded operation state; In the degraded operation state, the chip-level atomic clock, basic communication, basic navigation and minimum control loop are retained, intelligent computing tasks are suspended, and power supply and operation of the isolated domain are restored step by step after the state meets the recovery conditions. The functional safety island generates a timestamped fault record for each fault event and its handling result, and stores it in an independent non-volatile memory for analysis by the ground or on-board health management system.

8. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The chip-level atomic clock outputs a frequency reference and a 1PPS second synchronization signal; The real-time control domain allocates a unified time base to communication processing, navigation calculation, inter-satellite measurement, radio frequency calibration, and control tasks based on the frequency reference and the second synchronization signal. The resolution of the unified time base is not less than 1 microsecond, and the time base deviation between each task channel is not greater than 10 nanoseconds; When the chip-level atomic clock experiences short-term frequency deviation or second pulse jitter, the real-time control domain filters and compensates the frequency reference and second synchronization signal through a phase-locked loop or digital phase-locked loop to ensure the continuity and stability of the time base signal allocated to each task, and switches to the internal clock source of the real-time control domain to maintain the limited time base function when the chip-level atomic clock fails.

9. The integrated communication, navigation, and control system for satellites according to claim 1, characterized in that, The real-time control domain, radio frequency front-end and intelligent computing domain adopt a hierarchical stacking or heterogeneous integration structure, with the radio frequency area, digital logic area and computing power area mutually partitioned. A return path and shielding isolation are set between the radio frequency area and the high-speed digital area. The heat sources of each area are conducted to the heat dissipation surface of the structure through short-path heat conduction channels formed by the intermediary layer, heat diffusion layer or heat sink. For vacuum environments, thermal design employs short thermal paths and homogenization structures to reduce interfacial thermal resistance and local hot spots. Electromagnetic shields or shielding frames are set between each domain. The transmission lines for radio frequency signals adopt coplanar waveguides or microstrip lines. A complete ground plane is set between adjacent signal layers to control the characteristic impedance. High-speed digital signals use differential pair wiring and maintain equal length constraints. The differential impedance is controlled at 100Ω±10%. The real-time control domain, RF front-end, and intelligent computing domain are divided into their respective functional areas on a unified base. Key high-speed signals are routed with controlled impedance, the RF return path is separated from the high-current power supply return path, and decoupling components and grounding structures are configured on the base side.

10. The integrated communication, navigation, and control system for satellites according to claim 6, characterized in that, The system is equipped with dual redundant CAN interfaces and dual Ethernet interfaces. The CAN interface is used for the transmission of control commands and status information, serving as a control and status closed-loop channel to transmit task scheduling, actuator control and telemetry information. The Ethernet interface is used for AI model weights, images, point clouds, or batch business data transmission; the communication antenna is a wide-beam microstrip antenna with a working bandwidth supporting tens of MHz to hundreds of MHz. It also performs hierarchical power supply and power consumption management based on the real-time control, RF transceiver and intelligent inference working status; The graded power supply and power consumption management includes: turning off the power supply of the computing power area of ​​the intelligent computing domain in the idle state, reducing the bias current of the radio frequency front-end transmission channel, and reducing the operating frequency of the real-time control domain to the minimum maintenance frequency. Under normal operating conditions, activate the corresponding number of NPUs and RF channels as needed; During peak operation, each functional domain operates at full power, and the peak duration is limited by the functional safety island based on temperature and power consumption. When the preset temperature threshold is exceeded, the frequency is automatically reduced or non-critical tasks are shut down.

11. The integrated communication, navigation, and control system for satellites according to claim 2, characterized in that, The general-purpose processor of the real-time control domain is a quad-core high-performance processor, the hard real-time processor is a dual-core hard real-time processor, the programmable logic unit has hundreds to thousands of logic units, and the high-speed radio frequency analog-to-digital conversion unit and the high-speed radio frequency digital-to-analog conversion unit each have eight channels; the computing power unit of the intelligent computing domain adopts multi-channel NPU expansion, and the total computing power reaches ten to one hundred TOPS. The operating bandwidth of the radio frequency front end supports ranges from tens of MHz to hundreds of MHz.

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