A frequency offset estimation method, device and electronic equipment
Patent Information
- Application Number
- CN202611347720.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-01
- Publication Date
- 2026-10-30
AI Technical Summary
[0005]发明目的:本发明目的在于提供一种频偏估计方法、装置及电子设备,以解决现有技术中计算复杂度过高、无法跟踪时变频偏以及估计精度受限的问题
[0033]1、重叠分块流水处理:本发明所提供的频偏估计方法中,通过对四次方序列进行分块,每个分块长度相同,每个分块与其前一分块构成分块的分析窗口,相邻两个分析窗口重叠一个分块长度,对每个分块的分析窗口并行执行FFT变换,能够将传统单次大点数FFT运算(对整个输入复基带信号序列执行FFT)转化为小点数FFT运算(对分析窗口执行FFT),显著降低单次FFT点数;同时在获得各分块的原始频偏估计值之后,通过逐块累积得到累积相位和分块内各符号的补偿相位,实现了对时变频偏的连续跟踪,从而实现高精度频偏估计。
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Figure CN123019896A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of wireless communication technology, and specifically relates to a frequency offset estimation method, device, and electronic device. Background Technology
[0002] With the rapid development of sixth-generation (6G) mobile communication and terahertz wireless transmission technology, carrier frequency offset (CFO) has become one of the key factors limiting the reception performance of high-order modulated signals. In photonic-assisted terahertz communication systems, frequency mismatch and Doppler effect of the transceiver lasers introduce significant carrier frequency offset, causing continuous rotation of the receiver constellation diagram, which must be compensated for by an efficient frequency offset estimation algorithm.
[0003] Traditional frequency offset estimation (FOE) methods mainly include: Viterbi-Viterbi-based frequency offset estimation (VV-FOE), which has a simple structure but is only applicable to low-order modulation formats such as Quadrature Phase Shift Keying (QPSK); and Fourth Power (FP-FFT) frequency offset estimation based on the full-signal Fast Fourier Transform (FFT), which has good estimation performance for high-order Quadrature Amplitude Modulation (QAM), but requires a single large-point FFT operation on the entire data sequence.
[0004] With the continuous improvement of symbol rate and modulation order in 6G terahertz communication systems, the hardware implementation of carrier frequency offset estimation algorithms faces the following technical challenges: 1) High computational complexity: Traditional FP-FFT FOE methods require a single large-point FFT operation on all data samples, resulting in huge consumption of multiplier and storage resources, making it difficult to achieve high-throughput real-time processing on Field-Programmable Gate Arrays (FPGAs). 2) Inability to track time-varying frequency offsets: Single-step FFT estimation is only applicable to static or slowly varying channels and cannot continuously track carrier frequency offsets that drift slowly over time. As the frequency offset changes over time, estimation errors accumulate, significantly degrading system performance. 3) Estimation accuracy is limited by the number of FFT points: With a fixed number of FFT points, frequency resolution is limited by the ratio of sampling rate to the number of FFT points. Improving accuracy requires increasing the number of FFT points, further exacerbating resource consumption and processing latency. Summary of the Invention
[0005] Purpose of the invention: The purpose of this invention is to provide a frequency offset estimation method, device, and electronic device to solve the problems of excessive computational complexity, inability to track time-varying frequency offsets, and limited estimation accuracy in the prior art.
[0006] Technical solution: To achieve the above-mentioned objective, in a first aspect, the present invention provides a frequency offset estimation method, comprising:
[0007] Perform a fourth power operation on each signal in the input complex baseband signal sequence to obtain a fourth power sequence;
[0008] The fourth power sequence is divided into blocks, wherein each block has the same length, each block and the previous block form the analysis window of the block, and two adjacent analysis windows overlap by one block length.
[0009] The FFT transformation is performed in parallel for each block's analysis window to obtain the corresponding frequency domain signal;
[0010] The power spectrum of the frequency domain signal is calculated and the peak value is detected.
[0011] The original frequency offset estimate of each block is obtained by interpolation, frequency mapping and division by four using the power values of the peak and its adjacent points;
[0012] The original frequency offset estimates for each block are accumulated block by block to obtain the accumulated phase and the compensation phase for each symbol within the block;
[0013] The input complex baseband signal is subjected to real-time phase rotation compensation based on the compensation phase, and the output baseband signal is frequency offset compensated.
[0014] Furthermore, the FFT transformation is performed in parallel for each block's analysis window, implemented using a pipelined FFT IP core, and each block's analysis window independently completes the frequency domain transformation; wherein, the number of FFT transformation points is equal to twice the block length and is an integer power of 2.
[0015] Furthermore, the interpolation using the power values of the peak and its adjacent points includes:
[0016] Calculate the offset, which is the difference between the power value of the adjacent point to the right of the peak and the power value of the adjacent point to the left, divided by the sum of the peak power value, the power value of the adjacent point to the left, and the power value of the adjacent point to the right.
[0017] The offset is constrained within a preset range;
[0018] Interpolation is performed based on the peak index, the number of FFT transform points, the offset, and the sampling rate to obtain a normalized peak frequency estimate. The normalized peak frequency estimate is then frequency-mapped and divided by four to obtain the original frequency offset estimate.
[0019] Furthermore, the block-by-block accumulation includes:
[0020] Based on the initial accumulated phase, the original frequency offset estimate, and the symbol index of the current block, determine the compensation phase of each symbol in the current block;
[0021] After the symbols in the current block are processed, the compensation phase of the last symbol in the current block is used as the initial cumulative phase of the next block.
[0022] Furthermore, in the real-time phase rotation of the input complex baseband signal based on the accumulated phase, a Coordinate Rotation Digital Computer (CORDIC) core array is used to perform phase compensation on the input complex baseband signal through complex exponential multiplication.
[0023] In a second aspect, the present invention provides a frequency offset estimation device, comprising:
[0024] The fourth power operation module is used to perform fourth power operation on each signal of the input complex baseband signal sequence to obtain the fourth power sequence.
[0025] The overlapping block module is used to divide the fourth power sequence into blocks, wherein each block has the same length, each block and the previous block form the block analysis window, and two adjacent analysis windows overlap by one block length.
[0026] The parallel FFT transform module is used to perform FFT transforms in parallel on each analysis window to obtain the corresponding frequency domain signal;
[0027] The peak detection module is used to calculate the power spectrum of the frequency domain signal and detect the peak value;
[0028] The peak interpolation module is used to interpolate, frequency map, and divide by four the power values of the peak and its adjacent points to obtain the original frequency offset estimate of each block.
[0029] The frequency offset calculation module is used to accumulate the original frequency offset estimates of each block to obtain the accumulated phase and the compensation phase of each symbol in the block;
[0030] The phase rotation compensation module is used to perform real-time phase rotation compensation on the input complex baseband signal according to the compensation phase, and output the baseband signal after frequency offset compensation.
[0031] Thirdly, the present invention provides an electronic device including a memory, a processor, and a computer program / instructions stored in the memory and executable on the processor, wherein the computer program / instructions, when executed by the processor, implement the steps of the frequency offset estimation method described in the first aspect.
[0032] Beneficial effects: Compared with the prior art, the present invention has the following beneficial effects:
[0033] 1. Overlapping Block Pipeline Processing: In the frequency offset estimation method provided by this invention, the fourth power sequence is divided into blocks of equal length. Each block and the previous block form an analysis window for the block. Adjacent analysis windows overlap by one block length. FFT transformation is performed in parallel on the analysis window of each block. This transforms the traditional single large-point FFT operation (performing FFT on the entire input complex baseband signal sequence) into a small-point FFT operation (performing FFT on the analysis window), significantly reducing the number of points in a single FFT. At the same time, after obtaining the original frequency offset estimate of each block, the accumulated phase and the compensation phase of each symbol in the block are obtained by accumulating the values block by block, realizing continuous tracking of time-varying frequency offset, thereby achieving high-precision frequency offset estimation.
[0034] 2. Enhanced peak interpolation: In the frequency offset estimation method provided by this invention, based on the detection of power spectrum peak values, interpolation is performed using the power values of the peak value and its adjacent points. This can improve the accuracy of frequency offset estimation without increasing the number of FFT points and effectively overcome frequency quantization error.
[0035] 3. Phase Continuous Accumulation Compensation: In the frequency offset estimation method provided by this invention, the accumulated phase and the compensation phase of each symbol in the block are obtained by accumulating the original frequency offset estimates of each block one by one, and the input complex baseband signal is compensated in real time based on this. This can ensure phase continuity between blocks and avoid performance loss introduced by boundary phase jump.
[0036] 4. Hardware-friendly architecture: The frequency offset estimation method provided by this invention can effectively reduce the multiplier resource consumption by adopting a collaborative design of small-point FFT, overlapping window and interpolation operation, and supports parallel pipeline implementation, which meets the low latency and high throughput requirements of terahertz real-time communication system.
[0037] 5. The frequency offset estimation device and electronic equipment provided by this invention have the same technical effects as the frequency offset estimation method provided. Attached Figure Description
[0038] Figure 1 This is a flowchart of a frequency offset estimation method provided in an embodiment of the present invention.
[0039] Figure 2 The above is a comparison diagram showing the effects of the embodiments of the present invention.
[0040] Figure 3 This is a block diagram of a frequency offset estimation device provided in an embodiment of the present invention.
[0041] Figure 4 This is a structural diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0042] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0043] To address the challenges of accuracy and resource efficiency in frequency offset estimation in high-speed real-time communication systems, this invention provides a frequency offset estimation method based on overlapping fourth-order FFT. The method systematically integrates core mechanisms such as fourth-order signal demodulation, overlapping block processing (OBP), FFT transform, spectral peak detection, interpolation, frequency offset calculation, and phase compensation to support efficient pipelined processing, reducing computational complexity and processing latency while ensuring estimation accuracy. The frequency offset estimation method described in the embodiments of this invention will be further explained below.
[0044] This embodiment provides a frequency offset estimation method, such as... Figure 1 As shown, the steps S11 to S17 may be included.
[0045] S11. Perform a fourth power operation on each signal of the input complex baseband signal sequence to obtain a fourth power sequence;
[0046] S12. Divide the fourth power sequence into blocks, wherein each block has the same length, each block and the previous block form a block analysis window, and two adjacent analysis windows overlap by one block length.
[0047] S13. Perform FFT transformation in parallel on the analysis window of each block to obtain the corresponding frequency domain signal;
[0048] S14. Calculate the power spectrum of the frequency domain signal and detect the peak value;
[0049] S15. Using the power values of the peak and its adjacent points, interpolation, frequency mapping, and division by four are performed to obtain the original frequency offset estimate of each block.
[0050] S16. Accumulate the original frequency offset estimates of each block to obtain the accumulated phase and the compensation phase of each symbol in the block;
[0051] S17. Perform real-time phase rotation compensation on the input complex baseband signal according to the compensation phase, and output the baseband signal after frequency offset compensation.
[0052] In this embodiment, the fourth-order sequence is divided into blocks of equal length. Each block and the preceding block form an analysis window, with adjacent analysis windows overlapping by one block length. FFT transformation is performed in parallel on each block's analysis window. This transforms the traditional single-run, large-point FFT operation (performing FFT on the entire input complex baseband signal sequence) into a small-point FFT operation (performing FFT on the analysis window), significantly reducing the number of points per FFT. Simultaneously, after obtaining the original frequency offset estimates for each block, the accumulated phase and the compensation phase for each symbol within the block are obtained through block-by-block accumulation, achieving continuous tracking of the time-varying frequency offset and thus realizing high-precision frequency offset estimation. Based on power spectrum peak detection, interpolation is performed using the power values of the peak and its adjacent points, improving the frequency offset estimation accuracy without increasing the number of FFT points and effectively overcoming frequency quantization errors. By accumulating the original frequency offset estimates of each block block by block, the accumulated phase and the compensated phase of each symbol within the block are obtained. Based on this, real-time phase rotation compensation is performed on the input complex baseband signal, ensuring phase continuity between blocks and avoiding performance loss introduced by boundary phase jumps. This embodiment, through the collaborative design of small-point FFT, overlapping windows, and interpolation operations, can effectively reduce multiplier resource consumption and support parallel pipelined implementation, meeting the low latency and high throughput requirements of terahertz real-time communication systems.
[0053] In some possible implementations, step S11 specifically includes: receiving the input complex baseband signal sequence and performing a fourth power operation z[n]=(x[n]) on each signal. 4 This eliminates the modulation phase of the QPSK / QAM signal, highlighting the frequency offset information as a single-frequency component at four times the frequency. Here, n represents the sequence number, and x[n] and z[n] represent the nth complex baseband signal in the sequence and its fourth-order operation, respectively.
[0054] In some possible implementations, in step S12, the fourth power sequence is divided into continuous data blocks of length L, with a total number of blocks K = ⌈M / L⌉, where M is the sequence length and ⌈⌉ represents rounding up. For the k-th block, its preceding block is concatenated with it to construct an analysis window of length 2L. The analysis windows corresponding to the k-th block and the (k+1)-th block overlap by the length of one block. The analysis window corresponding to the k-th block is denoted as z. k =[z(kL−L),z(kL−L+1),…,z(kL+L−1)] T The first half of the analysis window corresponding to the first block (k=0) is filled with zeros to fill the missing part. This overlapping analysis window structure can effectively suppress spectral leakage.
[0055] In some possible implementations, step S13 performs FFT transforms in parallel on each block's analysis window, using a pipelined FFT IP core. Each block's analysis window independently completes the frequency domain transformation; the number of FFT transform points N is 2L, which is an integer power of 2. In this embodiment, a pipelined FFT IP core is used to implement parallel FFT transforms, supporting continuous stream input. Each window independently completes the frequency domain transformation, which can significantly reduce FFT computation latency and meet the low-latency processing requirements of terahertz real-time communication systems.
[0056] In some possible implementations, the power spectrum calculation and peak detection in step S14 specifically include: calculating the power spectral density P. k (f)=∣Z k (f)∣ 2 Where f represents frequency, Z k (f), P k (f) represents the power spectrum and power spectral density; searches for the global maximum power value and its corresponding frequency index i. max .
[0057] In some possible implementations, step S15 uses the power values of the peak and its adjacent points for interpolation, employing the Spectral Centroid Interpolation (SCI) method, specifically including:
[0058] S151. Calculate the offset Δ, where the offset is the power value of the point adjacent to the right of the peak. Power value of adjacent point on the left Difference divided by peak power value Power values of adjacent points on the left Power value of adjacent point on the right The sum of the three; that is .
[0059] S152. Constrain the offset within a preset range; in this embodiment, the preset range is [−0.5, 0.5].
[0060] S153, According to peak index i max The number of FFT transform points N, the offset Δ, and the sampling rate Interpolation calculations are performed, and the normalized peak frequency estimate after interpolation is: The frequency estimate is the fourth power frequency. Dividing it by four yields the original frequency offset estimate f for each block. k =f 4,k / 4.
[0061] It should be noted that the frequency index i of the FFT output ranges from 1 to 1. Corresponding frequency range Obtain the baseband representation containing both positive and negative frequencies. i max Perform judgment and mapping. The complete expression for frequency offset estimation is:
[0062]
[0063] In this embodiment, the fourth frequency obtained by the k-th block interpolation, after frequency mapping and division by four, is denoted as the original frequency offset estimate. .
[0064] In some possible implementations, the block-by-block accumulation described in step S16 specifically includes:
[0065] S161. Determine the compensation phase of each symbol in the current block based on the initial cumulative phase, the original frequency offset estimate, and the symbol index.
[0066] S162. After the symbols in the current block are processed, the compensation phase of the last symbol in the current block is used as the initial cumulative phase of the next block.
[0067] In step S161, for the first block, the accumulated phase is initialized. For the t-th symbol within the k-th block, the compensation phase is... In step S162, after processing the k-th block, the accumulated phase is updated according to the following formula: .
[0068] In some possible implementations, in step S17, which involves real-time phase rotation compensation of the input complex baseband signal based on the compensation phase, a rotated-mode CORDIC core array is used to perform phase compensation on the input complex baseband signal through complex exponential multiplication. Specifically, the phase compensation formula is: ,in For phase compensation factor, , The original complex baseband signal sequence and the compensated complex baseband signal sequence are respectively the first... A complex baseband signal.
[0069] The following is combined with Figure 2 This document describes the technical effects of the frequency offset estimation method (denoted as OBP FP-FFT FOE) provided in this embodiment.
[0070] Figure 2 shows the relationship between the bit error rate (BER) and the input UTC-PD optical power in a 2200-meter fiber terahertz system using 5 GBaud 16 QAM modulation. Figure 2This paper compares the performance of traditional FP-FFTFOE and OBP FP-FFT FOE with three different block lengths. OBP FP-FFT FOEs with block lengths of 256 and 512 achieve the hard decision threshold and outperform traditional FP-FFT FOE. In contrast, the 128-block-length version shows a significant performance degradation, mainly due to the accumulation of inter-block phase errors—the frequency offset estimation error of each block propagates to subsequent blocks. Smaller block lengths mean fewer symbols involved in the FFT, leading to larger accumulated errors. In practical applications, the choice of specific block length can be a trade-off between complexity and performance. This embodiment enables the design to flexibly adapt from single large-point FFT to overlapping block pipelined processing, based on system throughput and resource budget, while ensuring frequency offset compensation performance. This embodiment provides a high-precision, low-latency, trackable, and scalable frequency offset estimation solution for 6 GHz terahertz real-time communication systems.
[0071] The frequency offset estimation device according to the embodiments of the present invention will be further described below. The frequency offset estimation device described below can be referred to in correspondence with the frequency offset estimation method described above.
[0072] This invention provides a frequency offset estimation device that combines long sequence block processing with overlapping window technology to reduce the computational complexity of a single FFT, while supporting continuous tracking of time-varying frequency offsets. Figure 3 As shown, the frequency offset estimation device includes: a fourth power operation module 11, used to perform a fourth power operation on each signal of the input complex baseband signal sequence to obtain a fourth power sequence; an overlapping block segmentation module 12, used to segment the fourth power sequence into blocks, wherein each block has the same length, each block and the previous block constitute a block analysis window, and two adjacent analysis windows overlap by one block length; a parallel FFT transformation module 13, used to perform parallel FFT transformation on the analysis window of each block to obtain the corresponding frequency domain signal; a peak detection module 14, used to calculate the power spectrum of the frequency domain signal and detect the peak; a peak interpolation module 15, used to interpolate, frequency map, and divide by four using the power values of the peak and its adjacent points to obtain the original frequency offset estimate value of each block; a frequency offset solution module 16, used to accumulate the original frequency offset estimate value of each block block by block to obtain the accumulated phase and the compensation phase of each symbol in the block; and a phase rotation compensation module 17, used to perform real-time phase rotation compensation on the input complex baseband signal according to the compensation phase, and output the frequency offset compensated baseband signal.
[0073] Specifically, the detailed implementation steps of the frequency offset estimation device for the frequency offset estimation method are as follows:
[0074] S21, the fourth power operation module performs fourth power operation on the input complex baseband signal sequence signal by signal to eliminate modulation phase;
[0075] S22. The overlapping block module divides the fourth power sequence into data blocks of length L, and each block and the previous block construct an analysis window of length 2L.
[0076] S23. The parallel FFT transformation module performs an N-point FFT on the analysis window of each block to convert the time-domain signal to the frequency domain.
[0077] S24. The peak detection module calculates the power spectral density and searches for the frequency index corresponding to the global maximum power value;
[0078] S25. The peak interpolation module uses the power values of the peak and its adjacent points to calculate the offset Δ, and obtains a high-precision original frequency offset estimate for each block.
[0079] S26. The frequency offset calculation module accumulates the original frequency offset estimates of each block to obtain the accumulated phase and the compensation phase of each symbol in the block.
[0080] S27. The phase rotation compensation module performs real-time phase rotation compensation on the original input signal according to the compensation phase, and outputs the baseband signal after frequency offset compensation.
[0081] The aforementioned functional modules can be software modules, hardware modules, or a combination of both. When each module is an electronic device or a server, the functions of different modules can be implemented by the same hardware device, or the functions of different modules can be implemented by different hardware devices, or the functions of some modules can be implemented by one hardware device while the functions of some modules can be implemented by multiple hardware devices.
[0082] like Figure 4 As shown, this embodiment of the invention also provides an electronic device, including a memory 21, a processor 22, and a computer program stored on the memory 21 and executable on the processor 22. When the computer program is executed by the processor 22, it implements the steps of the frequency offset estimation method in any of the above embodiments.
[0083] The frequency offset estimation device and electronic equipment provided in this embodiment have the same beneficial effects as the frequency offset estimation method described above, and will not be repeated here.
[0084] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems or apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.
[0085] It should also be noted that relational terms such as "first" and "second" in this specification are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The term "and / or" includes any and all combinations of one or more of the associated listed items. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0086] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A frequency offset estimation method, characterized in that, include: Perform a fourth power operation on each signal in the input complex baseband signal sequence to obtain a fourth power sequence; The fourth power sequence is divided into blocks, wherein each block has the same length, each block and the previous block form the analysis window of the block, and two adjacent analysis windows overlap by one block length. The FFT transformation is performed in parallel for each block's analysis window to obtain the corresponding frequency domain signal; The power spectrum of the frequency domain signal is calculated and the peak value is detected. The original frequency offset estimate of each block is obtained by interpolation, frequency mapping and division by four using the power values of the peak and its adjacent points; The original frequency offset estimates for each block are accumulated block by block to obtain the accumulated phase and the compensation phase for each symbol within the block; The input complex baseband signal is subjected to real-time phase rotation compensation based on the compensation phase, and the output baseband signal is frequency offset compensated.
2. The method according to claim 1, characterized in that, The analysis window for each block performs FFT transformation in parallel, which is implemented using a pipelined FFT IP core. Each block's analysis window independently completes the frequency domain transformation. The number of FFT transformation points is equal to twice the block length and is an integer power of 2.
3. The method according to claim 1, characterized in that, The interpolation using the power values of the peak value and its adjacent points includes: Calculate the offset, which is the difference between the power value of the adjacent point to the right of the peak and the power value of the adjacent point to the left, divided by the sum of the peak power value, the power value of the adjacent point to the left, and the power value of the adjacent point to the right. The offset is constrained within a preset range; Interpolation is performed based on the peak index, the number of FFT transform points, the offset, and the sampling rate to obtain a normalized peak frequency estimate. The normalized peak frequency estimate is then frequency-mapped and divided by four to obtain the original frequency offset estimate.
4. The method according to claim 1, characterized in that, The block-by-block accumulation includes: Based on the initial accumulated phase, the original frequency offset estimate, and the symbol index of the current block, determine the compensation phase of each symbol in the current block; After the symbols in the current block are processed, the compensation phase of the last symbol in the current block is used as the initial cumulative phase of the next block.
5. The method according to claim 1, characterized in that, In the real-time phase rotation of the input complex baseband signal based on the accumulated phase, a coordinate rotation digital computing core array is used to perform phase compensation on the input complex baseband signal through complex exponential multiplication.
6. A frequency offset estimation device, characterized in that, include: The fourth power operation module is used to perform fourth power operation on each signal of the input complex baseband signal sequence to obtain the fourth power sequence. The overlapping block module is used to divide the fourth power sequence into blocks, wherein each block has the same length, each block and the previous block form the block analysis window, and two adjacent analysis windows overlap by one block length. The parallel FFT transform module is used to perform FFT transforms in parallel on each analysis window block to obtain the corresponding frequency domain signal; The peak detection module is used to calculate the power spectrum of the frequency domain signal and detect the peak value; The peak interpolation module is used to interpolate, frequency map, and divide by four the power values of the peak and its adjacent points to obtain the original frequency offset estimate of each block. The frequency offset calculation module is used to accumulate the original frequency offset estimates of each block to obtain the accumulated phase and the compensation phase of each symbol in the block; The phase rotation compensation module is used to perform real-time phase rotation compensation on the input complex baseband signal according to the compensation phase, and output the baseband signal after frequency offset compensation.
7. The apparatus according to claim 6, characterized in that, In the parallel FFT transform module, the FFT transform is performed in parallel for the analysis window of each block, which is implemented using a pipelined FFT IP core. The analysis window of each block independently completes the frequency domain transformation. The number of FFT transform points is equal to twice the block length and is an integer power of 2.
8. The apparatus according to claim 6, characterized in that, The peak interpolation module uses the power values of the peak and its adjacent points for interpolation, including: Calculate the offset, which is the difference between the power value of the adjacent point to the right of the peak and the power value of the adjacent point to the left, divided by the sum of the peak power value, the power value of the adjacent point to the left, and the power value of the adjacent point to the right. The offset is constrained within a preset range; Interpolation is performed based on the peak index, the number of FFT transform points, the offset, and the sampling rate to obtain a normalized peak frequency estimate. The normalized peak frequency estimate is then frequency-mapped and divided by four to obtain the original frequency offset estimate.
9. The apparatus according to claim 6, characterized in that, The frequency offset calculation module accumulates block by block, including: Based on the initial accumulated phase, the original frequency offset estimate, and the symbol index of the current block, determine the compensation phase of each symbol in the current block; After the symbols in the current block are processed, the compensation phase of the last symbol in the current block is used as the initial cumulative phase of the next block.
10. An electronic device, comprising a memory, a processor, and a computer program / instructions stored in the memory and executable on the processor, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the frequency offset estimation method according to any one of claims 1-5.
