Cascade timekeeping method for multistage systems and multistage systems

CN123019939APending Publication Date: 2026-10-30ZHEJIANG DONGGAO FUTURE ENERGY TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202611344182.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-01
Publication Date
2026-10-30

AI Technical Summary

Technical Problem

[0004]现有分布式多级控制系统的时钟同步方案需要在设备在线监测心跳帧之外,周期性发送时钟同步报文,两种报文独立传输,大幅增加了通信负载,容易频繁触发处理器中断,占用大量算力资源

Benefits of technology

[0016]本申请的有益效果是:提供了一种多级系统的级联对时方法,上级控制器周期性下发第一心跳帧,中间级控制器依托第一心跳帧完成本地时钟校准并将校准后的时间戳嵌入第二心跳帧下发至末端执行设备,末端执行设备依靠第二心跳帧完成自身时钟校准,全程采用系统原有的心跳帧承载时钟同步功能,无需额外发送独立时钟同步报文,消除了两类报文分开传输带来的额外通信负载,减少了处理器中断触发次数、节约了设备算力资源,实现多级设备依托心跳帧传输链路完成逐级级联时钟同步,满足了多级系统中多设备对统一时钟的需求。

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Abstract

The application provides a cascading time synchronization method of a multi-stage system and the multi-stage system, and relates to the technical field of multi-stage system time synchronization. The multi-stage system comprises a higher controller, at least one intermediate controller and an end execution device. The higher controller sends a first heartbeat frame to each intermediate controller at a preset fixed period. The intermediate controller calibrates a local clock of the intermediate controller according to the first heartbeat frame, and obtains a current local timestamp of the intermediate controller. The intermediate controller carries the current local timestamp in a second heartbeat frame, and sends the second heartbeat frame to the end execution device connected to the intermediate controller. The end execution device calibrates a local clock of the end execution device according to the current local timestamp in the second heartbeat frame. The application can complete multi-device cascading clock synchronization through a heartbeat frame transmission link, and meets the demand of clock unification of multiple devices in the multi-stage system.
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Description

Technical Field

[0001] This application relates to the field of time synchronization technology for multi-level systems, and more specifically, to a cascaded time synchronization method for multi-level systems and a multi-level system. Background Technology

[0002] Distributed multi-level control systems typically adopt a hierarchical cascaded architecture, with the upper-level controller coordinating the overall scheduling, multiple intermediate-level controllers managing equipment groups in different zones, and multiple end-effector devices completing field tasks such as power conversion, data acquisition, and servo execution. They have scheduling, control, and execution functions and are widely used in fields such as energy storage microgrids, industrial automation, and rail transportation.

[0003] To achieve core functions such as coordinated control among multiple devices and accurate fault timing tracing in a multi-level control system, the local clocks of all controllers and end-effectors within the system must be highly synchronized. Therefore, cascading clock synchronization of multi-level devices becomes a fundamental prerequisite for reliable system operation.

[0004] Existing clock synchronization schemes for distributed multi-level control systems require the periodic transmission of clock synchronization messages in addition to the online monitoring of heartbeat frames by the equipment. The independent transmission of these two types of messages significantly increases the communication load, easily triggers frequent processor interrupts, and consumes a large amount of computing resources. Summary of the Invention

[0005] This application addresses the shortcomings of the prior art by providing a cascaded time synchronization method and a multi-level system to resolve the problems existing in the prior art.

[0006] The technical solution adopted in the embodiments of this application is as follows: In a first aspect, embodiments of this application provide a cascaded time synchronization method for a multi-level system, the multi-level system comprising: a higher-level controller, at least one intermediate-level controller, and an end-effector device, the method comprising: The upper-level controller sends a first heartbeat frame to each of the intermediate-level controllers at a preset fixed period. The intermediate controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate controller. The intermediate controller carries the current local timestamp in the second heartbeat frame and sends the second heartbeat frame to the end execution device to which the intermediate controller is attached; The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame; The first heartbeat frame and the second heartbeat frame are communication frames used for online monitoring of devices in the multi-level system.

[0007] In one embodiment, the intermediate-level controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller, including: If the first heartbeat frame carries a higher-level timestamp, the intermediate-level controller calibrates its local clock based on the higher-level timestamp to obtain the current local timestamp of the intermediate-level controller.

[0008] In one embodiment, the intermediate-level controller calibrates its local clock based on the upper-level timestamp to obtain the current local timestamp of the intermediate-level controller, including: The intermediate controller obtains the received timestamp of the first heartbeat frame; The intermediate controller calculates the first clock deviation based on the received timestamp of the first heartbeat frame, the upper-level timestamp, and the preset transmission delay; The intermediate-level controller calibrates its local clock based on the first clock deviation to obtain the current local timestamp of the intermediate-level controller.

[0009] In one embodiment, the intermediate-level controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller, and further includes: If the first heartbeat frame does not carry a higher-level timestamp, the intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the receiving timestamps of multiple consecutive first heartbeat frames. The intermediate-level controller calibrates its local clock based on the periodic arrival edge and the initial absolute time to obtain the current local timestamp of the intermediate-level controller.

[0010] In one embodiment, the intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the received timestamps of a series of first heartbeat frames, including: The intermediate controller calculates the heartbeat arrival interval based on the received timestamps of multiple consecutive first heartbeat frames; The intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the heartbeat arrival interval.

[0011] In one embodiment, the intermediate-level controller calibrates its local clock based on the periodic arrival edge and initial absolute time to obtain the current local timestamp of the intermediate-level controller, including: The intermediate-level controller estimates the clock frequency deviation of the intermediate-level controller relative to the upper-level controller based on the periodic arrival edge. The intermediate-level controller determines the frequency correction amount based on the clock frequency deviation; The intermediate-level controller adjusts the frequency control word of its local clock according to the frequency correction amount to calibrate the local clock of the intermediate-level controller, thereby obtaining the current local timestamp of the intermediate-level controller.

[0012] In one embodiment, the end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame, including: The end-effector captures the frame start position of the second heartbeat frame using a hardware timer to obtain the receiving timestamp of the second heartbeat frame; The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame and the received timestamp of the second heartbeat frame.

[0013] In one embodiment, the end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame and the received timestamp of the second heartbeat frame, including: The end-effector acquires the preset capture delay of the hardware timer and the preset parsing duration of the second heartbeat frame; the preset capture delay is the sum of the propagation delay of the communication transceiver and the trace delay of the printed circuit board; The end-effector restores the current local timestamp based on the preset capture delay and the preset parsing duration, and calculates the current restored timestamp; The end-effector calculates the second clock offset based on the current restore timestamp and the current clock value of the end-effector; The end-effector calibrates its local clock based on the second clock deviation.

[0014] Secondly, embodiments of this application provide a multi-level cascaded time synchronization system, including: a higher-level controller, at least one intermediate-level controller, and an end-effector device; The upper-level controller is used to send a first heartbeat frame to each of the intermediate-level controllers at a preset fixed period. The intermediate-level controller is used to calibrate its local clock according to the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller. The intermediate controller is used to carry the current local timestamp in the second heartbeat frame and send the second heartbeat frame to the end execution device to which the intermediate controller is attached; The end-effector is used to calibrate its local clock based on the current local timestamp in the second heartbeat frame.

[0015] In one embodiment, the multi-level cascaded timekeeping system is an energy storage system, the upper-level controller is a microgrid controller, the intermediate-level controller is a box controller, and the end-effector is an energy storage converter.

[0016] The beneficial effects of this application are: it provides a cascaded time synchronization method for a multi-level system, in which the upper-level controller periodically sends a first heartbeat frame, the intermediate-level controller completes local clock calibration based on the first heartbeat frame and embeds the calibrated timestamp into the second heartbeat frame and sends it to the end execution device, and the end execution device completes its own clock calibration based on the second heartbeat frame. The entire process uses the original heartbeat frame of the system to carry the clock synchronization function, without the need to send an additional independent clock synchronization message, eliminating the additional communication load caused by the separate transmission of the two types of messages, reducing the number of processor interrupt triggers, saving device computing resources, and realizing the cascaded clock synchronization of multiple devices based on the heartbeat frame transmission link, thus meeting the need of multiple devices in a multi-level system for a unified clock. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a multi-level system provided in an embodiment of this application; Figure 2 A flowchart illustrating the cascaded time synchronization method for a multi-level system provided in this application embodiment; Figure 3 A schematic flowchart illustrating the method for obtaining the current local timestamp of an intermediate-level controller, provided in an embodiment of this application; Figure 4 A flowchart illustrating a method for obtaining the current local timestamp of an intermediate-level controller, provided in another embodiment of this application; Figure 5 A schematic flowchart of a method for identifying the periodic arrival of the first heartbeat frame at the edge, provided in an embodiment of this application; Figure 6A schematic flowchart of a method for identifying the periodic arrival of the first heartbeat frame at the edge, provided in an embodiment of this application; Figure 7 This is a schematic flowchart of a method for calibrating the local clock of an end-effector device provided in an embodiment of this application; Figure 8 This is a schematic flowchart of a method for calibrating the local clock of an end-effector device, provided in another embodiment of this application. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this application, but not all embodiments.

[0020] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0021] Furthermore, the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Additionally, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] It should be noted that, where there is no conflict, the features in the embodiments of this application can be combined with each other.

[0023] This application provides a multi-level system. Figure 1 This is a schematic diagram of the structure of a multi-level system provided in the embodiments of this application, such as... Figure 1 As shown, the multi-level system includes a higher-level controller, at least one intermediate-level controller, and end-effectors. The higher-level controller communicates with at least one intermediate-level controller via Ethernet. Each intermediate-level controller connects to multiple end-effectors, and the intermediate-level controllers communicate with the end-effectors via a CAN bus.

[0024] The upper-level controller is equipped with a satellite timing module, which can generate a unified absolute time reference based on the satellite timing module and periodically send first heartbeat frames with or without the upper-level timestamp. The intermediate-level controller includes an Ethernet communication module, a heartbeat receiver processor, a clock calibration module, a frequency discipline module, and a timestamp embedding module. The Ethernet communication module is used to receive the first heartbeat frame, and the heartbeat receiver processor is used to latch the received timestamp of the first heartbeat frame. The clock calibration module is used to calibrate the local clock of the intermediate-level controller when the first heartbeat frame carries the upper-level timestamp. The frequency discipline module is used to calibrate the local clock of the intermediate-level controller when the first heartbeat frame does not carry the upper-level timestamp. The timestamp embedding module is used to write the calibrated local timestamp into the second heartbeat frame.

[0025] It should be noted that the first and second heartbeat frames are existing communication frames in the multi-level system, sent according to a preset period. Their original function is to monitor the online status of subordinate devices, determine device liveness, and identify device offline or faulty events. The heartbeat frame is a message necessary for system operation and is not a communication frame specifically added for clock synchronization. This application reuses the data field of this type of heartbeat frame to carry time synchronization-related information, and they are respectively denoted as the first heartbeat frame and the second heartbeat frame. The first heartbeat frame is the heartbeat frame sent by the upper-level controller to the intermediate-level controller, and the second heartbeat frame is the heartbeat frame sent by the intermediate-level controller to the end execution device.

[0026] Unlike dedicated time synchronization communication frames that are set up independently, this application does not require the addition of additional time synchronization communication frames. It only carries the clock synchronization function on the basis of the original heartbeat frame and does not add any additional bus communication load.

[0027] The end-effector includes a frame start bit hardware capture module, a timestamp parsing module, and a local clock calibration module. The frame start bit hardware capture module is used to latch the local count value of the end-effector when the second heartbeat frame is received. The timestamp parsing module is used to restore the standard timestamp based on the second heartbeat frame. The local clock calibration module is used to calculate the second clock deviation based on the standard timestamp and correct the local clock of the end-effector.

[0028] In one example, the multi-level system is an energy storage system, the upper-level controller is a microgrid controller (MGC), the intermediate-level controller is a battery array unit (BAU), and the end-effector is a power conversion system (PCS).

[0029] Based on this multi-level system, this application provides a cascaded time synchronization method for a multi-level system. This cascaded time synchronization method reuses the original online monitoring heartbeat frames (first heartbeat frame and second heartbeat frame) in the multi-level system as the time synchronization information transmission channel, without adding a new time synchronization communication frame independent of the online monitoring heartbeat frame.

[0030] The following examples, in conjunction with the accompanying drawings, provide specific illustrations of the cascaded time synchronization method for multi-level systems provided in this application.

[0031] Figure 2 A flowchart illustrating the cascaded time synchronization method for a multi-level system provided in this application embodiment is shown below. Figure 2 As shown, the method includes: S101, The upper-level controller sends the first heartbeat frame to each intermediate-level controller at a preset fixed period.

[0032] The upper-level controller sends the first heartbeat frame to each intermediate-level controller at a preset fixed period. The preset fixed period is locked by the upper-level controller through its stable clock source (such as satellite time synchronization or its own high-precision clock), and is a precise fixed period.

[0033] Depending on whether the upper-level controller can modify the communication protocol, the first heartbeat frame takes two forms: If the upper-level controller can modify the protocol, the data field of the first heartbeat frame carries the upper-level controller's timestamp. If the protocol cannot be modified by the upper-level controller, the first heartbeat frame will only retain basic online monitoring data and will not have an upper-level timestamp.

[0034] S102. The intermediate controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate controller.

[0035] After receiving the first heartbeat frame, the intermediate controller performs its own local clock calibration based on the first heartbeat frame and generates the calibrated current local timestamp. Since the first heartbeat frame has two forms, this step is also implemented in two parallel ways, as shown in the following embodiments.

[0036] S103, The intermediate controller carries the current local timestamp in the second heartbeat frame and sends the second heartbeat frame to the end execution device attached to the intermediate controller.

[0037] After the intermediate controller completes local clock calibration, it writes its current local timestamp into the data extension field of the second heartbeat frame and sends the second heartbeat frame to all end-devices connected to it via the CAN bus. The second heartbeat frame is a native CAN bus online monitoring heartbeat frame, which has the dual functions of online detection of end devices and timestamp distribution, without adding a new independent CAN message.

[0038] S104. The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame.

[0039] The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame, thereby achieving time synchronization between the intermediate controller and the end-effector.

[0040] In summary, this embodiment provides a cascaded time synchronization method for a multi-level system. The upper-level controller periodically sends a first heartbeat frame, the intermediate-level controller uses the first heartbeat frame to complete local clock calibration and embeds the calibrated timestamp into a second heartbeat frame before sending it to the end-execution device. The end-execution device uses the system's original heartbeat frame to carry the clock synchronization function throughout the process, eliminating the need to send separate clock synchronization messages. This eliminates the additional communication load caused by the separate transmission of the two types of messages, reduces the number of processor interrupt triggers, saves device computing resources, and enables multi-level devices to complete cascaded clock synchronization through the heartbeat frame transmission link, meeting the need for a unified clock for multiple devices in a multi-level system.

[0041] Optionally, when there are two or more intermediate controllers, the upper intermediate controller can act as a time relay for the lower intermediate controller. The intermediate controllers are cascaded one after another. The upper intermediate controller sends a heartbeat frame to the lower intermediate controller next to it, so that the lower intermediate controller repeatedly executes the process of receiving heartbeat frames, calibrating the local clock, and issuing timestamps, thereby realizing the chained cascading time synchronization of N intermediate controllers.

[0042] The intermediate controller can automatically detect whether the first heartbeat frame carries the upper-level timestamp. In one embodiment, if the first heartbeat frame carries the upper-level timestamp, the intermediate controller switches to timestamp calibration mode. S102 can be: the intermediate controller calibrates the local clock of the intermediate controller according to the upper-level timestamp to obtain the current local timestamp of the intermediate controller.

[0043] Specifically, Figure 3 This is a flowchart illustrating a method for obtaining the current local timestamp of an intermediate-level controller, as provided in an embodiment of this application. Figure 3 As shown, when the first heartbeat frame carries a higher-level timestamp, the specific steps for calibrating the local clock of the intermediate-level controller based on the higher-level timestamp to obtain the current local timestamp of the intermediate-level controller include: S201, The intermediate controller obtains the received timestamp of the first heartbeat frame.

[0044] When the intermediate controller receives the first heartbeat frame sent by the upper-level controller via Ethernet, it latches the timestamp of its own reception of the first heartbeat frame. The received timestamp is a local clock reading from the intermediate controller.

[0045] S202, the intermediate controller calculates the first clock deviation based on the received timestamp of the first heartbeat frame, the upper-level timestamp, and the preset transmission delay.

[0046] The intermediate controller uses the received timestamp of the first heartbeat frame. Superior timestamp And a preset transmission delay Δt_up, to calculate the first clock offset. .

[0047]

[0048] The preset transmission delay Δt_up is the Ethernet one-way transmission delay. In a single communication round trip, the preset transmission delay Δt_up is usually in the microsecond range and the round trip time is the same. Therefore, the preset transmission delay Δt_up can be obtained through factory calibration or round trip measurement.

[0049] S203. The intermediate controller calibrates its local clock based on the first clock deviation to obtain the current local timestamp of the intermediate controller.

[0050] The intermediate controller performs smoothing and noise reduction on the first clock deviation, filters out Ethernet transmission jitter, and directly corrects the local clock based on the smoothed first clock deviation to obtain the current local timestamp after calibration.

[0051] In another embodiment, if the first heartbeat frame does not carry a higher-level timestamp, the intermediate-level controller switches to docile mode. Figure 4 A flowchart illustrating a method for obtaining the current local timestamp of an intermediate-level controller, as provided in another embodiment of this application, is shown below. Figure 4 As shown, S102 may include S301~S302: S301, the intermediate controller identifies the periodic arrival edge of the first heartbeat frame based on the received timestamps of multiple consecutive first heartbeat frames.

[0052] Since the first heartbeat frame sent by the upper-level controller does not carry the upper-level timestamp, the intermediate-level controller cannot obtain the precise time from the first heartbeat frame. However, the transmission period of the first heartbeat frame is locked by the upper-level controller through its stable clock source (satellite time synchronization), and the transmission period is a precise fixed period. Therefore, the periodic arrival edge of the first heartbeat frame can be identified based on the receiving timestamps of multiple consecutive first heartbeat frames.

[0053] Figure 5 This is a schematic flowchart of a method for identifying the periodic arrival edge of a first heartbeat frame, as provided in an embodiment of this application. Figure 5As shown, S301 specifically includes S401~S402: S401, the intermediate controller calculates the heartbeat arrival interval based on the received timestamps of multiple consecutive first heartbeat frames.

[0054] The intermediate controller maintains a sliding window buffer, stores the received timestamps of the first heartbeat frame for N consecutive frames (preferably 10 frames), and calculates the arrival interval of adjacent heartbeat frames frame by frame.

[0055] S402, the intermediate controller identifies the periodic arrival edge of the first heartbeat frame based on the heartbeat arrival interval.

[0056] The mean filter is applied to all heartbeat arrival intervals within the sliding window to eliminate transmission jitter when the upper-level controller sends the first heartbeat frame, and a stable heartbeat period is extracted. This is used to identify the fixed period arrival edge of the first heartbeat frame, which serves as the clock synchronization reference for the intermediate-level controller.

[0057] S302. The intermediate controller calibrates its local clock based on the periodic arrival edge and the initial absolute time to obtain the current local timestamp of the intermediate controller.

[0058] The intermediate-level controller calibrates its local clock based on the periodic arrival edges and the initial absolute time, obtaining the current local timestamp. The initial absolute time can be obtained manually, written once via the debug port, or acquired and stored locally upon the intermediate-level controller's first connection to a network supporting a time synchronization protocol. It should be noted that after obtaining the initial absolute time, the intermediate-level controller stores it in non-volatile memory. If the intermediate-level controller restarts subsequently, it can retrieve the initial absolute time from the non-volatile memory.

[0059] Figure 6 This is a schematic flowchart of a method for identifying the periodic arrival edge of a first heartbeat frame, as provided in an embodiment of this application. Figure 6 As shown, S302 specifically includes S501~S503: S501, the intermediate controller estimates the clock frequency deviation of the intermediate controller relative to the upper controller based on the periodic arrival of the edge.

[0060] The clock frequency deviation of the intermediate controller relative to the upper controller is estimated by calculating the difference between the filtered mean heartbeat cycle and the theoretical standard heartbeat cycle.

[0061] S502, the intermediate stage controller determines the frequency correction amount based on the clock frequency deviation.

[0062] The clock frequency deviation is input into the PI controller, and the PI controller outputs the frequency correction amount adapted to the local clock of the intermediate stage controller.

[0063] S503, the intermediate-level controller adjusts the frequency control word of its local clock according to the frequency correction amount to calibrate the local clock of the intermediate-level controller, thereby obtaining the current local timestamp of the intermediate-level controller. .

[0064] The frequency control word of the local clock of the intermediate-level controller is adjusted by using the frequency correction amount to continuously correct the local clock running rate, complete the frequency discipline, and obtain the current local timestamp of the intermediate-level controller.

[0065] In one embodiment, Figure 7 This is a schematic flowchart of a method for calibrating the local clock of an end-effector device provided in an embodiment of this application, as shown below. Figure 7 As shown, S104 may include: S601, The end-effector captures the frame start position of the second heartbeat frame through a hardware timer to obtain the receiving timestamp of the second heartbeat frame.

[0066] The end-effector captures the frame start position of the second heartbeat frame through a hardware timer and obtains the hardware reception timestamp of the second heartbeat frame.

[0067] Specifically, the CAN transceiver data receive pin of the end effector is branched into two paths on the printed circuit board (PCB). One path connects to the processor's communication receive pin, and the other path connects to the processor's hardware timer input capture pin. When the frame start position of the second heartbeat frame sent by the intermediate controller causes a level transition on the CAN communication bus (the communication bus is not limited to Ethernet, CAN bus, RS-485, fiber optic communication bus, or serial bus), the end effector's hardware timer automatically latches the timer count value on the falling edge as a hardware receive timestamp. This subsequently generates a capture interrupt. The capture value contains no software latency, and the capture resolution is determined by the timer clock, eliminating software interrupt latency.

[0068] S602. The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame and the received timestamp of the second heartbeat frame.

[0069] Combined with the received timestamp The current local timestamp within the second heartbeat frame Calculate the second clock offset between the end device and the intermediate controller. The local clock of the end-effector is then calibrated based on this deviation. Figure 8A schematic flowchart illustrating a method for calibrating the local clock of an end-effector device, as provided in another embodiment of this application, is shown below. Figure 8 As shown, S602 specifically includes: S701, The end-effector acquires the preset capture delay of the hardware timer and the preset parsing duration of the second heartbeat frame.

[0070] The end-effector reads the preset capture delay Δt_phy and preset parsing duration Δt_frame stored in its local non-volatile memory. The preset capture delay Δt_phy is the sum of the propagation delay of the CAN transceiver and the trace delay of the printed circuit board (PCB). The preset parsing duration Δt_frame is the fixed-bit transmission time from the falling edge to the software fully parsing the timestamp (for example, under normal communication rates, the parsing time is about 260~300μs after the heartbeat frame is extended by 8 bytes). Both parameters are calibrated before the end-effector leaves the factory.

[0071] S702. The end-effector restores the current local timestamp based on the preset capture delay and preset parsing duration, and calculates the current restored timestamp.

[0072] Use the current local timestamp of the intermediate controller By superimposing the preset capture delay Δt_phy and the preset parsing duration Δt_frame, the standard timestamp corresponding to when the end-device hardware captures the second heartbeat frame is restored, and this is recorded as the current restored timestamp. .

[0073]

[0074] S703. The end-effector calculates the second clock offset based on the current restore timestamp and the current clock value of the end-effector.

[0075] Based on the current restore timestamp and the current clock value of the end-effector. Calculate the second clock offset .

[0076]

[0077] S704. The end effector calibrates its local clock according to the second clock deviation.

[0078] Exponential smoothing filter is used for the second clock skew. Noise reduction is performed, and the noise-reduced second clock deviation is written into the local clock calibration register to complete the local clock calibration of the end-effector.

[0079] In summary, multiple end-effectors connected to the same intermediate-level controller independently receive the second heartbeat frame from the intermediate-level controller. Each end-effector independently performs hardware capture of the frame start bit, delay compensation calculation, and local clock calibration. There is no need for the end-effectors to send or receive messages or engage in inter-device communication. Since all end-effectors use the frame start bit transition edge of the same second heartbeat frame on the bus as a synchronization reference, hardware capture eliminates random jitter caused by software processing, achieving relative time synchronization among multiple end-effectors. This ensures the timing consistency of collaborative sampling and synchronized actions, eliminating additional communication overhead between end-effectors and reducing system networking complexity.

[0080] In the several embodiments provided in this application, the integrated units implemented as software functional units can be stored in a computer-readable storage medium. The aforementioned software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0081] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A cascaded time synchronization method for a multi-stage system, characterized in that, The multi-level system includes: a higher-level controller, at least one intermediate-level controller, and an end-effector device; the method includes: The upper-level controller sends a first heartbeat frame to each of the intermediate-level controllers at a preset fixed period. The intermediate controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate controller. The intermediate controller carries the current local timestamp in the second heartbeat frame and sends the second heartbeat frame to the end execution device to which the intermediate controller is attached; The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame; The first heartbeat frame and the second heartbeat frame are communication frames used for online monitoring of devices in the multi-level system.

2. The method according to claim 1, characterized in that, The intermediate-level controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller, including: If the first heartbeat frame carries a higher-level timestamp, the intermediate-level controller calibrates its local clock based on the higher-level timestamp to obtain the current local timestamp of the intermediate-level controller.

3. The method according to claim 2, characterized in that, The intermediate-level controller calibrates its local clock based on the upper-level timestamp to obtain the current local timestamp of the intermediate-level controller, including: The intermediate controller obtains the received timestamp of the first heartbeat frame; The intermediate controller calculates the first clock deviation based on the received timestamp of the first heartbeat frame, the upper-level timestamp, and the preset transmission delay; The intermediate-level controller calibrates its local clock based on the first clock offset to obtain the current local timestamp of the intermediate-level controller.

4. The method according to claim 1, characterized in that, The intermediate-level controller calibrates its local clock based on the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller, and further includes: If the first heartbeat frame does not carry a higher-level timestamp, the intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the receiving timestamps of multiple consecutive first heartbeat frames. The intermediate-level controller calibrates its local clock based on the periodic arrival edge and the initial absolute time to obtain the current local timestamp of the intermediate-level controller.

5. The method according to claim 4, characterized in that, The intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the received timestamps of multiple consecutive first heartbeat frames, including: The intermediate controller calculates the heartbeat arrival interval based on the received timestamps of multiple consecutive first heartbeat frames; The intermediate-level controller identifies the periodic arrival edge of the first heartbeat frame based on the heartbeat arrival interval.

6. The method according to claim 4, characterized in that, The intermediate-level controller calibrates its local clock based on the periodic arrival edge and initial absolute time to obtain the current local timestamp of the intermediate-level controller, including: The intermediate-level controller estimates the clock frequency deviation of the intermediate-level controller relative to the upper-level controller based on the periodic arrival edge. The intermediate-level controller determines the frequency correction amount based on the clock frequency deviation; The intermediate-level controller adjusts the frequency control word of its local clock according to the frequency correction amount to calibrate the local clock of the intermediate-level controller, thereby obtaining the current local timestamp of the intermediate-level controller.

7. The method according to claim 1, characterized in that, The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame, including: The end-effector captures the frame start position of the second heartbeat frame using a hardware timer to obtain the receiving timestamp of the second heartbeat frame; The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame and the received timestamp of the second heartbeat frame.

8. The method according to claim 7, characterized in that, The end-effector calibrates its local clock based on the current local timestamp in the second heartbeat frame and the received timestamp of the second heartbeat frame, including: The end-effector acquires the preset capture delay of the hardware timer and the preset parsing duration of the second heartbeat frame; the preset capture delay is the sum of the propagation delay of the communication transceiver and the trace delay of the printed circuit board; The end-effector restores the current local timestamp based on the preset capture delay and the preset parsing duration, and calculates the current restored timestamp; The end-effector calculates the second clock offset based on the current restore timestamp and the current clock value of the end-effector; The end-effector calibrates its local clock based on the second clock deviation.

9. A multi-level system, characterized in that, include: A higher-level controller, at least one intermediate-level controller, and an end-effector; The upper-level controller is used to send a first heartbeat frame to each of the intermediate-level controllers at a preset fixed period. The intermediate-level controller is used to calibrate its local clock according to the first heartbeat frame to obtain the current local timestamp of the intermediate-level controller. The intermediate controller is used to carry the current local timestamp in the second heartbeat frame and send the second heartbeat frame to the end execution device to which the intermediate controller is attached; The end-effector is used to calibrate its local clock based on the current local timestamp in the second heartbeat frame.

10. The system according to claim 9, characterized in that, The multi-level system is an energy storage system, the upper-level controller is a microgrid controller, the intermediate-level controller is a box controller, and the terminal execution device is an energy storage converter.