Sequence generation method, target code receiving method, device and equipment

Abstract

The application discloses a sequence generation method, a target code receiving method, a device and equipment, and belongs to the communication field. The sequence generation method of the application embodiment comprises that an A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2). The target code receiving method of the application embodiment comprises that a read-write device receives a target code from the A-IoT device; wherein the target code comprises at least one of the following: a preamble, an intermediate code; wherein the target code is generated based on the first sequence x0(n1) or the second sequence x1(n2).

Description

Technical Field

[0001] This application belongs to the field of communication technology, specifically relating to a sequence generation method, a target code receiving method, an apparatus, and a device. Background Technology

[0002] In related technologies, preambles and midambles are used in device-to-reader (D2R) transmissions in Ambient Internet of Things (A-IoT) devices. The preamble is placed before the Physical Device-to-Reader Channel (PDRCH) transmission, while the midamble can be placed during or after the PDRCH transmission. Typically, the preamble is used to determine the start of the D2R transmission. Additionally, the preamble and midamble can be used to perform at least one of the following: estimation of the sample frequency offset (SFO), estimation of the carrier frequency offset (CFO), time synchronization, channel estimation, and interference estimation. However, how the A-IoT device generates the sequence corresponding to the midamble and / or preamble remains a problem to be solved. Summary of the Invention

[0003] This application provides a sequence generation method, target code receiving method, apparatus, and device that can solve the problem of generating sequences corresponding to Midamble and / or Preamble in A-IoT devices.

[0004] Firstly, a sequence generation method is provided, including:

[0005] A-IoT devices generate either a first sequence x0(n1) or a second sequence x1(n2);

[0006] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0007] or,

[0008] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0009] or,

[0010] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0011] or,

[0012] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0013] or,

[0014] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0015] or,

[0016] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0017] or,

[0018] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0019] or,

[0020] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0021] Secondly, a method for receiving target codes is provided, including:

[0022] The read / write device receives the target code from the A-IoT device;

[0023] The target code includes at least one of the following: a preamble and an intermediate code;

[0024] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0025] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0026] or,

[0027] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0028] or,

[0029] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0030] or,

[0031] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0032] or,

[0033] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0034] or,

[0035] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0036] or,

[0037] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0038] or,

[0039] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0040] Thirdly, a sequence generation apparatus is provided, comprising:

[0041] The processing module is used to generate either the first sequence x0(n1) or the second sequence x1(n2);

[0042] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0043] or,

[0044] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0045] or,

[0046] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0047] or,

[0048] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0049] or,

[0050] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0051] or,

[0052] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0053] or,

[0054] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0055] or,

[0056] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0057] Fourthly, a target code receiving device is provided, comprising:

[0058] The receiving module is used to receive the target code from the A-IoT device;

[0059] The target code includes at least one of the following: a preamble and an intermediate code;

[0060] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0061] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0062] or,

[0063] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0064] or,

[0065] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0066] or,

[0067] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0068] or,

[0069] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0070] or,

[0071] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0072] or,

[0073] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0074] or,

[0075] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0076] Fifthly, a sequence generation apparatus is provided, the apparatus being configured to perform the steps of the method described in the first aspect.

[0077] In a sixth aspect, a target code receiving apparatus is provided, the apparatus being configured to perform the steps of the method described in the second aspect.

[0078] In a seventh aspect, an A-IoT device is provided, the A-IoT device including a processor and a memory, the memory storing a program or instructions executable on the processor, the program or instructions, when executed by the processor, implementing the steps of the method as described in the first aspect.

[0079] Eighthly, an A-IoT device is provided, including a processor and a communication interface;

[0080] The processor is used to generate a first sequence x0(n1) or a second sequence x1(n2);

[0081] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0082] or,

[0083] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0084] or,

[0085] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0086] or,

[0087] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0088] or,

[0089] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0090] or,

[0091] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0092] or,

[0093] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0094] or,

[0095] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0096] In a ninth aspect, a read / write device is provided, the read / write device including a processor and a memory, the memory storing a program or instructions executable on the processor, the program or instructions, when executed by the processor, implementing the steps of the method as described in the second aspect.

[0097] In a tenth aspect, a read / write device is provided, including a processor and a communication interface;

[0098] The communication interface is used to receive target codes from A-IoT devices;

[0099] The target code includes at least one of the following: a preamble and an intermediate code;

[0100] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0101] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0102] or,

[0103] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0104] or,

[0105] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0106] or,

[0107] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0108] or,

[0109] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0110] or,

[0111] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0112] or,

[0113] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0114] or,

[0115] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0116] Eleventhly, a readable storage medium is provided, on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the first aspect, or implement the steps of the method described in the second aspect.

[0117] In a twelfth aspect, a wireless communication system is provided, comprising: an A-IoT device and a read / write device, wherein the A-IoT device is configured to perform the steps of the method described in the first aspect, and the read / write device is configured to perform the steps of the method described in the second aspect.

[0118] In a thirteenth aspect, a chip is provided, the chip including a processor and a communication interface coupled to the processor, the processor being configured to run a program or instructions to implement the steps of the method described in the first aspect, or to implement the steps of the method described in the second aspect.

[0119] In a fourteenth aspect, a computer program / program product is provided, which is stored in a storage medium and is executed by at least one processor to implement the steps of the sequence generation method as described in the first aspect, or the steps of the target code receiving method as described in the second aspect.

[0120] In this embodiment, the A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2); wherein the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2. Using the generation formulas corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate sequences corresponding to Midamble and / or Preamble, ensuring D2R transmission. Attached Figure Description

[0121] Figure 1This is a schematic diagram of a communication system architecture provided in an embodiment of this application.

[0122] Figure 2 This is one of the schematic diagrams of the A-IoT deployment scenario provided in the embodiments of this application.

[0123] Figure 3 This is the second illustrative diagram of the A-IoT deployment scenario provided in the embodiments of this application.

[0124] Figure 4 This is a schematic diagram of a preamble and intermediate code provided in an embodiment of this application.

[0125] Figure 5 This is a schematic diagram illustrating the generation principle of an m-sequence provided in an embodiment of this application.

[0126] Figure 6 This application provides a characteristic equation f(x) = 1 + x + x. 3 A schematic diagram of the corresponding shift register.

[0127] Figure 7 This is a schematic flowchart of a sequence generation method provided according to an embodiment of this application.

[0128] Figures 8 to 25 These are schematic diagrams of the shift register structure provided according to the embodiments of this application.

[0129] Figure 26 This is a schematic flowchart of a target code receiving method provided according to an embodiment of this application.

[0130] Figure 27 This is a schematic block diagram of a sequence generation apparatus provided according to an embodiment of this application.

[0131] Figure 28 This is a schematic block diagram of a target code receiving device provided according to an embodiment of this application.

[0132] Figure 29 This is a schematic block diagram of a communication device provided according to an embodiment of this application.

[0133] Figure 30 This is a schematic diagram of the hardware structure of a terminal according to an embodiment of this application.

[0134] Figure 31 This is one of the schematic block diagrams of a network-side device provided according to an embodiment of this application.

[0135] Figure 32 This is a second schematic block diagram of a network-side device provided according to an embodiment of this application. Detailed Implementation

[0136] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0137] The terms "first," "second," etc., used in this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first" and "second" are generally of the same class, not limited in number; for example, the first object can be one or more. Furthermore, "or" in this application indicates at least one of the connected objects. For example, the scope of protection for "A or B" covers at least three scenarios: Scenario 1: including A but not B; Scenario 2: including B but not A; Scenario 3: including both A and B. In addition, the terms "A and / or B," "at least one of A and B," and "at least one of A or B" also cover at least the above three scenarios. The character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0138] The term "instruction" in this application can be either a direct instruction (or explicit instruction) or an indirect instruction (or implicit instruction). A direct instruction can be understood as the sender explicitly informing the receiver of specific information, the required operation, or the requested result in the instruction sent. An indirect instruction can be understood as the receiver determining the corresponding information based on the instruction sent by the sender, or making a judgment and determining the required operation or requested result based on the judgment result.

[0139] It is worth noting that the technologies described in this application are not limited to Long Term Evolution (LTE) / LTE-Advanced (LTE-A) systems, but can also be used in other wireless communication systems, such as Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal Frequency Division Multiple Access (OFDMA), Single-carrier Frequency-Division Multiple Access (SC-FDMA), or other systems. The terms "system" and "network" in this application are often used interchangeably, and the described technologies can be used with the systems and radio technologies mentioned above, as well as with other systems and radio technologies. The following description describes New Radio (NR) systems for illustrative purposes, and the term NR is used in most of the following description; however, these technologies can also be applied to systems other than NR systems, such as 6th generation (6G) radio systems. th Generation 6G communication system.

[0140] Figure 1 This diagram illustrates a block diagram of a wireless communication system applicable to embodiments of this application. The wireless communication system includes a terminal 11, a network-side device 12, and an A-IoT device 13.

[0141] Terminal 11 can also be referred to as User Equipment (UE). Terminal 11 can be a mobile phone, tablet computer, laptop computer, notebook computer, personal digital assistant (PDA), handheld computer, netbook, ultra-mobile personal computer (UMPC), mobile internet device (MID), augmented reality (AR), virtual reality (VR) device, robot, wearable device, flight vehicle, vehicle user equipment (VUE), shipborne equipment, pedestrian user equipment (PUE), smart home (home devices with wireless communication functions, such as refrigerators, televisions, washing machines or furniture), game console, personal computer (PC), ATM or self-service machine, etc. Wearable devices include: smartwatches, smart bracelets, smart earphones, smart glasses, smart jewelry (smart bracelets, smart chains, smart rings, smart necklaces, smart anklets, smart anklets, etc.), smart wristbands, smart clothing, etc. Among these, in-vehicle devices can also be referred to as in-vehicle terminals, in-vehicle controllers, in-vehicle modules, in-vehicle components, in-vehicle chips, or in-vehicle units, etc. It should be noted that the specific type of terminal 11 is not limited in the embodiments of this application.

[0142] The network-side equipment 12 may include access network equipment or core network equipment. The access network equipment may also be referred to as Radio Access Network (RAN) equipment, Radio Access Network function, or Radio Access Network unit. The access network equipment may include base stations, Wireless Local Area Network (WLAN) access points (APs), or Wireless Fidelity (WiFi) nodes, etc. Among them, base stations can be referred to as Node B (NB), Evolved Node B (eNB), Next Generation Node B (gNB), New Radio Node B (NR Node B), Access Point, Relay Base Station (RBS), Serving Base Station (SBS), Base Transceiver Station (BTS), Radio Base Station, Radio Transceiver, Basic Service Set (BSS), Extended Service Set (ESS), Home Node B (HNB), Home Evolved Node B, Transmit / Receive Point (TRP), and Non-Terrestrial Network (NTN) equipment (such as satellite or high-altitude platform stations). The term "base station" can be any suitable term in the field, such as "station" or any other appropriate term in the relevant field, as long as the same technical effect is achieved. The term "base station" is not limited to specific technical terms. It should be noted that the embodiments of this application only use the base station in the NR system as an example for introduction, and do not limit the specific type of base station.

[0143] Core network equipment, also known as core network nodes, core network functions, or core network elements, includes, but is not limited to, at least one of the following: Mobility Management Entity (MME), Access and Mobility Management Function (AMF), Session Management Function (SMF), User Plane Function (UPF), Policy Control Function (PCF), Policy and Charging Rules Function (PCRF), Edge Application Server Discovery Function (EASDF), Unified Data Management (UDM), Unified Data Repository (UDR), Home Subscriber Server (HSS), Centralized network configuration (CNC), Network Repository Function (NRF), Network Exposure Function (NEF), Local NEF (L-NEF), and Binding Support. Functions include BSF, Application Function (AF), Location Management Function (LMF), Gateway Mobile Location Centre (GMLC), Network Data Analytics Function (NWDAF), and Non-Terrestrial Network (NTN) equipment (such as satellite or high altitude platform station).It should be noted that the embodiments of this application only use the core network equipment in the NR system as an example for introduction, and do not limit the specific type of core network equipment. If the name of the core network equipment mentioned in the embodiments of this application changes in subsequent protocol versions (e.g., 6G), it is also within the scope of protection of this application.

[0144] Optionally, the core network equipment can be implemented by one or more functional modules in a single device, or by multiple devices working together; this application does not specifically limit this. It is understood that the aforementioned functional modules can be network elements in hardware devices, software functional modules running on dedicated hardware, or virtualized functional modules instantiated on a platform (e.g., a cloud platform).

[0145] Optionally, an A-IoT device may include, but is not limited to, at least one of the following: a response device, an A-IoT terminal, a passive-IoT device, an ambient power (AMP) device, a zero-power device, a zero-power terminal, a response device, a low-power IoT device, an IoT device, a tag, a radio frequency identification (RFID) tag, a terminal, a low-capability terminal, or a device consisting of some components on a terminal.

[0146] Optionally, the device communicating with the A-IoT device can be a read / write device (also known as a reader or writer), wherein the read / write device may include, but is not limited to, at least one of the following: terminal, relay device, auxiliary node, repeater, access network device (such as base station or TRP), core network device.

[0147] It should be noted that, Figure 1 An exemplary embodiment shows a network-side device, two terminals, and two A-IoT devices. Optionally, the wireless communication system may include at least two network-side devices, and the coverage area of ​​each network-side device may include other numbers of terminals and A-IoT devices. This application embodiment does not limit this.

[0148] To better understand the technical solution of this application, the response device related to this application is described below.

[0149] Response devices: Response devices can communicate using backscattered radio frequency (RF) signals, or some active tags can generate signals actively. Because the energy of response devices can come from the environment, such as ambient RF energy, heat, wind power, kinetic energy, etc., they can also be considered A-IoT devices. Therefore, response devices can also be viewed as a type of terminal or terminal device. In one possible implementation, the response device can be a tag, and it can be active, passive, or semi-active.

[0150] Reading and writing device: A handheld or fixed device that reads (and sometimes writes) information from a response device. It can also be understood as a device that communicates with the response device. For example, it can be a terminal, a base station, or a device with read and write functions, such as a reader. The specifics are not limited here. The reading and writing device can send carrier excitation signals to the response device or send control commands to the response device.

[0151] In some implementations, transponders can be classified based on their energy storage capacity and their ability to generate and transmit radio frequency signals. Transponders can include the following three types:

[0152] Device 1: No energy storage, no independent signal generation / amplification, i.e., backscatter transmission;

[0153] Device 2a: It has energy storage but no independent signal generation, i.e., backscatter transmission. The use of stored energy can include amplification of the reflected signal.

[0154] Device 2b: It has energy storage and independent signal generation, that is, it has active radio frequency components for transmission.

[0155] It should be noted that different energy storage capacities of devices also affect their transmission quality. Generally, devices with higher energy storage capacity also mean higher receiving sensitivity or higher transmitting power, and the reliability of the receiving or transmitting link can be better guaranteed.

[0156] To facilitate a better understanding of the embodiments of this application, the deployment scenarios of the A-IoT devices related to this application are described.

[0157] A-IoT can exist in a variety of deployment scenarios. The following describes two of them.

[0158] Scenario 1, such as Figure 2As shown, the base station (BS) (a network-side device) communicates directly with the A-IoT device to transmit A-IoT data and signaling. The base station sending reader-to-A-IoT device (R2D) signals and the base station receiving A-IoT device-to-reader (D2R) signals can be the same or different. It should be noted that R2D refers to the transmission sent by the reader (e.g., the base station) and / or the transmission received by the A-IoT device. D2R refers to the transmission sent by the A-IoT device and / or the transmission received by the reader (e.g., the base station).

[0159] Scenario 2, such as Figure 3 As shown, the Base Station (BS) communicates with A-IoT devices through intermediate nodes. These intermediate nodes can be UEs, repeaters, relay devices, integrated access and backhaul (IAB) nodes, etc. The BS can control the intermediate nodes through air interface signaling or other interfaces; for example, the BS can control the UE through the NR Uu air interface.

[0160] To facilitate a better understanding of the embodiments of this application, the D2R transmission related to this application will be described.

[0161] Consider using a preamble and a midamble in D2R transmission. The preamble is placed before the Physical Device-to-Reader Channel (PDRCH) transmission, while the midamble can be placed during or after the PDRCH transmission. Typically, the preamble is used to determine the start of the D2R transmission. Optionally, the preamble and midamble can also be used to perform at least one of the following: estimation of the Sample Frequency Offset (SFO), estimation of the Carrier Frequency Offset (CFO), time synchronization, channel estimation, and interference estimation. For example, the transmission positions of the preamble and midamble relative to the PDRCH transmission can be as follows: Figure 4 As shown, Figure 4 The Midamble shown is all located in the PDRCH transmission.

[0162] To facilitate a better understanding of the embodiments of this application, the A-IoT communication content related to this application will be described.

[0163] A-IoT communication includes the following three types of transmitted content:

[0164] (1) Carrier channel or signal.

[0165] (2) Control channel or signal; the control channel can be described as the Physical Reader-to-A-IoT Device Channel (PRDCH), which carries R2D transmission.

[0166] (3) Feedback channel or signal; the control channel can be described as the Physical A-IoT Device-to-Reader Channel (PDRCH), which carries D2R transmission.

[0167] (1) A carrier channel or signal, for example, the carrier channel or signal includes: an excitation signal; in one embodiment, the carrier channel or signal may be information sent to the tag by a network-side device, or information sent to the tag by a terminal. Optionally, the carrier channel or signal may also include: a data channel, or a shared channel.

[0168] (2) Control channels or signals, such as: select signal, query signal, repeat query signal, reply signal, read signal, write signal, random request signal, etc., which can be simply referred to as commands; in one embodiment, the control channels or signals can be information sent from the network-side device to the tag, or information sent from the terminal to the tag.

[0169] (3) Feedback channels or signals, such as: Tag identification information (e.g., a 16-bit random number temporarily representing the Tag identity during the query process), electronic product code information, Tag status information, etc.), can be simply referred to as feedback. In one embodiment, the feedback channel or signal can be information sent by the tag to the terminal through backscattering, or information sent by the tag to the network-side device through backscattering.

[0170] To better understand the technical solution of this application, the m-sequences related to this application are explained below.

[0171] m-sequence is short for maximal length linear feedback shift register sequence. Figure 5This is a general diagram illustrating the generation principle of m-sequences. Figure 5 The state of each register in the middle is represented by 'a', where a = 0 or a = 1. The connection state of the feedback line is represented by 'C', where C = 1 indicates that the line is connected (participating in feedback), and C = 0 indicates that the line is disconnected (not participating in feedback).

[0172] Let the initial state of an n-stage shift register be: a n-1 ,a n-2 If a1, a0, then the shift register is shifted one more time, and the new input a on the left is obtained. n It can be represented as follows:

[0173]

[0174] Generally speaking, for any newly obtained input a on the left end... k The recurrence relation is as follows:

[0175]

[0176] The summation in the above formula is a modulo 2 operation.

[0177] As can be seen from the above, c i The value of c determines the feedback connection and sequence structure of the shift register, therefore c i It is a very important parameter, c i It can also be represented by the following characteristic equation (or characteristic polynomial):

[0178]

[0179] In the above formula, x i Simply specify that its coefficient (1 or 0) represents c i The value of x itself has no practical meaning, and there is no need to calculate its value. For example, if the characteristic equation is:

[0180] f(x) = 1 + x + x 4

[0181] Then it only represents x 0 ,x 1 and x 4 The coefficients c0 = c1 = c4 = 1, and the rest of c i =0, that is, c2 = c3 = 0.

[0182] After the shift register is initialized, let's assume the initial state is a. n-1 ,a n-2 The sequence output by the shift register after continuous shifting, ..., a1, a0, is represented by x(i). Therefore:

[0183] x(i)=a i,0≤i≤n-1

[0184] x(i)=(c n x(i)+c n-1 x(i+1)+…+c2x(i+n-2)+c1x(i+n-1))mod 2

[0185] For example, the characteristic equation f(x) = 1 + x + x 3 The corresponding shift register block diagram is shown in Figure 6.

[0186] Then its corresponding output sequence x(i) can be expressed as:

[0187] x(0)=a0, x(1)=a1, x(2)=a2,

[0188] x(i+3)=(x(i)+x(i+2))mod 2,i≥0

[0189] The above representation is referred to as the sequence generation formula representation.

[0190] A linear feedback shift register can generate an m-sequence if and only if the characteristic polynomial of the shift register is a primitive polynomial. If an nth-degree polynomial f(x) satisfies the following condition:

[0191] f(x) is irreducible;

[0192] f(x) is divisible by (x) m +1), m=2 n -1;

[0193] f(x) is not divisible by (x) q +1),q <m;

[0194] Then f(x) is called a primitive polynomial. An irreducible polynomial is a polynomial that cannot be factored, i.e., f(x) ≠ f1(x)f2(x). It should be noted that the addition and subtraction operations between polynomials of the same order are modulo-2 operations. For example:

[0195] (x 4 +x 3 +x 2 +x+1)(x+1)

[0196] =x 5 +x 4 +x 3 +x 2 +x+x 4 +x 3 +x 2 +x+1

[0197] =x 5+(x 4 +x 4 )+(x 3 +x 3 )+(x 2 +x 2 )+(x+x)+1

[0198] =x 5 +1

[0199] Furthermore, the initial state of the shift register for an m-sequence should avoid being all "0"s; otherwise, the shift register will remain in a state of all "0"s after shifting, and its state will not change. For the structure of an n-stage shift register that generates an m-sequence, the period of the generated m-sequence is 2. n -1, that is, when 2 is generated n After a sequence of length -1, the shift register will return to its initial state.

[0200] For n=3, n=4 and n=5, all primitive polynomials that can generate m sequences are shown in Table 1.

[0201] Table 1

[0202]

[0203] The embodiments of this application mention sparse primitive polynomials, which refer to primitive polynomials with a small number of non-zero terms, such as f(x) = x for the case of n = 5. 5 +x 2 +1 and f(x) = x 5 +x 3 The non-zero terms of +1 are fewer than those of other primitive polynomials, and can be described as sparse.

[0204] The sequence generation method provided in this application will be described in detail below with reference to the accompanying drawings and through some embodiments and application scenarios.

[0205] Figure 7 This is a schematic flowchart of a sequence generation method 200 according to an embodiment of this application, such as... Figure 7 As shown, the sequence generation method 200 may include at least some of the following:

[0206] S210, the A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2).

[0207] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0208] or,

[0209] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0210] or,

[0211] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0212] or,

[0213] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0214] or,

[0215] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0216] or,

[0217] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0218] or,

[0219] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0220] or,

[0221] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0222] It should be understood that Figure 7 The steps or operations of the sequence generation method 200 are illustrated, but these steps or operations are merely examples, and other operations may be performed in this application. Figure 7 Variations of various operations within it.

[0223] In this embodiment, the A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2); wherein the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2. Using the generation formulas corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate sequences corresponding to Midamble and / or Preamble, ensuring D2R transmission.

[0224] It is understandable that the generation formula of the first sequence x0(n1) can be paired and combined with the generation formula of the second sequence x1(n2), so that the first sequence x0(n1) and the second sequence x1(n2) can share some logic XOR gate circuits and shift registers, which can save hardware resources such as logic XOR gate circuits and shift registers on the A-IoT device side.

[0225] In the embodiments of this application, the length of the first sequence x0(n1) is shorter than the length of the second sequence x1(n2). The first sequence x0(n1) can also be called a short sequence, and the second sequence x1(n2) can also be called a long sequence.

[0226] In this embodiment of the application, by making the register structure of the first sequence x0(n1) partially the same as the register structure of the second sequence x1(n2), the first sequence x0(n1) can share some of the logic XOR gate circuits and shift registers of the second sequence x1(n2), thereby saving hardware resources such as logic XOR gate circuits and shift registers on the A-IoT device side.

[0227] It should be understood that i in the embodiments of this application is a non-negative integer (i≥0). Among them, the specific value of the first sequence x0(n1) is constrained by n1; the specific value of the second sequence x1(n2) is constrained by n2.

[0228] In some embodiments, for the first sequence x0(n1), if 0 ≤ n1 < 7, the length of the first sequence x0(n1) is 7; if 0 ≤ n1 < 15, the length of the first sequence x0(n1) is 15. For the second sequence x1(n2), if 0 ≤ n2 < 31, the length of the second sequence x1(n2) is 31.

[0229] In some embodiments, the above-described S210 may specifically include:

[0230] The A-IoT device generates the first sequence x0(n1) or the second sequence x1(n2) through a target shift register.

[0231] In this embodiment, the target shift register can be a shift register shared by the first sequence x0(n1) and the second sequence x1(n2).

[0232] In some embodiments, it is assumed that the primitive polynomial corresponding to the second sequence x1(n2) is represented as f1(x) = x M +x M-1 +…1 (e.g., non-sparse primitive polynomials), the primitive polynomial corresponding to the first sequence x0(n1) is expressed as f0(x)=x N +x N-1+…1, where M and N are both positive integers, and M>N. The following is a general description of how the hardware resources, such as the XOR gates and shift registers of the first sequence x0(n1), can reuse the hardware resources, such as the XOR gates and shift registers of the second sequence x1(n2):

[0233] If the first N terms of the higher-order primitive polynomial corresponding to the second sequence x1(n2) are equal to f0(x)*x i If i is an integer greater than or equal to 0, then the hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the higher-order part of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0234] If the first N lower-order terms of the primitive polynomial corresponding to the second sequence x1(n2) are equal to f0(x), then the hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the lower-order part of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0235] For example, the primitive polynomial corresponding to the first sequence x0(n1) is: f0(x) = x 3 +x+1, the primitive polynomial corresponding to the second sequence x1(n2) is: f1(x)=x 5 +x 4 +x 3 +x+1, the first 3 lower-order terms of the second sequence x1(n2) are x 3 +x+1 is the same as the primitive polynomial corresponding to the first sequence x0(n1). The hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the low-order part of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0236] For example, the primitive polynomial corresponding to the first sequence x0(n1) is: f0(x) = x 3 +x+1, the primitive polynomial corresponding to the second sequence x1(n2) is: f1(x)=x 5 +x 3 +x 2 +x+1, the first 3 higher-order terms of the second sequence x1(n2) are x 5 +x 3 +x 2 =f1(x)*x 2 The hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the higher-order parts of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0237] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+2)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 3 +x+1 are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 8 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+1) + x1(i+2) + x1(i+4)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 4 +x 3 +x+1 are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 9 As shown.

[0238] It should be noted that if two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are processed by the above... Figure 8 and Figure 9 The shift register structure shown is generated independently, requiring a total of 4 logic XOR gates and 8 shift registers. In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, such as... Figure 10 As shown, shift registers a2, a3, a4, and the XOR gate at feedback line C1 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch circuit is connected to the solid line; when generating the second sequence x1(n2), the switch circuit is connected to the dashed line. By sharing the circuit, a total of 3 XOR gates and 5 shift registers are required, which saves the hardware resources of 1 XOR gate and 3 shift registers compared to implementing them with independent circuits. In this embodiment, the hardware resources such as the XOR gate circuit and shift register of the first sequence x0(n1) can reuse the lower-order parts of the hardware resources such as the XOR gate circuit and shift register of the second sequence x1(n2).

[0239] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+2)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 3+x+1 are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 8 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2) + x1(i+3) + x1(i+4)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 3 +x 2 +x+1 are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 11 As shown.

[0240] It should be noted that if two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are processed by the above... Figure 8 and Figure 11 The shift register structure shown is generated independently, requiring a total of 4 logic XOR gates and 8 shift registers. In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, such as... Figure 12 As shown, registers a0, a1, a2, and the XOR gate at feedback line C3 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switching circuit is open; when generating the second sequence x1(n2), the switching circuit is connected to the dotted line. By sharing the circuit, a total of 3 XOR gates and 5 shift registers are required, which saves the hardware resources of 1 XOR gate and 3 shift registers compared to implementing it with independent circuits. In this embodiment, the hardware resources such as the XOR gate circuit and shift register of the first sequence x0(n1) can reuse the higher-order parts of the hardware resources such as the XOR gate circuit and shift register of the second sequence x1(n2).

[0241] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 3 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 13As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+1) + x1(i+2) + x1(i+3)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 4 +x 3 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 14 As shown.

[0242] It should be noted that if two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are processed by the above... Figure 13 and Figure 14 The shift register structure shown is generated independently, requiring a total of 4 logic XOR gates and 8 shift registers. In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, such as... Figure 15 As shown, shift registers a2, a3, a4, and the XOR gate at feedback line C2 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch circuit is connected to the solid line; when generating the second sequence x1(n2), the switch circuit is connected to the dashed line. By sharing the circuit, a total of 3 XOR gates and 5 shift registers are required, which saves the hardware resources of 1 XOR gate and 3 shift registers compared to implementing it with independent circuits. In this embodiment, the hardware resources such as the XOR gate circuit and shift register of the first sequence x0(n1) can reuse the lower-order parts of the hardware resources such as the XOR gate circuit and shift register of the second sequence x1(n2).

[0243] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) is: f0(x) = x 3 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 13As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+1) + x1(i+3) + x1(i+4)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 4 +x 2 +x+1 are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 16 As shown.

[0244] It should be noted that if two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are processed by the above... Figure 13 and Figure 16 The shift register structure shown is generated independently, requiring a total of 4 logic XOR gates and 8 shift registers. In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, such as... Figure 17 As shown, shift registers a0, a1, a2, and the XOR gate at feedback line C4 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when the first sequence x0(n1) is generated, the switch is open; when the second sequence x1(n2) is generated, the switch circuit is connected to the dotted line. By sharing the circuit, a total of 3 XOR gates and 5 shift registers are required, which saves the hardware resources of 1 XOR gate and 3 shift registers compared to implementing it with independent circuits. In this embodiment, the hardware resources such as the XOR gate circuit and shift register of the first sequence x0(n1) can reuse the higher-order parts of the hardware resources such as the XOR gate circuit and shift register of the second sequence x1(n2).

[0245] In some embodiments, the second sequence x1(n2) uses a sparse primitive polynomial, such as having a small number of non-zero terms, thereby requiring fewer logic XOR gates (e.g., only one logic XOR gate is needed for n2=5), and the polynomial is selected so that the first sequence x0(n1) and the second sequence x1(n2) can share the hardware structure, in order to further save hardware resources on the A-IoT device side.

[0246] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+2)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 3+x+1 are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 8 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 3 +1 (such as a sparse primitive polynomial) is equivalent to x1(n2), essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 18 As shown.

[0247] In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, as follows: Figure 19 As shown, the XOR gates at shift registers a0, a1, a2, and feedback line C3 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch is connected to the solid line; when generating the second sequence x1(n2), the switch is connected to the dashed line. By sharing the circuit, only one XOR gate and five shift registers are needed, further saving hardware resources on the A-IoT device side. In this embodiment, the hardware resources such as the XOR gate circuit and shift registers of the first sequence x0(n1) can reuse the higher-order parts of the hardware resources such as the XOR gate circuit and shift registers of the second sequence x1(n2).

[0248] In some embodiments, if n1 = 3, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 3 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 13 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 20 As shown.

[0249] In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, as follows: Figure 21 As shown, shift registers a2, a3, a4, and the XOR gate at feedback line C2 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch is connected to the solid line; when generating the second sequence x1(n2), the switch is connected to the dashed line. By sharing the circuit, only one XOR gate and five shift registers are needed, further saving hardware resources on the A-IoT device side. In this embodiment, the hardware resources such as the XOR gate circuit and shift register of the first sequence x0(n1) can reuse the lower-order parts of the hardware resources such as the XOR gate circuit and shift register of the second sequence x1(n2).

[0250] In some embodiments, if n1 = 4, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 4 +x 3 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 22 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 3 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 18 As shown.

[0251] In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, as follows: Figure 23As shown, shift registers a1, a2, a3, a4, and the logic XOR gate at feedback line C3 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch is connected to the solid line; when generating the second sequence x1(n2), the switch is connected to the dashed line. By sharing the circuit, only one logic XOR gate and five shift registers are needed, saving hardware resources on the A-IoT device side. In this embodiment, the hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the lower-order parts of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0252] In some embodiments, if n1 = 4, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) can be: f0(x) = x 4 +x+1 are equivalent, essentially representing the same sequence generation method corresponding to the first sequence x0(n1). The shift register structure corresponding to the first sequence x0(n1) is as follows: Figure 24 As shown. If n2 = 5, the generating formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) can be: f1(x) = x 5 +x 2 +1, the two are equivalent, essentially representing the same sequence generation method corresponding to the second sequence x1(n2). The shift register structure corresponding to the second sequence x1(n2) is as follows: Figure 20 As shown.

[0253] In this embodiment, two sequences of different lengths (i.e., the first sequence x0(n1) and the second sequence x1(n2)) are generated through a common circuit structure, as follows: Figure 25 As shown, shift registers a0, a1, a2, a3 and the logic XOR gate at feedback line C2 can be shared. The switching between the first sequence x0(n1) and the second sequence x1(n2) can be controlled by two switches. For example, when generating the first sequence x0(n1), the switch is connected to the solid line; when generating the second sequence x1(n2), the switch is connected to the dashed line. By sharing the circuit, only one logic XOR gate and five shift registers are needed, saving hardware resources on the A-IoT device side. In this embodiment, the hardware resources such as the logic XOR gate circuit and shift register of the first sequence x0(n1) can reuse the higher-order parts of the hardware resources such as the logic XOR gate circuit and shift register of the second sequence x1(n2).

[0254] In some embodiments, the initial state of the shift register shared or multiplexed by the first sequence x0(n1) and the second sequence x1(n2) cannot be all 0, thereby ensuring that the shift register states are not all 0 when generating the first sequence x0(n1) and generating the second sequence x1(n2), ensuring the normal generation of the first sequence x0(n1) and the second sequence x1(n2), and the initial state of the shift register only needs to be initialized once.

[0255] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0:

[0256] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2;

[0257] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2;

[0258] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.

[0259] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0260] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0261] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0262] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0263] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. When the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0264] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, and the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0265] In some implementations, if n1 = 3 and n2 = 5, in the above embodiment, when the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1). For example, the initial state of the shift register is set to [a4 a3 a2 a1 a0] = [1 0 0 0 0]. When generating the first sequence x0(n1), [x0(2)x0(1)x0(0)] = [1 0 0]. When generating the second sequence x1(n2), [x1(4)x1(3)x1(2)x1(1)x1(0)] = [10 0 0 0]. In other words, the initialization parameters of the first sequence x0(n1) are x0(2) = 1, x0(1) = 0, and x0(0) = 0. The initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, and x1(0) = 0.

[0266] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0:

[0267] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2;

[0268] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2;

[0269] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2.

[0270] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. If the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the states of shift registers a2 a1 a0 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0271] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0272] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. If the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0273] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0274] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. When the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0275] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0276] In some implementations, if n1 = 3 and n2 = 5, in the above embodiment, when the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the states of shift registers a2 a1 a0 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1). For example, the initial state of the shift register is set to [a4 a3 a2 a1 a0] = [0 0 0 0 1]. When generating the first sequence x0(n1), [x0(2)x0(1)x0(0)] = [0 0 1]. When generating the second sequence x1(n2), [x1(4)x1(3)x1(2)x1(1)x1(0)] = [00 0 0 1]. In other words, the initialization parameters of the first sequence x0(n1) are x0(2) = 0, x0(1) = 0, and x0(0) = 1. The initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, and x1(0) = 1.

[0277] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, then for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0.

[0278] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 a1 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0279] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the first sequence x0(n1) are x0(3)=1, x0(2)=0, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0280] In some implementations, if n1 = 4 and n2 = 5, in the above embodiment, if the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 a1 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1). For example, the initial state of the shift register is set to [a4 a3 a2 a1 a0] = [1 0 0 0 0]. When generating the first sequence x0(n1), [x0(3)x0(2)x0(1)x0(0)] = [1 0 0 0]. When generating the second sequence x1(n2), [x1(4)x1(3)x1(2)x1(1)x1(0)] = [1 0 0 0 0]. In other words, the initialization parameters of the first sequence x0(n1) are x0(3) = 1, x0(2) = 0, x0(1) = 0, and x0(0) = 0. The initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, and x1(0) = 0.

[0281] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, then for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0.

[0282] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0. When the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a3 a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0283] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, the initialization parameters of the first sequence x0(n1) are x0(3)=0, x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0284] In some implementations, if n1 = 4 and n2 = 5, in the above embodiment, when the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the states of shift registers a3 a2 a1 a0 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1). For example, the initial state of the register is set to [a4 a3 a2 a1 a0] = [0 0 0 0 1]. When generating the first sequence x0(n1), [x0(3)x0(2)x0(1)x0(0)] = [0 0 0 1]. When generating the second sequence x1(n2), [x1(4)x1(3)x1(2)x1(1)x1(0)] = [0 0 0 0 1]. In other words, the initialization parameters of the first sequence x0(n1) are x0(3) = 0, x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

[0285] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[1 0 0], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[1 0 0 0 0], the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[1 0 1 1 1 0] The second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[1 1 0 1 01 0 0 1 0 0 0 1 0 1 1 1 1 1 0 1 1 0 0 1 1 1 0 0 0 0].

[0286] In some embodiments, if the generation formula of the first sequence x0(n1) is x0(i+3)=(x0(i)+x0(i+2))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[0 0 1], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 1], and the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[0 1 1 1 0 0] 1], the second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[0 1 1 0 10 1 0 0 0 1 1 1 0 1 1 1 1 1 0 0 1 0 0 1 1 0 0 0 0 1].

[0287] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[1 0 0], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[1 0 0 0 0], the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[1 1 1 0 1 0] The second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[1 1 0 0 10 0 1 1 1 1 1 0 1 1 1 0 0 0 1 0 1 0 1 1 0 1 0 0 0 0].

[0288] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[0 0 1], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 1], the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[1 1 0 1 0 0] 1], the second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[1 1 0 0 11 0 1 1 1 1 1 0 1 0 0 0 1 0 0 1 0 1 0 1 1 0 0 0 1].

[0289] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[0 0 1], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 1], the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[01 1 1 0 0] 1], the second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[0 1 0 1 11 0 1 1 0 0 0 11 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1].

[0290] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(2)x0(1)x0(0)]=[1 0 0], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[1 0 0 0 0], the final generated first sequence x0(n1) is: [x0(6)x0(5)…x0(0)]=[11 1 0 1 0] The second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[1 0 0 1 01 1 0 0 1 1 1 11 0 0 0 1 1 0 1 1 1 0 1 0 1 0 0 0 0].

[0291] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(3)x0(2)x0(1)x0(0)]=[1 0 0 0], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[1 0 0 0 0], the final generated first sequence x0(n1) is: [x0(14)x0(13)…x0(0)]=[1 1 1 1 0 1 0 1 1 0 0 1 0 0] The second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0].

[0292] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod2, the initialization parameters of the first sequence x0(n1) are: [x0(3)x0(2)x0(1)x0(0)]=[0 0 0 1], the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, the initialization parameters of the second sequence x1(n2) are: [x1(4)x1(3)x1(2)x1(1)x1(0)]=[0 0 0 0 1], the final generated first sequence x0(n1) is: [x0(14)x0(13)…x0(0)]=[0 0 1 1 0 1 0 1 1 1 1 0 0 0] 1], the second sequence x1(n2) is: [x0(30)x0(29)…x0(0)]=[0 0 1 0 1 1 0 0 1 1 1 1 1 0 0 0 1 1 0 1 1 1 0 1 0 1 0 0 0 1].

[0293] In some embodiments, the second sequence x1(n2) (n2 = 5) uses a sparse primitive polynomial, and the hardware structures of the first sequence x0(n1) and the second sequence x1(n2) are implemented independently. For the second sequence x1(n2), by selecting a sparse primitive polynomial, i.e., a polynomial with a small number of non-zero terms, the number of required XOR gates is reduced (e.g., only one XOR gate is needed), thereby saving hardware resources on the A-IoT device side. In this case, the generation circuits corresponding to the first sequence x0(n1) and the second sequence x1(n2) can also be implemented separately (not universally applicable), which can also relatively save hardware resources on the A-IoT device side.

[0294] In some implementations, if the length of the first sequence x0(n1) is 7, a shift register structure with n1 = 3 levels is used; if the length of the second sequence x1(n2) is 31, a shift register structure with n2 = 5 levels is used.

[0295] The generating formula for the first sequence x0(n1) can be: x0(i+3) = (x0(i) + x0(i+2)) mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) is: f(x) = x 3 +x+1; or, the generating formula for the first sequence x0(n1) can be: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) is: f(x)=x 3 +x 2 +1;

[0296] The generating formula for the second sequence x1(n2) can be: x1(i+5) = (x1(i) + x1(i+2)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) is: f(x) = x 5 +x 3 +1; or, the generating formula for the second sequence x1(n2) can be: x1(i+5)=(x1(i)+x1(i+3))mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) is: f(x)=x 5 +x 2 +1.

[0297] In some implementations, if the length of the first sequence x0(n1) is 15, a shift register structure with n1 = 4 levels is used; if the length of the second sequence x1(n2) is 31, a shift register structure with n2 = 5 levels is used.

[0298] The generating formula for the first sequence x0(n1) can be: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) is: f(x)=x 4 +x+1; or, the generating formula for the first sequence x0(n1) can be: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the primitive polynomial corresponding to the first sequence x0(n1) is: f(x)=x 4 +x 3 +1;

[0299] The generating formula for the second sequence x1(n2) can be: x1(i+5) = (x1(i) + x1(i+2)) mod 2, and the primitive polynomial corresponding to the second sequence x1(n2) is: f(x) = x 5 +x 3 +1; or, the generating formula for the second sequence x1(n2) can be: x1(i+5)=(x1(i)+x1(i+3))mod 2, and the primitive polynomials corresponding to the second sequence x1(n2) are: f(x)=x 5 +x 2 +1.

[0300] In some embodiments, the sequence generation method 200 further includes:

[0301] The A-IoT device generates a target code based on the first sequence x0(n1) or the second sequence x1(n2);

[0302] The A-IoT device sends the target code to the reading and writing device;

[0303] The target code includes, but is not limited to, at least one of the following: a preamble and a midamble.

[0304] It should be noted that the target code generated based on the first sequence x0(n1) corresponds to the short format of the target code; the target code generated based on the second sequence x1(n2) corresponds to the long format of the target code.

[0305] In this embodiment, the A-IoT device generates a target code based on the first sequence x0(n1) or the second sequence x1(n2), thereby generating a short-format target code or a long-format target code.

[0306] In some embodiments, the sequence generation method 200 further includes:

[0307] The A-IoT device receives instruction information from the read / write device;

[0308] The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

[0309] In this embodiment, the A-IoT device can generate a target code using a first sequence x0(n1) based on the instructions of the read / write device, or the A-IoT device can generate a target code using a second sequence x1(n2) based on the instructions of the read / write device.

[0310] In some embodiments, the sequence generation method 200 further includes:

[0311] The A-IoT device generates a first target code based on the first sequence x0(n1);

[0312] The A-IoT device generates a second target code based on the second sequence x1(n2);

[0313] The A-IoT device sends the first target code to the read / write device in the first D2R transmission, and the A-IoT device sends the second target code to the read / write device in the second D2R transmission;

[0314] The first D2R transmission is different from the second D2R transmission;

[0315] The first target code includes at least one of the following: a preamble and an intermediate code;

[0316] The second target code includes at least one of the following: a preamble and an intermediate code.

[0317] In this embodiment, the A-IoT device can use different sequences to generate different target codes in different D2R transmissions, thereby enabling flexible generation of target codes.

[0318] The above text combined Figures 7 to 25 The following describes in detail the A-IoT device-side embodiments of this application, in conjunction with... Figure 26 The present application describes in detail the read / write device-side embodiments. It should be understood that the read / write device-side embodiments correspond to the A-IoT device-side embodiments, and similar descriptions can be found in the A-IoT device-side embodiments.

[0319] Figure 26 This is a schematic flowchart of the target code receiving method 300 according to an embodiment of this application, such as... Figure 26 As shown, the target code receiving method 300 may include at least some of the following:

[0320] S310, the reader / writer receives the target code from the A-IoT device;

[0321] The target code includes at least one of the following: a preamble and an intermediate code;

[0322] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0323] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0324] or,

[0325] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0326] or,

[0327] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0328] or,

[0329] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0330] or,

[0331] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0332] or,

[0333] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0334] or,

[0335] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0336] or,

[0337] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0338] It should be understood that Figure 26 The steps or operations of the target code receiving method 300 are shown, but these steps or operations are merely examples, and other operations may be performed in this application. Figure 26 Variations of various operations within it.

[0339] In this embodiment, the read / write device receives a target code from an A-IoT device; wherein the target code includes at least one of the following: a preamble and an intermediate code; wherein the target code is generated based on a first sequence x0(n1) or a second sequence x1(n2); the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.Using the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate the sequence corresponding to the target code (Midamble and / or Preamble), and the reading and writing device can receive the target code (Midamble and / or Preamble) generated based on the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, thus ensuring D2R transmission.

[0340] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0:

[0341] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2;

[0342] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2;

[0343] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.

[0344] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0345] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0346] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0347] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0348] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0. When the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0349] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, and the initialization parameters of the first sequence x0(n1) are x0(2)=1, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0350] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0:

[0351] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2;

[0352] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2;

[0353] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2.

[0354] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. If the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the states of shift registers a2 a1 a0 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0355] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0356] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. If the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0357] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0358] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod2, for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0. When the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0359] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the first sequence x0(n1) are x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0360] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, then for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0.

[0361] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod2, for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0. If the first sequence x0(n1) can reuse the lower-order part of the second sequence x1(n2), the states of shift registers a4 a3 a2 a1 are not all 0, which can ensure that the states of shift registers are not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0362] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, the initialization parameters of the first sequence x0(n1) are x0(3)=1, x0(2)=0, x0(1)=0, x0(0)=0, and the initialization parameters of the second sequence x1(n2) are x1(4)=1, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=0.

[0363] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, then for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0.

[0364] In this embodiment, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod2, for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0. When the first sequence x0(n1) can reuse the higher-order part of the second sequence x1(n2), the state of shift registers a3 a2 a1 a0 is not all 0, which can ensure that the state of shift registers is not all 0 when generating the first sequence x0(n1), and can ensure the normal generation of the first sequence x0(n1).

[0365] Optionally, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, the initialization parameters of the first sequence x0(n1) are x0(3)=0, x0(2)=0, x0(1)=0, x0(0)=1, and the initialization parameters of the second sequence x1(n2) are x1(4)=0, x1(3)=0, x1(2)=0, x1(1)=0, x1(0)=1.

[0366] In some embodiments, the sequence generation method 300 further includes:

[0367] The read / write device sends instruction information to the A-IoT device;

[0368] The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

[0369] In some embodiments, the sequence generation method 300 further includes:

[0370] The read / write device receives a first target code from the A-IoT device in a first A-IoT device-to-read / write device D2R transmission, and the read / write device receives a second target code from the A-IoT device in a second D2R transmission;

[0371] Wherein, the first target code is generated based on the first sequence x0(n1), and the second target code is generated based on the second sequence x1(n2);

[0372] The first D2R transmission is different from the second D2R transmission;

[0373] The first target code includes at least one of the following: a preamble and an intermediate code;

[0374] The second target code includes at least one of the following: a preamble and an intermediate code.

[0375] The sequence generation method provided in this application can be executed by a sequence generation device. This application uses an example of a sequence generation device executing the sequence generation method to illustrate the sequence generation device provided in this application.

[0376] The target code receiving method provided in this application can be executed by a target code receiving device. This application uses the example of a target code receiving device executing the target code receiving method to illustrate the target code receiving device provided in this application.

[0377] This application provides a sequence generation apparatus. As an example, the sequence generation apparatus may be a communication device or a component within a communication device, such as a chip. The communication device may be an A-IoT device. Exemplarily, the A-IoT device may include, but is not limited to, the types of A-IoT devices 13 listed above; this application does not impose specific limitations.

[0378] This application provides a target code receiving device. As an example, the target code receiving device may be a communication device or a component within a communication device, such as a chip. The communication device may be a read / write device. Exemplarily, the read / write device may include, but is not limited to, the types of read / write devices listed above, and this application does not impose specific limitations.

[0379] The sequence generation device includes a receiving module, a transmitting module, and a processing module, and / or the target code receiving device includes a receiving module, a transmitting module, and a processing module. The receiving module, transmitting module, and processing module can be implemented in software or hardware. When implemented in hardware, the processing module can be implemented by a processor. For example, the processor can include a general-purpose processor, a special-purpose processor, etc., such as a Central Processing Unit (CPU), a microprocessor, a Digital Signal Processor (DSP), an Artificial Intelligence (AI) processor, a Graphics Processing Unit (GPU), an Application Specific Integrated Circuit (ASIC), a Network Processor (NP), a Field Programmable Gate Array (FPGA), or other programmable logic devices, gate circuits, transistors, discrete hardware components, etc. The receiving module and transmitting module can be implemented by a communication interface, which can include one or more of the following: transceiver, pins, circuits, buses, radio frequency units, etc.

[0380] For details, see Figure 27 When the sequence generation device is an A-IoT device or a component in an A-IoT device, the sequence generation device 400 includes:

[0381] Processing module 401 is used to generate a first sequence x0(n1) or a second sequence x1(n2);

[0382] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0383] or,

[0384] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0385] or,

[0386] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0387] or,

[0388] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0389] or,

[0390] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0391] or,

[0392] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0393] or,

[0394] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0395] or,

[0396] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0397] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0:

[0398] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2;

[0399] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2;

[0400] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.

[0401] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(2) = 1, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

[0402] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0:

[0403] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2;

[0404] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2;

[0405] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2.

[0406] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

[0407] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, then for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0.

[0408] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(3) = 1, x0(2) = 0, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

[0409] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, then for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0.

[0410] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(3) = 0, x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

[0411] In some embodiments, the sequence generation apparatus 400 further includes: a sending module 402;

[0412] The processing module 401 is further configured to generate a target code based on the first sequence x0(n1) or the second sequence x1(n2);

[0413] The sending module 402 is used to send the target code to the reading and writing device;

[0414] The target code includes at least one of the following: a preamble and an intermediate code.

[0415] In some embodiments, the sequence generation apparatus 400 further includes: a receiving module 403;

[0416] The receiving module 403 is used to receive instruction information from the reading and writing device;

[0417] The indication information is used to instruct the sequence generation device 400 to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the sequence generation device 400 to generate the target code based on the second sequence x1(n2).

[0418] In some embodiments, the sequence generation apparatus 400 further includes: a sending module 402;

[0419] The processing module 401 is further configured to generate a first target code based on the first sequence x0(n1);

[0420] The processing module 401 is further configured to generate a second target code based on the second sequence x1(n2);

[0421] The sending module 402 is used to send the first target code to the reading and writing device in the first A-IoT device to read and write device D2R transmission, and the sending module 402 is also used to send the second target code to the reading and writing device in the second D2R transmission;

[0422] The first D2R transmission is different from the second D2R transmission;

[0423] The first target code includes at least one of the following: a preamble and an intermediate code;

[0424] The second target code includes at least one of the following: a preamble and an intermediate code.

[0425] In some embodiments, the processing module 401 is specifically used for:

[0426] The first sequence x0(n1) or the second sequence x1(n2) is generated by the target shift register.

[0427] In this embodiment, the A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2); wherein the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2. Using the generation formulas corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate sequences corresponding to Midamble and / or Preamble, ensuring D2R transmission.

[0428] For details, see Figure 28When the target code receiving device is a read / write device or a component of a read / write device, the target code receiving device 500 includes:

[0429] Receiver module 501 is used to receive target code from environmental Internet of Things (A-IoT) devices;

[0430] The target code includes at least one of the following: a preamble and an intermediate code;

[0431] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0432] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0433] or,

[0434] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0435] or,

[0436] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0437] or,

[0438] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0439] or,

[0440] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0441] or,

[0442] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0443] or,

[0444] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0445] or,

[0446] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0447] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0:

[0448] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2;

[0449] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2;

[0450] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.

[0451] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(2) = 1, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

[0452] In some embodiments, if the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following, then for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0:

[0453] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2;

[0454] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2;

[0455] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2.

[0456] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

[0457] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, then for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0.

[0458] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(3) = 1, x0(2) = 0, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

[0459] In some embodiments, if the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, then for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0.

[0460] In some embodiments, the initialization parameters of the first sequence x0(n1) are x0(3) = 0, x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

[0461] In some embodiments, the sequence generation apparatus 500 further includes:

[0462] The sending module 502 is used to send indication information to the A-IoT device;

[0463] The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

[0464] In some embodiments, the receiving module 501 is further configured to receive a first target code from the A-IoT device in a first A-IoT device-to-read / write device D2R transmission, and the receiving module 501 is further configured to receive a second target code from the A-IoT device in a second D2R transmission;

[0465] Wherein, the first target code is generated based on the first sequence x0(n1), and the second target code is generated based on the second sequence x1(n2);

[0466] The first D2R transmission is different from the second D2R transmission;

[0467] The first target code includes at least one of the following: a preamble and an intermediate code;

[0468] The second target code includes at least one of the following: a preamble and an intermediate code.

[0469] In this embodiment, the read / write device receives a target code from an A-IoT device; wherein the target code includes at least one of the following: a preamble and an intermediate code; wherein the target code is generated based on a first sequence x0(n1) or a second sequence x1(n2); the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.Using the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate the sequence corresponding to the target code (Midamble and / or Preamble), and the reading and writing device can receive the target code (Midamble and / or Preamble) generated based on the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, thus ensuring D2R transmission.

[0470] The sequence generation apparatus provided in this application embodiment can achieve... Figures 7 to 26 The various processes implemented in the method embodiments achieve the same technical effect, and will not be described again here to avoid repetition.

[0471] like Figure 29 As shown in the figure, this application embodiment also provides a communication device 600, including a processor 601 and a memory 602, wherein the memory 602 stores a program or instructions that can run on the processor 601.

[0472] Optionally, when the communication device 600 is an A-IoT device, the program or instructions executed by the processor 601 implement the various steps executed by the A-IoT device in the above sequence generation method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0473] Optionally, when the communication device 600 is a read / write device, the program or instructions executed by the processor 601 implement the various steps executed by the read / write device in the above sequence generation method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0474] This application embodiment also provides a terminal, including a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement, for example... Figure 5 or Figure 9 The steps in the method embodiment shown are illustrated. This terminal embodiment corresponds to the above-described read / write device-side method embodiment, or it corresponds to the above-described A-IoT device-side method embodiment. All implementation processes and methods of the above method embodiments can be applied to this terminal embodiment and achieve the same technical effect. The terminal can be... Figure 27 The sequence generation device 400 shown, or the terminal, can be Figure 28 The target code receiving device 500 shown is shown.

[0475] Specifically, Figure 30 A schematic diagram of the hardware structure of a terminal to implement an embodiment of this application.

[0476] The terminal 700 includes, but is not limited to, at least some of the following components: radio frequency unit 701, network module 702, audio output unit 703, input unit 704, sensor 705, display unit 706, user input unit 707, interface unit 708, memory 709, and processor 710.

[0477] Those skilled in the art will understand that the terminal 700 may also include a power supply (such as a battery) for supplying power to various components. The power supply may be logically connected to the processor 710 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system. Figure 30 The terminal structure shown does not constitute a limitation on the terminal. The terminal may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0478] It should be understood that, in this embodiment, the input unit 704 may include a graphics processor 7041 and a microphone 7042. The graphics processor 7041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode. The display unit 706 may include a display panel 7061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like. The user input unit 707 includes at least one of a touch panel 7071 and other input devices 7072. The touch panel 7071 is also called a touch screen. The touch panel 7071 may include a touch detection device and a touch controller. Other input devices 7072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, and joysticks, which will not be described in detail here.

[0479] In this embodiment, after receiving downlink data from the network-side device, the radio frequency unit 701 can transmit it to the processor 710 for processing; in addition, the radio frequency unit 701 can send uplink data to the network-side device. Typically, the radio frequency unit 701 includes, but is not limited to, antennas, amplifiers, transceivers, couplers, low-noise amplifiers, duplexers, etc.

[0480] The memory 709 can be used to store software programs or instructions, as well as various data. The memory 709 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, the memory 709 may include volatile memory or non-volatile memory. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 709 in the embodiments of this application includes, but is not limited to, these and any other suitable types of memory.

[0481] Processor 710 may include one or more processing units; optionally, processor 710 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 710.

[0482] In one embodiment, the terminal 700 is an A-IoT device, wherein the processor 710 is used to generate a first sequence x0(n1) or a second sequence x1(n2);

[0483] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0484] or,

[0485] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0486] or,

[0487] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0488] or,

[0489] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0490] or,

[0491] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0492] or,

[0493] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0494] or,

[0495] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0496] or,

[0497] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0498] In this embodiment, the A-IoT device generates a first sequence x0(n1) or a second sequence x1(n2); wherein the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2. Using the generation formulas corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate sequences corresponding to Midamble and / or Preamble, ensuring D2R transmission.

[0499] In one embodiment, the terminal 700 is a read / write device, wherein the radio frequency unit 701 is used to receive target codes from an environmental Internet of Things (A-IoT) device;

[0500] The target code includes at least one of the following: a preamble and an intermediate code;

[0501] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0502] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0503] or,

[0504] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0505] or,

[0506] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0507] or,

[0508] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0509] or,

[0510] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0511] or,

[0512] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0513] or,

[0514] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0515] or,

[0516] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0517] In this embodiment, the read / write device receives a target code from an A-IoT device; wherein the target code includes at least one of the following: a preamble and an intermediate code; wherein the target code is generated based on a first sequence x0(n1) or a second sequence x1(n2); the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.Using the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate the sequence corresponding to the target code (Midamble and / or Preamble), and the reading and writing device can receive the target code (Midamble and / or Preamble) generated based on the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, thus ensuring D2R transmission.

[0518] It is understood that the implementation process of each implementation method mentioned in this embodiment can refer to the relevant description of the method embodiment and achieve the same or corresponding technical effect. To avoid repetition, it will not be described again here.

[0519] This application embodiment also provides a network-side device, including a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement, for example... Figure 26 The steps of the method embodiment shown are illustrated. This network-side device embodiment corresponds to the method embodiment executed by the above-described read / write device. All implementation processes and methods of the above-described method embodiments can be applied to this network-side device embodiment and can achieve the same technical effect.

[0520] This application embodiment also provides a network-side device, which may be... Figure 28 The target code receiving device 500 shown is shown.

[0521] Specifically, such as Figure 31 As shown, the network-side device 800 includes: an antenna 81, a radio frequency (RF) device 82, a baseband device 83, a processor 84, and a memory 85. The antenna 81 is connected to the RF device 82. In the uplink direction, the RF device 82 receives information through the antenna 81 and transmits the received information to the baseband device 83 for processing. In the downlink direction, the baseband device 83 processes the information to be transmitted and sends it to the RF device 82. The RF device 82 processes the received information and transmits it through the antenna 81.

[0522] The method executed by the read / write device in the above embodiments can be implemented in the baseband device 83, which includes a baseband processor.

[0523] Baseband device 83 may include, for example, at least one baseband board on which multiple chips are disposed, such as... Figure 31 As shown, one of the chips is, for example, a baseband processor, which is connected to the memory 85 via a bus interface to call the program or instructions in the memory 85 and execute the operation of the read / write device shown in the above method embodiment.

[0524] The network-side device may also include a network interface 86, such as a Common Public Radio Interface (CPRI).

[0525] In some embodiments, the network-side device is a read / write device, and the radio frequency device 82 is used to receive target codes from A-IoT devices;

[0526] The target code includes at least one of the following: a preamble and an intermediate code;

[0527] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0528] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0529] or,

[0530] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0531] or,

[0532] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0533] or,

[0534] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0535] or,

[0536] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0537] or,

[0538] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0539] or,

[0540] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0541] or,

[0542] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0543] In this embodiment, the read / write device receives a target code from an A-IoT device; wherein the target code includes at least one of the following: a preamble and an intermediate code; wherein the target code is generated based on a first sequence x0(n1) or a second sequence x1(n2); the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.Using the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate the sequence corresponding to the target code (Midamble and / or Preamble), and the reading and writing device can receive the target code (Midamble and / or Preamble) generated based on the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, thus ensuring D2R transmission.

[0544] Furthermore, the network-side device 800 in this embodiment of the application also includes: a program or instructions stored in a memory 85 and executable on a processor 84, wherein the processor 84 calls the program or instructions in the memory 85 to execute. Figure 28 The methods executed by each module shown achieve the same technical effect, and to avoid repetition, they will not be described in detail here.

[0545] Specifically, embodiments of this application also provide a network-side device. For example... Figure 32 As shown, the network-side device 900 includes: a processor 901, a network interface 902, and a memory 903. This network-side device can be... Figure 28 The target code receiving device 500 is shown. The network interface 902 is, for example, a common public radio interface (CPRI).

[0546] In some embodiments, the network-side device is a read / write device, and the network interface 902 is used to receive target codes from A-IoT devices;

[0547] The target code includes at least one of the following: a preamble and an intermediate code;

[0548] The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2).

[0549] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31.

[0550] or,

[0551] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31;

[0552] or,

[0553] The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0554] or,

[0555] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31;

[0556] or,

[0557] The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31;

[0558] or,

[0559] The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31;

[0560] or,

[0561] The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31;

[0562] or,

[0563] The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

[0564] Furthermore, the network-side device 900 in this embodiment of the application also includes: a program or instructions stored in a memory 903 and executable on a processor 901, wherein the processor 901 calls the program or instructions in the memory 903 to execute. Figure 28 The methods executed by each module shown achieve the same technical effect, and to avoid repetition, they will not be described in detail here.

[0565] In this embodiment, the read / write device receives a target code from an A-IoT device; wherein the target code includes at least one of the following: a preamble and an intermediate code; wherein the target code is generated based on a first sequence x0(n1) or a second sequence x1(n2); the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2. 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; or, the generation formula of the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2. 2. The generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+3) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+3)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+1)) mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5) = (x1(i) + x1(i+2)) mod 2; or, the generation formula for the first sequence x0(n1) is: x0(i+4) = (x0(i) + x0(i+3)) mod 2. 2. The formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.Using the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, the A-IoT device can generate the sequence corresponding to the target code (Midamble and / or Preamble), and the reading and writing device can receive the target code (Midamble and / or Preamble) generated based on the generation formula corresponding to the first sequence x0(n1) or the second sequence x1(n2) mentioned above, thus ensuring D2R transmission.

[0566] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described sequence generation method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0567] The processor mentioned above is either the processor in the A-IoT device or the processor in the read / write device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk. In some examples, the readable storage medium may be a non-transient readable storage medium.

[0568] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above sequence generation method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0569] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0570] This application also provides a computer program / program product, which is stored in a storage medium and executed by at least one processor to implement the various processes of the above sequence generation method embodiments, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0571] This application also provides a communication system, including: an A-IoT device and a read / write device. The A-IoT device can be used to perform the steps executed by the A-IoT device in the sequence generation method described above, and the read / write device can be used to perform the steps executed by the read / write device in the target code receiving method described above.

[0572] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0573] From the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of computer software products plus necessary general-purpose hardware platforms, and of course, they can also be implemented by hardware. The computer software product is stored in a storage medium (such as ROM, RAM, magnetic disk, optical disk, etc.), and the computer software product includes several instructions to cause the A-IoT device or read / write device to execute the methods described in the various embodiments of this application.

[0574] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other implementations under the guidance of this application without departing from the spirit and scope of the claims. All of these implementations are within the protection scope of this application.

Claims

1. A sequence generation method, characterized in that, include: Environmental IoT A-IoT devices generate either a first sequence x0(n1) or a second sequence x1(n2); The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31. or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31; or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

2. The method according to claim 1, characterized in that, If the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following conditions, then for the second sequence x1(n2), at least one of x1(4), x1(3), and x1(2) is not 0: The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2; The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod2; The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2.

3. The method according to claim 2, characterized in that, The initialization parameters of the first sequence x0(n1) are x0(2) = 1, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

4. The method according to claim 1, characterized in that, If the first sequence x0(n1) and the second sequence x1(n2) satisfy one of the following conditions, then for the second sequence x1(n2), at least one of x1(2), x1(1), and x1(0) is not 0: The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2; The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2; The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2.

5. The method according to claim 4, characterized in that, The initialization parameters of the first sequence x0(n1) are x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

6. The method according to claim 1, characterized in that, If the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, then for the second sequence x1(n2), at least one of x1(4), x1(3), x1(2), and x1(1) is not 0.

7. The method according to claim 6, characterized in that, The initialization parameters of the first sequence x0(n1) are x0(3) = 1, x0(2) = 0, x0(1) = 0, x0(0) = 0, and the initialization parameters of the second sequence x1(n2) are x1(4) = 1, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 0.

8. The method according to claim 1, characterized in that, If the generation formula of the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the generation formula of the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, then for the second sequence x1(n2), at least one of x1(3), x1(2), x1(1), and x1(0) is not 0.

9. The method according to claim 8, characterized in that, The initialization parameters of the first sequence x0(n1) are x0(3) = 0, x0(2) = 0, x0(1) = 0, x0(0) = 1, and the initialization parameters of the second sequence x1(n2) are x1(4) = 0, x1(3) = 0, x1(2) = 0, x1(1) = 0, x1(0) = 1.

10. The method according to any one of claims 1 to 9, characterized in that, The method further includes: The A-IoT device generates a target code based on the first sequence x0(n1) or the second sequence x1(n2); The A-IoT device sends the target code to the reading and writing device; The target code includes at least one of the following: a preamble and an intermediate code.

11. The method according to claim 10, characterized in that, The method further includes: The A-IoT device receives instruction information from the read / write device; The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

12. The method according to any one of claims 1 to 11, characterized in that, The method further includes: The A-IoT device generates a first target code based on the first sequence x0(n1); The A-IoT device generates a second target code based on the second sequence x1(n2); The A-IoT device sends the first target code to the reading and writing device in the first A-IoT device-to-reading-and-writing (D2R) transmission, and the A-IoT device sends the second target code to the reading and writing device in the second D2R transmission; The first D2R transmission is different from the second D2R transmission; The first target code includes at least one of the following: a preamble and an intermediate code; The second target code includes at least one of the following: a preamble and an intermediate code.

13. The method according to any one of claims 1 to 12, characterized in that, The A-IoT device generates either a first sequence x0(n1) or a second sequence x1(n2), including: The A-IoT device generates the first sequence x0(n1) or the second sequence x1(n2) through a target shift register.

14. A method for receiving a target code, characterized in that, include: The reading and writing device receives the target code from the environmental Internet of Things (A-IoT) device; The target code includes at least one of the following: a preamble and an intermediate code; The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2). The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31. or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31; or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

15. The method according to claim 14, characterized in that, The method further includes: The read / write device sends instruction information to the A-IoT device; The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

16. The method according to claim 14 or 15, characterized in that, The method further includes: The read / write device receives a first target code from the A-IoT device in a first A-IoT device-to-read / write device D2R transmission, and the read / write device receives a second target code from the A-IoT device in a second D2R transmission; Wherein, the first target code is generated based on the first sequence x0(n1), and the second target code is generated based on the second sequence x1(n2); The first D2R transmission is different from the second D2R transmission; The first target code includes at least one of the following: a preamble and an intermediate code; The second target code includes at least one of the following: a preamble and an intermediate code.

17. A sequence generation apparatus, characterized in that, include: The processing module is used to generate either the first sequence x0(n1) or the second sequence x1(n2); The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31. or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31; or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

18. The apparatus according to claim 17, characterized in that, The sequence generation device further includes: a transmission module; The processing module is further configured to generate a target code based on the first sequence x0(n1) or the second sequence x1(n2); The sending module is used to send the target code to the read / write device; The target code includes at least one of the following: a preamble and an intermediate code.

19. The apparatus according to claim 18, characterized in that, The sequence generation device further includes: a receiving module; The receiving module is used to receive indication information from the reading and writing device; The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

20. A target code receiving device, characterized in that, include: The receiving module is used to receive target codes from environmental A-IoT devices; The target code includes at least one of the following: a preamble and an intermediate code; The target code is generated based on either the first sequence x0(n1) or the second sequence x1(n2). The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+4))mod2, where 0≤n1<7 and 0≤n2<31. or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+2))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2)+x1(i+3)+x1(i+4))mod2, 0≤n1<7, 0≤n2<31; or, The formula for generating the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod2, and the formula for generating the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+1)+x1(i+2)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+1)+x1(i+3)+x1(i+4))mod 2, 0≤n1<7, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+3)=(x0(i)+x0(i+2))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+3)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<7, 0≤n2<31; or, The generation formula for the first sequence x0(n1) is: x0(i+4)=(x0(i)+x0(i+1))mod 2, and the generation formula for the second sequence x1(n2) is: x1(i+5)=(x1(i)+x1(i+2))mod 2, 0≤n1<15, 0≤n2<31; or, The first sequence x0(n1) is generated by the formula: x0(i+4)=(x0(i)+x0(i+3))mod 2, and the second sequence x1(n2) is generated by the formula: x1(i+5)=(x1(i)+x1(i+3))mod 2, 0≤n1<15, 0≤n2<31.

21. The apparatus according to claim 20, characterized in that, The sequence generation apparatus further includes: The sending module is used to send indication information to the A-IoT device; The indication information is used to instruct the A-IoT device to generate the target code based on the first sequence x0(n1), or the indication information is used to instruct the A-IoT device to generate the target code based on the second sequence x1(n2).

22. An environmental Internet of Things (A-IoT) device, characterized in that, It includes a processor and a memory, the memory storing a program or instructions that can run on the processor, the program or instructions being executed by the processor to implement the steps of the sequence generation method as described in any one of claims 1 to 13.

23. A reading and writing device, characterized in that, It includes a processor and a memory, the memory storing a program or instructions that can run on the processor, the program or instructions being executed by the processor to implement the steps of the target code receiving method as described in any one of claims 14 to 16.

24. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the steps of the sequence generation method as described in any one of claims 1 to 13, or the steps of the target code receiving method as described in any one of claims 14 to 16.

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