A constraint path verification method of an HSM behavior model

Abstract

The application discloses a constraint path verification method of an HSM behavior model. A directed architecture diagram is constructed according to modules, security domains and controlled interfaces, and path rules containing an entrance, a protected target, an ordered mandatory gateway, a forbidden node and an allowed return exit are read; constraint reachability verification is performed with a current node and a mandatory gateway progress as a joint traversal state, bypass paths reaching a target without passing through a gateway completely and missing return paths are identified. Deterministic minimum violation paths are generated according to path lengths and interface orders for violation results, and model version fingerprints are associated. Through a dependency index of modules or interfaces to rules, only affected rules are reverified when the model changes, so that the localizability and consistency of HSM behavior architecture change verification are improved.

Description

Technical Field

[0001] This invention relates to the fields of behavioral architecture modeling, software verification, and graph constraint analysis of hardware security modules. Specifically, it relates to a method for representing modules, security domains, and controlled interfaces in an HSM behavioral model as a directed architecture graph, and for verifying data paths based on mandatory gateways, prohibited nodes, and return exit constraints.

[0002] This invention is used to verify the consistency of executable behavior reference models, design phase architecture descriptions, or interface configurations, without directly claiming to form electrical isolation, side-channel isolation, or certified security boundaries in the physical chip. Background Technology

[0003] HSM design typically assigns external request adaptation, principal permission judgment, lifecycle control, secret state handling, event error handling, and response output to different modules. For ease of design review, modules and their interfaces can be documented as architectural descriptions or behavioral reference models. Simply checking for duplicate module names, the existence of interface endpoints, and empty control conditions only reveals formatting errors; it cannot prove that every reachable path from the external entry point to the protected target passes through the designated security gateway.

[0004] With the increase in the number of modules or the reuse of interfaces, a newly added edge may bypass permission gates or command gates and directly reach the protected state node. Even if the designer expects the normal path to pass through the gateway, as long as there is another reachable bypass in the architecture diagram, simply listing the expected path will not expose the bypass. On the other hand, the processing result of the target node may have to be returned by the event error control and response adaptation module; if only the positive arrival is verified without verifying the controlled return, abnormal results may lack a unified exit.

[0005] Conventional graph reachability algorithms can determine whether a target is reachable, but they cannot directly express the condition that "multiple gateways must be traversed in a given order." If only gateway nodes are removed from the graph and reachability is checked again, it is difficult to handle multiple gateway order restrictions, data category restrictions, and prohibited nodes simultaneously, and it is also difficult to output a verifiable minimum bypass path.

[0006] Furthermore, when the behavioral model iterates frequently, performing a full traversal of all entry points, goals, and rules each time results in redundant calculations. If the validation results are not tied to a specific model version, historical pass results may also be incorrectly reused in an already modified architecture.

[0007] Therefore, a constraint path verification scheme is needed that incorporates the progress of necessary gateways into the traversal state, can output the least deterministic violation path, and supports incremental re-verification based on dependencies. Summary of the Invention

[0008] The technical problem to be solved by this invention is as follows: How to verify that all valid paths from external entry points to protected targets pass through the specified gateway in sequence, rather than just verifying a single preset normal path; how to simultaneously identify missing forward bypasses and controlled return paths, and provide verifiable and reproducible violation paths.

[0009] How can we bind validation results to the architecture version and recalculate only the affected rules when there are partial changes to modules or interfaces, so as to avoid misuse of old results and indiscriminate full traversal?

[0010] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: Module definitions are converted into nodes, and controlled interfaces are converted into directed edges. Data categories, subject categories, access directions, enabling conditions, and security domain transition information are stored on these edges. Each security domain path rule clearly defines the set of entry nodes, the set of protected targets, the ordered sequence of mandatory gateways, the set of prohibited nodes, and the set of allowed return exits.

[0011] When performing constraint traversal, a single access state is not solely determined by the node identifier, but rather by a combination of the current node's progress and the progress of the required gateways. Progress is advanced when traversing to the next required gateway; edges that do not meet constraints related to data type, subject type, enable conditions, or prohibition are not expanded. This method allows for the differentiation of different states where "the same node has been reached, but different gateway stages have already been traversed."

[0012] A bypass violation is generated when the target node is reachable before the required gateway progress is completed; a missing return path violation is generated when the target node is reachable legally but there is no path that returns an allowed exit in the prescribed gateway order. The system uses parent state pointers to backtrack nodes and edges, and employs breadth-first search and lexicographical order rules to select the minimum deterministic violation path.

[0013] Calculate version fingerprints for the normalized model definition and establish dependency indexes for module or edge-to-path rules. When the model changes, query the dependency index using the change item, invalidating only the cached results of the corresponding rule and re-validating it.

[0014] Compared with solutions that only employ conventional parallel processing or single-state comparison, the present invention has at least the following technical advantages: By including the gateway order as a computable state in the traversal, we can discover bypasses where "the goal is reachable but the gateway constraints are not satisfied," instead of misjudging the goal as compliant.

[0015] The minimum violation path carries the missing gateway, violation edge, and model fingerprint simultaneously, making it easier for designers to locate newly added interfaces or error domain transitions, without relying on unstable log order.

[0016] Verifying the forward path and the return path separately ensures that both protected operations and event error returns have verifiable and controlled paths.

[0017] Dependency indexes and version fingerprints make the scope of verification for local modifications clear and prevent the application of pass results from the old architecture to the new architecture.

[0018] "HSM Behavioral Model" is a software model or architectural data that describes the responsibilities, state handling, and interface relationships of a module, and is not equivalent to the physical structure of a real chip. "Protected Target Node" is a model node that the rules require to be reached only through a specified gateway.

[0019] "Required Gateway Progress" refers to the length of the prefix that has been completed in the ordered gateway sequence. For example, if the gateway sequence is G1 and G2, reaching G2 but not G1 first will not advance the progress; reaching the target later will still constitute a bypass.

[0020] The "minimum violation path" primarily refers to the violation path with the fewest edges; when the number of edges is the same, a fixed identifier is used to sort the paths to obtain a unique result. This definition is for the purpose of stable result reproduction and does not imply that this path has the highest probability of occurring in a real system.

[0021] "Incremental retesting" only reuses rule results that have the same model fingerprint and have not been affected by dependency changes. If the normalization algorithm, rule version, or interface interpretation method changes, all related caches should be invalidated. Attached Figure Description

[0022] Figure 1 The overall flowchart for validating the constraint path of the HSM behavioral model.

[0023] Figure 2 This is a directed architecture graph, a diagram showing the relationships between necessary gateways and protected targets.

[0024] Figure 3 This is a schematic diagram of the combined traversal state and the minimum bypass path backtracking.

[0025] Figure 4 This is a data relationship graph for model fingerprints, dependency indexes, and incremental retesting. Detailed Implementation

[0026] The present invention will be further described below with reference to the accompanying drawings and embodiments. The embodiments are used to illustrate the technical solution and not to limit the scope of protection; without departing from the technical concept defined by the claims, those skilled in the art can make equivalent substitutions for field names, data structures, execution order and deployment methods.

[0027] Module records can contain fields such as module_id, module_name, security_domain, role, and enabled. Interface records can contain fields such as edge_id, source_id, target_id, payload_class, subject_class, direction, condition_expression, and domain_transition. Before graph construction, data is sorted by module_id and edge_id to ensure that identical inputs form the same graph structure and fingerprint.

[0028] For example, the External Request Adapter node (REQ) is located in the external domain, the Authorization Gate node (AUTH) is located in the control domain, the Lifecycle Control Node (LCM) and the State Storage Node (STATE) are located in the protected domain, the Event Error Control Node (ERR) is located in the control domain, and the Response Adapter node (RESP) is located in the external domain. The edge from REQ to AUTH carries a register request, and the edge from AUTH to LCM or STATE carries an authorized command or access result.

[0029] Interface enabling conditions can be Boolean configuration expressions. During the graph construction phase, no actual HSM operation needs to be performed; simply identify the enabled interfaces under the current configuration as expandable edges. If the condition cannot be resolved, a configuration integrity error is recorded, instead of assuming the edge is available by default.

[0030] A rule can be represented as R=(S,T,M,F,O), where S is the set of entry points, T is the set of destination points, M is the ordered sequence of required gateways, F is the set of prohibited nodes, and O is the set of allowed return exits. Allowed data types and subject types can also be specified.

[0031] For rules involving writing to protected states in registers, the entry point can be REQ, the destination can be STATE, and the required gateways are AUTH and REG_GATE in sequence. For lifecycle command rules, the destination can be LCM, and the required gateways are AUTH and CMD_GATE in sequence. Writing these two types of paths as different rules avoids using a broad set of gateways to obscure the differences between command paths and register paths.

[0032] When multiple entry points share a rule, each entry point and target combination is validated separately. The rule identifier, rule version, and model fingerprint together form the result key for querying and caching.

[0033] The states in the queue can be represented as (node_id, gateway_index). The initial state is the entry node and 0. After retrieving the state, edges are checked by sorting by edge_id; if the edge is not enabled, the destination node is in the prohibited set, the data type is not allowed, or the subject type is not allowed, then the edge is not extended.

[0034] If the destination node equals the next gateway pointed to by `gateway_index` in the ordered gateway sequence, then the `gateway_index` of the new state is incremented by one; otherwise, it remains unchanged. The access set uses (node_id, gateway_index) as the key, thus allowing the same node to be accessed separately under different gateway progresses.

[0035] When a new state reaches the target and the gateway_index is less than the number of required gateways, the current path is considered a bypass candidate. When the target is reached and the progress is complete, the state is added to the compliant target state set for further execution of return path verification.

[0036] When using breadth-first search, the first violation candidate discovered has the fewest edges. To output stable results when multiple paths of the same length exist, all nodes, edges, and entry points are sorted by a fixed identifier. The parent state table stores the previous joint state and the edges used. After a violation is discovered, the table is reversed and the process is reversed to obtain the node sequence and edge sequence.

[0037] Violation records can include rule_id, violation_type, entry_id, target_id, missing_gateway_id, path_node_ids, path_edge_ids, model_fingerprint, and generated_at. generated_at is not included in the content summary of the violation record to prevent different summaries for the same model.

[0038] For example, when a new edge REQ_DIRECT_STATE is added that points directly from REQ to STATE, the traversal reaches the target at (node=STATE, index=0). The system outputs REQ—REQ_DIRECT_STATE—STATE, and marks the missing AUTH and REG_GATE, instead of simply outputting the conclusion that "a bypass exists" and that the location cannot be determined.

[0039] For each compliant state that reaches the target, execute the return rule with the target as the new entry point. The return rule can require reaching ERR first, then RESP, and finally the allowed exit OUT. The progress of returning to the gateway is also recorded during state traversal.

[0040] If the target node has no outgoing edges, only a direct edge to OUT, or reaches OUT via an unauthorized module, the return rule cannot be satisfied. The system will write the missing first gateway between the target and the exit point into the violation record.

[0041] Forward and return rules can use different data category constraints. For example, forward rules can allow CMD or REGISTER_WRITE, while return rules can only allow EVENT, ERROR, or STATUS, in order to avoid treating any reverse edge as a valid response path.

[0042] Before fingerprint calculation, modules and interfaces are converted into normalized records with fixed field order. Comments and time fields used only for display are removed. The records are then sorted before a summary is calculated. Path rules also have independent fingerprints; changes to either the model fingerprint or the rule fingerprint invalidate the corresponding results.

[0043] Dependency indexes can map each module, edge, data category, and security domain to the set of rules that reference it. When a new cross-domain edge is added, at least the rules related to the source domain, destination domain, or data category of that edge are revalidated; deleting display fields that are not used by any rules does not trigger path revalidation.

[0044] To prevent missed verifications, if the scope of the change's impact cannot be accurately determined, a full re-verification should be performed. Incremental mode is for performance optimization and does not reduce the requirements for complete verification.

[0045] Before constructing the model, check that the module identifier is unique, edge endpoints exist, rule entry and target are not empty, gateway and exit exist, and sort key is unique. Any configuration integrity error will prevent this model version from outputting a pass result.

[0046] When a conditional expression fails to parse, the interface data category is unknown, or the rule reference is invalid, the system adopts a failure closure approach: it logs the error and stops giving a pass conclusion for the corresponding rule, instead of ignoring uncertainties.

[0047] The verification results can be categorized into three types: CONFIG_ERROR, BYPASS_PATH, and RETURN_PATH_MISSING, so that subsequent tools can decide whether to repair the architecture data or modify the interface relationships.

[0048] The system can be deployed on a design verification server, continuous integration node, or local development equipment. The architecture diagram building module reads JSON, YAML, database records, or a list of interfaces generated from code; the path rule reading module reads version-controlled rule files.

[0049] The output interface can generate both machine-readable logs and visual paths. Machine-readable logs are used for continuous integration access control, while visual paths are used for design reviews. Access control is only considered "passed" if both configuration integrity errors and path violations are empty.

[0050] Electronic devices and computer-readable storage media perform the above steps by executing the same program. The program outputs model verification results and does not replace independent verification of actual chip circuits, firmware implementations, and physical security attributes.

Claims

1. A constraint path verification method for an HSM behavioral model, characterized in that, Executed by the processor, the process includes: constructing a directed architecture graph based on the module definitions, security domains to which the modules belong, and controlled interface definitions between modules in the HSM behavior model. Nodes in the directed architecture graph correspond to modules, and edges correspond to controlled interfaces carrying data categories, access directions, enable conditions, and domain transition flags. The processor reads at least one security domain path rule, each including a set of entry nodes, a set of protected target nodes, a set of sequentially traversed mandatory gateways, a set of prohibited nodes, and a set of allowed return exits. For each combination of an entry node and a protected target node, a constrained reachability traversal is performed, jointly recording the progress of the current node and the sequentially traversed mandatory gateways during the traversal, expanding only edges where the enable condition is met and prohibited nodes have not been reached. When a protected target node is reached and a mandatory gateway is accessed... When the gateway progress is incomplete, the corresponding path is identified as a bypass path. When it is impossible to reach the allowed return exit from the protected target node via the allowed return path, the corresponding path is identified as a missing return path. At least one deterministic minimum violation path is generated according to the preset edge sorting rules and path length, and the entry node, target node, missing gateway, violation edge, and model version fingerprint are associated in the violation record. The model version fingerprint is calculated according to the module definition and controlled interface definition, and a dependency index of the module or edge to security domain path rules is established. When the model definition changes, only the affected security domain path rules are re-verified according to the dependency index. The result of the HSM behavior model passing the constraint path verification is output only when there is no bypass path, missing return path, or configuration integrity error.

2. The method according to claim 1, characterized in that, The set of required gateways is an ordered sequence of gateways, and the progress of the required gateways is represented by an integer or a bitmask; the progress of the required gateways is advanced only when the destination node of the current extended edge is equal to the next required gateway, and if the gateway order is not satisfied, the already visited gateway is not considered as a completion constraint.

3. The method according to claim 1, characterized in that, The controlled interface definition also includes a data category set and a subject category set; when the data category or subject category transmitted by the edge does not belong to the category allowed by the corresponding security domain path rule, the edge is treated as a prohibited extension edge, and the mismatched data category or subject category is written into the violation record.

4. The method according to claim 1, characterized in that, The minimum violation path is generated by breadth-first traversal. When the path lengths are the same, the unique output path is determined according to the lexicographical order of the source node identifier, destination node identifier, and interface identifier. The complete node sequence and edge sequence from the entry node to the target node are obtained by backtracking through the parent state pointer.

5. The method according to claim 1, characterized in that, The allowed return path requires that the path start from the protected target node, pass through the event error control gateway and the external response adaptation gateway in sequence, and then reach the allowed return exit; paths that do not reach the allowed return exit in the specified order are not considered valid return paths.

6. The method according to claim 1, characterized in that, The model version fingerprint is generated by combining the normalized sorted module identifier, module security domain, interface identifier, interface endpoint, data category, access direction, and enable condition summary value. When the fingerprint changes, the dependency index is queried according to the module or edge that has changed, and the previous verification result of the unaffected rules is retained.

7. The method according to claim 1, characterized in that, Before performing constrained reachability traversal, a configuration integrity check is also performed. The configuration integrity check includes at least the following: unique node identifiers, existence of source and destination nodes for edges, at least one entry node and one destination node for each security domain path rule, existence of a mandatory gateway, and existence of an allowed return exit. Configuration integrity errors are recorded using different error categories than the minimum violation path.

8. A constraint path verification system for an HSM behavioral model, characterized in that, It includes an architecture graph construction module, a path rule reading module, a constrained reachability traversal module, a minimum violation path generation module, a model version fingerprint module, a dependency index module, and a result output module; each module is configured to perform the method described in any one of claims 1 to 7.

9. An electronic device comprising a processor and a memory, wherein the memory stores a computer program, characterized in that, When the computer program is executed by the processor, it causes the processor to perform the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1 to 7.

Images