Exception handling method and apparatus based on tilelink bus

Abstract

The present disclosure relates to a TileLink bus-based exception processing method and device. The method is applied to a first firewall deployed between a first port and a TileLink bus, and a second firewall is deployed between the TileLink bus and a second port. The method comprises: determining a to-be-detected signal in a signal group output by the first port; detecting the to-be-detected signal according to a signal type of the to-be-detected signal to obtain a signal detection result; if the signal detection result is an exception, generating an exception prompt information, and transmitting the exception prompt information to the first port, so that the first port performs exception processing according to the exception prompt information. Thus, the influence of data exception on the upstream interface is reduced, and the stability of the host is improved.

Description

Technical Field

[0001] This disclosure relates to the field of firewall technology, and in particular to an exception handling method and apparatus based on the TileLink bus. Background Technology

[0002] In the TileLink bus architecture, communication between modules is achieved through upstream and downstream interfaces. The upstream interface typically corresponds to the bus master, responsible for initiating read and write operations on the bus. The downstream interface typically corresponds to the bus slave, responsible for receiving and responding to requests from the upstream interface. By cascading the upstream and downstream interfaces, the interconnection needs of different scales of System-on-Chip (SoC) based devices can be met.

[0003] However, abnormal data transmission can affect upstream interfaces and even cause the host system to crash. Summary of the Invention

[0004] To address the aforementioned technical problems, this disclosure provides an exception handling method and apparatus based on the TileLink bus.

[0005] In a first aspect, this disclosure provides an exception handling method based on the TileLink bus, applied to a first firewall, wherein the first firewall is deployed between a first port and the TileLink bus, and a second firewall is deployed between the TileLink bus and a second port, the method comprising: The signal to be detected in the signal group output from the first port is determined; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall; The signal to be detected is detected according to the signal type of the signal to be detected to obtain a signal detection result; wherein, the signal detection result includes at least one of timeout detection result and TileLink protocol detection result; If the signal detection result indicates an anomaly, an anomaly message is generated and transmitted to the first port so that the first port can perform anomaly processing based on the anomaly message.

[0006] Optionally, the timeout detection result includes a response timeout result, and the step of detecting the signal to be detected according to the signal type of the signal to be detected to obtain a signal detection result includes: Based on the signal type, determine the response signal corresponding to the signal to be detected; If no response signal is received within a preset time period after the signal to be detected is sent from the first port, a response timeout result is generated, and a replacement signal corresponding to the response signal is generated and transmitted to the first port.

[0007] Optionally, the signal type includes a read type, the response signal includes multiple read response signals, and generating a replacement signal corresponding to the response signal and transmitting the replacement signal to the first port includes: Determine a first number of expected read response signals, and determine a second number of read response signals to be returned within the preset time period; The difference between the first quantity and the second quantity is determined as the target quantity; The target number of substitution signals is constructed and transmitted sequentially to the first port; wherein the last substitution signal received by the first port includes a last bit field.

[0008] Optionally, the signal type includes a valid identifier type, and the step of detecting the signal to be detected according to the signal type of the signal to be detected to obtain a signal detection result includes: If the valid identifier signal changes from high to low, and the TileLink bus returns the received signal corresponding to the valid identifier signal, then a first protocol result is generated; wherein, the first protocol result indicates that the high-level duration of the valid identifier signal violates the TileLink protocol.

[0009] Optionally, the signal type includes data size and address type, and the step of detecting the signal to be detected according to the signal type of the signal to be detected to obtain a signal detection result includes: Determine the number of bytes corresponding to the size signal; If the address signal is a non-integer multiple of the number of bytes, a second protocol result is generated; wherein the second protocol result indicates that the matching of the size signal and the address signal violates the TileLink protocol.

[0010] Optionally, the signal type includes a resource type, and the step of detecting the signal to be detected according to the signal type of the signal to be detected to obtain a signal detection result includes: Storage resource signals; Obtain the destination signal of the signal group transmitted by the TileLink bus. If the destination signal and the resource signal are different, generate a third protocol result. The third protocol result indicates that at least one of the resource signal and the destination signal violates the TileLink protocol.

[0011] Optionally, generating an error message and transmitting the error message to the first port includes: The signal detection results are stored in a preset location; In response to receiving the next signal group output from the first port, the next signal group is intercepted, and the abnormal prompt information is transmitted to the first port, so that the host corresponding to the first port can read data at the preset position and obtain the signal detection result.

[0012] Secondly, this disclosure provides an exception handling device based on the TileLink bus, configured within a first firewall. The first firewall is deployed between a first port and the TileLink bus, and a second firewall is deployed between the TileLink bus and a second port. The device includes: The determination module is used to determine the signal to be detected in the signal group output from the first port; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall; The detection module is used to detect the signal to be detected according to the signal type of the signal to be detected, and obtain a signal detection result; wherein, the signal detection result includes at least one of timeout detection result and TileLink protocol detection result; The prompting module is used to generate an abnormal prompt message if the signal detection result is abnormal, and transmit the abnormal prompt message to the first port so that the first port can perform abnormal processing according to the abnormal prompt message.

[0013] Thirdly, embodiments of this disclosure also provide an electronic device, the device comprising: One or more processors; Storage device for storing one or more programs. When one or more programs are executed by one or more processors, the one or more processors implement the methods provided in the first aspect.

[0014] Fourthly, embodiments of this disclosure also provide a computer-readable storage medium having a computer program stored thereon that, when executed by a processor, implements the method provided in the first aspect.

[0015] The technical solution provided in this disclosure has the following advantages compared with the prior art: This disclosure discloses an anomaly handling method and apparatus based on the TileLink bus, wherein the method is applied to a first firewall, the first firewall being deployed between a first port and the TileLink bus, and a second firewall being deployed between the TileLink bus and a second port. The method includes: determining a signal to be detected in a signal group output from the first port; wherein the signal group is transmitted to the second port sequentially through the first firewall, the TileLink bus, and the second firewall; detecting the signal to be detected according to the signal type of the signal to be detected, and obtaining a signal detection result; wherein the signal detection result includes at least one of a timeout detection result and a TileLink protocol detection result; if the signal detection result indicates an anomaly, generating an anomaly prompt message and transmitting the anomaly prompt message to the first port, so that the first port performs anomaly handling according to the anomaly prompt message.

[0016] In the above scheme, firewalls are set up for the first and second ports respectively. The signal to be detected is identified in the signal group. Based on the signal type of the signal to be detected, multiple dimensions of detection are performed, such as timeout detection and TileLink protocol detection. If the detection result is abnormal, an abnormal prompt message is generated, which enables the host to automatically handle the abnormality based on the abnormal prompt message. By detecting the signal of the TileLink port in real time, abnormalities such as protocol violations and timeout responses are detected. By transmitting the abnormal prompt message to the TileLink port, the host can automatically handle abnormalities, reduce the impact of data abnormalities on upstream interfaces, and improve the stability of the host. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A flowchart illustrating an exception handling method based on the TileLink bus provided in this embodiment of the disclosure; Figure 2 A schematic diagram of a firewall provided for an embodiment of this disclosure; Figure 3 A flowchart illustrating another exception handling method based on the TileLink bus provided in this embodiment of the present disclosure; Figure 4 This is a schematic diagram illustrating a timeout detection of a received signal, provided as an embodiment of this disclosure. Figure 5 This is a schematic diagram illustrating timeout detection of a write signal according to an embodiment of this disclosure; Figure 6 This is a schematic diagram illustrating timeout detection of a read signal according to an embodiment of the present disclosure. Figure 7 A schematic diagram illustrating a hold duration detection method provided in an embodiment of this disclosure; Figure 8 A schematic diagram of the structure of an exception handling device based on the TileLink bus provided in an embodiment of this disclosure; Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure. Detailed Implementation

[0020] To better understand the above-mentioned objectives, features, and advantages of this disclosure, the solutions disclosed herein will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0021] The TileLink protocol supports various types of communication agent modules and defines three protocol extension levels, ranging from simple to complex. Each level defines a subset of protocol extensions that a compatible communication agent module must support. These three extension levels are: TileLink Uncached Lightweight (TL-UL), TileLink Uncached Heavyweight (TL-UH), and TileLink Cached (TL-C). TileLink Uncached Lightweight supports read / write (Get / Put) access. TileLink Uncached Heavyweight supports multi-packet burst transmission, atomic access, hinted access, and read / write access. TileLink Cached supports cached block transmission, using B-channels, C-channels, E-channels, multi-packet burst transmission, atomic access, hinted access, and read / write access.

[0022] The unbuffered lightweight level is suitable for connecting peripherals with lower performance requirements, while the unbuffered heavyweight level is suitable for connecting peripherals with higher performance requirements and supports burst transfers. This compatibility level of the agent supports both read (Get) and write (Put) storage access operations. Read operations retrieve data from the underlying memory, while write operations write data to the underlying memory. Write operations support partial write functionality based on byte path masks. The unbuffered heavyweight level builds upon the unbuffered lightweight level and provides multi-buffered burst transfers and other operations to improve data access performance.

[0023] In the TileLink bus architecture, communication between modules is achieved through upstream and downstream interfaces. The upstream interface typically corresponds to the bus master device side, responsible for initiating read and write operations to the bus. The downstream interface typically corresponds to the bus slave device side, responsible for receiving and responding to requests from the upstream interface. By cascading the upstream and downstream interfaces, the interconnection needs of on-chip systems of different scales can be met. However, anomalies in data transmission can affect the upstream interface and even cause the host system to crash.

[0024] To address at least one of the aforementioned technical problems, the following describes an exception handling method based on the TileLink bus provided in an embodiment of this disclosure. In this embodiment, the exception handling method based on the TileLink bus can be executed by an electronic device. This electronic device may include devices with communication capabilities such as tablet computers, desktop computers, and laptop computers.

[0025] Figure 1 The diagram shows a flowchart of an exception handling method based on the TileLink bus provided in an embodiment of this disclosure. The method can be applied to a first firewall, which is deployed between a first port and the TileLink bus, and a second firewall is deployed between the TileLink bus and the second port.

[0026] The first port and the second port can be two different ports for data transmission via the TileLink bus. For example, the first port can be the master port and the second port can be the slave port; or, the first port can be the slave port and the second port can be the master port. The master port can be the port that initiates the request, and the slave port can be the port that responds to the request. For example, the master port can be the port of the host, and the slave port can be the port of the storage device and / or peripheral device, where the host is also called the master device. The first firewall can be a firewall component set between the first port and the TileLink bus, and the second firewall can be a firewall component set between the second port and the TileLink bus. The TileLink bus can be a bus built based on the TileLink protocol.

[0027] like Figure 1 As shown, the exception handling method based on the TileLink bus may include the following steps.

[0028] Step 101: Determine the signal to be detected in the signal group output from the first port; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall.

[0029] The signal group can be a set of signals used to implement transaction processing between the first port and the second port. This signal group may include signals transmitted via one or more clock cycles based on the TileLink protocol. The signal to be detected can be the signal to be detected. This embodiment does not limit the channel used for the signal to be detected, and the specific items to be detected can be adapted to the channel used by the signal to be detected.

[0030] In this embodiment of the disclosure, the exception handling method based on the TileLink bus can be applied to on-chip systems using the TileLink bus architecture to protect the TileLink bus within the on-chip system. For example, it can be applied to a microprocessor chip.

[0031] In this embodiment, the firewall is an important hardware security component used to enhance the security and reliability of systems-on-chip or complex integrated circuits. As a "gatekeeper" of the system bus, it enables fault detection, isolation, and recovery that meet functional safety objectives.

[0032] The TileLink protocol defines five logically independent channels through which agents can transmit messages. To avoid deadlock, the TileLink protocol specifies the priority of message transmission on these five channels. A channel can contain control signals as well as copies of the actual data. Signal transmission on a channel is unidirectional, either from the master interface to the slave port, or from the slave port to the master port.

[0033] The five channels are Channel A, Channel B, Channel C, Channel D, and Channel E. Channel A is used to transmit a request to access a specified address range or to perform caching operations on data. Channel D is used to transmit a data response or acknowledgment message to the original requesting end. For non-caching heavyweight protocols, Channels A and D can complete the corresponding protocol operations. The signals of Channels A and D are described below. The signals transmitted by Channel A include a_opcode, a_param, a_size, a_source, a_address, a_mask, a_data, a_corrupt, a_valid, and a_ready. Among them, a_opcode is a control signal with a bit width of 3, which is the opcode used to identify the type of message carried by this channel. a_param is a control signal with a bit width of 3, which is the parameter code, and its specific definition is related to a_opcode, used to characterize the transmission of permission for caching operations or the word opcode. a_size is a control signal with a bit width of 4, which is the logarithm of the operation size. `a_source` is a control signal, 4 bits wide. `a_source` is unique and represents the identity (ID) of the source for each link master. `a_address` is a control signal, 32 bits wide, representing the byte-addressed target address. `a_mask` is a control signal, 4 bits wide, used to select the byte lane of the message data. `a_data` is a data signal, 32 bits wide, used to carry data. `a_corrupt` is a data signal, 1 bit wide, used to indicate corrupted data or inaccessible data errors. `a_valid` is a valid identifier signal, 1 bit wide, used to indicate whether the data carried by the channel is valid. `a_ready` is a ready signal, 1 bit wide, indicating whether the data transmitted by the channel has been received.

[0034] The signals transmitted through channel D include d_opcode, d_param, d_size, d_source, d_sink, d_denied, d_data, d_corrupt, d_valid, and d_ready. Among them, d_opcode is a control signal with a 3-bit width, representing the opcode used to identify the type of message carried by this channel. d_param is a control signal with a 3-bit width, representing the parameter code, its specific definition related to d_opcode, used to characterize the transmission of cache operation permission or the word opcode. d_size is a control signal with a 4-bit width, representing the logarithm of the operation size. d_source is a control signal with a 4-bit width; d_source is unique and represents the identifier of the host source for each link. d_sink is a control signal with a 4-bit width; it is unique and represents the identifier of the sink field for each slave device on each link. d_denied is a control signal with a 1-bit width, indicating that the slave cannot provide the requested service. `d_data` is a 32-bit data signal used to carry data. `d_corrupt` is a 1-bit data signal used to indicate corrupted data or inaccessible data errors. `d_valid` is a 1-bit valid flag used to indicate whether the data carried by the channel is valid. `d_ready` is a 1-bit ready signal used to indicate whether the data transmitted by the channel has been received.

[0035] The signals transmitted through channel B include b_opcode, b_param, b_size, b_source, b_address, b_mask, b_data, b_corrupt, b_valid, and b_ready. Among them, b_opcode is a control signal with a 3-bit width, representing the opcode used to identify the type of message carried by this channel. b_param is a control signal with a 3-bit width, representing the parameter code, whose specific definition is related to b_opcode, and is used to characterize the transmission of buffer operation permission or word opcode. b_size is a control signal with a 4-bit width, representing the logarithm of the operation size. b_source is a control signal with a 4-bit width; b_source is unique and represents the source identifier for each link host. b_address is a control signal with a 32-bit width, representing the target address addressed byte-wise. b_mask is a control signal with a 4-bit width, used to select the bytes of message data. b_data is a data signal with a 32-bit width, used to carry data. `b_corrupt` is a data signal with a bit width of 1, used to indicate corrupted data errors or inaccessible data errors. `b_valid` is a valid flag signal with a bit width of 1, used to indicate whether the data carried by the channel is valid. `b_ready` is a ready signal with a bit width of 1, indicating whether the data transmitted by the channel has been received.

[0036] The signals transmitted through channel C include c_opcode, c_param, c_size, c_source, c_address, c_data, c_corrupt, c_valid, and c_ready. Among them, c_opcode is a control signal with a 3-bit width, representing the opcode used to identify the type of message carried by the channel. c_param is a control signal with a 3-bit width, representing the parameter code, the specific definition of which is related to c_opcode, used to characterize the transmission of buffer operation permission or word opcode. c_size is a control signal with a 4-bit width, representing the logarithm of the operation size. c_source is a control signal with a 4-bit width; c_source is unique and represents the identifier of the host source for each link. c_address is a control signal with a 32-bit width, representing the byte-addressed target address. c_data is a data signal with a 32-bit width, used to carry data. c_corrupt is a data signal with a 1-bit width, used to characterize corrupted data errors or inaccessible errors. c_valid is a validity flag signal with a 1-bit width, used to characterize whether the data carried by the channel is valid. c_ready is a ready signal with a bit width of 1, indicating whether channel data has been received.

[0037] The signals transmitted via channel E include e_sink, e_valid, and e_ready. e_sink is a control signal with a 4-bit width; it is unique and represents the slave sink identifier for each link device. e_valid is a validity identifier signal with a 1-bit width, used to indicate whether the data carried by the channel is valid. e_ready is a ready signal with a 1-bit width, indicating whether the data transmitted via the channel has been received.

[0038] In this embodiment, data transmission based on the TileLink protocol is implemented on a per-cycle basis. The control signal remains constant across each per-cycle of the burst transmission. The data signal may change in each per-cycle. A valid identifier signal indicates whether the signal contains valid data. A ready signal indicates that a valid identifier signal has been accepted. The opcodes for transmission from the master port to the slave port include 4, 0, and 1. Here, 4 represents a read data operation (Get), 0 represents a complete write data operation (PutFullData), and 1 represents a partial write data operation (PutPartialData). The opcodes for transmission from the slave port to the master port include 0 and 1. Here, 0 represents a response operation to a write data operation, with the response not containing data (AccessAck), and 1 represents a response operation to a read data operation, with the response containing data (AccessAckData).

[0039] Figure 2A schematic diagram of a firewall provided in an embodiment of this disclosure, such as... Figure 2 As shown, two TileLink firewalls are deployed. One TileLink firewall is located between the TileLink bus and the TileLink master port, and the other TileLink firewall is located between the TileLink bus and the TileLink slave port. The first or second firewall can monitor transactions on the corresponding ports in real time, detect anomalies such as protocol violations and timeouts, and block further transaction transmissions in case of anomalies, while generating appropriate responses for incomplete transactions. The first or second firewall can be flexibly configured and its status monitored through control signals.

[0040] The first and second firewalls operate in two states: normal and blocked. In normal state, if an anomaly is detected, the firewall automatically enters blocked state. In blocked state, the firewall blocks the transmission of signals sent from upstream ports to downstream ports and automatically replies to signals sent from upstream ports. In normal state, when the firewall receives signals on channels A, C, and E, if no anomaly is detected, the firewall transmits the received signals to the TileLink bus. Simultaneously, when receiving responses from ports through channels B and D, if no errors are detected, the firewall transmits the received responses to the TileLink bus. Furthermore, the firewall's state can transition from normal to blocked state, and vice versa.

[0041] In this embodiment, firewalls are respectively configured on the master port and slave port. The exception handling method based on the TileLink bus can be applied to the master firewall corresponding to the master port or the slave firewall corresponding to the slave port. If the first port is the master port, the first firewall can acquire at least one of the transmitted signal groups from channels A, C, and E, and filter the signals in the signal groups according to the signal type to obtain the signal to be detected. The signal type can be a specific classification of the signal, and the signal type can correspond to the signal name. The signal type can include one or more of the following: valid identifier type (valid), data size (size), address type (address), and resource type (source). The valid identifier type can be used to characterize whether the data carried by the channel is valid. If the valid identifier type is high, it indicates validity; if the valid identifier type is low, it indicates invalidity. The data size can characterize the length of the transmitted payload data within a single clock cycle. The address type can characterize the target address to be accessed, and the target address can be byte-addressed. The resource type can be a unique identifier for the request initiated by the host.

[0042] Step 102: Detect the signal to be detected according to the signal type of the signal to be detected, and obtain the signal detection result; wherein, the signal detection result includes at least one of the timeout detection result and the TileLink protocol detection result.

[0043] The signal detection result indicates whether the signal under test is abnormal. The timeout detection result indicates whether the response of the signal under test has timed out. The TileLink protocol detection result indicates whether the signal under test violates the TileLink protocol.

[0044] In this embodiment of the disclosure, the first firewall can determine a detection strategy for the signal to be detected based on the signal type of the signal to be detected, and perform at least one of timeout detection and TileLink protocol detection on the signal to be detected according to the strategy to obtain the signal detection result.

[0045] Figure 3 A flowchart illustrating another exception handling method based on the TileLink bus provided in this disclosure embodiment is shown below. Figure 3 As shown, in some embodiments of this disclosure, the timeout detection result includes a response timeout result. The signal to be detected is detected according to its signal type to obtain the signal detection result, including: Step 301: Determine the response signal corresponding to the signal to be detected based on the signal type.

[0046] The response signal can be a signal that responds to a signal of that signal type. In some embodiments of this disclosure, the signal type includes one or more of a valid identifier type, a write type, and a read type. The response signal corresponding to the valid identifier type includes a receive signal, also known as a ready signal, indicating that data has been received. The response signal corresponding to the write type includes a write response signal, which can be a response signal to a write signal, and this write response signal can be an acknowledgement (ACK). The response signal corresponding to the read type includes a read response signal, which can be a response signal to a read signal, and this read response signal can be acknowledgment data (AckData). In the scenario of burst transmission, there can be multiple read response signals, which are sent sequentially from the port and received sequentially by the master port, and the last read response signal includes a last bit field. The last bit field can be used to indicate that this read response signal is the last of multiple read response signals.

[0047] In this embodiment, the first firewall can determine the response signal of the signal to be detected based on the signal type of the signal to be detected. The correspondence between the signal type and the response signal can be pre-defined.

[0048] Step 302: If no response signal is received within a preset time after the signal to be detected is sent from the first port, a response timeout result is generated, and a replacement signal corresponding to the response signal is generated and transmitted to the first port.

[0049] The pre-reception duration can be a pre-set maximum duration for receiving the completed response signal. This pre-set duration can be the duration set within a counter (cnt). In this embodiment, the specific value of the pre-set duration is not limited. The substitute signal can be used to replace the response signal. This substitute signal can be understood as a signal generated by the first firewall in response to the signal to be detected.

[0050] In this embodiment, the first firewall can start timing after sending a detection signal to the first port. If the first firewall does not receive a response signal from the second port after a preset time, a timeout response result is generated. Furthermore, a replacement signal corresponding to the response signal is generated, and the transmission channel corresponding to the replacement signal is determined. The replacement signal is then transmitted to the first port through the transmission channel. Thus, while implementing response timeout detection, a response to the request is achieved through the replacement signal, preventing the host from experiencing an anomaly due to not receiving a response.

[0051] In some embodiments of this disclosure, the firewall employs three mechanisms for timeout detection. One mechanism is to detect received signal timeouts. Figure 4 This is a schematic diagram illustrating a timeout detection of a received signal provided in an embodiment of the present disclosure, as shown below. Figure 4 As shown, the valid identification signal becomes valid after a rising edge. After a preset time, a falling edge appears on the valid identification signal, and the validity of the received signal is detected within this preset time. If the received signal is invalid, a timeout is determined. In this embodiment, the first port can be a master port, which can perform timeout detection for at least one of channels A, C, and E. Alternatively, the first port can be a slave port, which can perform timeout detection for at least one of channels B and D.

[0052] Figure 5 This is a schematic diagram illustrating timeout detection of a write signal according to an embodiment of the present disclosure, as shown below. Figure 5 As shown in some embodiments of this disclosure, the host can send a write signal from the first port to the second port through channel A. If the slave device corresponding to the second port does not receive the write response signal returned from channel D within a preset time, the first firewall generates a response timeout result, generates a replacement signal corresponding to the write response signal, and transmits the write response signal to the first port.

[0053] In some embodiments of this disclosure, the signal type includes a read type, the response signal includes multiple read response signals, generating a replacement signal corresponding to the response signal, and transmitting the replacement signal to a first port, including: determining a first number of expected returned read response signals, and determining a second number of returned read response signals within a preset time period; determining the difference between the first number and the second number as a target number; constructing a target number of replacement signals, and transmitting the target number of replacement signals sequentially to the first port; wherein the last replacement signal received by the first port includes a last bit field.

[0054] Figure 6 This is a schematic diagram illustrating timeout detection of a read signal according to an embodiment of the present disclosure, as shown below. Figure 6 As shown in some embodiments of this disclosure, the master device reads a request, and the port responds to the read request by initiating a burst transmission. This burst transmission needs to be completed within a preset time period. Specifically, the first firewall can obtain a first number of read response signals corresponding to the read request through channel A. This first number can be the same as the number of ticks in the burst transmission. This embodiment does not limit the method of determining the first number. For example, the first number can be determined based on the total number of bytes and the number of bytes transmitted in each tick. The first firewall determines a second number of read response signals returned within the preset time period. If the second number is less than the first number, or the last read response signal returned does not include the last bit field, a response timeout result is generated, and the first number is subtracted from the second number to obtain the target number. A replacement signal for the target number is constructed, and the replacement signal is transmitted sequentially to the master port through channel D. The last replacement signal generated includes the last bit field. Thus, the number of unreceived read response signals is completed by the replacement signal, and the inclusion of the last bit field in the last read response signal enables the first port to determine that the burst transmission has ended, avoiding anomalies in the host where the first port is located.

[0055] In some embodiments of this disclosure, the signal type includes a valid identifier type. The signal to be detected is detected according to the signal type of the signal to be detected to obtain a signal detection result, including: if the valid identifier signal changes from a high level to a low level, a received signal corresponding to the valid identifier signal returned by the TileLink bus is received, and a first protocol result is generated; wherein, the first protocol result indicates that the high level holding time of the valid identifier signal violates the TileLink protocol.

[0056] Among them, the valid identification signal can be a signal of the valid identification type.

[0057] In this embodiment, the first firewall can support violation detection for various TileLink protocols. One type is violation detection based on the high-level duration of a valid identification signal. This detection can be performed on one or more of channels A, B, C, D, and E. Specifically, after the master or slave device initiates a valid identification signal, it must wait for the received signal to be valid before invalidating the valid identification signal; otherwise, the corresponding firewall will consider it a violation of the TileLink protocol, and the first protocol result will be applied. Figure 7 This is a schematic diagram illustrating a hold duration detection method provided in an embodiment of this disclosure. Figure 7 As shown, a rising edge on the valid identification signal indicates that the signal is valid, and a falling edge indicates that the signal is invalid. A rising edge on the received signal indicates that the signal is valid. If the first fire protection determines that the valid identification signal has changed from valid to invalid (i.e., after a falling edge appears, a TileLink bus return receive signal is received, indicating that the received signal is valid), then since a falling edge appears on the valid identification signal before a receive signal is received, it is determined that the holding time of the valid identification signal violates the TileLink protocol, and the first protocol result is generated.

[0058] In the above scheme, due to reasons such as signal timing disorder, invalid signal flips may occur. In this case, the first firewall can automatically detect whether the high-level holding duration of the valid identification signal violates the TileLink protocol and provide corresponding prompts.

[0059] In some embodiments of this disclosure, the signal type includes data size and address type. The signal to be detected is detected according to the signal type of the signal to be detected to obtain a signal detection result, including: determining the number of bytes corresponding to the size signal; if the address signal is a non-integer multiple of the number of bytes, then generating a second protocol result; wherein, the second protocol result indicates that the matching of the size signal and the address signal violates the TileLink protocol.

[0060] The size signal can be a data size signal, representing the size of the data handled by the TileLink protocol. The address signal can be an address type signal. The size signal and address signal can be in the same signal group. The byte count can be the number of bytes transmitted.

[0061] In this embodiment, the first firewall can acquire the size signal and address signal from the signal group, extract the value from the size signal, and calculate 2 raised to the power of that value to obtain the number of bytes. If the address signal is an integer multiple of the number of bytes, it indicates that the address signal and the number of bytes are aligned, and the size signal and the address signal match. For example, when the value in the size signal is 1, the address in the address signal is an even-byte address such as 0x0, 0x2, or 0x4. When the value in the size signal is 5, the address in the address signal is an address aligned with 32 bytes, such as 0x0, 0x20, or 0x40. If the address signal is not an integer multiple of the number of bytes, it indicates that the address signal and the number of bytes are not aligned, and the size signal and the address signal do not match, thus generating a second protocol result.

[0062] In the above scheme, the first firewall can automatically detect whether the size signal and address signal sent from the first port match, and provide corresponding prompts if the size signal and address signal do not match.

[0063] In some embodiments of this disclosure, the signal type includes a resource type. The signal to be detected is detected according to the signal type of the signal to be detected to obtain a signal detection result, including: storing the resource signal; obtaining the destination signal for the signal group response transmitted by the TileLink bus; if the destination signal and the resource signal are different, a third protocol result is generated; wherein the third protocol result indicates that at least one of the resource signal and the destination signal violates the TileLink protocol.

[0064] Among these, resource signals can be signals of resource types. Destination signals can be used for consistent transaction pairing.

[0065] In this embodiment, the first firewall can also detect TileLink protocol violations of resources. Specifically, the first firewall can detect resource signals in the signal group where the write or read signal initiated by channel A is located, and store the resource signal. This embodiment does not limit the specific location of the storage; for example, it can be stored in Content Addressable Memory (CAM). When channel D returns the response to the write or read signal, the first firewall can obtain the destination signal transmitted by the TileLink bus and check whether the destination signal value matches the already stored resource signal. If the values ​​are the same, it matches, and the resource signal is released. If it does not match, the first firewall generates a third protocol result. For example, if the current CAM stores SOURCE_ID0, SOURCE_ID1, and SOURCE_ID2, the destination information needs to match one of them.

[0066] In the above scheme, the first firewall can automatically detect the consistency between the resource signal and the returned destination signal, thus realizing the automatic detection of consistent transactions.

[0067] Step 103: If the signal detection result indicates an abnormality, an abnormality prompt message is generated and transmitted to the first port so that the first port can perform abnormality processing based on the abnormality prompt message.

[0068] The exception message is used to indicate that an anomaly has occurred on the first port. Exception handling can be performed in response to the exception, which may include unblocking the first firewall and then resuming signal transmission, or performing a system reset on the host, which may be a system initialization process.

[0069] In this embodiment, if the signal detection result indicates no anomaly, the first firewall will pass the signal through. If the signal detection result indicates an anomaly, the first firewall can adjust its state to a blocking state and generate an anomaly message, which will then be transmitted to the first port. Upon receiving the anomaly message, the first port will perform anomaly handling based on the message.

[0070] In some embodiments of this disclosure, generating an error message and transmitting the error message to a first port includes: storing the signal detection result in a preset location; in response to receiving the next signal group output by the first port, intercepting the next signal group and transmitting the error message to the first port, so that the host corresponding to the first port reads data from the preset location and obtains the signal detection result.

[0071] The preset location can be a pre-set storage location. This embodiment does not limit the preset location; for example, the preset location can be the register corresponding to the first firewall. The next signal group can be the signal group that will be transmitted in the next cycle.

[0072] In this embodiment, the first firewall can store the signal detection results at a preset location and adjust its own state to a blocked state. The first port transmits the next signal group to the first firewall, which can intercept the next signal group. Since a new data transmission cycle has begun, the first port can receive data. The first firewall can send anomaly alerts to the first port. Optionally, the anomaly alerts corresponding to different signal detection results can be the same. After receiving the signal detection result, the first port obtains the data at the preset location through a pre-set interface to obtain the signal detection result. Since the signal detection result may be caused by sporadic factors such as single-event reversal or environmental factors, the anomaly is sporadic. Therefore, the host can send a state recovery command to the first firewall. After receiving the state recovery command, the first firewall adjusts its own state from a blocked state to a normal state. If the number of anomaly alerts received by the host exceeds a preset threshold, the host can perform a system reset.

[0073] In the above scheme, the host obtains specific signal detection results through a preset location, which realizes stable transmission of signal detection results between the host and the first firewall, reduces the impact of other factors on the host's acquisition of signal detection results, and improves the success rate of the host in handling anomalies.

[0074] An anomaly handling method based on the TileLink bus according to an embodiment of this disclosure is applied to a first firewall. The first firewall is deployed between a first port and the TileLink bus, and a second firewall is deployed between the TileLink bus and the second port. The method includes: determining a signal to be detected in a signal group output from the first port; wherein the signal group is transmitted to the second port sequentially through the first firewall, the TileLink bus, and the second firewall; detecting the signal to be detected according to the signal type of the signal to be detected to obtain a signal detection result; wherein the signal detection result includes at least one of a timeout detection result and a TileLink protocol detection result; if the signal detection result indicates an anomaly, generating an anomaly prompt message and transmitting the anomaly prompt message to the first port so that the first port performs anomaly handling according to the anomaly prompt message.

[0075] In the above scheme, firewalls are set up for the first and second ports respectively. The signal to be detected is identified in the signal group. Based on the signal type of the signal to be detected, multiple dimensions of detection are performed, such as timeout detection and TileLink protocol detection. If the detection result is abnormal, an abnormal prompt message is generated, which enables the host to automatically handle the abnormality based on the abnormal prompt message. By detecting the signal of the TileLink port in real time, abnormalities such as protocol violations and timeout responses are detected. By transmitting the abnormal prompt message to the TileLink port, the host can automatically handle abnormalities, reduce the impact of data abnormalities on upstream ports, and improve the stability of the host.

[0076] This disclosure provides a firewall system for the TileLink bus, which implements policy-based access control and monitoring. It avoids the transmission of mismatched size and address information to slave ports, constructs a logical security zone, achieves security isolation, and prevents lateral fault propagation. Furthermore, it can detect communication-level timeout errors and TileLink protocol violations in real time. It provides hardware-level proactive protection for security-critical data and peripherals. It achieves functional safety isolation based on the system-on-chip and meets the highest level of Automotive Safety Integrity Level (ASIL), significantly contributing to the system's security and integrity.

[0077] Figure 8 A schematic diagram of an exception handling device based on the TileLink bus provided in an embodiment of this disclosure is shown.

[0078] like Figure 8 As shown, an exception handling device 800 based on the TileLink bus is installed in a first firewall. The first firewall is deployed between a first port and the TileLink bus, and a second firewall is deployed between the TileLink bus and the second port. The device includes: The determination module 801 is used to determine the signal to be detected in the signal group output from the first port; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall; The detection module 802 is used to detect the signal to be detected according to the signal type of the signal to be detected, and obtain a signal detection result; wherein, the signal detection result includes at least one of timeout detection result and TileLink protocol detection result; The prompting module 803 is used to generate an abnormal prompt message if the signal detection result is abnormal, and transmit the abnormal prompt message to the first port so that the first port can perform abnormal processing according to the abnormal prompt message.

[0079] Optionally, the timeout detection result includes a response timeout result, and the detection module 802 includes: The determination submodule is used to determine the response signal corresponding to the signal to be detected based on the signal type. The detection submodule is used to generate a response timeout result and generate a replacement signal corresponding to the response signal if no response signal is received within a preset time period after the signal to be detected is sent from the first port, and transmit the replacement signal to the first port.

[0080] Optionally, the signal type includes a read type, the response signal includes multiple read response signals, and generating a replacement signal corresponding to the response signal and transmitting the replacement signal to the first port includes: Determine a first number of expected read response signals, and determine a second number of read response signals to be returned within the preset time period; The difference between the first quantity and the second quantity is determined as the target quantity; The target number of substitution signals is constructed and transmitted sequentially to the first port; wherein the last substitution signal received by the first port includes a last bit field.

[0081] Optionally, the signal type includes a valid identifier type, and the detection module 802 is specifically used for: If the valid identifier signal changes from high to low, and the TileLink bus returns the received signal corresponding to the valid identifier signal, then a first protocol result is generated; wherein, the first protocol result indicates that the high-level duration of the valid identifier signal violates the TileLink protocol.

[0082] Optionally, the signal type includes data size and address type, and the detection module 802 is specifically used for: Determine the number of bytes corresponding to the size signal; If the address signal is a non-integer multiple of the number of bytes, a second protocol result is generated; wherein the second protocol result indicates that the matching of the size signal and the address signal violates the TileLink protocol.

[0083] Optionally, the signal type includes a resource type, and the detection module 802 is specifically used for: Storage resource signals; Obtain the destination signal of the signal group transmitted by the TileLink bus. If the destination signal and the resource signal are different, generate a third protocol result. The third protocol result indicates that at least one of the resource signal and the destination signal violates the TileLink protocol.

[0084] Optionally, generating an error message and transmitting the error message to the first port includes: The signal detection results are stored in a preset location; In response to receiving the next signal group output from the first port, the next signal group is intercepted, and the abnormal prompt information is transmitted to the first port, so that the host corresponding to the first port can read data at the preset position and obtain the signal detection result.

[0085] It should be noted that, Figure 8 The TileLink bus-based exception handling device 800 shown can execute the various steps in the TileLink bus-based exception handling method embodiments described above, and realize the various processes and effects in the TileLink bus-based exception handling method embodiments described above, which will not be elaborated here.

[0086] Figure 9 A schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure is shown.

[0087] like Figure 9 As shown, the electronic device may include a processor 901 and a memory 902 storing computer program instructions.

[0088] Specifically, the processor 901 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0089] Memory 902 may include a mass storage device for information or instructions. For example, and not limitingly, memory 902 may include a hard disk drive (HDD), a floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 902 may include removable or non-removable (or fixed) media. Where appropriate, memory 902 may be internal or external to the integrated gateway device. In a particular embodiment, memory 902 is a non-volatile solid-state memory. In a particular embodiment, memory 902 includes read-only memory (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (Electrically Programmable ROM, EPROM), an electrically erasable programmable PROM (EEPROM), an electrically alterable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0090] The processor 901 reads and executes computer program instructions stored in the memory 902 to perform the steps of the exception handling method based on the TileLink bus provided in the embodiments of this disclosure.

[0091] In one example, the electronic device may also include a transceiver 903 and a bus 904. Wherein, as... Figure 9 As shown, the processor 901, memory 902 and transceiver 903 are connected via bus 904 and communicate with each other.

[0092] Bus 904 includes hardware, software, or both. For example, and not limitingly, a bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industrial Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a MicroChannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses, or a combination of two or more of these. Where appropriate, bus 904 may include one or more buses. Although specific buses are described and illustrated in the embodiments of this application, this application considers any suitable bus or interconnection.

[0093] The following are embodiments of a computer-readable storage medium provided in this disclosure. This computer-readable storage medium and the exception handling method based on the TileLink bus in the above embodiments belong to the same inventive concept. For details not described in detail in the embodiments of the computer-readable storage medium, please refer to the embodiments of the exception handling method based on the TileLink bus described above.

[0094] This embodiment provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform an exception handling method based on the TileLink bus.

[0095] Of course, the computer-executable instructions provided in the embodiments of this disclosure are not limited to the above-described method operations, but can also execute related operations in the exception handling method based on the TileLink bus provided in any embodiment of this disclosure.

[0096] Based on the above description of the implementation methods, those skilled in the art can clearly understand that this disclosure can be implemented using software and necessary general-purpose hardware, and of course, it can also be implemented using hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk, or optical disk, etc., including several instructions to cause a computer cloud platform (which may be a personal computer, server, or network cloud platform, etc.) to execute the exception handling method based on the TileLink bus provided in the various embodiments of this disclosure.

[0097] Note that the above description is merely a preferred embodiment and the technical principles employed in this disclosure. Those skilled in the art will understand that this disclosure is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this disclosure. Therefore, although this disclosure has been described in detail through the above embodiments, it is not limited to the above embodiments. Many other equivalent embodiments may be included without departing from the concept of this disclosure, and the scope of this disclosure is determined by the scope of the appended claims.

Claims

1. An exception handling method based on the TileLink bus, characterized in that, The method, applied to a first firewall deployed between a first port and a TileLink bus, and with a second firewall deployed between the TileLink bus and the second port, includes: The signal to be detected in the signal group output from the first port is determined; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall; The signal to be detected is detected according to the signal type of the signal to be detected to obtain a signal detection result; wherein, the signal detection result includes at least one of timeout detection result and TileLink protocol detection result; If the signal detection result indicates an anomaly, an anomaly message is generated and transmitted to the first port so that the first port can perform anomaly processing based on the anomaly message.

2. The method according to claim 1, characterized in that, The timeout detection result includes a response timeout result. The step of detecting the signal to be detected based on its signal type to obtain a signal detection result includes: Based on the signal type, determine the response signal corresponding to the signal to be detected; If no response signal is received within a preset time period after the signal to be detected is sent from the first port, a response timeout result is generated, and a replacement signal corresponding to the response signal is generated and transmitted to the first port.

3. The method according to claim 2, characterized in that, The signal type includes a read type, the response signal includes multiple read response signals, and generating a replacement signal corresponding to the response signal and transmitting the replacement signal to the first port includes: Determine a first number of expected read response signals, and determine a second number of read response signals to be returned within the preset time period; The difference between the first quantity and the second quantity is determined as the target quantity; The target number of substitution signals is constructed and transmitted sequentially to the first port; wherein the last substitution signal received by the first port includes a last bit field.

4. The method according to claim 1, characterized in that, The signal type includes a valid identifier type. The step of detecting the signal to be detected based on its signal type to obtain a signal detection result includes: If the valid identifier signal changes from high to low, and the TileLink bus returns the received signal corresponding to the valid identifier signal, then a first protocol result is generated; wherein, the first protocol result indicates that the high-level duration of the valid identifier signal violates the TileLink protocol.

5. The method according to claim 1, characterized in that, The signal type includes data size and address type. The step of detecting the signal to be detected based on its signal type to obtain a signal detection result includes: Determine the number of bytes corresponding to the size signal; If the address signal is a non-integer multiple of the number of bytes, a second protocol result is generated; wherein the second protocol result indicates that the matching of the size signal and the address signal violates the TileLink protocol.

6. The method according to claim 1, characterized in that, The signal type includes resource type. The step of detecting the signal to be detected based on its signal type to obtain a signal detection result includes: Storage resource signals; Obtain the destination signal of the signal group transmitted by the TileLink bus. If the destination signal and the resource signal are different, generate a third protocol result. The third protocol result indicates that at least one of the resource signal and the destination signal violates the TileLink protocol.

7. The method according to claim 1, characterized in that, The step of generating an error message and transmitting the error message to the first port includes: The signal detection results are stored in a preset location; In response to receiving the next signal group output from the first port, the next signal group is intercepted, and the abnormal prompt information is transmitted to the first port, so that the host corresponding to the first port can read data at the preset position and obtain the signal detection result.

8. An exception handling device based on the TileLink bus, characterized in that, The device comprises: a first firewall configured between a first port and a TileLink bus, and a second firewall configured between the TileLink bus and the second port; the device includes: The determination module is used to determine the signal to be detected in the signal group output from the first port; wherein the signal group is transmitted to the second port in sequence through the first firewall, the TileLink bus, and the second firewall; The detection module is used to detect the signal to be detected according to the signal type of the signal to be detected, and obtain a signal detection result; wherein, the signal detection result includes at least one of timeout detection result and TileLink protocol detection result; The prompting module is used to generate an abnormal prompt message if the signal detection result is abnormal, and transmit the abnormal prompt message to the first port so that the first port can perform abnormal processing according to the abnormal prompt message.

9. An electronic device, characterized in that, include: processor; Memory, used to store executable instructions; The processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the method of any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, The storage medium stores a computer program that, when executed by a processor, causes the processor to implement the method described in any one of claims 1-7.

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