Image gain adjustment method, apparatus, control processing unit, and semiconductor device

Abstract

The application discloses an image gain adjustment method and device, a control processing unit and a semiconductor device, and aims at solving the problem of insufficient camera detection accuracy. The method comprises the following steps: obtaining a pre-scanning image of a wafer to be detected, which comprises a plurality of repeated chip units; selecting a plurality of candidate sub-regions from the pre-scanning image based on the chip units, each sub-region corresponding to a block distributed along a preset path in the chip unit; calculating the scores of a plurality of position windows conforming to a preset size in each candidate sub-region, the score being determined based on image features; selecting at least one position window from each candidate sub-region as a monitoring region based on the score to determine an image adjustment gain coefficient. The scheme fully utilizes the periodic repetition characteristics of the wafer image, accurately locates the most representative evaluation region by quantifying the local image quality, solves the problem of low gain adjustment accuracy caused by fixed or improper selection of the monitoring region, improves the accuracy and optimizes the imaging quality.

Description

Technical Field

[0001] This application relates to the field of semiconductor processing technology, and in particular to an image gain adjustment method, apparatus, control processing unit, and semiconductor device. Background Technology

[0002] In the semiconductor manufacturing industry, optical inspection is a crucial step in ensuring wafer production quality. Acquiring high-precision images of the wafer surface using industrial cameras and identifying and analyzing defects within these images is fundamental to process monitoring and yield improvement. Image gain adjustment is a core technique for optimizing image brightness and contrast; its effectiveness directly determines the integrity and reliability of image information, thus affecting the detection rate and classification accuracy of minute defects.

[0003] In related technologies, image gain adjustment methods mainly adopt global uniform settings or static adjustments based on fixed areas. However, these methods fail to fully consider the complex and dynamic local brightness changes on the wafer surface caused by process fluctuations, uneven illumination, and differences in optical paths. This makes it easy for the method to fail to adapt to the characteristic differences of different batches of wafers or different functional areas within the same wafer, thereby affecting the accuracy of camera detection. Summary of the Invention

[0004] This application discloses an image gain adjustment method, apparatus, control processing unit, and semiconductor device to solve the technical problem of insufficient accuracy of camera detection in related technologies.

[0005] Firstly, this application provides an image gain adjustment method, which includes:

[0006] Acquire a pre-scan image of the wafer under test, which includes multiple repeating chip cells;

[0007] Based on multiple chip units, multiple candidate sub-regions are selected from the pre-scanned image, wherein each candidate sub-region corresponds to a block distributed along a preset path in each chip unit;

[0008] Calculate the score for multiple location windows that meet the preset size within each candidate sub-region. The score is determined based on the image features of the corresponding location window.

[0009] Based on the score, at least one location window is selected from each candidate sub-region as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer under test according to the monitoring area.

[0010] Therefore, by acquiring pre-scanned images, selecting candidate sub-regions based on the repetitive chip cell structure, and using position window scoring to filter monitoring areas, the gain coefficient can be determined. This fully utilizes the periodic repetitive characteristics of wafer images and accurately locates the most representative evaluation area by quantifying local image quality. This solves the problem of low gain adjustment accuracy caused by fixed or improper selection of monitoring areas in related technologies, improves the accuracy of image gain adjustment, and optimizes imaging quality.

[0011] Optionally, based on multiple chip units, multiple candidate sub-regions are selected from the pre-scanned image, including: obtaining the size of the chip unit and the size of the block; dividing the chip unit into multiple blocks according to a preset rule based on the size of the chip unit and the size of the block; and selecting some blocks as multiple candidate sub-regions.

[0012] Therefore, by dividing the chip unit into regular blocks and selecting some blocks as candidate sub-regions, the computational overhead of traversing the entire region is avoided, the targeting and efficiency of candidate region selection are improved, and the uniformity of spatial distribution is ensured, laying the foundation for the accurate selection of subsequent monitoring areas.

[0013] Optionally, selecting some blocks as multiple candidate sub-regions includes: determining multiple blocks distributed in at least two intersecting directions in the chip cell; and selecting multiple blocks distributed in at least two intersecting directions in the chip cell as multiple candidate sub-regions.

[0014] Therefore, by selecting blocks distributed along at least two intersecting directions, the candidate sub-regions can cover representative locations in multiple dimensions of the chip unit, enhancing the diversity of monitoring area selection, avoiding blind spots that may be caused by selection in a single direction, and improving the robustness and comprehensiveness of subsequent image quality assessment.

[0015] Optionally, multiple blocks distributed along at least two intersecting directions in the chip cell are selected as multiple candidate sub-regions, including selecting multiple blocks located on the main diagonal and the secondary diagonal as multiple candidate sub-regions.

[0016] By selecting blocks on the main diagonal and sub-diagonal as candidate sub-regions, symmetrical coverage of the entire chip cell spatial distribution is achieved with a smaller number of blocks, taking into account both the central and edge regions. This effectively improves the representativeness and selection efficiency of the candidate sub-regions, and further optimizes the accuracy of monitoring area selection and system response speed.

[0017] Optionally, before selecting multiple candidate sub-regions from the pre-scanned image based on multiple chip cells, the process includes: obtaining gain adjustment parameters and the size of the chip cells; and determining the size of the block and the size of the monitoring area based on the gain adjustment parameters and the size of the chip cells.

[0018] Therefore, by introducing gain adjustment parameters before selecting candidate sub-regions and dynamically determining the size of the block and monitoring area based on the chip cell size, the size of the candidate area can be adapted to different chip cell specifications and detection requirements, significantly enhancing the flexibility and applicability of the method and enabling adaptive configuration for different wafers.

[0019] Optionally, the gain adjustment parameters include a first size ratio between the block and the monitoring area, and a second size ratio between the chip unit and the block. Based on the gain adjustment parameters and the size of the chip unit, the size of the monitoring area is determined, including: determining the size of the block and the size of the monitoring area based on the first size ratio, the second size ratio, and the size of the chip unit.

[0020] Therefore, by specifying the gain adjustment parameters as the first size ratio between the block and the monitoring area and the second size ratio between the chip unit and the block, parameterization and quantitative control of the size determination process are realized, which makes it easier for users to make fine adjustments according to the actual scenario and improves the accuracy, operability and repeatability of size settings.

[0021] Optionally, based on the first size ratio, the second size ratio, and the size of the chip cell, the size of the block and the size of the monitoring area are determined, including:

[0022] The width of the block is determined based on the ratio of the width of the chip unit to the second size ratio, and the height of the block is determined based on the ratio of the height of the chip unit to the second size ratio; the width of the monitoring area is determined based on the ratio of the width of the block to the first size ratio, and the height of the monitoring area is determined based on the ratio of the height of the block to the first size ratio.

[0023] Therefore, by using the calculation formulas (block size = chip size / second size ratio; monitoring area size = block size / first size ratio), the certainty and consistency of size determination are ensured. At the same time, the calculation process is simple and easy to parallelize, which helps to improve the real-time response efficiency and reliability of the system.

[0024] Optionally, the block includes at least one detection data unit; the scores of multiple position windows of a preset size within each candidate sub-region are calculated, including: based on the set position window size and preset step size, sliding through each candidate sub-region to determine the contrast index corresponding to each detection data unit under each position window, wherein the position window size is equal to the size of the monitoring area; the contrast index is the average of the contrast values ​​of detection data units corresponding to the same position in all chip units in the pre-scanned image; and the score corresponding to the position window is determined based on the contrast index of each detection data unit.

[0025] Therefore, by traversing through a sliding window and calculating the score based on the average contrast of the data cells detected at the same location across chip cells, the statistical consistency between repeated chip cells on the wafer is utilized, the interference of local defects on the score is suppressed, the problem of single chip cell scores being easily affected by local anomalies is solved, and the robustness and stability of the score are significantly improved.

[0026] Optionally, after selecting a monitoring area, the method further includes: fusing at least two image features corresponding to at least one monitoring area to obtain a quality score corresponding to the monitoring area; and determining an image adjustment gain coefficient corresponding to the wafer under test based on the quality score, wherein the image adjustment gain coefficient is used to adjust the device gain of the image sensor when acquiring the image of the wafer under test.

[0027] Therefore, by fusing at least two image features to obtain a quality score and determining the image adjustment gain coefficient accordingly, the one-sidedness of single feature evaluation is overcome, and the problem of insufficient comprehensiveness and accuracy of gain adjustment caused by the reliance on a single static index in related technologies is solved. Closed-loop control from image quality assessment to device parameter adjustment is realized, thereby improving the adaptive adjustment capability and imaging quality of the image sensor.

[0028] Optionally, at least two image features corresponding to at least one monitoring area are fused to obtain a quality score for the monitoring area, including: obtaining an image statistical histogram for each monitoring area; cropping and reconstructing the image statistical histogram based on a preset distribution threshold corresponding to each image feature; extracting at least two different types of image features based on the processed image data; and fusing the extracted image features based on a preset nonlinear mapping function to obtain a quality score for the monitoring area.

[0029] Therefore, by cropping and reconstructing the distribution of image statistical histograms and fusing multiple image features using nonlinear mapping functions, the influence of abnormal data distributions can be removed and key image features can be enhanced. This solves the problem that quality scores are easily affected by extreme pixel values ​​and have low discrimination in complex image environments, and achieves nonlinear and accurate mapping of quality scores, thereby improving the sensitivity and discrimination of scores to image details.

[0030] Optionally, based on the quality score, the image adjustment gain coefficient corresponding to the wafer under test is determined, including: mapping the quality score of each monitoring area to a sub-gain value located within a preset gain boundary based on a preset nonlinear transformation function; and fusing the sub-gain values ​​corresponding to all monitoring areas to obtain the image adjustment gain coefficient.

[0031] Therefore, by mapping the quality score to bounded sub-gain values ​​and fusing them through a nonlinear transformation function, the output range of the gain coefficient is limited and local fluctuations are smoothed. This solves the problem that the gain calculation is easily affected by extreme scores and the output is distorted, thus ensuring the global optimality and stability of the gain adjustment.

[0032] Optionally, the sub-gain values ​​corresponding to all monitoring areas are fused to obtain the image adjustment gain coefficient, including: weighting all sub-gain values ​​according to the predefined spatial weights of each monitoring area to obtain a unified image adjustment gain coefficient.

[0033] Therefore, by using predefined spatial weights to weight the sub-gain values, the gain fusion result can be adjusted according to the differences in the importance of the monitored areas. This solves the problem of not considering the differences in regional importance when fusions multiple regions, and achieves differentiated gain fusion, further improving the calculation accuracy and regional specificity of the image adjustment gain coefficient.

[0034] Optionally, after determining the image adjustment gain coefficient corresponding to the wafer under test, the method further includes: recursively mixing the image adjustment gain coefficient determined this time with the historical image adjustment gain coefficient used in the previous acquisition by the image sensor to obtain a final gain value that changes smoothly over time, and using the final gain value as the output image adjustment gain coefficient.

[0035] Therefore, by recursively mixing the current image adjustment gain coefficient with the historical gain coefficient and introducing smoothing processing in the time dimension, the gain value jump caused by image noise or instantaneous fluctuations is effectively suppressed. This solves the problem of frequent fluctuations in gain value affecting imaging stability during dynamic adjustment, and makes the image adjustment gain coefficient transition smoothly over time, ensuring imaging continuity and system robustness.

[0036] Optionally, after selecting the monitoring area, the method further includes: determining the index value corresponding to at least one image feature in the monitoring area; comparing the index value with a preset normal threshold range; if the comparison result indicates an anomaly, triggering a preset alarm action and outputting corresponding alarm information, the alarm information including the location of the monitoring area where the abnormal index value is located and the comparison result.

[0037] Therefore, by comparing the image feature indicators of the monitored area with normal thresholds and triggering alarms containing location information when an anomaly occurs, real-time feedback from image quality assessment to anomaly location is achieved. This solves the problem that existing monitoring methods cannot locate and respond to anomalies in a timely manner, enabling timely detection of abnormal fluctuations or equipment failures in the wafer manufacturing process, assisting in the rapid location of anomalies, and enhancing the system's monitoring and response capabilities.

[0038] Secondly, embodiments of this application provide an image gain adjustment device, which includes:

[0039] The acquisition module is used to acquire a pre-scan image of the wafer under test, which includes multiple repeating chip units;

[0040] The selection module is used to select multiple candidate sub-regions from a pre-scanned image based on chip units, wherein each candidate sub-region corresponds to a block distributed along a preset path in the chip unit;

[0041] The scoring module is used to calculate the scores of multiple location windows that meet the preset size within each candidate sub-region. The scores are determined based on the image features of the corresponding location windows.

[0042] The processing module is used to select at least one location window from each candidate sub-region based on the score, as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer under test according to the monitoring area.

[0043] Thirdly, embodiments of this application also provide a control processing unit, which includes a processor and a memory. The memory is used to store computer program instructions, and the processor is used to call the computer program instructions stored in the memory so that the control processing unit implements the image gain adjustment method as described in the first aspect of this application.

[0044] Fourthly, embodiments of this application also provide a computer-readable storage medium for storing computer program instructions that, when executed by a processor, implement the image gain adjustment method as described in the first aspect of this application.

[0045] Fifthly, embodiments of this application also provide a computer program product comprising a computer program that, when executed by a processor, implements the image gain adjustment method as described in the first aspect of this application.

[0046] Sixthly, embodiments of this application also provide a semiconductor device, which includes an image sensor and a control processing unit as described in the third aspect of this application. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 An architecture diagram of a semiconductor device provided in this application embodiment;

[0049] Figure 2 A flowchart of an image gain adjustment method provided in one embodiment of this application;

[0050] Figure 3 for Figure 2 The illustrated embodiment provides a schematic diagram showing the positional relationship between the wafer, chip unit, block, and candidate sub-region.

[0051] Figure 4 A flowchart of an image gain adjustment method provided in one embodiment of this application;

[0052] Figure 5 A flowchart of an image gain adjustment method provided in one embodiment of this application;

[0053] Figure 6 This is a schematic diagram illustrating the processing of an image statistical histogram according to an embodiment of this application;

[0054] Figure 7 A flowchart of an image gain adjustment method provided in one embodiment of this application;

[0055] Figure 8 This is a schematic diagram of a data stream processing procedure for a semiconductor device provided in one embodiment of this application;

[0056] Figure 9 This is a schematic diagram of the structure of a control processing unit provided in one embodiment of this application.

[0057] Explanation of reference numerals in the attached figures:

[0058] 1-Semiconductor equipment;

[0059] 11-Light source; 12-Illumination module; 13-Beam splitter; 14-Objective lens module; 15-Object under test; 16-Motion stage; 17-Collection module; 18-Image sensor; 19-Control and processing unit;

[0060] 101-Wafer to be tested; 102-Chip unit; 103-Block; 104-Candidate sub-region; 105-Position window; 106-Detection data unit;

[0061] 500 - Image gain adjustment device; 510 - Acquisition module; 520 - Selection module; 530 - Scoring module; 540 - Processing module;

[0062] 61 - Processor; 62 - Memory. Detailed Implementation

[0063] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0064] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0065] The image gain adjustment method provided in this application is applicable to semiconductor devices with image sensors, specifically to overlay equipment, bright field detection equipment, and dark field detection equipment.

[0066] Specifically, Figure 1 This is a schematic diagram of the structure of a semiconductor device provided in this application. Figure 1 As shown, the semiconductor device 1 may include a light source 11, an illumination module 12, a beam splitter 13, an objective lens module 14, a motion stage 16, a collection module 17, an image sensor 18, and a control processing unit 19. The control processing unit 19 is connected to both the image sensor 18 and the motion stage 16.

[0067] Specifically, light source 11 generates an illumination beam. The emitted light is shaped, homogenized, and collimated by illumination module 12 before being projected onto beam splitter 13. Beam splitter 13 reflects the illumination light to objective lens module 14, which focuses the incident light onto the surface of object 15. Object 15 is supported on stage 16, which can move in multiple directions to adjust the position of object 15 for scanning imaging. The light reflected from the surface of object 15 (i.e., brightfield signal light) is collected by objective lens module 14, transmitted through beam splitter 13, and enters collection module 17. Collection module 17 further images or filters the reflected light and transmits the light signal to image sensor 18. Image sensor 18 converts the received optical signal into an electrical signal and outputs it to control processing unit 19. Control processing unit 19 processes the image data and then issues control commands to stage 16 and image sensor 18.

[0068] Image gain adjustment is a core method for optimizing image brightness and contrast. The quality of its adjustment directly determines the integrity and reliability of image information, thus affecting the detection rate and classification accuracy of subtle defects. In related technologies, image gain adjustment methods mainly employ globally uniform settings or static adjustments based on fixed regions. However, these methods fail to fully consider the complex and dynamic local brightness changes on the wafer surface caused by process fluctuations, uneven illumination, and differences in optical paths. This leads to a tendency to be unable to adapt to the characteristic differences between different batches of wafers or different functional areas within the same wafer, thus affecting the universality and accuracy of detection. Furthermore, even when dynamic adjustment is introduced in some methods, frequent fluctuations in gain values ​​due to image noise or local abrupt changes during the dynamic response process can impair imaging stability and system robustness.

[0069] To address this issue, this application provides an image gain adjustment method. By acquiring a pre-scanned image, selecting candidate sub-regions based on the repetitive chip cell structure, and using position window scoring to filter the monitoring area, the image adjustment gain coefficient is determined. This fully utilizes the periodic repetitive characteristics of the wafer image, solving the problems of low accuracy and poor universality of gain adjustment caused by fixed or improper selection of the monitoring area in related technologies. By quantifying the local image quality to accurately locate the most representative evaluation area, the accuracy of image gain adjustment is improved, and the imaging quality is optimized.

[0070] Example 1:

[0071] This embodiment describes the main steps of the image gain adjustment method in conjunction with the above application scenarios. For example... Figure 2 The diagram shown is a flowchart of an image gain adjustment method provided in one embodiment of this application. The image gain adjustment method provided in this embodiment includes the following steps:

[0072] Step S201: Obtain a pre-scan image of the wafer 101 under test, wherein the wafer 101 under test includes multiple repeating chip units 102.

[0073] Specifically, the wafer under test 101 is a wafer that needs to be defect-detected using semiconductor device 1. The wafer under test 101 has multiple repeating chip units 102, such as multiple periodically arranged chip units 102 on the wafer under test 101. The wafer under test 101 is one of the test objects 15 provided in the above embodiments.

[0074] Before formal inspection, image sensor 18 first performs a line scan with a preset gain to obtain a pre-scan image of the wafer 101 under test. The pre-scan image refers to a rapid imaging of a local area of ​​the wafer at a preset gain and / or a faster scanning speed before formal inspection. Its purpose is not for direct defect detection, but to provide reference data for subsequent selection of monitoring areas and calculation of gain parameters.

[0075] The pre-scan range typically covers 3 to 6 chip units 102 on the wafer 101 under test, eliminating the need to scan the entire wafer 101 under test, thereby shortening the pre-scan time while ensuring sufficient statistical information.

[0076] The preset gain can be a parameter set on the graphical interface, or it can be a default value set directly within the system.

[0077] The pre-scan image does not need to achieve the precision required for final inspection. Its purpose is to quickly acquire the overall brightness distribution and basic texture information (such as local contrast, edge density, and pattern orientation) of the wafer surface, providing initial data for subsequent adaptive region segmentation and gain adjustment. The pre-scan operation can be set to the same or a simplified path as the formal inspection, typically using the same image sensor, but with the gain parameter set at a lower safety value to avoid image saturation. This safety value can be a preset fixed value (e.g., 30% to 50% of the maximum gain), or it can be adaptively determined based on pre-scan experience data from the previous batch of wafers, or manually entered by the operator through the software interface.

[0078] In the pre-scanned image, the wafer has multiple repeating chip cells 102 (dies). Each chip cell 102 has a basically identical functional structure, but due to process variations or optical path differences, there may be local deviations in brightness or contrast between chip cells 102. It is by utilizing this periodic repetition characteristic that subsequent steps can improve the reliability of the evaluation by comparing image information of the same position in different chip cells 102.

[0079] After the pre-scan is completed, the control processing unit 19 acquires the image and its basic statistical features, such as average gray level and edge intensity, for subsequent calculations.

[0080] The process of acquiring pre-scanned images may also involve image correction, such as dark field subtraction and flat field correction, to ensure that the image data truly reflects the reflective properties of the wafer surface.

[0081] In some embodiments, the resolution of the pre-scanned image can be preset, typically the same as or half that of the actual detection, to balance speed and information content.

[0082] Step S202: Based on multiple chip units 102, select multiple candidate sub-regions 104 from the pre-scanned image, wherein each candidate sub-region 104 corresponds to a block 103 distributed along a preset path in the chip unit.

[0083] Specifically, after obtaining the pre-scanned image in the previous step, the control processing unit 19 needs to identify the boundaries and dimensions of each chip unit 102. The identification method can be to match the image with a pre-stored chip unit size template, or to use the periodic repetition of chip units to extract the contours of the chip units through an edge detection algorithm and measure their height and width.

[0084] Then, based on the internal layout of the chip unit 102, the control processing unit 19 divides each chip unit 102 into grid blocks of equal size. Each grid block has a certain width and height. Then, following a preset path direction, several blocks are selected from all chip units 102, and these selected blocks 103 are used as candidate sub-regions 104. That is, the candidate sub-regions 104 are subsets of the blocks 103, and each candidate sub-region 104 is itself a block 103.

[0085] like Figure 3 The diagram shown illustrates the positional relationship between the wafer 101 under test, chip unit 102, block 103, and candidate sub-region 104. Figure 3 On the right side, the wafer 101 under test contains several chip units 102, and each chip unit 102 can be further divided into several blocks 103, where the dark-colored blocks 103 are the selected candidate sub-regions 104. Figure 3 On the right, multiple candidate sub-regions 104 can be selected within the same chip unit 102 (each candidate sub-region 104 can be further divided into multiple sub-regions, for example, divided into several sub-partitions in a tic-tac-toe pattern). Within each candidate sub-region 104, multiple position windows 105 can be generated using a sliding window method (each position window 105 includes at least one sub-region, such as...). Figure 3 In the middle, each position window 105 has four sub-areas, and each sub-area also contains multiple detection data units 106.

[0086] The location window 105 here refers to a rectangular sub-region that is slidable within the candidate sub-region 104 with a fixed size (the same as the size of the monitoring area) and a preset step size, and is used to calculate the local image quality score.

[0087] The detection data unit 106 is a statistical unit within the position window, and its contrast index is the average value of the same position across chip units. Each block 103 contains multiple detection data units 106. The detection data unit 106 is the smallest region unit for image analysis, and each detection data unit 106 corresponds to a fixed-size pixel region in the pre-scanned image.

[0088] The preset path can be one or more straight lines or polygonal lines passing through important functional areas of the chip unit 102. For example, the preset path can be a path composed of multiple blocks 103 located diagonally along the chip unit 102, because the diagonal direction can reflect the overall texture change trend of the chip unit 102. These functional areas include, for example, the memory array area, logic operation area, or input / output interface area of ​​the chip unit. These areas typically contain richer graphic features and are sensitive to changes in brightness or contrast, making them suitable as candidate sub-region selection locations.

[0089] refer to Figure 3 On the right side, the blocks 103 that divide the candidate sub-regions 104 are the blocks 103 on the preset path. The route formed by these blocks 103 is the preset path. The dark part in each block 103 together forms the corresponding position window 105.

[0090] Blocks distributed along these paths were selected as candidates because these locations typically contain the richest process features and are most sensitive to changes in brightness or contrast.

[0091] With this arrangement, the candidate sub-region 104 can cover key parts in different directions inside the chip unit 102, avoiding evaluation bias caused by focusing only on a corner or edge.

[0092] In some embodiments, the selection of preset paths and block sizes can be input through configuration files, allowing operators to adjust them according to the type of wafers in the current batch. For example, for memory chips, block 103, where the memory cell array area is located, can be selected first; for logic chips, the macrocell area may be selected.

[0093] The number and size of blocks 103 determine the spatial density of candidate sub-regions 104. The higher the density, the more accurate the location of the monitoring area selected later, but the computational load also increases accordingly.

[0094] In some embodiments, the system can pre-define multiple path templates, which users can simply select from the interface without manually setting complex geometric parameters. Each candidate sub-region 104 is recorded in memory as a coordinate frame and associated with the position index of its corresponding chip unit 102.

[0095] Optionally, in step S202, multiple candidate sub-regions are selected from the pre-scanned image based on multiple chip units, including: obtaining the size of the chip unit and the size of the block; dividing the chip unit into multiple blocks according to a preset rule based on the size of the chip unit and the size of the block; and selecting some blocks as multiple candidate sub-regions.

[0096] Specifically, the dimensions of chip unit 102 and block 103 need to be obtained first. The dimensions of chip unit 102 can be obtained through edge detection in a pre-scanned image or by directly reading design data, while the dimensions of block 103 are determined based on gain adjustment parameters in subsequent steps. Based on this, chip unit 102 is divided into multiple blocks 103 according to preset rules, such as an equally spaced grid, with each block 103 being a square and its side length measured in units of detection data units 106. Then, a subset of these blocks 103 are selected as candidate sub-regions 104 to avoid the computational overhead of traversing the entire region, improving efficiency and ensuring uniform spatial distribution.

[0097] Therefore, by dividing the chip unit into regular blocks and selecting some blocks as candidate sub-regions, the computational overhead of traversing the entire region is avoided, the targeting and efficiency of candidate region selection are improved, and the uniformity of spatial distribution is ensured, laying the foundation for the accurate selection of subsequent monitoring areas.

[0098] Optionally, selecting some blocks as multiple candidate sub-regions includes: determining multiple blocks distributed in at least two intersecting directions in the chip cell; and selecting multiple blocks distributed in at least two intersecting directions in the chip cell as multiple candidate sub-regions.

[0099] Optionally, when selecting candidate sub-regions 104, multiple blocks 103 distributed in at least two intersecting directions (e.g., horizontal and vertical centerlines) within the chip unit 102 can be identified, and these blocks can be selected as candidate sub-regions 104. In this way, candidate sub-regions 104 can cover representative locations in multiple dimensions within the chip unit 102, enhancing the diversity of monitoring area selection, avoiding blind spots caused by a single direction, and improving the robustness of subsequent image quality assessment.

[0100] Therefore, by selecting blocks distributed along at least two intersecting directions, the candidate sub-regions can cover representative locations in multiple dimensions of the chip unit, enhancing the diversity of monitoring area selection, avoiding blind spots that may be caused by selection in a single direction, and improving the robustness and comprehensiveness of subsequent image quality assessment.

[0101] Optionally, multiple blocks distributed along at least two intersecting directions in the chip cell are selected as multiple candidate sub-regions, including selecting multiple blocks located on the main diagonal and the secondary diagonal as multiple candidate sub-regions.

[0102] Specifically, the aforementioned intersecting directions can be defined as a main diagonal and a secondary diagonal. The control processing unit 19 calculates the equations for the two diagonals based on the rectangular boundary of the chip unit 102, then filters out all blocks 103 whose center points fall on the diagonals, selecting these blocks located on the main and secondary diagonals as candidate sub-regions 104. This method achieves symmetrical coverage of the entire spatial distribution of the chip unit 102 with a smaller number of blocks, taking into account both central and edge regions, effectively improving the representativeness and selection efficiency of the candidate sub-regions 104.

[0103] Therefore, by selecting blocks on the main diagonal and sub-diagonal as candidate sub-regions, symmetrical coverage of the entire chip cell spatial distribution is achieved with a smaller number of blocks, taking into account both the central and edge regions. This effectively improves the representativeness and selection efficiency of the candidate sub-regions, and further optimizes the accuracy of monitoring area selection and system response speed.

[0104] Optionally, before selecting multiple candidate sub-regions from the pre-scanned image based on multiple chip cells, the process includes: obtaining gain adjustment parameters and the size of the chip cells; and determining the size of the block and the size of the monitoring area based on the gain adjustment parameters and the size of the chip cells.

[0105] Before executing step S202, the process may further include acquiring gain adjustment parameters and the dimensions of chip cell 102, and determining the dimensions of block 103 and monitoring area based on the gain adjustment parameters and the dimensions of chip cell 102. Specifically, the user can input gain adjustment parameters, such as hyperparameter α, through the software interface. The system combines the height dieH and width dieW of chip cell 102 and uses a preset mathematical relationship (e.g., y²(dieH+dieW-x) / x = α·dieH·dieW, and y=x-1 or y=x-2) to calculate the block side length x and the monitoring area side length y. In this way, the size of the block and monitoring area can be adjusted in conjunction with a single parameter to adapt to the adaptive partitioning requirements of wafers of different specifications.

[0106] Therefore, by introducing gain adjustment parameters before selecting candidate sub-regions and dynamically determining the size of the block and monitoring area based on the chip cell size, the size of the candidate area can be adapted to different chip cell specifications and detection requirements, significantly enhancing the flexibility and applicability of the method and enabling adaptive configuration for different wafers.

[0107] Optionally, the gain adjustment parameters include a first size ratio between the block and the monitoring area, and a second size ratio between the chip unit and the block. Based on the gain adjustment parameters and the size of the chip unit, the size of the monitoring area is determined, including: determining the size of the block and the size of the monitoring area based on the first size ratio, the second size ratio, and the size of the chip unit.

[0108] Furthermore, the gain adjustment parameters may include a first size ratio between the block and the monitoring area, and a second size ratio between the chip unit and the block. In this case, the system determines the size of the block 103 and the size of the monitoring area based on the first size ratio, the second size ratio, and the size of the chip unit 102. For example, the first size ratio defines the relationship between the block side length x and the monitoring area side length y (e.g., y=x-1 or y=x-2), and the second size ratio defines the ratio of the chip unit 102 size (height and width) to the block side length x. By substituting the actual height and width of the chip unit 102 into these two ratios, x can be uniquely determined, and y can then be derived. This parameterized control facilitates fine-tuning by the user, improving the accuracy and repeatability of size settings.

[0109] Therefore, by specifying the gain adjustment parameters as the first size ratio between the block and the monitoring area and the second size ratio between the chip unit and the block, parameterization and quantitative control of the size determination process are realized, which makes it easier for users to make fine adjustments according to the actual scenario and improves the accuracy, operability and repeatability of size settings.

[0110] Optionally, based on the first size ratio, the second size ratio, and the size of the chip cell, the size of the block and the size of the monitoring area are determined, including:

[0111] The width of the block is determined based on the ratio of the width of the chip unit to the second size ratio, and the height of the block is determined based on the ratio of the height of the chip unit to the second size ratio; the width of the monitoring area is determined based on the ratio of the width of the block to the first size ratio, and the height of the monitoring area is determined based on the ratio of the height of the block to the first size ratio.

[0112] The specific calculation process is as follows: The width of block 103 is determined based on the ratio of the width of chip unit 102 to the second size ratio; the height of block 103 is determined based on the ratio of the height of chip unit 102 to the second size ratio (the width and height are equal when the block is square); then, the width of the monitoring area is determined based on the ratio of the width of block 103 to the first size ratio; and the height of the monitoring area is determined based on the ratio of the height of block 103 to the first size ratio. The formulas—block size = chip size / second size ratio; monitoring area size = block size / first size ratio—ensure the certainty and consistency of the size determination. The calculation process is simple and easy to parallelize.

[0113] After the above steps are completed, the control processing unit 19 stores the determined block size and monitoring area size into the configuration file or memory variable, so that the sliding window size setting in the subsequent step S2022 can be directly called.

[0114] Therefore, by using the calculation formulas (block size = chip size / second size ratio; monitoring area size = block size / first size ratio), the certainty and consistency of size determination are ensured. At the same time, the calculation process is simple and easy to parallelize, which helps to improve the real-time response efficiency and reliability of the system.

[0115] Step S203: Calculate the score of multiple position windows 105 within each candidate sub-region 104 that meet the preset size, wherein the score is determined based on the image features of the corresponding position window 105.

[0116] Specifically, within each candidate sub-region 104, the control processing unit 19 can generate a series of position windows 105 covering the block according to a fixed window size and sliding step size.

[0117] The preset size here can be configured by the operator through the software interface, or it can be automatically calculated by the control processing unit 19 based on the size of the chip unit 102 and the desired monitoring area size.

[0118] In practical applications, the size of the position window 105 can be preset by the operator through a configuration file (i.e., a preset size), and is usually set to be consistent with the final monitoring area size. For example, it can be set to the side length of several to dozens of detection data units 106, and the specific size depends on the pattern fineness of the chip unit 102 and the detection requirements.

[0119] In some embodiments, to ensure that the window can be fully translated within the candidate sub-region without exceeding the boundary, the side length of the position window 105 should be strictly smaller than the side length of the block 103 it belongs to. For example, the window side length can be constrained to be at least two detection data units 106 smaller than the block side length. The step size can be set to half the number of pixels of the window side length, allowing partial overlap between windows, thereby scanning quality changes within the block more precisely.

[0120] For each window, a sub-region of the pre-scanned image within the window is extracted, and a numerical value characterizing the quality of that local image is calculated; this is called a score. The image features used for the score can be local contrast, edge strength, gray-level variance, or information entropy of pixels within the window. Contrast can be measured by the standard deviation of pixel gray levels within the window, and edge strength can be calculated by extracting the average gradient magnitude using a gradient operator.

[0121] These features can all reflect the sharpness and detail of the image in the window area from different perspectives.

[0122] For example, one feasible way to calculate the score is to calculate the gradient magnitude for each pixel within the location window, and then take the average of the gradient magnitudes of all pixels within the window as the score for that window. The higher the score, the sharper the image edges and the richer the details within the window.

[0123] A higher score indicates that the area covered by the window has the best preservation of image details under pre-scan conditions, making it more suitable as an object for subsequent monitoring.

[0124] In some embodiments, to avoid scoring distortion caused by the window crossing the boundary of chip unit 102 or containing a large uniform area, the window can be masked before the score is calculated to remove pixels in the gaps or marked areas of chip unit 102.

[0125] In some embodiments, the scores of all windows are temporarily stored in a two-dimensional array corresponding to the window positions for further comparison.

[0126] In some embodiments, to achieve real-time response, the window score calculation for each candidate sub-region supports parallel processing. A specific parallel implementation method may be: assigning the sliding window traversal and score calculation tasks for each candidate sub-region to different thread blocks of the graphics processor; each thread block independently processes all position windows within a candidate sub-region; and within each thread block, each thread further processes the pixel operations of each position window in parallel, thereby significantly shortening the time for screening the monitoring area of ​​the wafer 101 under test.

[0127] Step S204: Based on the score, at least one location window 105 is selected from each candidate sub-region 104 as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer 101 under test according to the monitoring area.

[0128] Specifically, for each candidate sub-region 104, among the multiple location windows 105 contained within it, the window with the highest score is selected as the monitoring area corresponding to that sub-region. This ensures that only one most representative location is selected within each candidate sub-region 104, avoiding duplicate or redundant monitoring points.

[0129] In some embodiments, if two or more windows have the same highest score, further selection can be made based on the window's centrality within the block or its deviation from a preset path, with the window closer to the block center being preferred.

[0130] Once selected, all selected monitoring areas form a set, covering multiple orientations and functional areas within chip unit 102. The spatial distribution of these monitoring areas can be mapped onto the entire wafer 101 under test, forming a distribution map. This distribution map visually displays the focal areas ultimately used for image quality assessment and gain correction.

[0131] Because these regions are automatically generated from dynamic quality evaluation of pre-scanned images, they can adapt to process variations and illumination fluctuations between different wafer batches, exhibiting higher robustness and accuracy compared to fixed region division.

[0132] In practical applications, the selected monitoring area is stored in the configuration file as a list of coordinates for direct use in subsequent stages.

[0133] In some embodiments, the location of the monitoring area can be displayed as a box overlaid on the pre-scanned image on the software interface, making it easier for operators to confirm whether the area selection is appropriate. This visual feedback enhances the interpretability of the system and facilitates manual intervention in abnormal situations.

[0134] After determining the monitoring area, the system can determine the image adjustment gain coefficient (parameter of image sensor 18) corresponding to the wafer 101 under test based on the image information of these areas. Then, the value is loaded into image sensor 18, and the adjusted gain parameter is applied when the entire wafer 101 under test is formally scanned in the future, so as to obtain an image with uniform brightness and clear details.

[0135] This ensures that gain adjustment is adaptively implemented based on real-time pre-scan data, eliminating the need for repeated manual trial and error and significantly improving the consistency and automation of detection.

[0136] Example 2:

[0137] This embodiment further explains the process of determining the monitoring area and the calculation of specific parameters involved in step S202 of the above embodiment. For example... Figure 4 As shown, it is a flowchart of an image gain adjustment method provided in one embodiment of this application. Figure 4 As shown, the image gain adjustment method provided in this embodiment is used to adjust the image gain in... Figure 2 Based on the illustrated embodiment, one implementation of step S202 is further described, which includes the following steps:

[0138] Step S2021: Determine the size of the monitoring area based on the input gain adjustment parameters and the size of the chip unit.

[0139] Among them, the gain adjustment parameter is used to control the size ratio of the monitoring area to the chip cell.

[0140] Specifically, before performing this step, the control processing unit 19 can first acquire the size data of the chip cell 102, including its height H and width W. The chip cell size can be obtained from the pre-scanned image through edge detection and measurement, or it can be read directly from known chip design data (such as layout files).

[0141] Users can input gain adjustment parameters through the software interface. For example, a hyperparameter α can be set, which directly determines the relative size of the monitoring area in the chip unit 102.

[0142] The system can combine the known height and width of the chip unit 102 with a preset mathematical relationship to calculate the size of the block, and then determine the side length of the monitoring area based on the fixed difference between the block and the monitoring area. For example, the side length x of the block can be obtained through a balance equation formed by the hyperparameter α and the size of the chip unit 102. Then, the side length of the monitoring area is set to y = x - 1 or y = x - 2 (in units of detection data units 106), thereby obtaining the specific size of the monitoring area.

[0143] In one embodiment of this disclosure, when determining the size of the monitoring area, a hyperparameter α can be used to uniformly control the side length of the block and the side length of the monitoring area. Specifically, let the height of the chip unit 102 be dieH, the width be dieW, the side length of the block be x (the block is a square), and the side length of the monitoring area be y (also a square), all in units of detection data units 106. The three satisfy the following relationship:

[0144] y²(dieH+dieW-x) / x =α·dieH·dieW;

[0145] Here, α is a hyperparameter input by the user through the software interface, and its value determines the relative coverage ratio of the monitoring area in the chip unit 102.

[0146] Based on this, as before, a fixed difference relationship is maintained between the side length y of the monitoring area and the side length x of the block, for example, y=x-1 or y=x-2, which can be selected according to the size of the block relative to the detection data unit 106.

[0147] By solving the above relationship, the value of x can be obtained, and then y can be determined. This allows operators to adjust only a single hyperparameter α to achieve synchronized adjustment of the block and monitoring area sizes, adapting to the adaptive partitioning requirements of wafers of different specifications.

[0148] After the calculation is completed, the control processing unit 19 stores the determined monitoring area side length y into a configuration file or memory variable, which can be directly called in the subsequent step S2022 for setting the size of the sliding window.

[0149] Furthermore, if the chip unit 102 includes at least one block, and the gain adjustment parameters include a first size ratio of the block to the monitoring area and a second size ratio of the chip unit 102 to the block, then the method for determining the size of the monitoring area can be to determine the size of the block and the size of the monitoring area based on the first size ratio, the second size ratio, and the size of the chip unit 102.

[0150] Specifically, the gain adjustment parameter can be limited to two ratio values: a first size ratio and a second size ratio. Here, the first size ratio defines the side length relationship between the block and the monitoring area (such as y=x-1 or y=x-2 in the previous example), and the second size ratio defines the ratio between the size of the chip unit 102 and the size of the block (such as the ratio of the height of the chip unit 102 to the side length of the block).

[0151] By substituting the actual height and width of the chip unit 102 into these two ratios, the block side length x can be uniquely determined, and then the side length y of the monitoring area can be derived.

[0152] These scaling parameters enable the system to control the fine-grained division of regions in a more intuitive way, while ensuring stepwise constraints from chip unit 102 to block, improving the accuracy and repeatability of size determination.

[0153] In practical applications, these ratios can be set via drop-down menus or numerical input boxes, and the system will automatically perform the conversion.

[0154] Step S2022: Based on chip unit 102, determine candidate sub-regions 104.

[0155] Specifically, based on the known structure of chip unit 102, the system can further determine which blocks 103 are candidate sub-regions 104.

[0156] The candidate sub-regions 104 do not cover all areas of the chip cell 102, but are selected according to a preset spatial distribution strategy. These strategies aim to enable the candidate blocks to represent key structures in different locations within the chip cell 102, thereby improving the comprehensiveness of subsequent scoring.

[0157] The selection is mainly based on directional distribution. Blocks arranged along a specific path within the chip unit 102 can be included in the candidate set. The path can be a straight line, a broken line, or a cross line to ensure coverage of the center, edge, and densely patterned areas of the chip unit 102.

[0158] The number of candidate sub-regions 104 is determined by the size of the chip unit 102 and the selected distribution strategy. Typically, each chip unit 102 selects several to more than ten blocks to ensure representativeness while controlling the amount of computation.

[0159] The selected blocks are saved as a list of position indices for further processing by the sliding window.

[0160] Furthermore, the method for determining candidate sub-region 104 can include the following two cases:

[0161] Case 1: At least one block distributed along at least two intersecting directions in chip cell 102 is identified as candidate sub-region 104.

[0162] Specifically, the first candidate selection method is to select at least two intersecting directions (e.g., horizontal center line and vertical center line direction) inside the chip unit 102, and select multiple blocks located in these directions respectively.

[0163] These directions typically pass through the critical functional areas of chip cell 102, so blocks distributed along these directions can capture process features in different dimensions. The intersecting directions ensure that candidate regions are covered in both horizontal and vertical directions, avoiding evaluation bias that may be caused by focusing on only a single direction.

[0164] In practical applications, the system can use the geometric center of the chip unit 102 as a reference, set two orthogonal straight lines passing through the center, and then select all blocks on the straight lines that fall within the boundary of the chip unit 102 as candidates.

[0165] The specific screening process can be as follows: Establish a coordinate system with the geometric center of the chip unit 102 as the origin, and set a horizontal line and a vertical line passing through the center. Then, traverse all the divided blocks 103 within the chip unit 102, and determine whether the center point of each block 103 falls on the horizontal line or the vertical line. Blocks 103 whose center point is within a preset tolerance range of the direction line are determined to be blocks that fall on the line, and these blocks are included in the candidate sub-region set.

[0166] The number and orientation of specific directions can be adjusted by parameters to adapt to the detection requirements of different chip unit 102 layouts, and no restrictions are imposed here.

[0167] Case 2: At least one block distributed along the diagonal in chip cell 102 is identified as candidate sub-region 104.

[0168] Specifically, the second candidate selection method is to select blocks located on the two diagonals of chip unit 102 to form a set of candidate sub-regions.

[0169] The diagonal direction best reflects the overall texture change trend of chip unit 102 from one corner to the other, and the blocks on the diagonal often cover the complete scan path from the edge to the center and back to the edge.

[0170] In practice, the system can select all blocks from the two diagonals so that the candidate region is symmetrical and can effectively cover the four quadrants of the chip unit 102.

[0171] This approach is particularly suitable for chip cell 102 structures with strong anisotropy, such as the array region of a memory chip.

[0172] In some embodiments, the system can calculate two diagonal equations based on the rectangular boundary of the chip unit 102, and then filter out blocks whose center point falls on the diagonal and add them to the candidate list.

[0173] This approach has the advantages of being computationally simple, easy to parallelize, and capable of being completed in a very short time.

[0174] Example 3:

[0175] The above steps S2021 to S2022 provide a more detailed description of how the size of the monitoring area and the candidate sub-region are determined based on the gain adjustment parameters and the chip unit size in step S202 of Embodiment 1. The following, in conjunction with steps S2031 to S2032, further explains how the score of the position window is calculated within each candidate sub-region.

[0176] This embodiment is used to further explain the location window scoring calculation process within the candidate sub-region in the image gain adjustment method. Figure 5 This is a flowchart illustrating an image gain adjustment method provided in one embodiment of this application. Figure 5 As shown, the image gain adjustment method provided in this embodiment is used to adjust the image gain in... Figure 2 and Figure 4 Based on the illustrated embodiment, an implementation method for calculating the location window score in step S203 is further described, which includes the following steps:

[0177] Step S2031: Based on the set size of the position window 105 and the preset step size, slide through each candidate sub-region 104 to determine the contrast index corresponding to each detection data unit 106 under each position window 105. The size of the position window 105 is equal to the size of the monitoring area, and each block includes at least one detection data unit 106. The contrast index is the average of the contrast values ​​of the detection data units 106 at the same position in all chip units 102 in the pre-scanned image.

[0178] Specifically, within each candidate block, the system uses a fixed-size sliding window for scanning. The length and width of the location window 105 are both equal to the side length of the determined monitoring area.

[0179] The method for setting the position window size and preset step size has been described in step S203 of the above embodiment, and will not be repeated here. Generally, the position window size ranges from several detection data units to dozens of detection data units, and the step size is not less than 1 detection data unit. The specific values ​​are determined according to the pattern complexity and detection accuracy requirements of the chip unit.

[0180] The step size is typically set to the width of a detection data unit 106 to achieve the highest resolution scan of the area within the block.

[0181] In some embodiments, the step size can also be adjusted by the user to other values ​​through a configuration file, such as setting it to half the side length of the window. In this case, there will be partial overlap between adjacent windows, which can capture local quality changes more smoothly, but the amount of computation will increase accordingly.

[0182] Because the window size is smaller than the block size, the window can be translated row by row and column by column within the block, generating multiple adjacent or partially overlapping candidate windows.

[0183] More specifically, the sliding traversal typically starts from the top left corner of the candidate sub-region (block), and the window moves sequentially to the right and down; when the window touches the right boundary of the block, it moves down one step, and then reverses the horizontal direction or starts scanning again from the left, and so on row by row until the entire block region is covered.

[0184] In some embodiments, when a window moves close to the block boundary and the remaining area is insufficient to accommodate a complete window, the window can be skipped at that location to ensure that the score is based solely on the complete real image data within the block.

[0185] The detection data unit 106 (DDU) is the smallest analytical unit in the image. Each DDU corresponds to a fixed-size pixel region in the pre-scanned image and stores its average grayscale or contrast score.

[0186] The window contains multiple DDUs, and subsequent scoring will be calculated based on the data from these DDUs.

[0187] In order to suppress the brightness or contrast fluctuations of individual chip units 102 caused by local defects, the system can take advantage of the repeatability of multiple chip units 102 on the wafer under test 101 to average the contrast values ​​of DDUs at the same coordinate position across chip units 102 to obtain the final contrast index of the DDU.

[0188] Specifically, during the pre-scanning stage, the system calculates the contrast score of each DDU in each chip unit 102, and then calculates the arithmetic mean of the scores of DDUs located at the same coordinates (relative positions) within all chip units 102 to obtain a value representing the typical contrast at that position.

[0189] For example, for each detection data unit, the grayscale standard deviation σ of all pixels within it can also be calculated as the contrast score C, that is:

[0190] ;

[0191] Where, p iLet μ be the grayscale value of the i-th pixel within the detection data unit, μ be the average grayscale value of these pixels, and N be the total number of pixels. Alternatively, the average gradient magnitude of the pixels within the detection data unit can be calculated as the contrast score.

[0192] This average value serves as the contrast index for the DDU and is used for subsequent window scoring. Thus, averaging significantly improves the robustness of the index and reduces interference from random defects.

[0193] Step SS2032: Based on the contrast index of each detection data unit 106, determine the score corresponding to the position window 105.

[0194] Specifically, after obtaining the contrast index of each DDU within the window, the system aggregates the index values ​​of all DDUs within the window to obtain the overall score of the window.

[0195] The typical aggregation method is to calculate the average of all DDU contrast metrics as the score for the window. This score reflects the average image sharpness and detail richness of the area covered by the window under pre-scanning conditions; a higher score indicates better image quality for that window area.

[0196] In some embodiments, the scores can be stored in a two-dimensional array corresponding to the window position for further comparison. The row index i of this two-dimensional array corresponds to the vertical position number of the window within the block, the column index j corresponds to the horizontal position number, and the array element score... ij To store the rating value corresponding to the window located in row i and column j, so as to facilitate quick indexing of the highest rating window later.

[0197] In practice, other statistical measures such as the median or weighted average can be used as needed, but the mean is the simplest and most effective.

[0198] By calculating one by one through a sliding window, a scoring matrix is ​​obtained for each candidate block, and the number of matrix elements is equal to the number of windows in the block.

[0199] In some embodiments, to achieve real-time response, the window scoring calculation for each candidate sub-region 104 supports parallel processing. Each block can be assigned to a different computing unit to independently perform sliding window traversal and score aggregation, thereby significantly reducing the screening time for the monitoring region of the wafer 101 under test. The system can also divide large-sized grains or fine-grained blocks, and through parallel computing, ensure that the adaptive monitoring region delineation is completed within a predetermined cycle time without affecting the overall detection efficiency.

[0200] Example 4:

[0201] This embodiment is used to further explain the processing procedure after the monitoring area is determined in the image gain adjustment method. Figure 7 This is a flowchart illustrating an image gain adjustment method provided in one embodiment of this application. Figure 7 As shown, the image gain adjustment method provided in this embodiment is used to adjust the image gain in... Figure 2 and Figure 5 Based on the illustrated embodiment, the actions following image gain adjustment to determine the monitoring area are further described, including the following steps:

[0202] Step S205: At least two image features corresponding to at least one monitoring area are fused to obtain a quality score corresponding to the monitoring area.

[0203] Specifically, fusion processing refers to the process of converting multiple image feature values ​​from different sources and with different dimensions into a unified comprehensive score through preset mapping and weighting operations, so that different features can be compared and integrated on the same scale.

[0204] Based on the identification of several monitoring areas, the control processing unit 19 can extract and integrate multiple image features for each monitoring area to generate a comprehensive quality score.

[0205] Because a single feature (such as brightness alone) cannot fully reflect the image quality, the system can select at least two different types of image features. These features quantify the imaging state of the region from different perspectives, such as brightness features (average brightness of the region), contrast features (grayscale variance), and texture features (edge ​​density, information entropy).

[0206] These features quantify the imaging state of the region from different perspectives, and are then combined into a scalar value through a fusion function, which is the quality score.

[0207] A higher quality score indicates better imaging conditions in the area, and vice versa. Subsequent calculations of the image adjustment gain coefficient are based on this score, thus overcoming the bias caused by relying on a single index and making gain adjustment decisions based on more reliable information.

[0208] Furthermore, the method for determining the quality score includes the following steps:

[0209] Step A1: Obtain the image statistical histogram for each monitoring area.

[0210] Specifically, for each monitoring area, the system first extracts the grayscale data of all pixels within the boundary of the area from the pre-scanned image based on the location coordinates of the monitoring area, and then generates an image statistical histogram.

[0211] A histogram, with brightness level on the horizontal axis and pixel count on the vertical axis, comprehensively records the frequency of occurrence of each grayscale value within a given region. The shape of the histogram directly reflects the brightness distribution, contrast range, and the presence of extreme grayscale clusters within the region.

[0212] In some embodiments, when acquiring histograms, the system uses only the original image data after dark field correction and flat field correction to ensure the authenticity of the statistical results.

[0213] In some embodiments, the number of bins in the histogram is matched to the bit depth of the pre-scanned image, typically 256 levels.

[0214] Therefore, the resulting histogram can be used as a common input for all subsequent feature calculations and corrections.

[0215] For example, you can refer to Figure 6 As shown, this is a schematic diagram of image statistical histogram processing. Figure 6 The image statistical histogram shown in Figure (a) is generated in the following way: Figure 3 The monitoring area is determined in the middle. Each monitoring area is the position window 105 with the highest score in the candidate sub-region 104. The grayscale statistics of all pixels covered by the position window can generate the corresponding image statistical histogram.

[0216] Step A2: Based on the preset distribution threshold corresponding to each image feature, perform cropping and distribution reconstruction processing on the image statistical histogram.

[0217] Specifically, the preset distribution threshold is usually determined based on detection accuracy requirements and historical experience. For example, the upper limit is set to 98% of the cumulative pixel distribution in the histogram, and the lower limit is set to 2%, meaning that the pixel ranges with the highest and lowest gray levels, each representing 2%, are cropped out. The threshold can be preset by the process engineer through a configuration file, or different cropping ratios can be configured according to different image feature types. Figure 6 In (a), T high That is, for high grayscale regions, the adjacent dashed lines represent the upper limit of the distribution threshold that needs to be cropped, T. low That is, the low grayscale area, and the adjacent dashed line is the lower limit of the distribution threshold that needs to be clipped.

[0218] The original histogram may contain extreme values ​​caused by noise, bad pixels, or local reflection anomalies, which can severely interfere with the stability of subsequent feature extraction.

[0219] Therefore, the system sets corresponding distribution thresholds (such as upper and lower limit percentages) for each image feature and crops the histogram: the part exceeding the upper threshold is removed, the part below the lower threshold is also removed, and only the main distribution part in the middle is retained.

[0220] After cropping, the remaining portion no longer covers the complete grayscale range. The system then performs distribution reconstruction: based on the proportion of each grayscale level in the remaining portion within the original subject, their distribution is linearly stretched or proportionally expanded back onto the original complete grayscale range, forming a new histogram that removes the influence of extreme values, such as... Figure 6 As shown in (b).

[0221] This effectively suppresses the interference of noise and sudden fluctuations on subsequent scoring, making feature extraction more robust.

[0222] In some embodiments, the cropping and distribution reconstruction of the image statistical histogram can be achieved using a segmented dynamic weight compensation method. Specifically, the grayscale range can be pre-divided into several segments. After cropping the high-end and low-end portions that exceed the distribution threshold, the number of remaining pixels in each segment is counted. Based on the proportion of each segment in the original subject distribution, the total number of pixels is redistributed back to these segments, thereby obtaining the reconstructed histogram after removing extreme values.

[0223] For example, see Figure 6 The diagram illustrates the histogram processing for each monitoring area. After cropping and reconstructing, the pixel distribution of the histogram is concentrated in the main grayscale range, and the interfering pixels in the extreme value areas have been effectively removed.

[0224] Therefore, while suppressing noise and mutations, the original shape features of the histogram are preserved to the greatest extent, which is beneficial to the stability of subsequent feature extraction.

[0225] Step A3: Based on the processed image data, extract at least two different types of image features.

[0226] Specifically, the system extracts at least two different dimensions of image features from the reconstructed histogram and the corresponding monitoring area image.

[0227] Typically extractable features include: average brightness of the area, reflecting the overall brightness level; gray-level variance, characterizing the contrast strength; histogram uniformity, measuring the uniformity of gray-level distribution; gray-level centroid, indicating the central tendency of the brightness distribution; and kurtosis, describing the sharpness or flatness of the gray-level distribution.

[0228] These features, from multiple perspectives such as brightness level, contrast range, and distribution uniformity, collectively describe the imaging quality of the monitored area.

[0229] These features are extracted in the following ways: the average brightness of a region is obtained by calculating the arithmetic mean of the gray levels of all pixels in that region; the gray level variance is obtained by calculating the mean square of the difference between the pixel gray level and the average brightness; the histogram uniformity can be measured by information entropy or peak distribution width; the gray level centroid is calculated by the weighted average of spatial coordinates with gray level values ​​as weights; and the kurtosis is calculated by the fourth standard moment of the pixel gray level distribution.

[0230] All of the above features can be achieved using basic image processing function libraries, without relying on specific commercial software.

[0231] The system can predefine the types of features to be extracted in the configuration file, and can use basic statistical libraries to complete the actual calculation.

[0232] Step A4: Based on a preset nonlinear mapping function, the extracted image features are fused to obtain the quality score of the monitored area.

[0233] Specifically, the extracted features typically have different numerical dimensions and ranges of variation, making them impossible to directly add or compare. Therefore, the system sets a nonlinear mapping function for each feature to transform the feature values ​​into a unified domain.

[0234] Typical nonlinear mapping functions include standardization functions (such as Z-score standardization, which transforms eigenvalues ​​into a distribution with a mean of 0 and a standard deviation of 1), normalization functions (such as min-max normalization, which linearly maps eigenvalues ​​to the [0,1] interval), or logarithmic compression functions. These functions can project eigenvalues ​​from different distributions to a preset numerical interval, eliminating dimensional differences.

[0235] Subsequently, the system assigns preset weight coefficients to different features to reflect the influence of each feature on the final score.

[0236] The mapped feature values ​​are weighted and summed to obtain the quality score of the monitored area. This score is a comprehensive indicator that can reflect the imaging suitability of the area from multiple dimensions.

[0237] In one embodiment, after obtaining the image statistical histogram of the monitored area and completing cropping and distribution reconstruction, the quality score S of the area is calculated by multi-index fusion.

[0238] Specific selectable features include: regional average brightness μ, gray-level centroid G, gray-level variance σ, histogram uniformity H, and kurtosis K.

[0239] The scoring formula adopts a weighted nonlinear fusion form:

[0240] S=α·f H (H)+β·f μ (μ)+γ·f G(G)+δ·f σ (σ)+ξ·f K (K);

[0241] Where α, β, γ, δ, and ξ are the preset weight coefficients corresponding to each feature; f * (·) represents a nonlinear mapping function, such as a standardization function or a normalization function, used to map feature values ​​with different dimensions and ranges of variation to a common comparable domain, thereby eliminating the influence of dimensional differences on the fusion results.

[0242] The S-value obtained by fusion reflects the imaging suitability of the monitoring area. The higher the score, the more ideal the area is in terms of brightness, contrast and distribution balance.

[0243] The fusion process requires no manual intervention, and all parameters are set based on experience during initialization.

[0244] Through these transformations, image features of different dimensions (such as brightness, variance, kurtosis, etc.) are projected onto the same numerical range, enabling the terms in the weighted fusion formula to be compared and accumulated on the same scale, thus preventing a particular feature from dominating the scoring result due to its naturally large numerical range.

[0245] Step S206: Based on the quality score, determine the image adjustment gain coefficient corresponding to the wafer 101 under test.

[0246] Among them, the image adjustment gain coefficient is used to adjust the device gain of the image sensor when acquiring the image of the wafer 101 under test.

[0247] Specifically, after obtaining the quality scores of each monitoring area, the system can calculate the image adjustment gain coefficient applicable to the entire wafer 101 under test based on these scores.

[0248] A higher score indicates that the area is close to ideal imaging with the current gain, while a lower score suggests that the gain needs to be increased or decreased.

[0249] The system maps the score of each region to a corresponding sub-gain value, and then combines the sub-gain values ​​of all regions to form a unified image adjustment gain coefficient.

[0250] This coefficient can be directly written into the camera's analog gain register or digital gain register, thereby adjusting the image brightness and contrast during the actual scan.

[0251] With this closed-loop approach, gain adjustment is entirely driven by actual image quality, eliminating any human-set bias.

[0252] Furthermore, methods for determining the image adjustment gain coefficients include:

[0253] Step B1: Based on a preset nonlinear transformation function, map the quality score of each monitoring area to a sub-gain value located within a preset gain boundary.

[0254] Specifically, the nonlinear transformation function converts the quality score into a bounded gain value to prevent extreme jumps in gain.

[0255] In one embodiment, based on the quality score of each monitoring area, a corresponding sub-gain value can be generated through a nonlinear transformation function. For the r-th monitoring area, the calculation formula for its sub-gain value Gr can be designed as an S-shaped curve:

[0256] G r =G min +(G max -G min ) / (1+ek(S r -S0));

[0257] Among them, G min and G max These are preset minimum and maximum gain limits to ensure the gain value is always within a safe range; S r Let S be the quality score of the r-th monitoring area; k is the slope of the mapping function, used to control the sensitivity of the gain to changes in the score; S0 is the midpoint of the mapping, which can be the average score of all monitoring areas, so that the conversion function automatically adapts to the overall score level.

[0258] Therefore, it is possible to smoothly map continuously changing scores to a finite gain range, avoiding extreme gain jumps and over-adjustment.

[0259] Step B2: Fuse the sub-gain values ​​corresponding to all monitoring areas to obtain the image adjustment gain coefficient.

[0260] Specifically, after obtaining the sub-gain value of each monitoring area, the system integrates these values ​​into a unified image adjustment gain coefficient, which is used for image acquisition of the entire wafer 101 under test.

[0261] In one embodiment, after obtaining the sub-gain values ​​of all monitored areas, a weighted average is used to combine them into a unified image adjustment gain coefficient G. total :

[0262] ;

[0263] Among them, W r This is the preset spatial weight for the r-th monitoring area. If not specifically set, all areas can be assumed to have equal weights.

[0264] This fusion process can coordinate the independent gain requirements of multiple regions into a globally optimal value, avoiding overexposure or underexposure in other regions caused by directly using the value of a single region.

[0265] In some embodiments, the fusion method can be to calculate the arithmetic mean of all sub-gain values, or a statistical measure such as the median can be selected as needed.

[0266] By using multi-region fusion, the impact of local anomaly scores on the final gain is smoothed out, making the image adjustment gain coefficient more representative and robust.

[0267] In some embodiments, the specific fusion processing can be implemented by weighting all sub-gain values ​​according to the predefined spatial weights of each monitoring area to obtain a unified image adjustment gain coefficient.

[0268] Specifically, the predefined spatial weights can be set according to the importance of each monitoring area in the chip cell 102 or the process sensitivity. For example, the central area of ​​the chip cell 102 can be given a higher weight, while the edge area can be given a lower weight.

[0269] Weighted averaging tilts gain adjustment towards more critical areas, ensuring that the imaging quality of important functional units is prioritized. Compared with unweighted averaging, differential weighting further improves the adaptability and calculation accuracy of the image adjustment gain coefficient to the spatial characteristics of the wafer 101 under test, making the contrast and brightness of key areas in the final image more in line with the detection requirements.

[0270] Step S207: The image adjustment gain coefficient determined this time is recursively mixed with the historical image adjustment gain coefficient used in the previous acquisition by the image sensor to obtain the final gain value that changes smoothly over time, and the final gain value is used as the output image adjustment gain coefficient.

[0271] Specifically, directly using the image adjustment gain coefficient calculated in this study may cause the gain value to fluctuate drastically due to transient noise or sudden local changes in the image, which in turn causes inconsistent brightness in continuously acquired images.

[0272] To address this, the system can introduce a smoothing mechanism in the time dimension: the image adjustment gain coefficient calculated in the current iteration is recursively mixed with the historical image adjustment gain coefficient actually used in the previous iteration to form a new gain value.

[0273] Mixed formulas typically employ an exponentially weighted average, using a smoothing coefficient to control the relative weight of the old and new values. One implementation is as follows:

[0274] To suppress inter-frame gain fluctuations, the G obtained in this merging process will be... total Adjusting the gain coefficient G with historical images previousBy performing recursive smoothing, the final output gain value G is obtained. final :

[0275] G final =a·G total +(1-a)·G previous ;

[0276] The coefficient 'a', ranging from 0 to 1, balances the system's response speed to the current image with its preservation of historical states. A smoothing coefficient closer to 1 indicates a faster response to changes in the current image; a coefficient closer to 0 indicates a smoother gain change. Through this dual processing of spatial fusion and temporal smoothing, the image adjustment gain coefficient significantly reduces frequent fluctuations caused by sudden noise or local abrupt changes while maintaining adjustment accuracy, thus improving imaging continuity and system robustness.

[0277] In some embodiments, in addition to calculating the image adjustment gain coefficient as described above, after determining the monitoring area, the method also includes identifying anomalies in the monitoring area, which includes the following steps:

[0278] Step C1: Determine the index value corresponding to at least one image feature in the monitoring area.

[0279] Specifically, in addition to being used for calculating the image adjustment gain coefficient, the monitoring area can also simultaneously perform online anomaly monitoring functions.

[0280] During the formal detection phase, the system re-extracts one or more preset monitoring index values ​​for each monitoring area. These indexes can be brightness indices, defocus indices, or registration indices, etc. Brightness indices are usually taken as the average gray level of the area, defocus indices can be measured by the attenuation of high-frequency components in the image, and registration indices are calculated by the positional offset between the current image and the template image.

[0281] These indicators reflect whether the current imaging status or optical system status of the area is normal, and all indicators are recorded and stored in real time.

[0282] Step C2: Compare the indicator value with the preset normal threshold range.

[0283] Specifically, each monitoring indicator has a corresponding normal threshold range. The specific threshold can be preset and stored in the configuration file based on historical data and testing standards.

[0284] For example, the threshold range for the brightness index can be set to ±10% of the target brightness; the defocus index can be set to the lower limit threshold of the focus score, and if it is lower than this value, it is judged as defocusing abnormality; the threshold for the registration index can be set to the maximum number of allowed offset pixels, such as 3 to 5 pixels.

[0285] These thresholds can be flexibly adjusted according to the process parameters and testing accuracy requirements of different wafer products.

[0286] The system compares the real-time calculated index values ​​with the corresponding thresholds one by one to determine whether they fall within the allowed range: if all indicators are within the threshold range, it indicates that the current scanning status is normal; if any indicator exceeds the range, whether it is too high or too low, it is considered abnormal.

[0287] This comparison process is performed independently in each monitoring area, enabling the spatial location of anomalies. The threshold range can be adjusted according to different wafer products and process nodes.

[0288] Step C3: If the comparison result indicates an anomaly, trigger the preset alarm action and output the corresponding alarm information, which includes the location of the monitoring area where the abnormal indicator value is located and the comparison result.

[0289] Specifically, when any indicator is detected to exceed the normal threshold, the system immediately triggers a preset alarm action.

[0290] Alarm actions can include pausing the current scanning process, popping up an alert window in the software interface, recording an error log, or sending an error notification to the host computer.

[0291] The alarm information clearly includes the coordinates of the specific monitoring area where the anomaly occurred, the name of the indicator that exceeded the threshold, the comparison result between the actual value and the threshold, and the severity of the anomaly.

[0292] Meanwhile, the system can display the indicator values ​​of each monitoring area on the host computer interface in the form of a wafer map, and mark normal and abnormal areas with different colors, so that operators can intuitively and quickly locate the problem area.

[0293] In some embodiments, the output alarm information may also include displaying the index values ​​of each monitoring area in the form of a pseudo-color wafer image on the host computer interface or control software of the testing equipment. Different colors correspond to the relationship between the index values ​​and the threshold, enabling operators to intuitively identify the specific location and range of abnormal indicators on the entire wafer 101 under test, providing a visual basis for quickly locating optical system problems or process deviations.

[0294] This achieves an instant closed loop from image quality assessment to early warning of defects, greatly improving the equipment's ability to respond to anomalies.

[0295] Example 5:

[0296] Figure 8 This is a schematic diagram illustrating the data flow processing of a semiconductor device according to one embodiment of this application. Figure 8As shown, the image gain adjustment device 500 includes: an acquisition module 510, a selection module 520, a scoring module 530, and a processing module 540.

[0297] The acquisition module 510 is used to acquire a pre-scan image of the wafer under test, which includes multiple repeating chip units;

[0298] Selection module 520 is used to select multiple candidate sub-regions from a pre-scanned image based on multiple chip units, wherein each candidate sub-region corresponds to a block distributed along a preset path in each chip unit;

[0299] The scoring module 530 is used to calculate the scores of multiple location windows that meet the preset size within each candidate sub-region. The scores are determined based on the image features of the corresponding location windows.

[0300] The processing module 540 is used to select at least one location window from each candidate sub-region based on the score, as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer under test according to the monitoring area.

[0301] Optionally, the selection module 520 is specifically used to obtain gain adjustment parameters and select multiple candidate sub-regions from the pre-scanned image based on the chip unit, including: obtaining the size of the chip unit and the size of the block; dividing the chip unit into multiple blocks according to a preset rule based on the size of the chip unit and the size of the block; and selecting some blocks as multiple candidate sub-regions.

[0302] Optionally, the selection module 520 is specifically used to determine multiple blocks distributed in at least two intersecting directions in the chip cell; and to select the multiple blocks distributed in at least two intersecting directions in the chip cell as multiple candidate sub-regions.

[0303] Optionally, the selection module 520 is specifically used to select multiple blocks located on the main diagonal and the secondary diagonal as multiple candidate sub-regions.

[0304] Optionally, the selection module 520 is further configured to, before selecting multiple candidate sub-regions from the pre-scanned image based on multiple chip cells, obtain gain adjustment parameters and the size of the chip cells; and determine the size of the block and the size of the monitoring area based on the gain adjustment parameters and the size of the chip cells.

[0305] Optionally, the selection module 520 is specifically used to determine the size of the block and the size of the monitoring area based on the first size ratio, the second size ratio and the size of the chip unit, if the gain adjustment parameters include a first size ratio of the block to the monitoring area and a second size ratio of the chip unit to the block.

[0306] Optionally, the selection module 520 is specifically used to determine the width of the block based on the ratio of the width of the chip unit to the second size ratio, and to determine the height of the block based on the ratio of the height of the chip unit to the second size ratio; to determine the width of the monitoring area based on the ratio of the width of the block to the first size ratio, and to determine the height of the monitoring area based on the ratio of the height of the block to the first size ratio.

[0307] Optionally, the scoring module 530 is specifically used to: if the block includes at least one detection data unit, slide through each candidate sub-region based on a set position window size and a preset step size, determine the contrast index corresponding to each detection data unit under each position window, wherein the position window size is equal to the size of the monitoring area; the contrast index is the average of the contrast values ​​of the detection data units corresponding to the same position in all chip units in the pre-scanned image; and determine the score corresponding to the position window based on the contrast index of each detection data unit.

[0308] Optionally, the processing module 540 is further configured to, after selecting a monitoring area, fuse at least two image features corresponding to at least one monitoring area to obtain a quality score corresponding to the monitoring area; and based on the quality score, determine the image adjustment gain coefficient corresponding to the wafer under test, wherein the image adjustment gain coefficient is used to adjust the device gain of the image sensor when acquiring the image of the wafer under test.

[0309] Optionally, the processing module 540 is specifically used to: obtain the image statistical histogram of each monitoring area; perform cropping and distribution reconstruction processing on the image statistical histogram based on the preset distribution threshold corresponding to each image feature; extract at least two different types of image features based on the processed image data; and fuse the extracted image features based on a preset nonlinear mapping function to obtain the quality score of the monitoring area.

[0310] Optionally, the processing module 540 is specifically used to map the quality score of each monitoring area to a sub-gain value located within a preset gain boundary based on a preset nonlinear transformation function; and to fuse the sub-gain values ​​corresponding to all monitoring areas to obtain the image adjustment gain coefficient.

[0311] Optionally, the processing module 540 is specifically used to perform a weighted average of all sub-gain values ​​based on the predefined spatial weights of each monitoring area to obtain a unified image adjustment gain coefficient.

[0312] Optionally, the processing module 540 is further configured to, after determining the image adjustment gain coefficient corresponding to the wafer under test, recursively mix the image adjustment gain coefficient determined this time with the historical image adjustment gain coefficient used in the previous acquisition by the image sensor to obtain a final gain value that changes smoothly over time, and use the final gain value as the output image adjustment gain coefficient.

[0313] Optionally, the processing module 540 is further configured to, after selecting a monitoring area, determine the index value corresponding to at least one image feature in the monitoring area; compare the index value with a preset normal threshold range; if the comparison result indicates an abnormality, trigger a preset alarm action and output corresponding alarm information, the alarm information including the location of the monitoring area where the abnormal index value is located and the comparison result.

[0314] It should be understood that the effects of the operations performed by each module can be seen in the previous text, and will not be repeated here.

[0315] In this embodiment, the image gain adjustment device, through the combination of various modules, solves the problems of insufficient universality and accuracy of image gain adjustment detection, and poor imaging stability and system robustness in related technologies.

[0316] Figure 9 This is a schematic structural diagram of the control processing unit provided in this application. The control processing unit 19 includes a processor 61 and a memory 62. The processor 61 is coupled to the memory 62, which stores computer programs or instructions and / or data. The processor 61 executes / calls the computer programs or instructions stored in the memory 62, or reads the data stored in the memory 62, so that the control processing unit 19 performs the methods in the above-described method embodiments. For example, the control processing unit 19 is equipped with... Figure 8 The image gain adjustment device 500 shown is shown.

[0317] Optionally, there may be one or more processors 61.

[0318] Optionally, the memory 62 may be one or more.

[0319] Alternatively, the memory 62 can be integrated with the processor 61, or it can be set separately.

[0320] Optionally, the control processing unit 19 further includes a transceiver 63 for receiving and / or transmitting signals. For example, the processor 61 controls the transceiver 63 to receive and / or transmit signals.

[0321] It should be noted that each of the above modules or units can be implemented through software, hardware, or a combination of both. For example, Figure 9 As shown, when the processor 61 of the control processing unit 19 is a CPU, the above-mentioned acquisition module 510 and processing module 540 can both be implemented in software.

[0322] In this application, "implemented through software" means that a processor (e.g., processor 61) reads and executes program instructions stored in a memory (e.g., memory 62) to implement the functions corresponding to the aforementioned modules or units. Here, a processor refers to a processing circuit capable of executing program instructions, including but not limited to at least one of the following: CPU, microprocessor, digital signal processor (DSP), microcontroller unit (MCU), or artificial intelligence processor, etc., and other processing circuits capable of running program instructions. In other embodiments, the processor may also include circuits with other processing functions (such as hardware circuits for hardware acceleration, bus and interface circuits, etc.). The processor may be presented as an integrated chip, for example, as an integrated chip whose processing function only includes executing software instructions, or it may be presented as a SoC (system on a chip), that is, on a single chip, in addition to the processing circuit capable of running program instructions (often referred to as a "core"), it also includes other hardware circuits for implementing specific functions (of course, these hardware circuits can also be implemented separately based on ASIC or FPGA). Correspondingly, the processing functions, in addition to executing software instructions, may also include various hardware acceleration functions (such as AI calculation, encoding / decoding, compression / decompression, etc.).

[0323] In this application, "implemented in hardware" means that the functions of the above-mentioned modules or units are implemented through hardware processing circuits that do not have program instruction processing capabilities. These hardware processing circuits can be composed of discrete hardware components or integrated circuits. To reduce power consumption and size, integrated circuits are typically used. The hardware processing circuits can include ASICs or PLDs (programmable logic devices); PLDs can include FPGAs, CPLDs (complex programmable logic devices), etc. These hardware processing circuits can be a single packaged semiconductor chip (e.g., packaged as an ASIC); or they can be integrated with other circuits (e.g., CPUs, DSPs) and packaged into a single semiconductor chip. For example, multiple hardware circuits and a CPU can be formed on a silicon substrate and packaged into a single chip; this type of chip is also called a SoC. Alternatively, circuits for implementing FPGA functions and a CPU can be formed on a silicon substrate and packaged into a single chip; this type of chip is also called a SoPC (system on a programmable chip).

[0324] It should be noted that when this application is implemented through software, hardware, or a combination of both, different software or hardware can be used, and it is not limited to using only one type of software or hardware. For example, one module or unit can be implemented using a CPU, while another module or unit can be implemented using a DSP. Similarly, when implemented using hardware, one module or unit can be implemented using an ASIC, while another module or unit can be implemented using an FPGA. Of course, it is not limited to using the same software (e.g., all through a CPU) or the same hardware (e.g., all through an ASIC) to implement some or all modules or units. Furthermore, those skilled in the art will understand that software is generally more flexible but less performant than hardware, while hardware is the opposite. Therefore, those skilled in the art can choose software, hardware, or a combination of both based on actual needs.

[0325] Furthermore, this application also provides a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the methods in the various method embodiments of this application. For example, the processor is a computer processor.

[0326] This application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the methods in the various method embodiments of this application. For example, the computer program may take the form of program code, program instructions, etc.

[0327] Furthermore, this application also provides a chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the methods in the various method embodiments of this application are performed.

[0328] Furthermore, the chip may also include a communication interface. The communication interface can be an input / output interface or an interface circuit, etc. Furthermore, the chip may also include memory.

[0329] In addition, this application also provides a semiconductor device, such as Figure 8 As shown, semiconductor device 1 includes an image sensor 18 and, as shown, a display sensor 18. Figure 9 The corresponding embodiment provides a control processing unit 19.

[0330] It should be understood that the processor in the embodiments of this application can be an integrated circuit chip with the ability to process signals. In implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly implemented by a hardware encoding processor, or implemented by a combination of hardware and software modules in the encoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.

[0331] The memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), and synchronous link dynamic memory (SLDRAM).

[0332] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA, or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory can be integrated into the processor.

[0333] It should also be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0334] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An image gain adjustment method, characterized in that, The methods include: Acquire a pre-scan image of a wafer under test, the wafer under test comprising multiple repeating chip units; Based on multiple chip units, multiple candidate sub-regions are selected from the pre-scanned image, wherein each candidate sub-region corresponds to a block distributed along a preset path in each chip unit; Calculate the score for each of the multiple location windows within each candidate sub-region that meet a preset size, the score being determined based on the image features corresponding to the location window; Based on the score, at least one of the position windows is selected from each of the candidate sub-regions as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer under test according to the monitoring area.

2. The method according to claim 1, characterized in that, The step of selecting multiple candidate sub-regions from the pre-scanned image based on multiple chip units includes: Obtain the dimensions of the chip unit and the dimensions of the block; Based on the size of the chip unit and the size of the block, the chip unit is divided into multiple blocks according to a preset rule; A portion of the block is selected as multiple candidate sub-regions.

3. The method according to claim 2, characterized in that, The step of selecting a portion of the block as multiple candidate sub-regions includes: Identify multiple blocks distributed in at least two intersecting directions within the chip unit; Multiple blocks distributed along at least two intersecting directions in the chip unit are selected as multiple candidate sub-regions.

4. The method according to claim 3, characterized in that, The selection of multiple blocks distributed along at least two intersecting directions in the chip unit as multiple candidate sub-regions includes: Multiple blocks located on the main diagonal and the sub-diagonal are selected as multiple candidate sub-regions.

5. The method according to any one of claims 1 to 4, characterized in that, Before selecting multiple candidate sub-regions from the pre-scanned image based on multiple chip units, the process includes: Obtain the gain adjustment parameters and the size of the chip unit; Based on the gain adjustment parameters and the size of the chip unit, the size of the block and the size of the monitoring area are determined.

6. The method according to claim 5, characterized in that, The gain adjustment parameters include a first size ratio between the block and the monitoring area, and a second size ratio between the chip unit and the block. Determining the size of the monitoring area based on the gain adjustment parameters and the size of the chip unit includes: Based on the first size ratio, the second size ratio, and the size of the chip unit, the size of the block and the size of the monitoring area are determined.

7. The method according to claim 6, characterized in that, Based on the first size ratio, the second size ratio, and the size of the chip unit, the size of the block and the size of the monitoring area are determined, including: The width of the block is determined based on the ratio of the width of the chip unit to the second size ratio, and the height of the block is determined based on the ratio of the height of the chip unit to the second size ratio. The width of the monitoring area is determined based on the ratio of the width of the block to the first size ratio, and the height of the monitoring area is determined based on the ratio of the height of the block to the first size ratio.

8. The method according to any one of claims 1 to 7, characterized in that, The block includes at least one detection data unit; Calculate the score for each of the multiple location windows within each candidate sub-region that conform to a preset size, including: Based on the set position window size and preset step size, each candidate sub-region is traversed by sliding to determine the contrast index corresponding to each detection data unit under each position window. The position window size is equal to the size of the monitoring area. The contrast index is the average of the contrast values ​​of the detection data units corresponding to the same position in all chip units in the pre-scanned image. Based on the contrast index of each of the detection data units, the score corresponding to the position window is determined.

9. The method according to any one of claims 1 to 8, characterized in that, After selecting the monitoring area, the method further includes: At least two image features corresponding to at least one of the monitoring areas are fused to obtain a quality score corresponding to the monitoring area. Based on the quality score, the image adjustment gain coefficient corresponding to the wafer under test is determined. The image adjustment gain coefficient is used to adjust the device gain of the image sensor when acquiring the image of the wafer under test.

10. The method according to claim 9, characterized in that, The quality score corresponding to at least one of the monitored areas is obtained by fusing at least two types of image features, including: Obtain the image statistical histogram for each of the monitored areas; Based on the preset distribution threshold corresponding to each image feature, the image statistical histogram is cropped and its distribution is reconstructed. Based on the processed image data, at least two different types of image features are extracted; Based on a preset nonlinear mapping function, the extracted image features are fused to obtain a quality score for the monitored area.

11. The method according to claim 9 or 10, characterized in that, Based on the quality score, the image adjustment gain coefficient corresponding to the wafer under test is determined, including: Based on a preset nonlinear transformation function, the quality score of each monitoring area is mapped to a sub-gain value located within a preset gain boundary; The sub-gain values ​​corresponding to all the monitored areas are fused to obtain the image adjustment gain coefficient.

12. The method according to claim 11, characterized in that, The sub-gain values ​​corresponding to all monitoring areas are fused to obtain the image adjustment gain coefficient, including: Based on the predefined spatial weights of each monitoring area, all sub-gain values ​​are weighted and averaged to obtain a unified image adjustment gain coefficient.

13. The method according to any one of claims 9 to 12, characterized in that, After determining the image adjustment gain coefficient corresponding to the wafer under test, the following steps are also included: The image adjustment gain coefficient determined in this study is recursively mixed with the historical image adjustment gain coefficient used in the previous image acquisition by the image sensor to obtain the final gain value that changes smoothly over time, and the final gain value is used as the output image adjustment gain coefficient.

14. The method according to any one of claims 1 to 13, characterized in that, After selecting the monitoring area, the process also includes: Determine the index value corresponding to at least one image feature in the monitoring area; The index value is compared with a preset normal threshold range; If the comparison result indicates an anomaly, a preset alarm action is triggered, and corresponding alarm information is output. The alarm information includes the location of the monitoring area where the abnormal indicator value is located and the comparison result.

15. An image gain adjustment device, characterized in that, The device includes: An acquisition module is used to acquire a pre-scan image of a wafer under test, the wafer under test comprising multiple repeating chip units; The selection module is used to select multiple candidate sub-regions from a pre-scanned image based on multiple chip units, wherein each candidate sub-region corresponds to a block distributed along a preset path in the chip unit; The scoring module is used to calculate the scores of multiple location windows of a preset size within each candidate sub-region, and the scores are determined based on the image features of the corresponding location windows. The processing module is configured to select at least one of the position windows from each of the candidate sub-regions based on the score, as a monitoring area for image quality assessment, so as to determine the image adjustment gain coefficient corresponding to the wafer under test according to the monitoring area.

16. A control processing unit, characterized in that, include: A processor and a memory, the memory being used to store computer program instructions, the processor being used to invoke the computer program instructions stored in the memory so that the control processing unit implements the image gain adjustment method of any one of claims 1 to 14.

17. A semiconductor device, characterized in that, include: The image sensor and the control processing unit as claimed in claim 16.

Images