Method for manufacturing high-precision micro circuit board of intelligent wear integrated module and circuit board

Abstract

The application discloses a manufacturing method of a high-precision miniature circuit board of an intelligent wearable integrated module and the circuit board, and aims at solving the problems of insufficient circuit board shape precision, double-sided line deviation and poor thickness uniformity. The method comprises the following steps: providing a double-sided copper-clad plate with a thickness greater than the thickness of a finished product plate; manufacturing a preset pattern structure with a flow guiding function, dividing the whole plate into multiple sub-regions, and forming flow guiding areas and pattern reserved areas in the sub-regions; performing pressing treatment on the copper-clad plate to thin the plate body thickness and make the insulating layer dense and uniform; forming a partition positioning structure on the pressed substrate; performing partition alignment by using the partition positioning structure, manufacturing functional lines in the pattern reserved areas of the sub-regions, and synchronously manufacturing a blocking structure arranged along a preset outer contour on the edge of an effective area of a single plate unit; performing outer forming processing based on the outer edge of the blocking structure, and separating to obtain each single plate unit. The application can realize high-precision control of plate thickness tolerance, double-sided alignment and shape size.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a method for manufacturing a high-precision micro circuit board for an integrated smart wearable module and the circuit board obtained by the method. Background Technology

[0002] As smart wearable devices evolve towards miniaturization and high integration, the size of their internal interconnecting circuit boards is becoming increasingly miniaturized to meet the requirements for mounting and functional implementation of high-precision integrated circuits or chips. For example, a connecting circuit board for an integrated module in a smart wearable device has a single board size of only 3.5±0.1mm in length, 1.80±0.02mm in width, and 0.41±0.02mm in thickness. Such circuit boards are characterized by extremely small dimensions, a large number of panels (e.g., a single panel contains 2000 boards), and extremely high requirements for thickness and double-sided circuit alignment accuracy.

[0003] In manufacturing such circuit boards, existing processes mainly face the following three major technical bottlenecks: First, the machining accuracy is insufficient. Traditional mechanical milling (with a tolerance of approximately ±100μm) cannot meet the requirements for width tolerances of ±20μm. Even with non-contact laser cutting, the positioning and spot accuracy of the equipment itself typically only reach around ±50μm, making it difficult to consistently achieve the ±20μm tolerance requirement. Furthermore, high-energy lasers directly cutting through the sheet metal can cause severe ablation and microscopic unevenness at the edges of micro-plates, and insufficient support at the cutting end can easily lead to displacement or chipping.

[0004] Secondly, the alignment accuracy of double-sided circuits is difficult to guarantee. Because a single panel contains thousands of tiny units, large-area boards undergo irregular thermal expansion and contraction and mechanical deformation during lamination and baking. Traditional whole-panel alignment and exposure methods cannot compensate for the minute deformations in various local areas, resulting in misalignment of the circuits on both sides of the single board in the central or edge areas. The defect rate increases sharply with the number of panels.

[0005] Third, controlling the thickness uniformity of ultra-thin boards is difficult. To achieve a strict thickness tolerance (±20μm), if copper-clad laminates of the target thickness are used directly for lamination, uneven resin flow during the lamination process (faster resin flow at the edges and slower resin flow in the center) can easily lead to a difference in board thickness distribution, with thinner edges and thicker center, affecting the accuracy of subsequent circuits and the strength of the board.

[0006] Therefore, how to provide a circuit board manufacturing method that can simultaneously solve the problems of ultra-high precision forming of shape, precise alignment of double-sided graphics on large panels, and control of board thickness uniformity has become an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0007] This invention aims to solve the problems of insufficient shape accuracy, double-sided circuit alignment deviation, and difficulty in controlling thickness uniformity in existing high-precision microcircuit boards. It provides a method for manufacturing a high-precision microcircuit board for an integrated smart wearable module, and the high-precision microcircuit board produced by this method. This method can control board thickness tolerance, double-sided alignment accuracy, and shape cutting accuracy within ±20μm, breaking through the limits of traditional processes and achieving high-yield mass production of microcircuit boards for wearable devices.

[0008] In a first aspect, the present invention provides a method for manufacturing a high-precision micro circuit board, comprising the following steps: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. The double-sided copper-clad laminate with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. A partitioned positioning structure is formed on the laminated substrate; The partition positioning structure is used to perform partition alignment, and functional lines are made in the graphic reservation area of ​​each sub-region. At the same time, a blocking structure is made along the preset outer contour at the edge of the effective area of ​​the single board unit. The outer edge of the barrier structure is used for shaping to separate and obtain each single-board unit.

[0009] Furthermore, the preset graphic structure is a grid circuit pattern, which is used to divide the entire board into multiple sub-panel areas, and an etched area is formed in each sub-panel area as the flow guiding area, and a copper layer buffer is reserved between the etched area and the graphic retention area.

[0010] Furthermore, the pressing process employs a composite structure of a mirror-finished steel plate and an ultra-thin release film, wherein the thickness of the release film is 5μm to 10μm, the maximum pressing temperature is the glass transition temperature of the insulating layer plus 10°C to 20°C, the pressure is 260PSI to 400PSI, and the pressing time is 2 hours to 4 hours.

[0011] Furthermore, the partition positioning structure consists of multiple sets of alignment holes distributed around some or all of the sub-regions.

[0012] Furthermore, the step of using the partition positioning structure to perform partition alignment and creating functional lines within the graphic reservation area of ​​each sub-region includes: A laser direct imaging exposure machine (LDI) is used. When exposing any sub-region, the corresponding positioning structure located near that sub-region is selected for positioning. For the same substrate, after the first side is exposed, the data is immediately switched to expose the second side.

[0013] Furthermore, the creation of functional circuits within the graphic reservation area of ​​each sub-region includes: First, complete the first side of the circuit and then obtain the actual graphic position data through automatic optical inspection (AOI). The actual graphic position data is reverse-processed to generate reference data for the second exposure; the second exposure is then performed based on the reference data.

[0014] Furthermore, the blocking structure is an auxiliary copper layer circuit that conforms to the outer contour of the single board; the shape forming process includes: Adjust the laser energy to a threshold level that allows it to cut through the substrate without cutting through the copper layer; control the laser to cut along the outer edge of the auxiliary copper layer circuit; or, The first laser-controlled depth cut is performed along the auxiliary copper layer circuitry on the first side; the first etching is performed to remove the auxiliary copper layer circuitry on the first side; a micro-adhesive film is attached to the first side; the second laser-controlled depth cut is performed from the second side to separate the board; the second etching is performed to remove the auxiliary copper layer circuitry on the second side, so that the board is shipped in a state of being adhered to the micro-adhesive film.

[0015] Furthermore, after the functional circuitry is fabricated but before the surface treatment of the circuitry is performed, the entire board is baked at a temperature of 120°C to 160°C for 2 to 4 hours.

[0016] Secondly, the present invention provides a method for manufacturing a high-precision micro circuit board, comprising the following steps: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. The double-sided copper-clad laminate with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. A partitioned positioning structure is formed on the laminated substrate; The partition positioning structure is used to perform partition alignment, and functional lines are created within the graphic preservation area of ​​each sub-region. The length direction of the single-board unit is formed by mechanical milling, and the width direction of the single-board unit is formed by dicing process to separate and obtain each single-board unit.

[0017] Thirdly, the present invention provides a high-precision micro circuit board, which is manufactured using the manufacturing method described in any of the preceding claims.

[0018] The main beneficial effects of this technical solution are: The present invention discloses a method for manufacturing a high-precision micro-circuit board for an integrated smart wearable module, and the circuit board obtained by the method. This involves pre-forming a grid etching pattern on a thickened copper-clad board and reserving a buffer zone before high-temperature and high-pressure lamination. This allows resin to flow uniformly along the guide groove, fully releasing internal stress, thereby obtaining a dense and uniform substrate with a thickness tolerance ≤ ±20μm. After lamination, multiple sets of alignment holes are punched around each sub-panel area. During exposure, partitioned positioning and continuous double-sided exposure are employed to effectively compensate for local deformation of the large panel and ensure double-sided circuit alignment accuracy ≤ ±20μm. Simultaneously, a pattern with the same outline as the single-board edge is fabricated. The auxiliary copper layer circuitry utilizes the blocking effect of the copper layer on the laser, allowing laser cutting to be completed along the edge of the high-precision circuit pattern. This improves the shape processing accuracy from ±50μm of the equipment itself to ±20μm. Alternatively, it can be cut into shape through a dicing process (like wafer dicing), improving the forming accuracy. This systematically breaks through the process bottlenecks of thickness, alignment, and three-dimensional shape accuracy of micro-circuit boards, significantly improving the manufacturing yield and reliability of high-precision circuit boards for wearable devices. It also provides a foundation for the processing and application of micro-circuit boards for the mounting and functional realization of high-precision integrated circuits or chips. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0020] Figure 1 This is a flowchart illustrating a method for manufacturing a high-precision micro-circuit board for an integrated smart wearable module according to Embodiment 1 of the present invention. Figure 2 A cross-sectional view of a product manufactured using existing technology that has defects due to misalignment of the circuitry on both sides; Figure 3 A schematic diagram of the copper-clad laminate of a tool structure after the frame circuit pattern has been fabricated, provided for an embodiment of the invention; Figure 4 This is a schematic diagram of the sub-panel area of ​​a copper-clad laminate with a tool structure after the frame circuit pattern has been fabricated, provided in an embodiment of the present invention. Figure 5 This is a schematic diagram of a pressing and layout structure provided in an embodiment of the present invention; Figure 6This is a schematic diagram of a preferred alignment hole design provided by an embodiment of the present invention; Figure 7 This is a schematic diagram of an auxiliary copper circuit design provided in an embodiment of the present invention; Figure 8 This is a flowchart illustrating a method for manufacturing a high-precision microcircuit board for an integrated smart wearable module according to Embodiment 2 of the present invention. Figure 9 This is a schematic diagram of molding method two provided in Embodiment 3 of the present invention; Figure 10 This is a physical image of a high-precision micro-circuit board for an integrated smart wearable module according to the present invention.

[0021] Explanation of reference numerals: 1. Tool structure copper-clad laminate; 2. Mirror steel plate; 3. Ultra-thin release film; 11. Tool edge; 12. Sub-panel area; 13. Processing area; 14. Etching area; 15. Copper layer buffer zone; 16. Positioning hole; 17. Auxiliary copper layer circuit.

[0022] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0024] It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.

[0025] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0026] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0027] This invention aims to address three major technical bottlenecks in the manufacturing of microcircuits using existing processes: First, the dimensional tolerance requirement is ±20μm, which cannot be met by traditional milling and conventional laser cutting; second, local expansion and contraction of the board material under large panel conditions leads to excessive misalignment of the double-sided circuits; and third, uneven resin flow during the lamination of ultra-thin boards makes it difficult to control thickness uniformity. This disclosure utilizes a uniform thickness lamination structure design, a zoned positioning exposure strategy, and an auxiliary barrier layer forming method, or employs a dicing machine designed for semiconductor-grade precision for forming. The synergistic effect of these three elements achieves simultaneous improvement in the three-dimensional accuracy of the microcircuit board in terms of thickness, alignment, and shape.

[0028] To better understand the above technical solution, a detailed explanation of the technical solution is provided below with reference to the accompanying drawings.

[0029] Example 1

[0030] Figure 1 This is a flowchart illustrating a method for fabricating a high-precision microcircuit board for an integrated smart wearable module according to Embodiment 1 of the present invention. Figure 1 As shown, it includes the following steps: Step S100: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; Step S200: A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. Step S300: The double-sided copper-clad board with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. Step S400: Form a partitioned positioning structure on the laminated substrate; Step S500: Use the partition positioning structure to perform partition alignment, create functional lines in the graphic reservation area of ​​each sub-region, and simultaneously create a blocking structure along the preset outer contour at the edge of the effective area of ​​the single board unit. Step S600: Perform shape forming processing based on the outer edge of the blocking structure to separate and obtain each single board unit.

[0031] This disclosure describes an embodiment using a connection circuit board for a smart wearable integrated module applied to wearable devices. The circuit board has a double-sided structure, with each unit having extremely small dimensions: a length of only 3.5±0.1 mm, a width of only 1.80±0.02 mm, and a thickness of 0.41±0.02 mm. Only four conductive lines are required on the circuit board surface, and the surface treatment uses electroplating gold, eliminating the need for a solder mask layer. Production utilizes a large panel layout, with each panel containing approximately 2000 unit boards, and shipment is required to be in unit board form.

[0032] Existing processes face the following main technical challenges in manufacturing such microcircuits: Firstly, the required dimensional accuracy is difficult to meet. The width tolerance must be no greater than ±0.02mm, or 20μm. Traditional mechanical milling typically only controls the tolerance within ±0.1mm, which cannot meet this accuracy requirement. Even with laser cutting, the tolerance usually only reaches around ±0.05mm, still struggling to consistently achieve the ±20μm accuracy. It should be noted that the length tolerance requirement is no greater than ±0.1mm, which can be met using ordinary milling.

[0033] Secondly, the alignment accuracy of the circuit boards on both sides is difficult to guarantee. This circuit board requires a relative positional deviation of no more than ±0.02mm between the circuit boards on both sides. Since a single panel contains a large number of individual board units (approximately 2000), thermal expansion and contraction and mechanical deformation of the board during processing can cause localized misalignment of the circuit boards on both sides, resulting in a high product defect rate. A sample cross-section of a product with misaligned circuit boards on both sides is shown below. Figure 2 As shown.

[0034] Third, controlling the uniformity of board thickness is difficult. The thickness tolerance of this circuit board is required to be no greater than ±0.02mm, which places extremely high demands on the uniformity of board thickness. If special materials (such as ceramic materials, polytetrafluoroethylene materials, etc.) are used to improve dimensional stability, the thickness tolerance can be improved to some extent, but it will significantly increase material costs and face greater processing difficulties in subsequent processes such as circuit fabrication and shaping.

[0035] To address the aforementioned issues and achieve high reliability and high yield in the fabrication of high-precision microcircuit boards, this embodiment provides a method for manufacturing high-precision microcircuit boards, specifically including the following steps.

[0036] Step S100: Provide a thickened copper-clad laminate.

[0037] A double-sided copper-clad laminate with a thickness greater than that of the finished board is selected as the copper-clad laminate for the tool structure. For example, if the required thickness of the finished board is 0.41 mm, a double-sided copper-clad laminate with a thickness of 0.5 mm can be selected to allow for thickness allowance during subsequent lamination and thinning. The insulating layer material of the copper-clad laminate can be conventional FR-4.

[0038] Step S200: Create a preset graphic structure with flow guiding function.

[0039] A grid pattern is fabricated on the aforementioned double-sided copper-clad laminate, dividing the entire board into multiple sub-paneling areas. Within each sub-paneling area, an etched area is formed through processes such as film application, exposure, development, etching, and film removal, serving as a flow guiding area. The copper layer within the etched area is completely removed, exposing the insulating substrate. A copper layer buffer zone of a certain width is reserved between the etched area and the pattern retention area (i.e., the processing area) used for subsequent fabrication of functional circuits. This buffer zone does not participate in the flow guiding of adhesive during lamination and is used to isolate the effective pattern area from the impact of uneven thickness or copper layer wrinkles that may occur in the board edge area during lamination.

[0040] Step S300: Pressing process.

[0041] The tool-structured copper-clad laminate with a pre-defined pattern is laminated. The laminated stack, from top to bottom, consists of: a mirror-finished steel plate, an ultra-thin release film, the tool-structured copper-clad laminate, the ultra-thin release film, and the mirror-finished steel plate. The thickness of the ultra-thin release film is preferably 5μm to 10μm to ensure a smooth board surface after lamination and facilitate separation. The lamination process parameters are: the maximum temperature is set to the glass transition temperature of the insulating layer material plus 10℃ to 20℃; under certain pressure, lamination is carried out for several hours to compact the insulating layer, increasing the board strength, fully releasing internal stress, and obtaining a substrate that meets the thickness tolerance requirements.

[0042] This lamination process serves three purposes: first, it reduces the board thickness from the initial 0.5mm to the target thickness of 0.41±0.02mm; second, it allows the insulating resin to flow fully and undergo secondary curing through high temperature and pressure, resulting in a denser board structure; and third, it utilizes the flow-guiding groove network formed in the etched area to guide the resin to flow evenly during lamination, avoiding uneven board thickness caused by faster resin flow at the edges and slower flow in the center. After lamination, the board thickness can be measured using microsections to confirm that it meets the tolerance requirements.

[0043] Step S400: Form a partitioned positioning structure.

[0044] Multiple sets of alignment holes are punched in the tool edge area of ​​the laminated substrate. Unlike the conventional method of setting alignment holes only at the four corners of the board, in this embodiment, multiple sets of alignment holes are distributed in the tool area outside part or all of the sub-panel area, forming a partitioned positioning structure.

[0045] Step S500: Fabricate functional circuits and blocking structures.

[0046] Using the aforementioned partitioned positioning structure, partitioned alignment is performed, and double-sided functional circuitry is fabricated within the pattern retention area of ​​each sub-region. A laser direct imaging exposure machine is preferably used for exposure. When exposing any sub-panel area, the corresponding group of alignment holes located near that sub-panel area is selected for positioning to compensate for deformation differences in various local areas of the large panel. For the same substrate, after completing the exposure of the first side's circuitry, the exposure data for the second side is immediately switched, and then the second side of the substrate is exposed immediately, shortening the time interval between the two exposures and avoiding dimensional fluctuations in the dry film due to environmental factors.

[0047] While fabricating the double-sided functional circuitry, a blocking structure is simultaneously fabricated at the edge of the effective area of ​​each single-board unit. This blocking structure is an auxiliary copper layer circuit that conforms to the outer contour of the single board, and its outer edge is the preset single-board outline boundary. Since the blocking structure and the functional circuitry are fabricated using the same exposure process, their pattern accuracy can reach ±15μm to ±20μm.

[0048] Step S600: External shaping processing.

[0049] The outer edge of the barrier structure is used for shaping to separate individual board units. Specifically, laser cutting can be used: the laser energy is adjusted to a threshold that can only cut through the insulating substrate but not through the copper layer; the laser beam is controlled to cut along the outer edge path of the auxiliary copper layer circuit. Because the copper layer has a blocking effect on the specific energy laser, the actual cutting path is forcibly restricted to the edge of the auxiliary copper layer, thereby improving the shape cutting accuracy from ±50μm of the laser equipment itself to ±20μm of the circuit pattern accuracy, meeting the tolerance requirement of ±20μm in the width direction.

[0050] This method requires placing the auxiliary copper layer circuitry outside the effective area edge of the single-board unit, i.e., within the scrap area of ​​the tool edge. The inner edge of the auxiliary copper layer aligns with the outer contour of the target single-board unit. During laser cutting, the laser beam is controlled to travel along the inner edge of the auxiliary copper layer towards the single-board unit, utilizing the blocking effect of the copper layer to precisely terminate the cut at this inner edge. After cutting, the auxiliary copper layer is removed along with the scrap board edge, leaving no auxiliary copper layer residue on the single-board unit. This eliminates the need for subsequent auxiliary copper layer etching processes, further simplifying the workflow. This solution is suitable for applications where residual copper layers at the single-board edge are not permitted, or where minimizing the workflow is desired.

[0051] After the functional circuits are manufactured, or before or after the shape forming process, surface treatments (such as electroplating gold) can be performed as needed.

[0052] The method for fabricating a high-precision microcircuit board disclosed herein has the following advantages: 1. Significantly improved thickness accuracy: By prefabricating a grid pattern structure with flow guiding function and cooperating with high temperature and high pressure pressing, the resin is guided to flow evenly, so that the thickness uniformity of the board after pressing is controlled within ±20μm. At the same time, the insulation layer is dense and the internal stress is fully released, providing a stable substrate foundation for subsequent high-precision processing.

[0053] 2. Significantly improved alignment accuracy of double-sided circuits: By setting multiple sets of alignment holes on the periphery of each sub-panel area after lamination and adopting a zoned positioning exposure strategy, the irregular expansion and contraction of each local area of ​​the large panel is effectively compensated, and the relative misalignment of the double-sided circuits is controlled within ±20μm, significantly reducing the product defect rate caused by alignment deviation.

[0054] 3. Breakthrough in shape processing precision: By simultaneously fabricating auxiliary copper layer circuits that are consistent with the shape contour at the edge of the single board, and by utilizing the blocking effect of the copper layer on the laser, the actual reference benchmark for shape cutting is transformed from the mechanical positioning of the equipment into a high-precision circuit pattern, so that the final shape accuracy reaches ±20μm, solving the technical problem that traditional laser cutting cannot meet the stringent tolerance requirements of micro boards.

[0055] 4. Excellent process compatibility and mass production feasibility: Each step of this method can be implemented on existing PCB manufacturing equipment without the need to purchase additional ultra-high precision specialized equipment. The three major methods of uniform lamination thickness, partition alignment, and barrier layer cutting work together to achieve stable mass production of miniature high-precision circuit boards, significantly improving yield.

[0056] It should be noted that although the invention is described using a connecting circuit board for wearable devices as an exemplary embodiment, the core inventive concept of this disclosure—that is, solving the micron-level tolerance control problem of micro-circuit boards in three dimensions—thickness uniformity, double-sided alignment accuracy, and shape processing accuracy—through the synergy of a uniform thickness structure design, a partitioned positioning exposure strategy, and an auxiliary blocking layer forming method—does not depend on the specific application scenario of "wearable devices".

[0057] The technical problem addressed by this disclosure is essentially a manufacturing process issue for miniaturized, high-density, and high-precision circuit boards, rather than a design problem for a specific end product. Any application scenario requiring the manufacture of circuit boards with the following characteristics can benefit from the technical solution disclosed herein: extremely small single-board dimensions (millimeters or sub-centimeters); stringent shape tolerance requirements (tens of micrometers); high double-sided circuit alignment accuracy requirements; strict requirements for board thickness uniformity control; and large-scale mass production needs. Examples include the medical device field, the communication and RF module field, and the Internet of Things and sensor field.

[0058] Generally, when the tolerance requirement for at least one dimension of a circuit board is less than ±50μm, or the thickness tolerance requirement is less than ±30μm, or the double-sided alignment accuracy requirement is less than ±30μm, traditional PCB manufacturing processes face technical bottlenecks. In such cases, the technical solution disclosed herein can achieve significant beneficial effects. Therefore, any circuit board product facing manufacturing difficulties within the aforementioned accuracy range, regardless of its specific dimensions, can be addressed using the technical solution disclosed herein.

[0059] Furthermore, the preset graphic structure is a grid circuit pattern, which is used to divide the entire board into multiple sub-panel areas, and an etched area is formed in each sub-panel area as the flow guiding area, and a copper layer buffer is reserved between the etched area and the graphic retention area.

[0060] After providing the thickened double-sided copper-clad laminate, the frame circuit pattern is fabricated through the following processes: First, the double-sided copper-clad laminate undergoes surface cleaning and roughening treatment to improve the adhesion of the dry film. Then, a photosensitive dry film is applied to both sides of the copper-clad laminate. The thickness of the dry film can be selected according to the subsequent etching depth, typically ranging from 15μm to 25μm.

[0061] Next, a pre-designed grid pattern film is exposed. The grid pattern film has a light-shielding pattern corresponding to the sub-panel area division method. After exposure, the dry film in the corresponding area undergoes a photopolymerization reaction and solidifies.

[0062] After exposure, a development process is performed to dissolve and remove the dry film in the unexposed areas, exposing the copper surface to be etched. A weakly alkaline solution of sodium carbonate or potassium carbonate can be used as the developer, and the development time is adjusted according to the type and thickness of the dry film.

[0063] Next, an etching process is performed using acidic or alkaline copper chloride etching solution to completely etch away the exposed copper layer not protected by the dry film, exposing the insulating substrate. After etching, the remaining cured dry film is removed with a stripping solution to obtain a tool-structured copper-clad laminate with a grid-like circuit pattern.

[0064] After creating the frame circuit pattern, the surface of the copper-clad laminate in the tool structure is as follows: Figure 3 As shown, the board includes a tool edge 11 and multiple sub-paneling areas 12, each containing a processing area 13. The grid pattern divides the entire board into multiple sub-paneling areas 12. The sub-paneling areas 12 are arranged in an array, and adjacent sub-paneling areas 12 are separated by the tool edge 11 area. Figure 4 A schematic diagram of the sub-panel area, as shown below. Figure 4 As shown, within each sub-panel area, the grid pattern further defines the following functional areas: (1) Etching area 14 (flow guide area) Etched area 14 is the region in the grid pattern where the copper layer is completely etched away, exposing the insulating substrate. Etched areas 14 are distributed in a grid or strip pattern within the sub-panel area, forming an interconnected network of flow channels. The width and density of etched areas 14 can be determined comprehensively based on the board thickness, resin flowability, and lamination parameters. In a specific example, the width of the etched area lines is 0.5 mm to 2.0 mm, and the spacing between adjacent etched lines is 5 mm to 15 mm.

[0065] (2) Graphic Retention Area (Processing Area 13)

[0066] The pattern reservation area is the region within a sub-panel area that retains a complete copper layer for subsequent fabrication of functional circuit patterns. The area and location of the pattern reservation area are matched to the size and layout of the final board unit. One or more pattern reservation areas can be set within each sub-panel area, with each pattern reservation area corresponding to multiple board units.

[0067] (3) Copper layer buffer zone 15

[0068] A copper layer buffer zone 15 is located between the etching zone 14 and the processing zone 13, and is a continuous or intermittent copper layer retention area surrounding the periphery of the pattern retention area. The width of the copper layer buffer zone 15 is typically 0.3 mm to 1.0 mm. This area retains the copper layer from being etched during the frame pattern fabrication process and plays a role in isolation and protection during subsequent lamination processes.

[0069] The grid-like circuit pattern plays the following key functions in the technical solution of this invention: The insulating layer materials of copper clad laminates (such as epoxy resin, polyimide, PTFE, etc.) are polymer materials. When the temperature is below the glass transition temperature, they are in the glassy state, which is hard and dimensionally stable. When the temperature rises above the Tg value, the material enters the elastic state or viscous flow state, the molecular chain segment mobility is enhanced, the material softens and has a certain plastic flow capability.

[0070] This invention utilizes this material property to heat a copper-clad laminate with a fabricated grid circuit pattern to a temperature range of Tg value plus 10°C to 20°C, while simultaneously applying a certain pressure. Under these conditions, the insulating layer material softens and undergoes slight plastic deformation under pressure, leading to overall material densification and a reduction in board thickness. Simultaneously, the etched areas within the grid circuit pattern provide space for the deformation of the insulating layer material. Under pressure, the insulating layer material flows slightly towards the etched trenches, resulting in a more balanced material distribution in different local areas. Consequently, the overall board thickness uniformity is significantly improved after lamination. The board thickness tolerance can be stably controlled within ±20μm.

[0071] During the lamination process, the area near the edge of the etched zone is prone to defects such as copper foil wrinkles, sudden changes in board thickness, or resin buildup due to drastic changes in resin flow rate and pressure gradient. If the functional circuitry is fabricated directly to the boundary of the etched zone, these defects may extend into the effective pattern area, affecting the circuit quality.

[0072] This invention incorporates a copper buffer zone between the etched area and the pattern retention area, isolating unstable regions of the lamination process outside the effective pattern area. After lamination, the buffer zone can be partially or completely removed by profile cutting, ensuring that the final single-board unit has a uniform board thickness and a flat copper surface in its patterned area.

[0073] The groove structure formed by the etched areas in the grid-like circuit pattern provides a small space for deformation release during the high-temperature and high-pressure lamination process. This allows the insulating material to fully release internal stress during curing, reducing residual stress in the board after lamination. This results in better dimensional stability of the substrate during subsequent circuit fabrication, baking, and molding processes, reducing the risk of secondary deformation due to stress release.

[0074] Furthermore, the pressing process employs a composite structure of a mirror-finished steel plate and an ultra-thin release film, wherein the thickness of the release film is 5μm to 10μm, the maximum pressing temperature is the glass transition temperature of the insulating layer plus 10°C to 20°C, the pressure is 260PSI to 400PSI, and the pressing time is 2 hours to 4 hours.

[0075] The lamination process employs a specific stacked plate structure and process parameters to achieve optimal thickness uniformity and plate densification in conjunction with the aforementioned grid circuit pattern. The specific implementation method of this lamination process is described in detail below.

[0076] like Figure 5 As shown, the laminated plate structure from top to bottom consists of: mirror steel plate 2, ultra-thin release film 3, tool structure copper-clad board 1 with pre-fabricated frame circuit pattern, ultra-thin release film 3, and mirror steel plate 2.

[0077] The mirror-finish steel plate 2 is made of high-gloss stainless steel with a surface roughness Ra≤0.05μm. Its function is twofold: firstly, to provide a uniform pressure transmission plane for lamination, avoiding uneven plate thickness caused by local pressure concentration; secondly, the mirror-grade surface finish can give the copper-clad laminate an extremely high degree of flatness and smoothness after lamination, which is beneficial for the subsequent production of high-precision circuit patterns.

[0078] An ultra-thin release film 3, with a thickness of 5μm to 10μm, is placed between the mirror steel plate 2 and the tool structure copper-clad laminate 1. The release film material can be a high-temperature resistant polymer film such as polyethylene terephthalate, polyimide, or polytetrafluoroethylene. Its surface undergoes release treatment to facilitate easy separation from the mirror steel plate and copper-clad laminate after lamination. The selected thickness range of 5μm to 10μm minimizes the interference of the release film on the plate thickness accuracy while ensuring reliable demolding.

[0079] The lamination process is carried out in a vacuum laminator, and the main process parameters are as follows: The pressing temperature profile can use the temperature profile corresponding to the medium Tg prepreg, and the highest pressing temperature is set to the glass transition temperature of the copper-clad laminate insulating layer material of the tool structure plus 10°C to 20°C. Taking FR-4 board as an example, its Tg value is usually 130°C to 140°C, so the pressing temperature is set to 140°C to 160°C; if a high Tg board (Tg value 170°C to 180°C) is selected, the pressing temperature is set to 180°C to 200°C accordingly. The basis for setting this temperature range is that the pressing temperature needs to be higher than the Tg value to allow the insulating resin to fully enter the viscous flow state, obtain sufficient fluidity to fill the etched trenches and redistribute under pressure; at the same time, the temperature should not be too high to avoid excessive cross-linking or thermal decomposition of the resin, which would affect the electrical properties and mechanical strength of the board. The temperature window of Tg + 10°C to 20°C ensures that the resin is fully softened and flows, and is within the thermal stability range of the material.

[0080] The pressing pressure ranges from 260 PSI to 400 PSI (approximately 1.79 MPa to 2.76 MPa).

[0081] The selection of this pressure range takes into account the following factors: if the pressure is too low, the resin flow is insufficient, making uniform thinning impossible, and voids or uneven density may exist in the board after lamination; if the pressure is too high, excessive resin flow may cause the copper layer in the pattern retention area to slip or deform, affecting the pattern accuracy of subsequent circuit fabrication. The pressure range of 260PSI to 400PSI has been experimentally verified to ensure sufficient compaction and thinning of the board while avoiding copper layer deformation and pattern shift.

[0082] The pressing time is 2 to 4 hours, including a heating section, a constant temperature and pressure section, and a cooling section. The constant temperature and pressure section must be maintained for no less than 60 minutes.

[0083] The longer pressing time has the following effects: First, it ensures that all areas of the board reach the set temperature, and the resin flow and filling process are completed. Second, it allows the insulating resin to complete the cross-linking and curing reaction, improving the mechanical strength and dimensional stability of the board. Third, under continuous pressure and temperature, the residual stress inside the board is fully released, reducing warping and deformation in subsequent processing.

[0084] The lamination process of this invention has a close synergistic relationship with the aforementioned grid circuit pattern, specifically reflected in: The etched areas in the grid pattern provide a channel for resin flow, while the high temperature and pressure conditions provided by this lamination process drive the resin to flow fully along these channels. The combination of these two factors allows the resin to diffuse evenly from the center of the sub-panel area towards the etched grooves, avoiding the single-path flow pattern of traditional lamination where resin only flows towards the board edge, thus fundamentally solving the problem of uneven resin flow.

[0085] The copper buffer layer in the grid pattern isolates the edge effect of lamination, while the stacking of the mirror steel plate and the ultra-thin release film in this lamination process ensures the uniformity of pressure transmission and the flatness of the plate surface. Together, these factors ensure that the thickness tolerance of the plate after lamination is stably controlled within ±20μm.

[0086] The etched grooves provide space for microscopic deformation release in the substrate, while the longer lamination time and appropriate temperature and pressure conditions in this lamination process allow the insulating resin sufficient time to complete stress relaxation during curing. Together, these factors significantly reduce the residual stress level of the substrate.

[0087] Furthermore, the partition positioning structure consists of multiple sets of alignment holes distributed around some or all of the sub-regions.

[0088] The partitioned positioning structure specifically comprises multiple sets of alignment holes distributed around part or all of the sub-panel areas. After the lamination process is completed and the substrate thickness tolerance is confirmed to be acceptable, multiple sets of alignment holes are punched on the substrate. The punching process can be completed using an optical alignment punching machine or a mechanical punching machine, preferably using an optical alignment punching machine. The alignment is achieved by utilizing the target pattern or copper surface features retained on the substrate surface after lamination to ensure the relative positional accuracy of the alignment holes and the actual pattern area of ​​the substrate.

[0089] Before punching, the substrate thickness can be sampled using a microsection or non-contact thickness gauge to confirm that the thickness tolerance meets the requirement of 0.41±0.02mm. Punching can only be performed after the thickness is qualified to avoid subsequent exposure alignment deviations due to thickness deviations.

[0090] Unlike conventional printed circuit boards that only have alignment holes at the four corners of the panel, the alignment holes of this invention are distributed in the tool edge area outside part or all of the sub-panel area.

[0091] Specifically, the alignment holes can be arranged in one or a combination of the following ways: (1) Each sub-panel area is provided with a set of alignment holes. At least two alignment holes are provided on the tool edge surrounding each sub-panel area. These two alignment holes are located diagonally or on adjacent sides of the sub-panel area, forming a local positioning reference for that sub-panel area. When the panel contains multiple sub-panel areas, multiple sets of alignment hole arrays are formed accordingly.

[0092] (2) Each set of alignment holes is shared by several adjacent sub-panel areas.

[0093] Based on the dimensions of the sub-paneling areas and the expansion and contraction characteristics of the board material, a set of shared alignment holes can be provided for every 2 to 4 adjacent sub-paneling areas. This set of alignment holes is located in the tool edge area at the boundary of these sub-paneling areas, providing a positioning reference for each sub-paneling area within the set.

[0094] (3) Encryption settings in the central area

[0095] Because the expansion and contraction of the central area of ​​large-sized panels may differ from that of the edge area during pressing and subsequent processing, additional alignment holes can be added around the sub-panel area in the central area of ​​the panel to more precisely compensate for local deformation in the central area.

[0096] Each set of alignment holes can be circular, elliptical, or polygonal in shape, with a diameter typically ranging from 1.0 mm to 3.0 mm, the specific dimensions determined by the identification requirements of the alignment system of the exposure machine. The diameter and shape of each set of alignment holes can be the same or different to distinguish alignment references in different areas. A preferred alignment hole design is as follows: Figure 6 As shown, each sub-panel area is provided with its corresponding alignment hole 16.

[0097] The core function of multiple sets of alignment holes is to provide a local positioning reference for subsequent zone alignment exposure. Their mating relationship is as follows: When using a laser direct imaging exposure machine to create functional circuit patterns, for any sub-panel area to be exposed, the exposure machine's stage control system selects the corresponding group of alignment holes located near that sub-panel area for image recognition and alignment calculation. The actual position coordinates of this group of alignment holes are acquired by a CCD camera and compared with the theoretical coordinates in the design data to calculate the translation, rotation, and scaling compensation parameters for the local area of ​​that sub-panel area.

[0098] Since each set of alignment holes only reflects the actual state of the substrate in its local area, the compensation parameters calculated based on that set of alignment holes can accurately compensate for the local deformation of that sub-panel area, rather than applying the average deformation parameters of the entire board to the entire area. As a result, the exposure pattern of each sub-panel area can match the actual state of the substrate in its area, significantly improving the alignment accuracy of double-sided lines in each local area under large panel conditions.

[0099] By setting the above-mentioned multiple sets of alignment holes as a partition positioning structure, this disclosure achieves the following technical effects: First, the overall alignment task of large-size panels is decomposed into local alignment tasks of multiple sub-regions, which effectively compensates for the independent deformation caused by uneven expansion and contraction of the panels in each sub-panel area, so that the alignment accuracy of the double-sided lines of each single panel unit can meet the requirement of ≤±20μm.

[0100] Secondly, the multiple sets of alignment holes are set close to the corresponding sub-panel areas, which shortens the distance between the alignment reference and the processed graphic, reducing the error transmission and accumulation caused by excessive reference distance.

[0101] Third, it seamlessly connects with the subsequent partition alignment exposure process. The exposure machine can automatically identify and call the corresponding group of alignment holes for partition compensation, which has a high degree of automation and is suitable for large-scale mass production.

[0102] Furthermore, the step of using the partition positioning structure to perform partition alignment and creating functional lines within the graphic reservation area of ​​each sub-region includes: A laser direct imaging exposure machine (LDI) is used. When exposing any sub-region, the corresponding positioning structure located near that sub-region is selected for positioning. For the same substrate, after the first side is exposed, the data is immediately switched to expose the second side.

[0103] The aforementioned partition positioning structure is used to perform partition alignment and create functional lines within the graphic reservation area of ​​each sub-region, specifically through the following methods.

[0104] In this embodiment, a laser direct imaging (LDI) exposure machine is used for the exposure process. The LDI exposure machine does not require a physical film; instead, it uses a computer-controlled laser beam to directly scan and expose the substrate surface covered with a photosensitive dry film, forming a latent image of the circuit. The LDI equipment is equipped with a high-resolution CCD vision alignment system and a precision motion platform, capable of identifying alignment holes or alignment marks on the substrate and automatically calculating the position compensation parameters of the exposed pattern.

[0105] The LDI equipment achieves a pattern resolution accuracy of ±15μm to ±20μm, meeting the requirements of this disclosure for line pattern accuracy and double-sided alignment accuracy. Furthermore, the LDI equipment supports zone exposure, allowing independent alignment compensation parameters to be applied to different areas on the same substrate, providing the equipment foundation for the zone positioning exposure of this disclosure.

[0106] When performing functional circuit exposure, the LDI exposure machine performs zone alignment according to the following steps: Step 1: Substrate loading and alignment hole identification.

[0107] The substrate with multiple sets of alignment holes punched is loaded onto the worktable of the LDI exposure machine and fixed by vacuum adsorption. The CCD camera of the LDI equipment first performs a global scan of the substrate, identifies the actual position of all alignment holes, and assigns each alignment hole to its corresponding sub-panel area group.

[0108] Step 2: Calculate the alignment parameters of the sub-region.

[0109] For any sub-panel area to be exposed, the LDI equipment's control system selects the corresponding alignment holes located on the tool edge near that sub-panel area as the positioning reference. The CCD camera accurately measures the actual coordinates of the alignment holes and compares them with the theoretical coordinates of the alignment holes in the CAM design data. The required translation compensation, rotation compensation, and scaling compensation for that sub-panel area are then calculated using an image matching algorithm.

[0110] Since each set of alignment holes only reflects the actual deformation state of the substrate in its local area, the compensation parameters calculated accordingly can accurately characterize the independent expansion, contraction and misalignment of the sub-panel area, rather than imposing the average deformation parameters of the whole board onto the local area.

[0111] Step 3: Perform zoned exposure.

[0112] The LDI equipment uses the specific compensation parameters for the sub-panel area calculated in step two to perform real-time transformation processing on the exposure pattern data. Then, it controls the laser beam to scan and expose within the pattern retention area of ​​the sub-region, forming a dry film latent image of the functional circuitry. Steps two and three are repeated for each sub-panel area until all sub-regions of the entire board have been exposed.

[0113] Step 4: Continuity processing of partition compensation.

[0114] For functional lines that cross the boundaries of adjacent sub-panel areas, the LDI equipment can perform smooth interpolation processing on the compensation parameters of adjacent sub-regions to ensure that the lines are continuous and without obvious misalignment at the boundaries.

[0115] After exposing the circuit pattern on the first side (e.g., the front side), this embodiment uses a "double-sided, one-pass" exposure process to expose the circuit pattern on the second side (e.g., the back side). The specific operation is as follows: For the same substrate, after the LDI equipment completes the exposure of all sub-regions on the first side, the operator or automated flipping mechanism flips the substrate and reloads it onto the worktable. The LDI equipment immediately switches to and calls the exposure CAM data for the second side, and exposes the circuit patterns of the second side in each sub-region in the same partitioning and alignment method as the first side.

[0116] Unlike the traditional batch operation of "first exposing all substrates on the first side, then replacing the data to complete the second exposure of all substrates", the "double-sided one-time" process closely connects the two-sided exposure operations of the same substrate, greatly shortening the time interval between the two-sided exposures.

[0117] When the photosensitive dry film applied to the substrate surface is exposed to air, it will undergo slight moisture absorption and expansion or drying and shrinkage due to changes in ambient temperature and humidity. If the first side is left to stand for a long time after exposure before the second side is exposed, the pattern already exposed on the first side may change in size during the waiting period before development, and the state of the dry film on the second side before exposure will also be different from that of the first side, resulting in relative misalignment of the double-sided patterns due to the time difference in production. The double-sided single-pass process used in this invention shortens the time interval between the exposure of the two sides of the same substrate to the minute level, so that the dry film is in a basically the same environmental and dimensional state during the exposure of both sides, effectively eliminating the pattern misalignment factor caused by the waiting time difference.

[0118] In traditional batch exposure, if a batch contains a large number of substrates, the exposure of the second side of the last substrate may be several hours apart from the exposure of the first side of the first substrate. During this period, changes in environmental conditions may cause a systematic drift in the double-sided alignment accuracy of the entire batch of substrates. The double-sided single-pass process uses a single substrate as the work unit, and the exposure of both sides of each substrate is completed under essentially the same conditions, avoiding the cumulative deviations in batch operations.

[0119] Partition alignment solves the problem of local deformation compensation in the spatial dimension, while double-sided single-circuit process solves the problem of maintaining state consistency in the temporal dimension. The two work together to ensure high-precision alignment of the double-sided circuit from both spatial and temporal dimensions.

[0120] Furthermore, the creation of functional circuits within the graphic reservation area of ​​each sub-region includes: First, complete the first side of the circuit and then obtain the actual graphic position data through automatic optical inspection (AOI). The actual graphic position data is reverse-processed to generate reference data for the second exposure; the second exposure is then performed based on the reference data.

[0121] In an alternative implementation, the fabrication of the functional circuitry can employ a self-aligned exposure method based on actual graphic feedback to further pursue extreme alignment accuracy. The specific implementation of this alternative is described in detail below.

[0122] The core idea of ​​this alternative is that instead of relying on theoretical coordinates or alignment holes as the positioning reference for the second exposure, the physical circuit pattern of the first side is used as the reference. The actual position information is obtained through optical scanning, and after reverse processing, it is directly used as the graphic data for the second exposure, thereby achieving self-alignment and overlay of "physical object to physical object".

[0123] Because this solution uses the actual pattern on the first side as a reference, it completely eliminates the systematic deviation between the design data and the actual deformation of the substrate, and can improve the alignment accuracy of double-sided circuits to the ±5μm level, making it suitable for special application scenarios with extremely stringent accuracy requirements.

[0124] The specific operating steps are as follows: Step 1: The first side of the circuit is complete.

[0125] First, following standard printed circuit board (PCB) pattern fabrication processes, the circuit pattern on the first side (e.g., the front side) is created. This includes: applying a photosensitive dry film to the first side of the substrate; exposing the first side using an LDI exposure machine or a traditional film exposure machine; and after development, etching, and film removal, forming the actual copper circuit pattern on the first side of the substrate.

[0126] At this point, the circuit pattern on the first side is a physically existing solid pattern, and its actual position and size already contain all the deformation information of the substrate in this processing stage.

[0127] Step 2: AOI scanning to obtain actual graphic position data.

[0128] The substrate with the first side of the circuitry completed is sent to an automated optical inspection (AOI) device for scanning. The AOI device uses a high-resolution linear or area scan camera to scan and image the entire pattern of the first side of the substrate line by line.

[0129] Unlike traditional AOI applications that are only used for defect detection, the AOI scanning in this step focuses on acquiring the precise position coordinates of the circuit graphics. The AOI equipment compares the acquired actual circuit images with the CAM design data, and extracts the following position data through image matching algorithms: the actual center coordinates of each circuit graphic element; the actual line width and spacing of each circuit graphic element; the translational deviation of the entire board or each local area; the rotational deviation of the entire board or each local area; and the scaling ratio of the entire board or each local area.

[0130] The aforementioned actual graphic position data is output to the data processing system in the form of digital coordinates. To improve data accuracy, AOI scanning can employ multi-point calibration and sub-pixel edge detection technology, enabling coordinate measurement accuracy to reach the micrometer level.

[0131] Step 3: Reverse process to generate the second exposure reference data.

[0132] The actual graphic position data of the first side obtained in step two is input into the front-end data processing software of the computer-aided manufacturing system or LDI equipment. The system performs reverse processing on the data to generate reference data for the second side exposure.

[0133] The meaning of "reverse processing" includes: coordinate mirror transformation: Since the circuit pattern on the second side is physically back-to-back with the pattern on the first side, the coordinate data of the pattern on the first side needs to be mirrored relative to the center line of the substrate or a preset reference axis so that the generated reference data corresponds to the correct position of the second side.

[0134] Graphic correspondence matching: If the circuit pattern on the second side is not completely symmetrical with the circuit pattern on the first side, but has a specific correspondence (such as pad to pad, line to line), the system maps the actual position of the first side pattern to the position where the second side exposure pattern should be according to the preset mapping rules.

[0135] Reference data format conversion: Convert the processed coordinate and graphic data into an exposure file format that can be recognized by the LDI exposure machine, as the direct basis for the second exposure.

[0136] The reference data generated through the above reverse processing does not derive its graphic position from the original design theoretical value, but is derived from the measured position of the first physical graphic. Therefore, this reference data naturally has a precise spatial correspondence with the actual first graphic.

[0137] Step 4: Complete the second exposure based on the reference data.

[0138] The substrate is flipped over so that its second side faces upwards and loaded into the LDI exposure machine. After a photosensitive dry film is applied to the second side, the LDI equipment directly uses the reference data generated in step three for exposure.

[0139] Since the positional information of the reference data is entirely derived from the actual pattern on the first side, the latent image of the circuit on the second side formed by exposure is precisely aligned with the existing physical circuit on the first side in terms of spatial position. After development, etching, and film removal, circuit patterns are formed on both sides of the substrate, and the relative positional deviation of the patterns on both sides can be controlled within ±5μm.

[0140] This alternative is particularly suitable for the following scenarios: the double-sided circuit pattern has symmetry or a definite mapping relationship; the circuit pattern is relatively simple, which is convenient for AOI to accurately identify and extract (such as the simple circuit with only four lines in this disclosure); there are extremely stringent requirements for double-sided alignment accuracy (such as ≤±5μm); and the process flow is relatively complex and the processing cycle is relatively long.

[0141] For products with complex circuit diagrams where AOI cannot accurately extract the positions of all graphic elements, or for scenarios with high requirements for mass production efficiency, it is recommended to prioritize the aforementioned partitioned alignment exposure scheme.

[0142] Furthermore, the blocking structure is an auxiliary copper layer circuit that conforms to the outer contour of the single board; the shape forming process includes: Adjust the laser energy to a threshold level that allows it to cut through the substrate without cutting through the copper layer; control the laser to cut along the outer edge of the auxiliary copper layer circuit; or, The first laser-controlled depth cut is performed along the auxiliary copper layer circuitry on the first side; the first etching is performed to remove the auxiliary copper layer circuitry on the first side; a micro-adhesive film is attached to the first side; the second laser-controlled depth cut is performed from the second side to separate the board; the second etching is performed to remove the auxiliary copper layer circuitry on the second side, so that the board is shipped in a state of being adhered to the micro-adhesive film.

[0143] In a preferred embodiment of the present invention, the blocking structure is specifically an auxiliary copper layer circuit that conforms to the outer contour of the single board, and the shape forming process is completed based on this auxiliary copper layer circuit. The following provides a detailed description of the fabrication method of the auxiliary copper layer circuit and two optional laser forming schemes.

[0144] The auxiliary copper layer circuitry is fabricated simultaneously with the functional circuitry in the same process. Specifically, when creating the functional circuitry pattern through zone alignment and exposure, the exposure CAM data includes not only the functional circuitry pattern of each board unit, but also the auxiliary copper layer circuitry pattern located at the edge of the effective area of ​​each board unit.

[0145] The design of auxiliary copper layer circuit patterns should follow these principles: (1) Contour Consistency: The outer edge of the auxiliary copper layer circuit is completely consistent with the preset outer contour of the single board unit. For rectangular single boards, the auxiliary copper layer circuit extends along the four sides of the single board to form a closed or semi-closed copper frame. Its outer edge represents the shape boundary of the final product.

[0146] (2) Line width setting

[0147] The linewidth of the auxiliary copper layer is typically set to 0.05mm to 0.15mm. The linewidth should not be too narrow, otherwise it may be accidentally punctured during subsequent laser cutting due to the thinness of the copper layer, thus losing its blocking effect; the linewidth should also not be too wide, otherwise it will occupy effective wiring space and increase the difficulty of subsequent etching removal.

[0148] (3) Isolation from functional circuits

[0149] A certain electrical isolation distance is maintained between the auxiliary copper layer circuit and the functional circuit to avoid unnecessary impact on the functional circuit through the auxiliary copper layer circuit during surface treatment processes such as electroplating gold.

[0150] A preferred auxiliary copper layer circuit is as follows: Figure 7As shown, an auxiliary copper layer circuit 17 is fabricated along a preset outer contour at the edge of the effective area of ​​the single-board unit. Since the auxiliary copper layer circuit 17 and the functional circuit are fabricated using the same LDI exposure process, its pattern accuracy is consistent with that of the functional circuit, reaching ±15μm to ±20μm. This provides a precise reference for achieving high-precision shape forming.

[0151] The outer shape is formed using laser cutting, which can be achieved in two ways.

[0152] 1. Single-cut through-hole blocking forming, suitable for scenarios with high forming efficiency requirements. Its core lies in utilizing the blocking effect of the copper layer on a specific energy laser to forcibly constrain the actual laser cutting path to the outer edge of the auxiliary copper layer circuit.

[0153] When laser-cutting copper-clad laminates, the laser beam acts on the material surface, causing the material to vaporize and be removed through a photothermal effect. Insulating substrates (such as FR-4 resin and glass fiber) have high laser absorption rates and low vaporization thresholds; while copper layers have high reflectivity and low absorption rates to common processing lasers (such as ultraviolet lasers and green lasers), and the sublimation temperature of copper is much higher than the resin decomposition temperature. Therefore, the vaporization threshold of the copper layer is significantly higher than that of the substrate. Utilizing this difference in physical properties, by precisely adjusting the laser's output energy parameters, the laser energy density can be kept within the range of: higher than the vaporization threshold of the insulating substrate and lower than the vaporization threshold of the copper layer. Within this energy range, when the laser beam scans through the exposed substrate area, the substrate is normally vaporized and removed; when the laser beam scans the auxiliary copper layer circuit area, the copper layer reflects or disperses most of the laser energy, without undergoing significant vaporization itself, thus acting as a physical barrier.

[0154] The laser cutting path is pre-planned in the CAM data, ensuring that the center of the laser beam spot travels at a certain offset (usually the spot radius) from the outer edge of the auxiliary copper layer circuitry. During actual cutting, the laser energy primarily acts on the substrate area outside the outer edge of the auxiliary copper layer circuitry, separating the single-board unit from the panel. Due to the obstruction of the copper layer, the boundary of the cut is precisely limited to the outer edge of the auxiliary copper layer circuitry, preventing inward erosion of the effective pattern area.

[0155] This solution is suitable for scenarios with relatively large board sizes, thin boards, and high precision laser equipment energy control. The auxiliary copper layer can be positioned outside the effective area edge of the board unit, i.e., within the scrap area of ​​the tool edge. The inner edge of the auxiliary copper layer aligns with the outer contour of the target board. During laser cutting, the laser beam is controlled to travel along the inner edge of the auxiliary copper layer towards the board unit, utilizing the blocking effect of the copper layer to precisely terminate the cut at this inner edge. After cutting, the auxiliary copper layer is removed along with the scrap board edge, leaving no residual auxiliary copper layer on the board unit, thus eliminating the need for subsequent auxiliary copper layer etching. For the micro-circuit board (only 1.80mm wide) described in this invention, if a single-cut method is used, special attention must be paid to the impact of the laser heat-affected zone on the board edge quality.

[0156] Second: Dual-sided deep cutting combined with etching and micro-film bonding.

[0157] This solution is a preferred option, particularly suitable for the ultra-small single-board unit molding described in this disclosure. Through a composite process of double-sided controlled-depth cutting, intermediate etching, and micro-film bonding, it systematically solves the problems of precision, edge quality, and ease of delivery in micro-board molding.

[0158] (1) Laser-controlled depth cutting on the first face.

[0159] First, after completing the double-sided circuit pattern fabrication and surface treatment (such as electroplating gold), the substrate is loaded onto the laser processing equipment with its first side facing upwards. The laser equipment calls up the corresponding CAM data and performs laser depth-controlled cutting along the outer edge of the auxiliary copper layer circuitry on the first side of each single-board unit.

[0160] "Depth-controlled cutting" refers to laser cutting where the cutting depth does not penetrate the entire sheet material; the cutting depth is typically controlled between 50% and 70% of the total sheet thickness. For example, for a 0.41mm thick sheet, the cutting depth on the first side can be controlled to be between 0.20mm and 0.28mm. Depth-controlled cutting can be achieved by adjusting parameters such as laser power, repetition frequency, scanning speed, and the number of cuts. The equipment is usually equipped with real-time depth monitoring or a closed-loop control system for process parameters to ensure accuracy.

[0161] (2) The first etching removes the auxiliary copper layer circuit on the first side.

[0162] After the first side is cut to control depth, the substrate is subjected to the first etching process. The main purpose of this etching is to remove the auxiliary copper layer circuits and electroplated gold leads on the first side, while the functional circuits are not affected because they are covered by an electroplated gold protective layer or an anti-etch mask.

[0163] The etching solution used is a conventional acidic or alkaline copper chloride etching solution. The etching time is determined by completely removing the auxiliary copper layer circuitry. After etching, only the functional circuit pattern is retained on the first side, and the auxiliary copper layer circuitry is removed and no longer constitutes an obstacle.

[0164] (3) The first side is covered with a micro-adhesive membrane.

[0165] After the first etching is completed, a micro-adhesive film is attached to the first surface. The micro-adhesive film is a polymer film with micro-adhesion, which has sufficient adhesion to fix the single-board unit but can be easily peeled off in subsequent processes. The thickness of the micro-adhesive film is typically 50μm to 100μm, and the material can be polyethylene terephthalate or polyolefin, etc.

[0166] The film application process is carried out on a film application machine, where the micro-adhesive film is evenly applied to the first surface using a roller pressing method, ensuring no air bubbles or wrinkles. After the micro-adhesive film is applied, although each single board unit has been partially cut and separated on the first surface, it is still connected as a whole by the adhesion of the uncut lower half of the board and the micro-adhesive film.

[0167] The micro-adhesive film provides a temporary support carrier for subsequent second-side cutting and second etching, preventing the micro-boards from scattering; it can also serve as a shipping carrier: the final product is delivered in a state of being adhered to the micro-adhesive film, and downstream processes can directly take the single board units one by one from the micro-adhesive film; and it can protect the functional circuits that have completed surface treatment from being scratched or contaminated in subsequent processes and transportation.

[0168] (4) Laser-controlled depth cutting on the second side.

[0169] The substrate with the micro-adhesive film attached is flipped over so that the second side faces upward and loaded into the laser processing equipment. The equipment retrieves the CAM data corresponding to the second side and performs a second laser depth-controlled cut along the outer edge of the auxiliary copper layer circuitry on the second side of each single-board unit.

[0170] The second cut is set to completely penetrate the remaining board thickness, physically separating each veneer unit. Since a micro-adhesive film has been attached to the first side, the separated veneer units are still adhered and fixed by the micro-adhesive film, maintaining their original relative position and preventing them from scattering or shifting.

[0171] (5) The second etching removes the auxiliary copper layer circuit on the second side.

[0172] After the second cutting, the substrate undergoes a second etching process to remove the auxiliary copper layer circuitry and leads on the second side. After etching, only the functional circuit patterns remain on each board unit.

[0173] Finally, each single-board unit is adhered to the micro-adhesive film in a neat arrangement, forming a shipping form that is easy for downstream processes to use.

[0174] This solution systematically solves the following technical problems in micro-circuit board molding through the above composite process: (1) Board edge quality issues When a single high-energy laser cuts through the board, the laser energy is concentrated on the same location, resulting in a large heat-affected zone. This can easily lead to resin carbonization at the board edge and uneven melting of the glass fiber, resulting in a rough microstructure at the board edge after forming. Double-sided controlled-depth cutting distributes the total cutting energy across two stages, and the copper layer is removed in between through an etching step. This reduces the depth of a single laser strike, significantly shrinks the heat-affected zone, and noticeably improves the quality of the board edge.

[0175] (2) Problem of misalignment at the end of cutting micro-plate parts

[0176] For micro-sized veneers measuring only 3.5mm × 1.8mm, if cut through from one side in a single operation, the veneer and the mother panel will have only a tiny connecting area at the end, with almost no supporting rigidity. Under the influence of laser impact and airflow, slight movement may occur, causing the final cutting path to deviate from the intended trajectory. In the double-sided controlled-depth cutting method, the veneer maintains sufficient thickness for support during both cuts, and the adhesion of the micro-adhesive film after the first cut further enhances the veneer's stability, effectively preventing end-point misalignment.

[0177] (3) Issues related to the removal of auxiliary copper layer circuits and process matching

[0178] The auxiliary copper layer circuitry needs to be removed after fulfilling its blocking function. If a single-sided cut is performed followed by direct etching, batch etching becomes difficult because the boards are completely separated and scattered. This solution preserves the board connections after the first controlled-depth cut, completing the first etching to remove the first side's auxiliary copper layer. After a second controlled-depth cut to separate the boards, a micro-adhesive film maintains the board arrangement, and then a second etching removes the second side's auxiliary copper layer. This process design allows the removal of the auxiliary copper layer circuitry to be completed under batch etching conditions, achieving seamless integration between each process.

[0179] (4) Issues related to the shipment and collection of micro-boards

[0180] If the PCBs are too small and shipped in bulk, downstream SMT processes will find it difficult to pick up and mount them efficiently, and the circuitry is prone to damage during transport. This solution uses a micro-adhesive film as the shipping carrier. The PCB units are neatly arranged on the film, and downstream equipment can directly pick up the PCBs from the film, greatly facilitating automated production.

[0181] Furthermore, after the functional circuitry is fabricated but before the surface treatment of the circuitry is performed, the entire board is baked at a temperature of 120°C to 160°C for 2 to 4 hours.

[0182] After the double-sided functional circuitry is fabricated but before surface treatment, a baking process is performed on the entire board. At this point, the substrate has undergone multiple wet and dry processes, including lamination, punching, film application, exposure, development, etching, and film removal, resulting in the accumulation of moisture and internal stress within the board. Baking before subsequent electroplating and molding processes effectively eliminates these adverse factors, laying a stable material foundation for subsequent high-precision processing.

[0183] The baking process is carried out in an oven or tunnel dryer with forced hot air circulation. The main process parameters are as follows: (1) Baking temperature: The baking temperature is set to 120℃ to 160℃. The basis for setting this temperature range is that the temperature needs to be higher than the boiling point of water to ensure that the moisture adsorbed inside the board can be effectively vaporized and escaped; at the same time, the temperature should be lower than the glass transition temperature of the board's insulating layer material to avoid irreversible dimensional changes or warping deformation after the board enters the high elastic state or viscous flow state. For conventional FR-4 boards (Tg value of about 130℃ to 140℃), the preferred baking temperature is 110℃ to 120℃, which ensures sufficient dehumidification and leaves a certain temperature safety margin. For high Tg boards (Tg value above 170℃), the baking temperature can be increased to 120℃ to 160℃ to shorten the baking time or improve the dehumidification efficiency.

[0184] (2) Baking time: The baking time is set to 2 to 4 hours. The selection of baking time is related to the thickness of the board, the size of the panels, the baking temperature, and the loading density of the oven. For the 0.41 mm thick substrate described in this disclosure, a baking time of 2 to 4 hours has been experimentally verified to be sufficient to allow the moisture inside the board to escape completely and to effectively release the internal stress. If the baking time is too short, the dehumidification and stress relief effects will be insufficient; if the baking time is too long, although there is no technical hazard, it will reduce production efficiency and increase energy consumption.

[0185] (3) Baking environment: During the baking process, forced hot air circulation is maintained in the oven to ensure uniform temperature in each area, with the temperature difference controlled within ±5℃. The oven can be equipped with a dehumidification function to promptly remove volatile moisture from the oven and prevent water vapor from condensing or re-adsorbing on the board surface. For applications with high reliability requirements, baking can be carried out under a nitrogen protective atmosphere to prevent excessive oxidation of the copper surface at high temperatures.

[0186] Baking effectively removes moisture adsorbed on the substrate during previous wet processes, preventing quality defects such as delamination and blistering caused by moisture vaporization in subsequent high-temperature processes. It also fully releases internal stress accumulated during lamination and machining, improving substrate dimensional stability and reducing aging deformation during subsequent processing and use. Baking stabilizes the substrate dimensions, working in synergy with core processes such as zone alignment exposure and auxiliary copper layer blocking cutting to ensure the final product's three-dimensional accuracy (thickness, alignment, and shape) meets stringent tolerance requirements.

[0187] The high-precision micro-circuit board manufacturing method of this invention involves creating a grid-like flow-guiding pattern on a thickened copper-clad board and then bonding it under high temperature and pressure. This results in a uniformly thinned and denser insulating layer, with the board thickness tolerance controlled within ±20μm. Multiple alignment holes are set around the sub-panel area, and independent alignment exposure is used for each zone, effectively compensating for local expansion and contraction of the large panel, achieving a double-sided alignment accuracy of ±20μm. Simultaneous fabrication of auxiliary copper layer circuitry and utilization of the copper layer's laser-blocking effect improves the shape cutting accuracy from the equipment's own ±50μm to a pattern accuracy of ±20μm. Combined with double-sided controlled depth cutting and micro-film bonding processes, this method balances edge quality and shipping convenience. The synergistic combination of these three methods—uniform lamination thickness, zoned alignment, and barrier layer cutting—systematically overcomes the technological bottlenecks in thickness, alignment, and three-dimensional shape accuracy of micro-circuits, achieving high-yield mass production without the need for dedicated high-precision equipment.

[0188] Example 2

[0189] Embodiment 2 of the present invention provides a method for manufacturing a high-precision micro circuit board, such as... Figure 8 As shown, it includes the following steps: Step S100: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; Step S200: A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. Step S300: The double-sided copper-clad board with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. Step S400: Form a partitioned positioning structure on the laminated substrate; Step S700: Use the partition positioning structure to perform partition alignment, and create functional lines in the graphic reservation area of ​​each sub-region; Step S800: The length direction of the single-board unit is formed by mechanical milling, and the width direction of the single-board unit is formed by dicing process to separate and obtain each single-board unit.

[0190] The core difference between this embodiment and Embodiment 1 lies in the different choices of the forming method. Specifically, in Embodiment 1, when manufacturing the functional circuits, an auxiliary copper layer circuit with the same outline as the shape is simultaneously fabricated at the edge of the effective area of ​​the single-board unit as a blocking structure. Subsequently, laser cutting is performed based on the outer edge of this blocking structure, and the cutting accuracy is improved from the equipment's own accuracy to the graphic accuracy by utilizing the blocking effect of the copper layer on the laser. In contrast, this embodiment does not fabricate a blocking structure. Instead, conventional mechanical milling is used to form the length direction of the single-board unit, and semiconductor dicing is used to cut the width direction. The accuracy requirement of ±20μm in the width direction is directly achieved by relying on the high-precision mechanical positioning system of the dicing equipment itself. Both embodiments are identical in their preliminary steps, including providing a thickened double-sided copper-clad laminate, fabricating a pre-defined pattern structure with a current-guiding function (such as a grid circuit pattern, including an etched area and a copper layer buffer), performing high-temperature and high-pressure lamination to reduce the board thickness and make the insulating layer dense and uniform, punching multiple sets of alignment holes around each sub-region on the substrate after lamination to form a partitioned positioning structure, and using this partitioned positioning structure for partitioned alignment exposure to fabricate functional circuits. The specific implementation methods, process parameters, and technical effects of the above identical steps can be referred to the corresponding description in Embodiment 1, and will not be repeated here. The two embodiments are applicable to different production line conditions and product requirements: Embodiment 1 is suitable for scenarios where the laser equipment has limited precision but high-precision forming is desired and subsequent processing to assist in copper layer formation is allowed; Embodiment 2 is suitable for application scenarios that are equipped with dicing equipment, where a simplified process is desired, and residual copper layer is not allowed at the edge of the single board. Those skilled in the art can flexibly choose according to actual needs.

[0191] The dicing process used in this embodiment, specifically referring to the use of wafer dicing equipment in the semiconductor packaging field, employs a high-speed rotating diamond blade to mechanically cut the circuit board substrate. The dicing machine spindle speed can reach 30,000 to 60,000 rpm, and the worktable positioning resolution reaches sub-micron level. Combined with a vision-based automatic alignment system, the overall cutting accuracy can reach ±20μm, which meets the stringent tolerance requirements in the width direction of the micro-circuit board disclosed in this invention. During dicing, the blade travels along a predetermined straight path, and the cutting depth must completely penetrate the board. Deionized water or pure water is used for cooling and rinsing during the cutting process to remove cutting heat and debris. Because the dicing blade is extremely thin (typically 0.015mm to 0.1mm), the kerf width is much smaller than that of traditional milling cutters, which helps to improve the utilization rate of panel materials. Mechanical milling in the length direction can be completed using a conventional PCB CNC milling machine, whose ±0.1mm accuracy meets the relatively relaxed tolerance requirements in the length direction.

[0192] Example 3

[0193] Embodiment 3 of the present invention provides a method for manufacturing a high-precision micro circuit board, comprising the following steps.

[0194] 1. Take a double-sided copper-clad laminate that is thicker than the finished board (for example, if the cost board thickness is 0.41mm, then a 0.5mm double-sided copper-clad laminate can be used), and directly create the circuit pattern (the circuit pattern is a grid pattern), such as... Figure 3 As shown, the panel includes a tool edge 11 and multiple sub-paneling areas 12, each containing a processing area 13; the frame lines divide the panel into multiple sub-paneling areas 12; the panel surface of each sub-paneling area is as follows... Figure 4 As shown, a double-sided etching area 14 (process: dry film application, exposure, development, etching, and film removal) and a processing area 13 are fabricated within each sub-panel area 12. A copper layer buffer zone 15 is reserved between the etching area 14 and the processing area 13.

[0195] The purpose of the copper layer buffer is to prevent unevenness and roughness of the copper layer near the edge of the etched area after the next lamination process. Therefore, the copper layer buffer is set up to prevent the fabrication of circuits in this area, thus preventing problems such as unevenness of the board and unevenness of the circuits.

[0196] 2. For the tool structure copper-clad laminate, the maximum lamination temperature is the temperature of Tg plus 10°C to 20°C, the pressure is 260PSI to 400PSI, and the lamination time is 2 hours to 4 hours.

[0197] Pressed layout structure such as Figure 5 As shown: in order, they are mirror steel plate 2 (high surface smoothness), ultra-thin release film 3 (5-10μm), tool structure copper clad board 1, ultra-thin release film 3, and mirror steel plate 2.

[0198] The function is to compress the thickness, and the key is to compact the insulation layer, making the board stronger and fully releasing the internal stress.

[0199] Explanation: The purpose of creating the etched areas is to allow the adhesive to flow out from these areas during lamination, improving the flow balance across different regions and preventing uneven board thickness caused by insufficient adhesive flow at the edges (flowing along the outer edge) while the center is under-flowed.

[0200] 3. After lamination, measure the thickness of the board body. Micro-sections can be used for measurement. The thickness tolerance of the board body is acceptable (0.41±0.02mm). Then punch alignment holes (OPE punching, which provides alignment holes for exposure). After that, create circuit patterns in the processing area (the process is: dry film application, exposure, development, etching, and film removal).

[0201] Optionally, punching alignment holes involves punching multiple alignment holes, as designed as follows: Figure 6 As shown, multiple alignment holes 16 are distributed in the tool area outside some or each sub-panel area.

[0202] Function: To provide alignment holes for the alignment and exposure of circuit patterns, that is, instead of punching alignment holes only at the four corners, now alignment holes are punched outside some or all panel areas. During alignment and exposure, each sub-panel area can be aligned using its corresponding alignment hole.

[0203] Optionally, exposure can be performed using an LDI exposure machine, or by using multiple sets of positioning holes. For example, positioning holes around each sub-panel area can be selected to position and expose that sub-panel area.

[0204] LDI can only expose one side at a time. After one side is exposed, the data for the second side is adjusted, and then the other side is exposed (double-sided exposure). This avoids the problem of long resting time after the first side exposure, which can cause the pattern to be misaligned between the two sides due to the influence of the environment on the dry film.

[0205] Optionally, Because the circuit board has a simple circuit (only 4 wires) and the top and bottom surfaces are symmetrical, the circuitry on the first surface can be completed first. This involves LDI exposure on the first surface, followed by development, etching, and film stripping. Then, the circuitry pattern from the first surface is scanned using an AOI scanner (adjusting parameters such as lighting). The scanned circuitry pattern from the first surface is then input in reverse to create graphic data. This actual scanned graphic data from the first surface is then used as the reference data for the second surface exposure. The processing accuracy can reach ±5μm, but the process is relatively long and complex.

[0206] When fabricating the circuitry, an auxiliary copper layer can be created on the edges of both sides of each PCS board. The design of the auxiliary copper layer is as follows: Figure 7 As shown, the auxiliary copper layer circuit 17 is located within the effective range of the PCS board, and the outer edge of the circuit is consistent with the outer contour of the PCS board. The auxiliary copper layer circuitry serves as a barrier to facilitate direct laser forming in subsequent processing. The laser burns into this barrier layer within the effective area of ​​the PCS board. Since laser cutting accuracy is ±50μm, which is insufficient for the required board width, a barrier layer (auxiliary copper layer circuitry) is used to achieve a pattern accuracy of ±20μm or even ±15μm. Laser cutting follows the edge of the auxiliary copper layer circuitry. Although the laser cutting accuracy is ±50μm, the copper layer's barrier ensures the actual cut shape is achieved along the edge of the auxiliary copper layer circuitry. The laser energy needs to be adjusted to cut through the substrate without penetrating the copper layer, thus improving the precision of laser processing.

[0207] After the two sides of the pattern are made, the whole board can be baked to remove the moisture inside the board and prevent abnormal expansion and contraction or misalignment in subsequent processing. The baking parameters are 120-160℃ for 2 to 4 hours.

[0208] The alignment accuracy of the lines on both sides can then be measured using a micro-slice.

[0209] Then the circuit is electroplated with gold.

[0210] Optionally, before electroplating gold, an anti-electroplating dry film is applied and a dry film pattern is created to cover the auxiliary copper layer circuitry.

[0211] 4. Molding.

[0212] Option 1 for forming: When the auxiliary copper layer circuit is not made, it can be formed directly. Since the tolerance requirement in the length direction of the circuit board is relatively large, which is ±0.1mm, the two ends of the length can be formed directly by milling. The tolerance requirement in the width direction is relatively small, which is ±0.02mm, so the two long sides can be cut using the (wafer cutting) dicing process, with an accuracy of ±20μm.

[0213] Option 2 for forming: Since the length direction of the board has a large tolerance requirement of ±0.1mm, the two ends of the length can be directly formed by milling, and auxiliary copper layer circuits do not need to be made at the two ends of the length.

[0214] Width shaping is achieved using laser cutting, which cuts directly through the material. For example... Figure 9 As shown in the image, the red line path represents the laser cutting path.

[0215] Molding option 3: The process involves "first-side laser-controlled deep cutting → first-side etching (etching away the auxiliary copper layer circuitry and electroplated gold leads, while the electroplated gold circuitry will not be etched) → first-side micro-film application → second-side laser-controlled deep cutting → second-side etching".

[0216] The single-pass laser cutting method has the following four problems in practical applications: First, if a single-sided laser cutting method is used, the laser energy required is high because the entire thickness of the plate needs to be cut through at once. The high-energy laser beam will generate a large heat-affected zone during the cutting process, which will cause thermal damage such as carbonization of the resin substrate and uneven melting of glass fiber at the cutting edge. After molding, the edge of the plate will show an uneven morphology at the microscale, which will affect the appearance quality and edge strength of the product.

[0217] Secondly, the single-board unit involved in this embodiment has extremely small dimensions, only 3.5mm × 1.8mm, and its own structural rigidity is limited. If it is cut directly through from one side in one go, by the end of the cutting process, the connection area between the single-board unit and the motherboard is extremely small, and the board almost loses its supporting rigidity. In addition, the vacuum adsorption force of the laser equipment's worktable is difficult to effectively act on such a small area. Under the combined action of the laser impact force and the auxiliary airflow, the single-board unit may experience slight movement or premature detachment in the final cutting stage, causing the final cutting path to deviate from the predetermined trajectory and affecting the final shape accuracy.

[0218] Third, the circuit board must be delivered in single-board unit form. If a single-cut method is used, thousands of single-board units will be scattered after forming, which is not only difficult to collect and organize, but also cannot be automatically picked up in the downstream surface mount process. During transportation, the circuit surface is also very easy to be scratched or contaminated, which seriously affects the product yield and ease of use.

[0219] Fourth, in this solution, the auxiliary copper layer circuitry needs to be etched away after fulfilling its blocking function. If a single-sided, one-time cut-through molding is used, the individual board units will be completely separated and scattered after cutting. Small-sized board units cannot be processed using conventional batch etching processes, making the removal of the auxiliary copper layer circuitry technically difficult. Therefore, this disclosure preferably employs a composite process combining double-sided controlled-depth cutting with step-by-step etching and micro-adhesive film support. In this process, the first laser controlled-depth cut only cuts to about half the board thickness, while the board remains as a whole. At this point, the first-sided auxiliary copper layer can be batch-etched away. Subsequently, a micro-adhesive film is attached as a temporary support carrier, and a second laser controlled-depth cut is performed to completely separate the board units. Finally, the second-sided auxiliary copper layer is etched away under the support of the micro-adhesive film. This process design fully utilizes the blocking effect of the auxiliary copper layer during cutting and solves the process connection problem between the forming, etching, shipping, and downstream use stages of the micro-board through the introduction of the micro-adhesive film, achieving complete process matching.

[0220] This embodiment achieves a simultaneous breakthrough in the three-dimensional precision of micro-circuit boards through the synergistic effect of three major methods: uniform thickness bonding, partitioned alignment exposure, and auxiliary copper layer blocking cutting. The thickness tolerance is stably controlled within ±20μm, the double-sided circuit alignment accuracy reaches ±20μm, and the width direction shape accuracy is improved from ±50μm of the laser equipment itself to ±20μm. At the same time, the double-sided depth control cutting combined with the micro-adhesion film process effectively solves the problems of misalignment at the cutting end of the micro-board and the problem of shipment scattering, and realizes high-yield and stable mass production of 2000 micro-circuit boards per panel.

[0221] Example 4

[0222] Embodiment 4 of the present invention also provides a high-precision micro circuit board, which is manufactured using the high-precision micro circuit board manufacturing method described in any of the preceding embodiments.

[0223] The high-precision micro circuit board of this invention is manufactured by the high-precision micro circuit board manufacturing method in method embodiments one to three, so the description is relatively simple. For details, please refer to the relevant descriptions in the previous method embodiments, which will not be repeated here.

[0224] It should be noted that, due to the high precision of circuit board processing, the high density of circuit distribution, and the thinness of the stack-up structure, all reaching the micron level, it is difficult to represent certain layers or certain patterns if the actual stack-up structure is drawn. Therefore, the accompanying drawings in this embodiment are graphic representations that highlight the technical features and do not represent the actual circuit board structure in the processing process, nor do they represent scaled-up views of the processing structure.

[0225] This embodiment adopts a description method based on technical features as key nodes, and the existing technology in the processing process may not be described in detail. For example, the existing technology for circuit pattern making generally assumes "dry film application → exposure → development → etching → film removal", and the basic process of lamination generally assumes "core board layer extraction → prepreg extraction → stacking → fusion / riveting → layout → lamination → X-ray targeting → burr removal". Therefore, the understanding of this embodiment is mainly the understanding of the process of forming technical features during processing.

[0226] like Figure 10 As shown, the high-precision microcircuit board prepared using the embodiments of the present invention has good appearance quality. Preferably, this... Figure 10 The high-precision microcircuit board was prepared using Example 1.

[0227] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made under the inventive concept of the present invention using the description and drawings of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A method for manufacturing a high-precision microcircuit board for an integrated smart wearable module, characterized in that, Includes the following steps: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. The double-sided copper-clad laminate with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. A partitioned positioning structure is formed on the laminated substrate; The partition positioning structure is used to perform partition alignment, and functional lines are made in the graphic reservation area of ​​each sub-region. At the same time, a blocking structure is made along the preset outer contour at the edge of the effective area of ​​the single board unit. The outer edge of the barrier structure is used for shaping to separate and obtain each single-board unit.

2. The method according to claim 1, characterized in that, The preset graphic structure is a grid circuit pattern, which is used to divide the entire board into multiple sub-panel areas, and an etched area is formed in each sub-panel area as the flow guiding area, and a copper layer buffer is reserved between the etched area and the graphic retention area.

3. The method according to claim 1, characterized in that, The pressing process employs a composite structure of a mirror-finished steel plate and an ultra-thin release film, wherein the thickness of the release film is 5μm to 10μm, the maximum pressing temperature is the glass transition temperature of the insulating layer plus 10°C to 20°C, the pressure is 260PSI to 400PSI, and the pressing time is 2 hours to 4 hours.

4. The method according to claim 1, characterized in that, The partition positioning structure consists of multiple sets of alignment holes distributed around some or all of the sub-regions.

5. The method according to claim 1, characterized in that, The step of using the partition positioning structure to perform partition alignment and creating functional lines within the graphic reservation area of ​​each sub-region includes: A laser direct imaging exposure machine (LDI) is used. When exposing any sub-region, the corresponding positioning structure located near that sub-region is selected for positioning. For the same substrate, after the first side is exposed, the data is immediately switched to expose the second side.

6. The method according to claim 1, characterized in that, The creation of functional lines within the graphic preservation area of ​​each sub-region includes: First, complete the first side of the circuit and then obtain the actual graphic position data through automatic optical inspection (AOI). The actual graphic position data is reverse-processed to generate reference data for the second exposure; the second exposure is then performed based on the reference data.

7. The method according to claim 1, characterized in that, The blocking structure is an auxiliary copper layer circuit that conforms to the outer contour of the single board; the shape forming process includes: Adjust the laser energy to a threshold level that allows it to cut through the substrate without cutting through the copper layer; control the laser to cut along the outer edge of the auxiliary copper layer circuit; or, The first laser-controlled depth cut is performed along the auxiliary copper layer circuitry on the first side; the first etching is performed to remove the auxiliary copper layer circuitry on the first side; a micro-adhesive film is attached to the first side; the second laser-controlled depth cut is performed from the second side to separate the board; the second etching is performed to remove the auxiliary copper layer circuitry on the second side, so that the board is shipped in a state of being adhered to the micro-adhesive film.

8. The method according to claim 1, characterized in that, After the functional circuits are fabricated and before the surface treatment of the circuits is performed, the process also includes baking the entire board at a temperature of 120°C to 160°C for 2 to 4 hours.

9. A method for manufacturing a high-precision micro circuit board, characterized in that, Includes the following steps: Provide a double-sided copper-clad laminate with a thickness greater than that of the finished board; A preset graphic structure with a current guiding function is fabricated on the double-sided copper-clad board. The preset graphic structure divides the entire board into multiple sub-regions and forms a current guiding area and a graphic retention area in each sub-region. The double-sided copper-clad laminate with a preset pattern structure is laminated to reduce the thickness of the board and make the insulating layer dense and uniform, so as to obtain a substrate that meets the thickness tolerance requirements. A partitioned positioning structure is formed on the laminated substrate; The partition positioning structure is used to perform partition alignment, and functional lines are created within the graphic preservation area of ​​each sub-region. The length direction of the single-board unit is formed by mechanical milling, and the width direction of the single-board unit is formed by dicing process to separate and obtain each single-board unit.

10. A high-precision micro circuit board, characterized in that, It is prepared by the manufacturing method described in any one of claims 1 to 9.

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